./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted-lit/Urban-WST2013-Fig2-modified1000.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted-lit/Urban-WST2013-Fig2-modified1000.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 0b3c6d5b6497aa5ff0eb68154ec5345da59cc3565c3dc280e241d196cfa0cbf4 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-02 20:22:39,046 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-02 20:22:39,048 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-02 20:22:39,098 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-02 20:22:39,099 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-02 20:22:39,104 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-02 20:22:39,106 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-02 20:22:39,108 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-02 20:22:39,110 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-02 20:22:39,111 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-02 20:22:39,112 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-02 20:22:39,113 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-02 20:22:39,113 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-02 20:22:39,115 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-02 20:22:39,116 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-02 20:22:39,117 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-02 20:22:39,118 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-02 20:22:39,119 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-02 20:22:39,121 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-02 20:22:39,123 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-02 20:22:39,124 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-02 20:22:39,126 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-02 20:22:39,127 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-02 20:22:39,128 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-02 20:22:39,139 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-02 20:22:39,139 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-02 20:22:39,140 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-02 20:22:39,141 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-02 20:22:39,141 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-02 20:22:39,142 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-02 20:22:39,143 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-02 20:22:39,143 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-02 20:22:39,144 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-02 20:22:39,145 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-02 20:22:39,146 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-02 20:22:39,146 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-02 20:22:39,147 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-02 20:22:39,148 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-02 20:22:39,148 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-02 20:22:39,149 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-02 20:22:39,150 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-02 20:22:39,155 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-11-02 20:22:39,196 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-02 20:22:39,196 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-02 20:22:39,197 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-02 20:22:39,197 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-02 20:22:39,198 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-02 20:22:39,198 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-02 20:22:39,198 INFO L138 SettingsManager]: * Use SBE=true [2022-11-02 20:22:39,199 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-02 20:22:39,199 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-02 20:22:39,199 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-02 20:22:39,199 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-02 20:22:39,199 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-02 20:22:39,200 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-02 20:22:39,200 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-02 20:22:39,200 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-02 20:22:39,200 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-02 20:22:39,200 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-02 20:22:39,201 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-02 20:22:39,201 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-02 20:22:39,206 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-02 20:22:39,206 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-02 20:22:39,207 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-02 20:22:39,207 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-02 20:22:39,207 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-02 20:22:39,208 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-02 20:22:39,208 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-02 20:22:39,208 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-02 20:22:39,208 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-02 20:22:39,210 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-02 20:22:39,210 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0b3c6d5b6497aa5ff0eb68154ec5345da59cc3565c3dc280e241d196cfa0cbf4 [2022-11-02 20:22:39,600 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-02 20:22:39,624 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-02 20:22:39,627 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-02 20:22:39,629 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-02 20:22:39,630 INFO L275 PluginConnector]: CDTParser initialized [2022-11-02 20:22:39,632 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/termination-crafted-lit/Urban-WST2013-Fig2-modified1000.c [2022-11-02 20:22:39,713 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/data/7e73369b5/68ecfdd8b63b4fa49db911e79bff85ab/FLAG45602808d [2022-11-02 20:22:40,246 INFO L306 CDTParser]: Found 1 translation units. [2022-11-02 20:22:40,246 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/sv-benchmarks/c/termination-crafted-lit/Urban-WST2013-Fig2-modified1000.c [2022-11-02 20:22:40,253 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/data/7e73369b5/68ecfdd8b63b4fa49db911e79bff85ab/FLAG45602808d [2022-11-02 20:22:40,604 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/data/7e73369b5/68ecfdd8b63b4fa49db911e79bff85ab [2022-11-02 20:22:40,607 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-02 20:22:40,609 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-02 20:22:40,614 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-02 20:22:40,616 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-02 20:22:40,621 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-02 20:22:40,622 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,625 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@701d8e45 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40, skipping insertion in model container [2022-11-02 20:22:40,625 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,635 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-02 20:22:40,651 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-02 20:22:40,887 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 20:22:40,896 INFO L203 MainTranslator]: Completed pre-run [2022-11-02 20:22:40,911 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 20:22:40,925 INFO L208 MainTranslator]: Completed translation [2022-11-02 20:22:40,925 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40 WrapperNode [2022-11-02 20:22:40,925 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-02 20:22:40,928 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-02 20:22:40,928 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-02 20:22:40,928 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-02 20:22:40,938 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,942 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,957 INFO L138 Inliner]: procedures = 4, calls = 2, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 21 [2022-11-02 20:22:40,958 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-02 20:22:40,958 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-02 20:22:40,959 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-02 20:22:40,959 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-02 20:22:40,968 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,969 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,969 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,970 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,971 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,975 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,976 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,977 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,978 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-02 20:22:40,979 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-02 20:22:40,979 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-02 20:22:40,979 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-02 20:22:40,980 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (1/1) ... [2022-11-02 20:22:40,986 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:22:40,998 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:41,011 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:22:41,043 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-02 20:22:41,071 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-02 20:22:41,071 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-02 20:22:41,151 INFO L235 CfgBuilder]: Building ICFG [2022-11-02 20:22:41,154 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-02 20:22:41,242 INFO L276 CfgBuilder]: Performing block encoding [2022-11-02 20:22:41,249 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-02 20:22:41,249 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-02 20:22:41,251 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:22:41 BoogieIcfgContainer [2022-11-02 20:22:41,251 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-02 20:22:41,252 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-02 20:22:41,252 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-02 20:22:41,257 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-02 20:22:41,258 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:22:41,258 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 08:22:40" (1/3) ... [2022-11-02 20:22:41,259 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23c5ae56 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:22:41, skipping insertion in model container [2022-11-02 20:22:41,259 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:22:41,260 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:22:40" (2/3) ... [2022-11-02 20:22:41,267 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23c5ae56 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:22:41, skipping insertion in model container [2022-11-02 20:22:41,267 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:22:41,268 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:22:41" (3/3) ... [2022-11-02 20:22:41,269 INFO L332 chiAutomizerObserver]: Analyzing ICFG Urban-WST2013-Fig2-modified1000.c [2022-11-02 20:22:41,335 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-02 20:22:41,335 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-02 20:22:41,335 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-02 20:22:41,336 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-02 20:22:41,336 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-02 20:22:41,336 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-02 20:22:41,336 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-02 20:22:41,336 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-02 20:22:41,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 9 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:41,360 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-02 20:22:41,360 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:41,361 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:41,366 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:41,366 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-02 20:22:41,367 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-02 20:22:41,367 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 9 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:41,368 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-02 20:22:41,368 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:41,368 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:41,369 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:41,369 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-02 20:22:41,375 INFO L748 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true; 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 2#L19-2true [2022-11-02 20:22:41,375 INFO L750 eck$LassoCheckResult]: Loop: 2#L19-2true assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 6#L21-2true assume !(main_~x2~0#1 > 1); 4#L21-3true main_~x1~0#1 := 1 + main_~x1~0#1; 2#L19-2true [2022-11-02 20:22:41,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:41,380 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-02 20:22:41,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:41,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529471367] [2022-11-02 20:22:41,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:41,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:41,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:41,476 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:41,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:41,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:41,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:41,500 INFO L85 PathProgramCache]: Analyzing trace with hash 40944, now seen corresponding path program 1 times [2022-11-02 20:22:41,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:41,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342262647] [2022-11-02 20:22:41,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:41,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:41,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:41,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:41,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:41,580 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [342262647] [2022-11-02 20:22:41,580 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [342262647] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:22:41,581 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:22:41,581 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-02 20:22:41,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286314069] [2022-11-02 20:22:41,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:22:41,587 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:22:41,588 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:22:41,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:22:41,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:22:41,661 INFO L87 Difference]: Start difference. First operand has 9 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:41,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:22:41,690 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2022-11-02 20:22:41,692 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2022-11-02 20:22:41,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 20:22:41,696 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 6 states and 7 transitions. [2022-11-02 20:22:41,697 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2022-11-02 20:22:41,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2022-11-02 20:22:41,698 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6 states and 7 transitions. [2022-11-02 20:22:41,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:22:41,699 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6 states and 7 transitions. [2022-11-02 20:22:41,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6 states and 7 transitions. [2022-11-02 20:22:41,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6 to 6. [2022-11-02 20:22:41,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:41,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 7 transitions. [2022-11-02 20:22:41,770 INFO L240 hiAutomatonCegarLoop]: Abstraction has 6 states and 7 transitions. [2022-11-02 20:22:41,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:22:41,790 INFO L428 stractBuchiCegarLoop]: Abstraction has 6 states and 7 transitions. [2022-11-02 20:22:41,791 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-02 20:22:41,791 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6 states and 7 transitions. [2022-11-02 20:22:41,792 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 20:22:41,792 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:41,792 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:41,793 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:41,793 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 20:22:41,793 INFO L748 eck$LassoCheckResult]: Stem: 31#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 32#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 28#L19-2 [2022-11-02 20:22:41,794 INFO L750 eck$LassoCheckResult]: Loop: 28#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 29#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 33#L21-2 assume !(main_~x2~0#1 > 1); 30#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 28#L19-2 [2022-11-02 20:22:41,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:41,795 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2022-11-02 20:22:41,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:41,796 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248999397] [2022-11-02 20:22:41,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:41,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:41,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:41,801 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:41,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:41,804 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:41,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:41,805 INFO L85 PathProgramCache]: Analyzing trace with hash 1271024, now seen corresponding path program 1 times [2022-11-02 20:22:41,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:41,806 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961888786] [2022-11-02 20:22:41,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:41,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:41,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:41,855 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:41,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:41,856 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961888786] [2022-11-02 20:22:41,856 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961888786] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:22:41,856 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [92132093] [2022-11-02 20:22:41,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:41,857 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:22:41,857 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:41,860 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:22:41,905 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-02 20:22:41,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:41,926 INFO L263 TraceCheckSpWp]: Trace formula consists of 11 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-02 20:22:41,928 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:22:41,987 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:41,996 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:22:42,049 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:42,050 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [92132093] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:22:42,050 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:22:42,051 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 5 [2022-11-02 20:22:42,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [566481559] [2022-11-02 20:22:42,054 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:22:42,054 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:22:42,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:22:42,056 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 20:22:42,056 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-11-02 20:22:42,057 INFO L87 Difference]: Start difference. First operand 6 states and 7 transitions. cyclomatic complexity: 2 Second operand has 6 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:42,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:22:42,092 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2022-11-02 20:22:42,092 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2022-11-02 20:22:42,093 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2022-11-02 20:22:42,095 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2022-11-02 20:22:42,095 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2022-11-02 20:22:42,096 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2022-11-02 20:22:42,096 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2022-11-02 20:22:42,097 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:22:42,097 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2022-11-02 20:22:42,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2022-11-02 20:22:42,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2022-11-02 20:22:42,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:42,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2022-11-02 20:22:42,101 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2022-11-02 20:22:42,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-02 20:22:42,103 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2022-11-02 20:22:42,103 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-02 20:22:42,105 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2022-11-02 20:22:42,105 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2022-11-02 20:22:42,106 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:42,107 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:42,107 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:42,107 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 1, 1, 1] [2022-11-02 20:22:42,108 INFO L748 eck$LassoCheckResult]: Stem: 73#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 74#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 70#L19-2 [2022-11-02 20:22:42,108 INFO L750 eck$LassoCheckResult]: Loop: 70#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 71#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 75#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 78#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 77#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 76#L21-2 assume !(main_~x2~0#1 > 1); 72#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 70#L19-2 [2022-11-02 20:22:42,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:42,110 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2022-11-02 20:22:42,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:42,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324247195] [2022-11-02 20:22:42,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:42,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:42,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:42,122 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:42,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:42,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:42,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:42,130 INFO L85 PathProgramCache]: Analyzing trace with hash -787882000, now seen corresponding path program 2 times [2022-11-02 20:22:42,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:42,131 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221769146] [2022-11-02 20:22:42,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:42,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:42,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:42,299 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:42,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:42,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221769146] [2022-11-02 20:22:42,301 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1221769146] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:22:42,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [675827288] [2022-11-02 20:22:42,302 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 20:22:42,302 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:22:42,303 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:42,305 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:22:42,329 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-02 20:22:42,350 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 20:22:42,350 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:22:42,351 INFO L263 TraceCheckSpWp]: Trace formula consists of 20 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-02 20:22:42,352 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:22:42,394 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:42,394 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:22:42,487 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:42,488 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [675827288] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:22:42,488 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:22:42,488 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2022-11-02 20:22:42,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624741490] [2022-11-02 20:22:42,489 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:22:42,489 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:22:42,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:22:42,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-02 20:22:42,490 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2022-11-02 20:22:42,491 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 12 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 11 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:42,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:22:42,516 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-11-02 20:22:42,516 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2022-11-02 20:22:42,517 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2022-11-02 20:22:42,517 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2022-11-02 20:22:42,518 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-02 20:22:42,518 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-11-02 20:22:42,518 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2022-11-02 20:22:42,518 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:22:42,518 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-02 20:22:42,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2022-11-02 20:22:42,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-11-02 20:22:42,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:42,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-11-02 20:22:42,521 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-02 20:22:42,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-02 20:22:42,523 INFO L428 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-02 20:22:42,523 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-02 20:22:42,523 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2022-11-02 20:22:42,526 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2022-11-02 20:22:42,527 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:42,527 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:42,529 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:42,529 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 1, 1, 1] [2022-11-02 20:22:42,529 INFO L748 eck$LassoCheckResult]: Stem: 148#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 145#L19-2 [2022-11-02 20:22:42,529 INFO L750 eck$LassoCheckResult]: Loop: 145#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 146#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 150#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 159#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 158#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 157#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 156#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 155#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 154#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 153#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 152#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 151#L21-2 assume !(main_~x2~0#1 > 1); 147#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 145#L19-2 [2022-11-02 20:22:42,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:42,535 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2022-11-02 20:22:42,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:42,536 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871004210] [2022-11-02 20:22:42,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:42,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:42,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:42,547 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:42,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:42,553 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:42,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:42,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1798029296, now seen corresponding path program 3 times [2022-11-02 20:22:42,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:42,559 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827984903] [2022-11-02 20:22:42,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:42,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:42,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:42,871 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:42,871 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:42,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1827984903] [2022-11-02 20:22:42,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1827984903] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:22:42,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1565292159] [2022-11-02 20:22:42,872 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-02 20:22:42,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:22:42,872 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:42,893 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:22:42,902 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-02 20:22:42,950 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-02 20:22:42,950 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:22:42,951 INFO L263 TraceCheckSpWp]: Trace formula consists of 38 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-02 20:22:42,953 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:22:43,029 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:43,030 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:22:43,351 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:43,351 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1565292159] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:22:43,351 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:22:43,352 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 23 [2022-11-02 20:22:43,352 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004074799] [2022-11-02 20:22:43,352 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:22:43,352 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:22:43,352 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:22:43,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-02 20:22:43,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2022-11-02 20:22:43,354 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 24 states, 24 states have (on average 1.0416666666666667) internal successors, (25), 23 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:43,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:22:43,409 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2022-11-02 20:22:43,410 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2022-11-02 20:22:43,411 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2022-11-02 20:22:43,411 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2022-11-02 20:22:43,411 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2022-11-02 20:22:43,412 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2022-11-02 20:22:43,412 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2022-11-02 20:22:43,412 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:22:43,412 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-11-02 20:22:43,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2022-11-02 20:22:43,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2022-11-02 20:22:43,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:43,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-11-02 20:22:43,415 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-11-02 20:22:43,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-02 20:22:43,425 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-11-02 20:22:43,426 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-02 20:22:43,426 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2022-11-02 20:22:43,427 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2022-11-02 20:22:43,427 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:43,427 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:43,427 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:43,427 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [22, 1, 1, 1] [2022-11-02 20:22:43,428 INFO L748 eck$LassoCheckResult]: Stem: 289#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 290#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 286#L19-2 [2022-11-02 20:22:43,428 INFO L750 eck$LassoCheckResult]: Loop: 286#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 287#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 291#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 312#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 311#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 310#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 309#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 308#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 307#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 306#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 305#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 304#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 303#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 302#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 301#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 300#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 299#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 298#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 297#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 296#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 295#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 294#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 293#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 292#L21-2 assume !(main_~x2~0#1 > 1); 288#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 286#L19-2 [2022-11-02 20:22:43,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:43,428 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2022-11-02 20:22:43,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:43,429 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135857203] [2022-11-02 20:22:43,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:43,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:43,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:43,432 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:43,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:43,436 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:43,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:43,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1296597008, now seen corresponding path program 4 times [2022-11-02 20:22:43,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:43,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511722125] [2022-11-02 20:22:43,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:43,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:43,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:44,127 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:44,128 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:44,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511722125] [2022-11-02 20:22:44,129 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [511722125] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:22:44,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2073307580] [2022-11-02 20:22:44,129 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-02 20:22:44,130 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:22:44,131 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:44,135 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:22:44,136 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-02 20:22:44,182 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-02 20:22:44,183 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:22:44,184 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-02 20:22:44,191 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:22:44,299 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:44,299 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:22:45,320 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:45,321 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2073307580] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:22:45,321 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:22:45,321 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 47 [2022-11-02 20:22:45,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1416243538] [2022-11-02 20:22:45,322 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:22:45,322 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:22:45,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:22:45,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-11-02 20:22:45,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2022-11-02 20:22:45,326 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 48 states, 48 states have (on average 1.0208333333333333) internal successors, (49), 47 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:45,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:22:45,454 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2022-11-02 20:22:45,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2022-11-02 20:22:45,459 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2022-11-02 20:22:45,466 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2022-11-02 20:22:45,466 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2022-11-02 20:22:45,468 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2022-11-02 20:22:45,468 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2022-11-02 20:22:45,468 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:22:45,469 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-11-02 20:22:45,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2022-11-02 20:22:45,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2022-11-02 20:22:45,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:45,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2022-11-02 20:22:45,478 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-11-02 20:22:45,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-02 20:22:45,481 INFO L428 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-11-02 20:22:45,481 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-02 20:22:45,481 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2022-11-02 20:22:45,482 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2022-11-02 20:22:45,482 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:45,483 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:45,483 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:45,483 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [46, 1, 1, 1] [2022-11-02 20:22:45,484 INFO L748 eck$LassoCheckResult]: Stem: 562#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 563#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 559#L19-2 [2022-11-02 20:22:45,484 INFO L750 eck$LassoCheckResult]: Loop: 559#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 560#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 564#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 609#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 608#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 607#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 606#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 605#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 604#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 603#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 602#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 601#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 600#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 599#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 598#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 597#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 596#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 595#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 594#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 593#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 592#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 591#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 590#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 589#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 588#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 587#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 586#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 585#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 584#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 583#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 582#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 581#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 580#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 579#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 578#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 577#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 576#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 575#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 574#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 573#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 572#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 571#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 570#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 569#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 568#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 567#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 566#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 565#L21-2 assume !(main_~x2~0#1 > 1); 561#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 559#L19-2 [2022-11-02 20:22:45,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:45,484 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2022-11-02 20:22:45,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:45,485 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053392267] [2022-11-02 20:22:45,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:45,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:45,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:45,496 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:45,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:45,501 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:45,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:45,502 INFO L85 PathProgramCache]: Analyzing trace with hash -1762721808, now seen corresponding path program 5 times [2022-11-02 20:22:45,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:45,502 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115242681] [2022-11-02 20:22:45,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:45,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:45,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:47,532 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:47,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:47,532 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115242681] [2022-11-02 20:22:47,532 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115242681] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:22:47,533 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [247156143] [2022-11-02 20:22:47,533 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-02 20:22:47,533 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:22:47,533 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:47,537 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:22:47,540 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-02 20:22:47,607 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2022-11-02 20:22:47,608 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:22:47,610 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-02 20:22:47,614 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:22:47,774 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:47,774 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:22:51,107 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:51,107 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [247156143] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:22:51,107 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:22:51,107 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2022-11-02 20:22:51,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606061013] [2022-11-02 20:22:51,108 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:22:51,108 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:22:51,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:22:51,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2022-11-02 20:22:51,117 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2022-11-02 20:22:51,118 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 96 states, 96 states have (on average 1.0104166666666667) internal successors, (97), 95 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:51,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:22:51,395 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2022-11-02 20:22:51,395 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2022-11-02 20:22:51,404 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2022-11-02 20:22:51,406 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2022-11-02 20:22:51,406 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2022-11-02 20:22:51,407 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2022-11-02 20:22:51,407 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2022-11-02 20:22:51,409 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:22:51,409 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-11-02 20:22:51,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2022-11-02 20:22:51,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2022-11-02 20:22:51,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:22:51,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2022-11-02 20:22:51,424 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-11-02 20:22:51,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-11-02 20:22:51,427 INFO L428 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-11-02 20:22:51,427 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-02 20:22:51,427 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2022-11-02 20:22:51,431 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2022-11-02 20:22:51,431 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:22:51,431 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:22:51,433 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:22:51,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [94, 1, 1, 1] [2022-11-02 20:22:51,433 INFO L748 eck$LassoCheckResult]: Stem: 1099#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 1100#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 1096#L19-2 [2022-11-02 20:22:51,433 INFO L750 eck$LassoCheckResult]: Loop: 1096#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 1097#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1101#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1194#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1193#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1192#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1191#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1190#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1189#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1188#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1187#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1186#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1185#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1184#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1183#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1182#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1181#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1180#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1179#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1178#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1177#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1176#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1175#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1174#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1173#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1172#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1171#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1170#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1169#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1168#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1167#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1166#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1165#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1164#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1163#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1162#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1161#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1160#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1159#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1158#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1157#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1156#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1155#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1154#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1153#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1152#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1151#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1150#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1149#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1148#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1147#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1146#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1145#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1144#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1143#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1142#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1141#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1140#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1139#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1138#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1137#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1136#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1135#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1134#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1133#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1132#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1131#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1130#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1129#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1128#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1127#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1126#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1125#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1124#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1123#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1122#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1121#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1120#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1119#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1118#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1117#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1116#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1115#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1114#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1113#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1112#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1111#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1110#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1109#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1108#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1107#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1106#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1105#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1104#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1103#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 1102#L21-2 assume !(main_~x2~0#1 > 1); 1098#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 1096#L19-2 [2022-11-02 20:22:51,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:51,434 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2022-11-02 20:22:51,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:51,434 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663148046] [2022-11-02 20:22:51,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:51,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:51,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:51,437 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:22:51,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:22:51,438 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:22:51,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:22:51,439 INFO L85 PathProgramCache]: Analyzing trace with hash -203554832, now seen corresponding path program 6 times [2022-11-02 20:22:51,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:22:51,439 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148909250] [2022-11-02 20:22:51,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:22:51,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:22:51,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:22:57,065 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:57,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:22:57,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148909250] [2022-11-02 20:22:57,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1148909250] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:22:57,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [694270366] [2022-11-02 20:22:57,066 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-02 20:22:57,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:22:57,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:22:57,069 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:22:57,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-02 20:22:57,188 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2022-11-02 20:22:57,188 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:22:57,192 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 96 conjunts are in the unsatisfiable core [2022-11-02 20:22:57,198 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:22:57,500 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:22:57,500 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:23:08,675 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:23:08,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [694270366] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:23:08,675 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:23:08,675 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 191 [2022-11-02 20:23:08,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164721059] [2022-11-02 20:23:08,676 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:23:08,677 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:23:08,677 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:23:08,682 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 192 interpolants. [2022-11-02 20:23:08,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18336, Invalid=18336, Unknown=0, NotChecked=0, Total=36672 [2022-11-02 20:23:08,694 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand has 192 states, 192 states have (on average 1.0052083333333333) internal successors, (193), 191 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:23:09,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:23:09,296 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2022-11-02 20:23:09,296 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2022-11-02 20:23:09,298 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2022-11-02 20:23:09,299 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2022-11-02 20:23:09,299 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2022-11-02 20:23:09,299 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2022-11-02 20:23:09,300 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2022-11-02 20:23:09,300 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:23:09,300 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2022-11-02 20:23:09,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2022-11-02 20:23:09,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2022-11-02 20:23:09,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:23:09,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2022-11-02 20:23:09,309 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2022-11-02 20:23:09,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 192 states. [2022-11-02 20:23:09,310 INFO L428 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2022-11-02 20:23:09,310 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-02 20:23:09,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2022-11-02 20:23:09,312 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2022-11-02 20:23:09,312 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:23:09,312 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:23:09,313 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:23:09,313 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [190, 1, 1, 1] [2022-11-02 20:23:09,314 INFO L748 eck$LassoCheckResult]: Stem: 2164#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 2165#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 2161#L19-2 [2022-11-02 20:23:09,314 INFO L750 eck$LassoCheckResult]: Loop: 2161#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 2162#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2166#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2355#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2354#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2353#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2352#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2351#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2350#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2349#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2348#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2347#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2346#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2345#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2344#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2343#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2342#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2341#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2340#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2339#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2338#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2337#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2336#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2335#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2334#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2333#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2332#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2331#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2330#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2329#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2328#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2327#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2326#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2325#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2324#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2323#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2322#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2321#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2320#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2319#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2318#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2317#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2316#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2315#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2314#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2313#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2312#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2311#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2310#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2309#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2308#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2307#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2306#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2305#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2304#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2303#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2302#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2301#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2300#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2299#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2298#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2297#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2296#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2295#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2294#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2293#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2292#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2291#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2290#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2289#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2288#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2287#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2286#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2285#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2284#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2283#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2282#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2281#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2280#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2279#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2278#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2277#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2276#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2275#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2274#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2273#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2272#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2271#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2270#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2269#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2268#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2267#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2266#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2265#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2264#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2263#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2262#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2261#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2260#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2259#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2258#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2257#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2256#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2255#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2254#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2253#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2252#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2251#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2250#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2249#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2248#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2247#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2246#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2245#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2244#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2243#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2242#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2241#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2240#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2239#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2238#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2237#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2236#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2235#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2234#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2233#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2232#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2231#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2230#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2229#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2228#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2227#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2226#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2225#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2224#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2223#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2222#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2221#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2220#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2219#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2218#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2217#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2216#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2215#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2214#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2213#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2212#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2211#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2210#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2209#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2208#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2207#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2206#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2205#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2204#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2203#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2202#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2201#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2200#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2199#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2198#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2197#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2196#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2195#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2194#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2193#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2192#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2191#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2190#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2189#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2188#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2187#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2186#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2185#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2184#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2183#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2182#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2181#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2180#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2179#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2178#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2177#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2176#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2175#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2174#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2173#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2172#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2171#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2170#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2169#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2168#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 2167#L21-2 assume !(main_~x2~0#1 > 1); 2163#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 2161#L19-2 [2022-11-02 20:23:09,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:23:09,315 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2022-11-02 20:23:09,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:23:09,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1678402859] [2022-11-02 20:23:09,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:23:09,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:23:09,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:23:09,318 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:23:09,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:23:09,319 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:23:09,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:23:09,320 INFO L85 PathProgramCache]: Analyzing trace with hash -4456464, now seen corresponding path program 7 times [2022-11-02 20:23:09,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:23:09,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723780594] [2022-11-02 20:23:09,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:23:09,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:23:09,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:23:29,667 INFO L134 CoverageAnalysis]: Checked inductivity of 18145 backedges. 0 proven. 18145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:23:29,668 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:23:29,668 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723780594] [2022-11-02 20:23:29,668 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1723780594] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:23:29,668 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [866902658] [2022-11-02 20:23:29,668 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-02 20:23:29,668 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:23:29,669 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:23:29,675 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:23:29,676 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-02 20:23:29,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:23:29,810 INFO L263 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 192 conjunts are in the unsatisfiable core [2022-11-02 20:23:29,819 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:23:30,301 INFO L134 CoverageAnalysis]: Checked inductivity of 18145 backedges. 0 proven. 18145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:23:30,302 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:24:13,007 INFO L134 CoverageAnalysis]: Checked inductivity of 18145 backedges. 0 proven. 18145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:24:13,007 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [866902658] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:24:13,007 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:24:13,008 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [192, 192, 192] total 383 [2022-11-02 20:24:13,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589478595] [2022-11-02 20:24:13,008 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:24:13,009 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:24:13,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:24:13,027 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 384 interpolants. [2022-11-02 20:24:13,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73536, Invalid=73536, Unknown=0, NotChecked=0, Total=147072 [2022-11-02 20:24:13,044 INFO L87 Difference]: Start difference. First operand 195 states and 196 transitions. cyclomatic complexity: 2 Second operand has 384 states, 384 states have (on average 1.0026041666666667) internal successors, (385), 383 states have internal predecessors, (385), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:24:15,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:24:15,122 INFO L93 Difference]: Finished difference Result 387 states and 388 transitions. [2022-11-02 20:24:15,122 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 387 states and 388 transitions. [2022-11-02 20:24:15,125 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 385 [2022-11-02 20:24:15,127 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 387 states to 387 states and 388 transitions. [2022-11-02 20:24:15,127 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 387 [2022-11-02 20:24:15,127 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 387 [2022-11-02 20:24:15,127 INFO L73 IsDeterministic]: Start isDeterministic. Operand 387 states and 388 transitions. [2022-11-02 20:24:15,129 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:24:15,129 INFO L218 hiAutomatonCegarLoop]: Abstraction has 387 states and 388 transitions. [2022-11-02 20:24:15,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 387 states and 388 transitions. [2022-11-02 20:24:15,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 387 to 387. [2022-11-02 20:24:15,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 387 states, 387 states have (on average 1.0025839793281655) internal successors, (388), 386 states have internal predecessors, (388), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:24:15,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 387 states to 387 states and 388 transitions. [2022-11-02 20:24:15,143 INFO L240 hiAutomatonCegarLoop]: Abstraction has 387 states and 388 transitions. [2022-11-02 20:24:15,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 384 states. [2022-11-02 20:24:15,150 INFO L428 stractBuchiCegarLoop]: Abstraction has 387 states and 388 transitions. [2022-11-02 20:24:15,150 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-02 20:24:15,150 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 387 states and 388 transitions. [2022-11-02 20:24:15,153 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 385 [2022-11-02 20:24:15,157 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:24:15,157 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:24:15,160 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 20:24:15,160 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [382, 1, 1, 1] [2022-11-02 20:24:15,161 INFO L748 eck$LassoCheckResult]: Stem: 4285#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 4286#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_~x1~0#1, main_~x2~0#1;havoc main_~x1~0#1;havoc main_~x2~0#1;main_~x1~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~x2~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1; 4282#L19-2 [2022-11-02 20:24:15,161 INFO L750 eck$LassoCheckResult]: Loop: 4282#L19-2 assume !!(main_~x1~0#1 <= 10);main_~x2~0#1 := 1000; 4283#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4287#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4668#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4667#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4666#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4665#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4664#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4663#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4662#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4661#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4660#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4659#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4658#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4657#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4656#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4655#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4654#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4653#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4652#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4651#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4650#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4649#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4648#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4647#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4646#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4645#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4644#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4643#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4642#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4641#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4640#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4639#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4638#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4637#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4636#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4635#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4634#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4633#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4632#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4631#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4630#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4629#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4628#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4627#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4626#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4625#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4624#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4623#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4622#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4621#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4620#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4619#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4618#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4617#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4616#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4615#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4614#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4613#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4612#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4611#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4610#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4609#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4608#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4607#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4606#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4605#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4604#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4603#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4602#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4601#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4600#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4599#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4598#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4597#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4596#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4595#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4594#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4593#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4592#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4591#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4590#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4589#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4588#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4587#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4586#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4585#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4584#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4583#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4582#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4581#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4580#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4579#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4578#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4577#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4576#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4575#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4574#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4573#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4572#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4571#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4570#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4569#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4568#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4567#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4566#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4565#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4564#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4563#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4562#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4561#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4560#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4559#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4558#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4557#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4556#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4555#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4554#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4553#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4552#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4551#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4550#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4549#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4548#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4547#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4546#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4545#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4544#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4543#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4542#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4541#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4540#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4539#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4538#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4537#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4536#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4535#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4534#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4533#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4532#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4531#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4530#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4529#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4528#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4527#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4526#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4525#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4524#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4523#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4522#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4521#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4520#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4519#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4518#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4517#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4516#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4515#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4514#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4513#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4512#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4511#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4510#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4509#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4508#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4507#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4506#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4505#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4504#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4503#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4502#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4501#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4500#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4499#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4498#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4497#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4496#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4495#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4494#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4493#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4492#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4491#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4490#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4489#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4488#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4487#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4486#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4485#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4484#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4483#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4482#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4481#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4480#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4479#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4478#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4477#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4476#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4475#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4474#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4473#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4472#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4471#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4470#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4469#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4468#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4467#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4466#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4465#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4464#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4463#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4462#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4461#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4460#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4459#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4458#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4457#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4456#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4455#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4454#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4453#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4452#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4451#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4450#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4449#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4448#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4447#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4446#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4445#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4444#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4443#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4442#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4441#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4440#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4439#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4438#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4437#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4436#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4435#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4434#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4433#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4432#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4431#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4430#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4429#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4428#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4427#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4426#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4425#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4424#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4423#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4422#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4421#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4420#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4419#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4418#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4417#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4416#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4415#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4414#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4413#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4412#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4411#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4410#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4409#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4408#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4407#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4406#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4405#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4404#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4403#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4402#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4401#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4400#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4399#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4398#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4397#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4396#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4395#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4394#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4393#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4392#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4391#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4390#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4389#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4388#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4387#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4386#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4385#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4384#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4383#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4382#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4381#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4380#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4379#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4378#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4377#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4376#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4375#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4374#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4373#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4372#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4371#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4370#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4369#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4368#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4367#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4366#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4365#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4364#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4363#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4362#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4361#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4360#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4359#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4358#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4357#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4356#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4355#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4354#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4353#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4352#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4351#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4350#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4349#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4348#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4347#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4346#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4345#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4344#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4343#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4342#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4341#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4340#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4339#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4338#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4337#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4336#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4335#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4334#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4333#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4332#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4331#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4330#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4329#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4328#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4327#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4326#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4325#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4324#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4323#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4322#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4321#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4320#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4319#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4318#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4317#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4316#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4315#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4314#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4313#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4312#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4311#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4310#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4309#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4308#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4307#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4306#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4305#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4304#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4303#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4302#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4301#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4300#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4299#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4298#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4297#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4296#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4295#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4294#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4293#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4292#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4291#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4290#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4289#L21-2 assume !!(main_~x2~0#1 > 1);main_~x2~0#1 := main_~x2~0#1 - 1; 4288#L21-2 assume !(main_~x2~0#1 > 1); 4284#L21-3 main_~x1~0#1 := 1 + main_~x1~0#1; 4282#L19-2 [2022-11-02 20:24:15,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:24:15,162 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2022-11-02 20:24:15,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:24:15,162 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633493524] [2022-11-02 20:24:15,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:24:15,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:24:15,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:24:15,164 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:24:15,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:24:15,166 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:24:15,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:24:15,166 INFO L85 PathProgramCache]: Analyzing trace with hash 1601699824, now seen corresponding path program 8 times [2022-11-02 20:24:15,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:24:15,167 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278046587] [2022-11-02 20:24:15,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:24:15,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:24:15,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:25:30,020 INFO L134 CoverageAnalysis]: Checked inductivity of 73153 backedges. 0 proven. 73153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:25:30,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:25:30,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [278046587] [2022-11-02 20:25:30,020 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [278046587] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:25:30,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1000650417] [2022-11-02 20:25:30,020 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 20:25:30,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:25:30,021 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:25:30,022 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:25:30,023 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2efbef85-04f8-456b-a325-3b15d638595f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-02 20:25:30,226 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 20:25:30,227 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:25:30,240 INFO L263 TraceCheckSpWp]: Trace formula consists of 1154 conjuncts, 384 conjunts are in the unsatisfiable core [2022-11-02 20:25:30,253 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:25:31,015 INFO L134 CoverageAnalysis]: Checked inductivity of 73153 backedges. 0 proven. 73153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:25:31,015 INFO L328 TraceCheckSpWp]: Computing backward predicates...