./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-02 20:53:55,540 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-02 20:53:55,543 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-02 20:53:55,588 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-02 20:53:55,589 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-02 20:53:55,593 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-02 20:53:55,598 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-02 20:53:55,600 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-02 20:53:55,601 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-02 20:53:55,602 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-02 20:53:55,603 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-02 20:53:55,604 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-02 20:53:55,604 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-02 20:53:55,605 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-02 20:53:55,606 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-02 20:53:55,607 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-02 20:53:55,608 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-02 20:53:55,609 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-02 20:53:55,615 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-02 20:53:55,625 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-02 20:53:55,629 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-02 20:53:55,638 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-02 20:53:55,640 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-02 20:53:55,642 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-02 20:53:55,645 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-02 20:53:55,647 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-02 20:53:55,648 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-02 20:53:55,649 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-02 20:53:55,650 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-02 20:53:55,651 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-02 20:53:55,652 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-02 20:53:55,653 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-02 20:53:55,654 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-02 20:53:55,655 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-02 20:53:55,657 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-02 20:53:55,657 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-02 20:53:55,658 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-02 20:53:55,658 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-02 20:53:55,658 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-02 20:53:55,659 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-02 20:53:55,660 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-02 20:53:55,661 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-02 20:53:55,697 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-02 20:53:55,698 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-02 20:53:55,698 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-02 20:53:55,699 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-02 20:53:55,700 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-02 20:53:55,700 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-02 20:53:55,700 INFO L138 SettingsManager]: * Use SBE=true [2022-11-02 20:53:55,701 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-02 20:53:55,701 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-02 20:53:55,701 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-02 20:53:55,702 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-02 20:53:55,702 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-02 20:53:55,703 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-02 20:53:55,703 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-02 20:53:55,703 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-02 20:53:55,703 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-02 20:53:55,704 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-02 20:53:55,704 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-02 20:53:55,704 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-02 20:53:55,704 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-02 20:53:55,704 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-02 20:53:55,705 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-02 20:53:55,705 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-02 20:53:55,706 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-02 20:53:55,707 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-02 20:53:55,707 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-02 20:53:55,707 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-02 20:53:55,707 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-02 20:53:55,707 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-02 20:53:55,708 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-02 20:53:55,708 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-02 20:53:55,709 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-02 20:53:55,709 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f [2022-11-02 20:53:56,003 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-02 20:53:56,024 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-02 20:53:56,027 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-02 20:53:56,029 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-02 20:53:56,033 INFO L275 PluginConnector]: CDTParser initialized [2022-11-02 20:53:56,035 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2022-11-02 20:53:56,120 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/data/bfa963446/42b8247b8fe44af3b266d0730a36b7f9/FLAGfcc3fc8c2 [2022-11-02 20:53:56,634 INFO L306 CDTParser]: Found 1 translation units. [2022-11-02 20:53:56,635 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2022-11-02 20:53:56,645 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/data/bfa963446/42b8247b8fe44af3b266d0730a36b7f9/FLAGfcc3fc8c2 [2022-11-02 20:53:56,939 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/data/bfa963446/42b8247b8fe44af3b266d0730a36b7f9 [2022-11-02 20:53:56,942 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-02 20:53:56,943 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-02 20:53:56,945 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-02 20:53:56,945 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-02 20:53:56,948 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-02 20:53:56,949 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:53:56" (1/1) ... [2022-11-02 20:53:56,950 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c5cb17f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:56, skipping insertion in model container [2022-11-02 20:53:56,951 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:53:56" (1/1) ... [2022-11-02 20:53:56,958 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-02 20:53:56,990 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-02 20:53:57,243 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2022-11-02 20:53:57,243 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 20:53:57,253 INFO L203 MainTranslator]: Completed pre-run [2022-11-02 20:53:57,319 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2022-11-02 20:53:57,320 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 20:53:57,350 INFO L208 MainTranslator]: Completed translation [2022-11-02 20:53:57,351 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57 WrapperNode [2022-11-02 20:53:57,351 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-02 20:53:57,352 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-02 20:53:57,353 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-02 20:53:57,353 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-02 20:53:57,360 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,372 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,428 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 43, calls inlined = 61, statements flattened = 935 [2022-11-02 20:53:57,429 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-02 20:53:57,430 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-02 20:53:57,430 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-02 20:53:57,430 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-02 20:53:57,440 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,440 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,446 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,446 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,477 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,489 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,501 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,506 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,512 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-02 20:53:57,513 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-02 20:53:57,513 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-02 20:53:57,514 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-02 20:53:57,515 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (1/1) ... [2022-11-02 20:53:57,527 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:53:57,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:53:57,560 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:53:57,576 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f021b419-d597-4c8e-a026-931a7310c974/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-02 20:53:57,619 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-02 20:53:57,620 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-02 20:53:57,620 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-02 20:53:57,620 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-02 20:53:57,775 INFO L235 CfgBuilder]: Building ICFG [2022-11-02 20:53:57,777 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-02 20:53:58,724 INFO L276 CfgBuilder]: Performing block encoding [2022-11-02 20:53:58,734 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-02 20:53:58,750 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-02 20:53:58,753 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:53:58 BoogieIcfgContainer [2022-11-02 20:53:58,753 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-02 20:53:58,754 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-02 20:53:58,754 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-02 20:53:58,785 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-02 20:53:58,785 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:53:58,786 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 08:53:56" (1/3) ... [2022-11-02 20:53:58,787 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@52967bba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:53:58, skipping insertion in model container [2022-11-02 20:53:58,787 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:53:58,787 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:53:57" (2/3) ... [2022-11-02 20:53:58,788 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@52967bba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:53:58, skipping insertion in model container [2022-11-02 20:53:58,788 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:53:58,788 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:53:58" (3/3) ... [2022-11-02 20:53:58,790 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2022-11-02 20:53:58,850 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-02 20:53:58,850 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-02 20:53:58,850 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-02 20:53:58,851 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-02 20:53:58,851 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-02 20:53:58,851 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-02 20:53:58,851 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-02 20:53:58,851 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-02 20:53:58,857 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 278 states, 277 states have (on average 1.6101083032490975) internal successors, (446), 277 states have internal predecessors, (446), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:53:58,888 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 257 [2022-11-02 20:53:58,888 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:53:58,889 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:53:58,898 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-02 20:53:58,898 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:53:58,898 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-02 20:53:58,900 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 278 states, 277 states have (on average 1.6101083032490975) internal successors, (446), 277 states have internal predecessors, (446), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:53:58,910 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 257 [2022-11-02 20:53:58,910 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:53:58,910 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:53:58,913 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-02 20:53:58,913 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:53:58,921 INFO L748 eck$LassoCheckResult]: Stem: 269#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 181#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 72#L197true assume 0 != ~side1Failed_History_0~0 % 256;init_#res#1 := 0; 64#L233true main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 180#L58true assume !(0 == assume_abort_if_not_~cond#1); 133#L57true assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 170#L582-2true [2022-11-02 20:53:58,923 INFO L750 eck$LassoCheckResult]: Loop: 170#L582-2true assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 201#L170true assume { :end_inline_write_manual_selection_history } true; 172#L258true assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 212#L258-2true ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 205#L259true assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 259#L259-2true ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 138#L261true assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 146#L80true assume { :end_inline_write_side1_failed_history } true; 127#L277true assume 0 != ~side1Failed~0 % 256; 136#L278true assume ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~nomsg~0; 141#L278-2true ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 55#L279true assume ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~nomsg~0; 33#L279-2true ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 237#L280true assume ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~nomsg~0; 107#L280-2true ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 273#L318true assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 68#L110true assume { :end_inline_write_side2_failed_history } true; 34#L334true assume 0 != ~side2Failed~0 % 256; 23#L335true assume ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0;Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~nomsg~0; 32#L335-2true ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 78#L336true assume ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0;Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~nomsg~0; 220#L336-2true ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 216#L337true assume ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0;Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~nomsg~0; 118#L337-2true ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 151#L375true assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 30#L148true assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 154#L158true Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 153#L394true assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 247#L408true assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 59#L140true assume { :end_inline_write_active_side_history } true; 17#L418true assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 168#L447true assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 22#L450-2true assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 152#L58-2true assume 0 == assume_abort_if_not_~cond#1;assume false; 18#L57-1true assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 27#L178true assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 19#L188true check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 159#L457true assume !(0 == check_~tmp___0~0#1); 144#L457-1true assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 15#L88-2true assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 223#L98-2true check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 155#L487true assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 60#L118-2true assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 279#L128-2true check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 264#L489true assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 248#L148-1true assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 234#L158-1true check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 5#L491true assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 84#L537true main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 232#L616-44true assume !(0 == assert_~arg#1 % 256); 271#L611-22true assume { :end_inline_assert } true; 170#L582-2true [2022-11-02 20:53:58,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:53:58,929 INFO L85 PathProgramCache]: Analyzing trace with hash 889563392, now seen corresponding path program 1 times [2022-11-02 20:53:58,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:53:58,939 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977952375] [2022-11-02 20:53:58,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:53:58,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:53:59,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:53:59,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:53:59,251 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:53:59,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977952375] [2022-11-02 20:53:59,252 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977952375] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:53:59,252 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:53:59,252 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 20:53:59,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240126939] [2022-11-02 20:53:59,255 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:53:59,259 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:53:59,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:53:59,260 INFO L85 PathProgramCache]: Analyzing trace with hash 102101614, now seen corresponding path program 1 times [2022-11-02 20:53:59,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:53:59,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149244930] [2022-11-02 20:53:59,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:53:59,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:53:59,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:53:59,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:53:59,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:53:59,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1149244930] [2022-11-02 20:53:59,329 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1149244930] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:53:59,329 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:53:59,329 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-02 20:53:59,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337335811] [2022-11-02 20:53:59,330 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:53:59,331 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:53:59,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:53:59,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 20:53:59,365 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 20:53:59,368 INFO L87 Difference]: Start difference. First operand has 278 states, 277 states have (on average 1.6101083032490975) internal successors, (446), 277 states have internal predecessors, (446), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:53:59,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:53:59,470 INFO L93 Difference]: Finished difference Result 276 states and 411 transitions. [2022-11-02 20:53:59,471 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 276 states and 411 transitions. [2022-11-02 20:53:59,475 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 234 [2022-11-02 20:53:59,480 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 276 states to 251 states and 375 transitions. [2022-11-02 20:53:59,482 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 251 [2022-11-02 20:53:59,483 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 251 [2022-11-02 20:53:59,483 INFO L73 IsDeterministic]: Start isDeterministic. Operand 251 states and 375 transitions. [2022-11-02 20:53:59,485 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:53:59,485 INFO L218 hiAutomatonCegarLoop]: Abstraction has 251 states and 375 transitions. [2022-11-02 20:53:59,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states and 375 transitions. [2022-11-02 20:53:59,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 251. [2022-11-02 20:53:59,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 251 states, 251 states have (on average 1.4940239043824701) internal successors, (375), 250 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:53:59,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 375 transitions. [2022-11-02 20:53:59,540 INFO L240 hiAutomatonCegarLoop]: Abstraction has 251 states and 375 transitions. [2022-11-02 20:53:59,541 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-02 20:53:59,544 INFO L428 stractBuchiCegarLoop]: Abstraction has 251 states and 375 transitions. [2022-11-02 20:53:59,545 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-02 20:53:59,545 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 251 states and 375 transitions. [2022-11-02 20:53:59,547 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 234 [2022-11-02 20:53:59,547 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:53:59,547 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:53:59,549 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:53:59,549 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:53:59,550 INFO L748 eck$LassoCheckResult]: Stem: 816#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 791#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 685#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 686#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 615#L203 assume !(-2 != ~active_side_History_0~0); 616#L206 assume !(0 != ~manual_selection_History_0~0); 634#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 806#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 756#L215 assume !(-2 != ~active_side_History_1~0); 757#L218 assume !(0 != ~manual_selection_History_1~0); 793#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 809#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 719#L227 assume !(-2 != ~active_side_History_2~0); 720#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 675#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 676#L58 assume !(0 == assume_abort_if_not_~cond#1); 758#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 759#L582-2 [2022-11-02 20:53:59,550 INFO L750 eck$LassoCheckResult]: Loop: 759#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 783#L170 assume { :end_inline_write_manual_selection_history } true; 784#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 785#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 803#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 804#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 763#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 764#L80 assume { :end_inline_write_side1_failed_history } true; 747#L277 assume 0 != ~side1Failed~0 % 256; 748#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 761#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 660#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 626#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 627#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 727#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 728#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 683#L110 assume { :end_inline_write_side2_failed_history } true; 628#L334 assume 0 != ~side2Failed~0 % 256; 610#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 611#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 625#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 694#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 808#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 741#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 709#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 620#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 621#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 774#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 585#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 666#L140 assume { :end_inline_write_active_side_history } true; 598#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 599#L447 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 608#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 609#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 600#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 601#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 602#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 603#L457 assume !(0 == check_~tmp___0~0#1); 570#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 593#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 594#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 777#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 667#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 668#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 815#L489 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 814#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 717#L158-1 check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 576#L491 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 577#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 701#L616-44 assume !(0 == assert_~arg#1 % 256); 812#L611-22 assume { :end_inline_assert } true; 759#L582-2 [2022-11-02 20:53:59,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:53:59,552 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 1 times [2022-11-02 20:53:59,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:53:59,552 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581235979] [2022-11-02 20:53:59,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:53:59,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:53:59,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:53:59,585 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:53:59,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:53:59,644 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:53:59,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:53:59,645 INFO L85 PathProgramCache]: Analyzing trace with hash -2029646484, now seen corresponding path program 1 times [2022-11-02 20:53:59,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:53:59,645 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504386109] [2022-11-02 20:53:59,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:53:59,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:53:59,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:53:59,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:53:59,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:53:59,804 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504386109] [2022-11-02 20:53:59,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1504386109] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:53:59,804 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:53:59,805 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 20:53:59,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [967342832] [2022-11-02 20:53:59,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:53:59,805 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:53:59,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:53:59,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:53:59,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:53:59,811 INFO L87 Difference]: Start difference. First operand 251 states and 375 transitions. cyclomatic complexity: 125 Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:53:59,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:53:59,861 INFO L93 Difference]: Finished difference Result 461 states and 696 transitions. [2022-11-02 20:53:59,861 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 461 states and 696 transitions. [2022-11-02 20:53:59,864 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 444 [2022-11-02 20:53:59,874 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 461 states to 461 states and 696 transitions. [2022-11-02 20:53:59,874 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 461 [2022-11-02 20:53:59,878 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 461 [2022-11-02 20:53:59,878 INFO L73 IsDeterministic]: Start isDeterministic. Operand 461 states and 696 transitions. [2022-11-02 20:53:59,883 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:53:59,886 INFO L218 hiAutomatonCegarLoop]: Abstraction has 461 states and 696 transitions. [2022-11-02 20:53:59,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states and 696 transitions. [2022-11-02 20:53:59,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 292. [2022-11-02 20:53:59,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 292 states have (on average 1.4931506849315068) internal successors, (436), 291 states have internal predecessors, (436), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:53:59,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 436 transitions. [2022-11-02 20:53:59,908 INFO L240 hiAutomatonCegarLoop]: Abstraction has 292 states and 436 transitions. [2022-11-02 20:53:59,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:53:59,911 INFO L428 stractBuchiCegarLoop]: Abstraction has 292 states and 436 transitions. [2022-11-02 20:53:59,911 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-02 20:53:59,912 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 292 states and 436 transitions. [2022-11-02 20:53:59,913 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 275 [2022-11-02 20:53:59,913 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:53:59,913 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:53:59,917 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:53:59,917 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:53:59,919 INFO L748 eck$LassoCheckResult]: Stem: 1550#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 1520#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 1404#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 1405#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 1333#L203 assume !(-2 != ~active_side_History_0~0); 1334#L206 assume !(0 != ~manual_selection_History_0~0); 1353#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 1534#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 1475#L215 assume !(-2 != ~active_side_History_1~0); 1476#L218 assume !(0 != ~manual_selection_History_1~0); 1521#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 1538#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 1438#L227 assume !(-2 != ~active_side_History_2~0); 1439#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 1397#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1398#L58 assume !(0 == assume_abort_if_not_~cond#1); 1478#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 1479#L582-2 [2022-11-02 20:53:59,919 INFO L750 eck$LassoCheckResult]: Loop: 1479#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 1509#L170 assume { :end_inline_write_manual_selection_history } true; 1510#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 1511#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 1531#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 1532#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 1483#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 1484#L80 assume { :end_inline_write_side1_failed_history } true; 1466#L277 assume 0 != ~side1Failed~0 % 256; 1467#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 1480#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 1381#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 1344#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 1345#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 1446#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 1447#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 1402#L110 assume { :end_inline_write_side2_failed_history } true; 1347#L334 assume 0 != ~side2Failed~0 % 256; 1348#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 1564#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 1563#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 1539#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 1540#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 1561#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 1494#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1338#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1339#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 1495#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 1303#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 1547#L140 assume { :end_inline_write_active_side_history } true; 1551#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 1507#L447 assume !(0 == ~side1Failed~0 % 256); 1432#L450 assume 0 == ~side2Failed~0 % 256;check_~tmp~3#1 := 1; 1326#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1327#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 1318#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 1319#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 1320#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 1321#L457 assume !(0 == check_~tmp___0~0#1); 1288#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 1311#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 1312#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 1500#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 1386#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 1387#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 1549#L489 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1548#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1436#L158-1 check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 1292#L491 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 1293#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1420#L616-44 assume !(0 == assert_~arg#1 % 256); 1543#L611-22 assume { :end_inline_assert } true; 1479#L582-2 [2022-11-02 20:53:59,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:53:59,921 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 2 times [2022-11-02 20:53:59,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:53:59,922 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870154374] [2022-11-02 20:53:59,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:53:59,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:53:59,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:53:59,955 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:53:59,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:53:59,992 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:53:59,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:53:59,998 INFO L85 PathProgramCache]: Analyzing trace with hash -1608144017, now seen corresponding path program 1 times [2022-11-02 20:53:59,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:53:59,999 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977921124] [2022-11-02 20:54:00,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:00,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:00,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:00,083 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977921124] [2022-11-02 20:54:00,083 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977921124] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:00,084 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:00,084 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 20:54:00,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135965710] [2022-11-02 20:54:00,084 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:00,085 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:00,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:00,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:54:00,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:54:00,086 INFO L87 Difference]: Start difference. First operand 292 states and 436 transitions. cyclomatic complexity: 145 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:00,110 INFO L93 Difference]: Finished difference Result 521 states and 786 transitions. [2022-11-02 20:54:00,110 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 521 states and 786 transitions. [2022-11-02 20:54:00,114 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 504 [2022-11-02 20:54:00,117 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 521 states to 521 states and 786 transitions. [2022-11-02 20:54:00,118 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 521 [2022-11-02 20:54:00,118 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 521 [2022-11-02 20:54:00,118 INFO L73 IsDeterministic]: Start isDeterministic. Operand 521 states and 786 transitions. [2022-11-02 20:54:00,119 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:00,120 INFO L218 hiAutomatonCegarLoop]: Abstraction has 521 states and 786 transitions. [2022-11-02 20:54:00,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 521 states and 786 transitions. [2022-11-02 20:54:00,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 521 to 327. [2022-11-02 20:54:00,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 327 states, 327 states have (on average 1.4984709480122325) internal successors, (490), 326 states have internal predecessors, (490), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 490 transitions. [2022-11-02 20:54:00,133 INFO L240 hiAutomatonCegarLoop]: Abstraction has 327 states and 490 transitions. [2022-11-02 20:54:00,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:54:00,134 INFO L428 stractBuchiCegarLoop]: Abstraction has 327 states and 490 transitions. [2022-11-02 20:54:00,134 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-02 20:54:00,134 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 327 states and 490 transitions. [2022-11-02 20:54:00,136 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 310 [2022-11-02 20:54:00,136 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:00,136 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:00,137 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:00,137 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:00,138 INFO L748 eck$LassoCheckResult]: Stem: 2363#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 2337#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 2222#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 2223#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 2152#L203 assume !(-2 != ~active_side_History_0~0); 2153#L206 assume !(0 != ~manual_selection_History_0~0); 2171#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 2352#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 2297#L215 assume !(-2 != ~active_side_History_1~0); 2298#L218 assume !(0 != ~manual_selection_History_1~0); 2339#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 2356#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 2258#L227 assume !(-2 != ~active_side_History_2~0); 2259#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 2212#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2213#L58 assume !(0 == assume_abort_if_not_~cond#1); 2299#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 2300#L582-2 [2022-11-02 20:54:00,138 INFO L750 eck$LassoCheckResult]: Loop: 2300#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 2329#L170 assume { :end_inline_write_manual_selection_history } true; 2330#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 2331#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 2349#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 2350#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 2304#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 2305#L80 assume { :end_inline_write_side1_failed_history } true; 2288#L277 assume 0 != ~side1Failed~0 % 256; 2289#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 2302#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 2197#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 2163#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 2164#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 2266#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 2267#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 2423#L110 assume { :end_inline_write_side2_failed_history } true; 2422#L334 assume 0 != ~side2Failed~0 % 256; 2421#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 2420#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 2419#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 2418#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 2417#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 2416#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 2415#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2396#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2390#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 2315#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 2119#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 2203#L140 assume { :end_inline_write_active_side_history } true; 2135#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 2136#L447 assume !(0 == ~side1Failed~0 % 256); 2252#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 2145#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2146#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 2137#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 2138#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 2139#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 2140#L457 assume !(0 == check_~tmp___0~0#1); 2107#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 2130#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 2131#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 2317#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 2204#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 2205#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 2362#L489 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2361#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2256#L158-1 check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 2113#L491 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 2114#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 2240#L616-44 assume !(0 == assert_~arg#1 % 256); 2359#L611-22 assume { :end_inline_assert } true; 2300#L582-2 [2022-11-02 20:54:00,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:00,142 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 3 times [2022-11-02 20:54:00,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:00,142 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322030962] [2022-11-02 20:54:00,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:00,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:00,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:00,190 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:00,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:00,207 INFO L85 PathProgramCache]: Analyzing trace with hash 1869174829, now seen corresponding path program 1 times [2022-11-02 20:54:00,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:00,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935859701] [2022-11-02 20:54:00,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:00,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:00,389 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:00,390 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935859701] [2022-11-02 20:54:00,390 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [935859701] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:00,391 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:00,391 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 20:54:00,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371232469] [2022-11-02 20:54:00,392 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:00,395 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:00,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:00,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:54:00,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:54:00,398 INFO L87 Difference]: Start difference. First operand 327 states and 490 transitions. cyclomatic complexity: 164 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:00,428 INFO L93 Difference]: Finished difference Result 479 states and 713 transitions. [2022-11-02 20:54:00,428 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 479 states and 713 transitions. [2022-11-02 20:54:00,432 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 462 [2022-11-02 20:54:00,440 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 479 states to 479 states and 713 transitions. [2022-11-02 20:54:00,441 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 479 [2022-11-02 20:54:00,443 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 479 [2022-11-02 20:54:00,444 INFO L73 IsDeterministic]: Start isDeterministic. Operand 479 states and 713 transitions. [2022-11-02 20:54:00,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:00,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 479 states and 713 transitions. [2022-11-02 20:54:00,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states and 713 transitions. [2022-11-02 20:54:00,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 324. [2022-11-02 20:54:00,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 324 states have (on average 1.4938271604938271) internal successors, (484), 323 states have internal predecessors, (484), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 484 transitions. [2022-11-02 20:54:00,465 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 484 transitions. [2022-11-02 20:54:00,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:54:00,466 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 484 transitions. [2022-11-02 20:54:00,466 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-02 20:54:00,467 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 484 transitions. [2022-11-02 20:54:00,468 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 307 [2022-11-02 20:54:00,468 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:00,469 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:00,470 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:00,470 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:00,470 INFO L748 eck$LassoCheckResult]: Stem: 3171#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 3143#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 3037#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 3038#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 2964#L203 assume !(-2 != ~active_side_History_0~0); 2965#L206 assume !(0 != ~manual_selection_History_0~0); 2984#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 3158#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 3106#L215 assume !(-2 != ~active_side_History_1~0); 3107#L218 assume !(0 != ~manual_selection_History_1~0); 3145#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 3163#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 3069#L227 assume !(-2 != ~active_side_History_2~0); 3070#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 3026#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3027#L58 assume !(0 == assume_abort_if_not_~cond#1); 3108#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 3109#L582-2 [2022-11-02 20:54:00,472 INFO L750 eck$LassoCheckResult]: Loop: 3109#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 3135#L170 assume { :end_inline_write_manual_selection_history } true; 3136#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 3137#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 3155#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 3156#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 3113#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 3114#L80 assume { :end_inline_write_side1_failed_history } true; 3097#L277 assume 0 != ~side1Failed~0 % 256; 3098#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 3111#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 3010#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 2975#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 2976#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 3077#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 3078#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 3227#L110 assume { :end_inline_write_side2_failed_history } true; 3226#L334 assume 0 != ~side2Failed~0 % 256; 2959#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 2960#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 2974#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 3046#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 3161#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 3162#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 3199#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3194#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3193#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 3186#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 3179#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 3177#L140 assume { :end_inline_write_active_side_history } true; 3175#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 3174#L447 assume !(0 == ~side1Failed~0 % 256); 3063#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 2957#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2958#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 2949#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 2950#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 2968#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 2951#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 2952#L457 assume !(0 == check_~tmp___0~0#1); 2919#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 2942#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 2943#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 3125#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 3018#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 3019#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 3170#L489 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3169#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3067#L158-1 check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 2923#L491 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 2924#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 3051#L616-44 assume !(0 == assert_~arg#1 % 256); 3166#L611-22 assume { :end_inline_assert } true; 3109#L582-2 [2022-11-02 20:54:00,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:00,474 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 4 times [2022-11-02 20:54:00,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:00,475 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1510817392] [2022-11-02 20:54:00,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:00,507 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:00,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:00,524 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:00,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:00,528 INFO L85 PathProgramCache]: Analyzing trace with hash -769425493, now seen corresponding path program 1 times [2022-11-02 20:54:00,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:00,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615947283] [2022-11-02 20:54:00,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:00,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:00,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:00,679 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615947283] [2022-11-02 20:54:00,679 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [615947283] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:00,679 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:00,679 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 20:54:00,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627840034] [2022-11-02 20:54:00,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:00,680 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:00,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:00,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:54:00,680 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:54:00,681 INFO L87 Difference]: Start difference. First operand 324 states and 484 transitions. cyclomatic complexity: 161 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:00,744 INFO L93 Difference]: Finished difference Result 487 states and 718 transitions. [2022-11-02 20:54:00,744 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 487 states and 718 transitions. [2022-11-02 20:54:00,748 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 470 [2022-11-02 20:54:00,751 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 487 states to 487 states and 718 transitions. [2022-11-02 20:54:00,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 487 [2022-11-02 20:54:00,752 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 487 [2022-11-02 20:54:00,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 487 states and 718 transitions. [2022-11-02 20:54:00,753 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:00,753 INFO L218 hiAutomatonCegarLoop]: Abstraction has 487 states and 718 transitions. [2022-11-02 20:54:00,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 487 states and 718 transitions. [2022-11-02 20:54:00,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 487 to 312. [2022-11-02 20:54:00,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 312 states, 312 states have (on average 1.4743589743589745) internal successors, (460), 311 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 460 transitions. [2022-11-02 20:54:00,760 INFO L240 hiAutomatonCegarLoop]: Abstraction has 312 states and 460 transitions. [2022-11-02 20:54:00,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:54:00,763 INFO L428 stractBuchiCegarLoop]: Abstraction has 312 states and 460 transitions. [2022-11-02 20:54:00,763 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-02 20:54:00,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 312 states and 460 transitions. [2022-11-02 20:54:00,767 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 295 [2022-11-02 20:54:00,767 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:00,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:00,768 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:00,768 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:00,769 INFO L748 eck$LassoCheckResult]: Stem: 3969#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 3944#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 3846#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 3847#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 3778#L203 assume !(-2 != ~active_side_History_0~0); 3779#L206 assume !(0 != ~manual_selection_History_0~0); 3797#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 3958#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 3908#L215 assume !(-2 != ~active_side_History_1~0); 3909#L218 assume !(0 != ~manual_selection_History_1~0); 3946#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 3962#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 3877#L227 assume !(-2 != ~active_side_History_2~0); 3878#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 3836#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3837#L58 assume !(0 == assume_abort_if_not_~cond#1); 3910#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 3911#L582-2 [2022-11-02 20:54:00,769 INFO L750 eck$LassoCheckResult]: Loop: 3911#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 3936#L170 assume { :end_inline_write_manual_selection_history } true; 3937#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 3938#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 3955#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 3956#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 3915#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 3916#L80 assume { :end_inline_write_side1_failed_history } true; 3899#L277 assume 0 != ~side1Failed~0 % 256; 3900#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 3913#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 3821#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 3789#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 3790#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 3884#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 3885#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 3843#L110 assume { :end_inline_write_side2_failed_history } true; 3791#L334 assume 0 != ~side2Failed~0 % 256; 3773#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 3774#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 3788#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 3855#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 3961#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 3895#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 3896#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3783#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3784#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 3926#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 3748#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 3827#L140 assume { :end_inline_write_active_side_history } true; 3761#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 3762#L447 assume !(0 == ~side1Failed~0 % 256); 3873#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 3771#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3772#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 3763#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 3764#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 3782#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 3765#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 3766#L457 assume !(0 == check_~tmp___0~0#1); 3736#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 3757#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 3758#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 3842#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 3927#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 3828#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 3829#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 3968#L489 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3967#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3876#L158-1 check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 3740#L491 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 3741#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 3860#L616-44 assume !(0 == assert_~arg#1 % 256); 3965#L611-22 assume { :end_inline_assert } true; 3911#L582-2 [2022-11-02 20:54:00,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:00,770 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 5 times [2022-11-02 20:54:00,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:00,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608968286] [2022-11-02 20:54:00,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:00,785 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:00,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:00,803 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:00,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:00,804 INFO L85 PathProgramCache]: Analyzing trace with hash -660211107, now seen corresponding path program 1 times [2022-11-02 20:54:00,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:00,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662678389] [2022-11-02 20:54:00,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:00,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:00,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:00,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:00,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:00,939 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662678389] [2022-11-02 20:54:00,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [662678389] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:00,940 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:00,940 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 20:54:00,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221712008] [2022-11-02 20:54:00,940 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:00,941 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:00,941 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:00,942 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:54:00,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:54:00,942 INFO L87 Difference]: Start difference. First operand 312 states and 460 transitions. cyclomatic complexity: 149 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:00,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:00,999 INFO L93 Difference]: Finished difference Result 505 states and 735 transitions. [2022-11-02 20:54:00,999 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 505 states and 735 transitions. [2022-11-02 20:54:01,003 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 488 [2022-11-02 20:54:01,006 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 505 states to 505 states and 735 transitions. [2022-11-02 20:54:01,006 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 505 [2022-11-02 20:54:01,006 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 505 [2022-11-02 20:54:01,006 INFO L73 IsDeterministic]: Start isDeterministic. Operand 505 states and 735 transitions. [2022-11-02 20:54:01,007 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:01,008 INFO L218 hiAutomatonCegarLoop]: Abstraction has 505 states and 735 transitions. [2022-11-02 20:54:01,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states and 735 transitions. [2022-11-02 20:54:01,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 300. [2022-11-02 20:54:01,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 300 states have (on average 1.4533333333333334) internal successors, (436), 299 states have internal predecessors, (436), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:01,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 436 transitions. [2022-11-02 20:54:01,019 INFO L240 hiAutomatonCegarLoop]: Abstraction has 300 states and 436 transitions. [2022-11-02 20:54:01,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:54:01,021 INFO L428 stractBuchiCegarLoop]: Abstraction has 300 states and 436 transitions. [2022-11-02 20:54:01,021 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-02 20:54:01,022 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 300 states and 436 transitions. [2022-11-02 20:54:01,025 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 283 [2022-11-02 20:54:01,025 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:01,025 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:01,026 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:01,026 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:01,026 INFO L748 eck$LassoCheckResult]: Stem: 4786#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 4759#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 4664#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 4665#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 4598#L203 assume !(-2 != ~active_side_History_0~0); 4599#L206 assume !(0 != ~manual_selection_History_0~0); 4617#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 4772#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 4720#L215 assume !(-2 != ~active_side_History_1~0); 4721#L218 assume !(0 != ~manual_selection_History_1~0); 4760#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 4776#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 4690#L227 assume !(-2 != ~active_side_History_2~0); 4691#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 4656#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4657#L58 assume !(0 == assume_abort_if_not_~cond#1); 4723#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 4724#L582-2 [2022-11-02 20:54:01,026 INFO L750 eck$LassoCheckResult]: Loop: 4724#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 4751#L170 assume { :end_inline_write_manual_selection_history } true; 4752#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 4753#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 4768#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 4769#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 4727#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 4728#L80 assume { :end_inline_write_side1_failed_history } true; 4711#L277 assume 0 != ~side1Failed~0 % 256; 4712#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 4726#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 4643#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 4609#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 4610#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 4696#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 4697#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 4660#L110 assume { :end_inline_write_side2_failed_history } true; 4611#L334 assume 0 != ~side2Failed~0 % 256; 4594#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 4595#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 4608#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 4669#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 4775#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 4707#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 4708#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4603#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4604#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 4740#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 4795#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 4793#L140 assume { :end_inline_write_active_side_history } true; 4791#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 4788#L447 assume !(0 == ~side1Failed~0 % 256); 4686#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 4592#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4593#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 4584#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 4585#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 4602#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 4586#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 4587#L457 assume !(0 == check_~tmp___0~0#1); 4559#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 4578#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 4579#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 4659#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 4741#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 4648#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 4649#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 4733#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 4785#L489 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4783#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4689#L158-1 check_#t~ret31#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret31#1;havoc check_#t~ret31#1; 4563#L491 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 4564#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 4674#L616-44 assume !(0 == assert_~arg#1 % 256); 4779#L611-22 assume { :end_inline_assert } true; 4724#L582-2 [2022-11-02 20:54:01,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:01,027 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 6 times [2022-11-02 20:54:01,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:01,027 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749007117] [2022-11-02 20:54:01,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:01,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:01,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:01,051 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:01,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:01,061 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:01,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:01,061 INFO L85 PathProgramCache]: Analyzing trace with hash -1185029510, now seen corresponding path program 1 times [2022-11-02 20:54:01,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:01,062 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783414282] [2022-11-02 20:54:01,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:01,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:01,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:01,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:01,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:01,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783414282] [2022-11-02 20:54:01,302 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [783414282] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:01,302 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:01,302 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 20:54:01,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [740922408] [2022-11-02 20:54:01,303 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:01,303 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:01,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:01,303 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 20:54:01,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 20:54:01,304 INFO L87 Difference]: Start difference. First operand 300 states and 436 transitions. cyclomatic complexity: 137 Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:01,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:01,378 INFO L93 Difference]: Finished difference Result 286 states and 405 transitions. [2022-11-02 20:54:01,378 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 286 states and 405 transitions. [2022-11-02 20:54:01,383 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 251 [2022-11-02 20:54:01,385 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 286 states to 268 states and 380 transitions. [2022-11-02 20:54:01,385 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 268 [2022-11-02 20:54:01,385 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 268 [2022-11-02 20:54:01,386 INFO L73 IsDeterministic]: Start isDeterministic. Operand 268 states and 380 transitions. [2022-11-02 20:54:01,386 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:01,386 INFO L218 hiAutomatonCegarLoop]: Abstraction has 268 states and 380 transitions. [2022-11-02 20:54:01,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states and 380 transitions. [2022-11-02 20:54:01,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 268. [2022-11-02 20:54:01,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 268 states have (on average 1.4179104477611941) internal successors, (380), 267 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:01,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 380 transitions. [2022-11-02 20:54:01,392 INFO L240 hiAutomatonCegarLoop]: Abstraction has 268 states and 380 transitions. [2022-11-02 20:54:01,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 20:54:01,394 INFO L428 stractBuchiCegarLoop]: Abstraction has 268 states and 380 transitions. [2022-11-02 20:54:01,394 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-02 20:54:01,395 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 268 states and 380 transitions. [2022-11-02 20:54:01,396 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 251 [2022-11-02 20:54:01,396 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:01,396 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:01,397 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:01,398 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:01,398 INFO L748 eck$LassoCheckResult]: Stem: 5350#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 5328#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 5244#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 5245#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 5187#L203 assume !(-2 != ~active_side_History_0~0); 5188#L206 assume !(0 != ~manual_selection_History_0~0); 5206#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 5339#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 5294#L215 assume !(-2 != ~active_side_History_1~0); 5295#L218 assume !(0 != ~manual_selection_History_1~0); 5330#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 5343#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 5268#L227 assume !(-2 != ~active_side_History_2~0); 5269#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 5235#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 5236#L58 assume !(0 == assume_abort_if_not_~cond#1); 5296#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 5297#L582-2 [2022-11-02 20:54:01,399 INFO L750 eck$LassoCheckResult]: Loop: 5297#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 5321#L170 assume { :end_inline_write_manual_selection_history } true; 5322#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 5323#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 5335#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 5336#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 5301#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 5302#L80 assume { :end_inline_write_side1_failed_history } true; 5287#L277 assume 0 != ~side1Failed~0 % 256; 5288#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 5299#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 5224#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 5198#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 5199#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 5273#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 5274#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 5398#L110 assume { :end_inline_write_side2_failed_history } true; 5397#L334 assume 0 != ~side2Failed~0 % 256; 5183#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 5184#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 5197#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 5251#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 5342#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 5283#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 5284#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 5192#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 5193#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 5311#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 5163#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 5230#L140 assume { :end_inline_write_active_side_history } true; 5171#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 5172#L447 assume !(0 == ~side1Failed~0 % 256); 5265#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 5181#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 5182#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 5173#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 5174#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 5191#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 5175#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 5176#L457 assume !(0 == check_~tmp___0~0#1); 5152#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 5167#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 5168#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 5240#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 5314#L487 assume !(0 != check_~tmp___7~0#1 % 256); 5304#L487-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 5305#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 5286#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 5270#L98-3 check_#t~ret33#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret33#1;havoc check_#t~ret33#1; 5271#L503 assume !(0 == check_~tmp___11~0#1 % 256); 5313#L503-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 5275#L148-3 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 5234#L158-3 check_#t~ret37#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret37#1;havoc check_#t~ret37#1; 5331#L519 assume !(check_~tmp___20~0#1 > -2); 5214#L519-1 check_#res#1 := 1; 5257#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 5258#L616-44 assume !(0 == assert_~arg#1 % 256); 5346#L611-22 assume { :end_inline_assert } true; 5297#L582-2 [2022-11-02 20:54:01,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:01,401 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 7 times [2022-11-02 20:54:01,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:01,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788383969] [2022-11-02 20:54:01,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:01,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:01,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:01,412 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:01,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:01,426 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:01,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:01,427 INFO L85 PathProgramCache]: Analyzing trace with hash -1733341918, now seen corresponding path program 1 times [2022-11-02 20:54:01,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:01,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110232540] [2022-11-02 20:54:01,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:01,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:01,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:01,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:01,647 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:01,647 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110232540] [2022-11-02 20:54:01,647 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110232540] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:01,648 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:01,648 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-02 20:54:01,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381249412] [2022-11-02 20:54:01,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:01,652 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:01,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:01,652 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 20:54:01,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-02 20:54:01,653 INFO L87 Difference]: Start difference. First operand 268 states and 380 transitions. cyclomatic complexity: 113 Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:01,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:01,896 INFO L93 Difference]: Finished difference Result 1119 states and 1585 transitions. [2022-11-02 20:54:01,896 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1119 states and 1585 transitions. [2022-11-02 20:54:01,905 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1102 [2022-11-02 20:54:01,910 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1119 states to 1119 states and 1585 transitions. [2022-11-02 20:54:01,911 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1119 [2022-11-02 20:54:01,912 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1119 [2022-11-02 20:54:01,912 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1119 states and 1585 transitions. [2022-11-02 20:54:01,913 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:01,914 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1119 states and 1585 transitions. [2022-11-02 20:54:01,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1119 states and 1585 transitions. [2022-11-02 20:54:01,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1119 to 361. [2022-11-02 20:54:01,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 361 states have (on average 1.3933518005540166) internal successors, (503), 360 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:01,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 503 transitions. [2022-11-02 20:54:01,926 INFO L240 hiAutomatonCegarLoop]: Abstraction has 361 states and 503 transitions. [2022-11-02 20:54:01,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-02 20:54:01,929 INFO L428 stractBuchiCegarLoop]: Abstraction has 361 states and 503 transitions. [2022-11-02 20:54:01,929 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-02 20:54:01,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 361 states and 503 transitions. [2022-11-02 20:54:01,931 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 344 [2022-11-02 20:54:01,931 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:01,931 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:01,932 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:01,932 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:01,933 INFO L748 eck$LassoCheckResult]: Stem: 6801#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 6762#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 6665#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 6666#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 6607#L203 assume !(-2 != ~active_side_History_0~0); 6608#L206 assume !(0 != ~manual_selection_History_0~0); 6626#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 6780#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 6718#L215 assume !(-2 != ~active_side_History_1~0); 6719#L218 assume !(0 != ~manual_selection_History_1~0); 6763#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 6784#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 6691#L227 assume !(-2 != ~active_side_History_2~0); 6692#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 6655#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 6656#L58 assume !(0 == assume_abort_if_not_~cond#1); 6720#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 6721#L582-2 [2022-11-02 20:54:01,933 INFO L750 eck$LassoCheckResult]: Loop: 6721#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 6753#L170 assume { :end_inline_write_manual_selection_history } true; 6754#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 6755#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 6773#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 6774#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 6725#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 6726#L80 assume { :end_inline_write_side1_failed_history } true; 6712#L277 assume !(0 != ~side1Failed~0 % 256);Side1_activestandby_task_each_pals_period_~side1~0#1 := ~s1s1_old~0;~s1s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~s2s1_old~0;~s2s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := ~cs1_old~0;~cs1_old~0 := ~nomsg~0; 6710#L290 assume Side1_activestandby_task_each_pals_period_~side1~0#1 == Side1_activestandby_task_each_pals_period_~side2~0#1;Side1_activestandby_task_each_pals_period_~next_state~0#1 := 1; 6597#L309-1 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite12#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 6598#L314-1 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite12#1; 6635#L315 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite13#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 6636#L315-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite13#1; 6786#L316 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite14#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 6781#L316-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite14#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite14#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite14#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite14#1;~side1_written~0 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 6782#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 6661#L110 assume { :end_inline_write_side2_failed_history } true; 6621#L334 assume 0 != ~side2Failed~0 % 256; 6603#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 6604#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 6618#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 6671#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 6783#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 6706#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 6707#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 6613#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 6614#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 6735#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 6580#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 6866#L140 assume { :end_inline_write_active_side_history } true; 6863#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 6803#L447 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 6599#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 6600#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 6593#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 6594#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 6689#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 6690#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 6741#L457 assume !(0 == check_~tmp___0~0#1); 6571#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 6587#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 6588#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 6660#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 6787#L487 assume !(0 != check_~tmp___7~0#1 % 256); 6728#L487-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 6729#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 6709#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 6693#L98-3 check_#t~ret33#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret33#1;havoc check_#t~ret33#1; 6694#L503 assume !(0 == check_~tmp___11~0#1 % 256); 6769#L503-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 6770#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 6699#L151-3 assume 1 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_1~0; 6654#L158-3 check_#t~ret37#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret37#1;havoc check_#t~ret37#1; 6764#L519 assume !(check_~tmp___20~0#1 > -2); 6634#L519-1 check_#res#1 := 1; 6678#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 6679#L616-44 assume !(0 == assert_~arg#1 % 256); 6790#L611-22 assume { :end_inline_assert } true; 6721#L582-2 [2022-11-02 20:54:01,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:01,934 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 8 times [2022-11-02 20:54:01,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:01,934 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96038941] [2022-11-02 20:54:01,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:01,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:01,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:01,951 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:01,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:01,982 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:01,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:01,983 INFO L85 PathProgramCache]: Analyzing trace with hash 2060425077, now seen corresponding path program 1 times [2022-11-02 20:54:01,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:01,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779479693] [2022-11-02 20:54:01,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:01,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:02,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:02,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:02,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:02,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [779479693] [2022-11-02 20:54:02,092 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [779479693] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:02,092 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:02,092 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 20:54:02,092 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480693128] [2022-11-02 20:54:02,092 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:02,093 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:02,093 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:02,093 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 20:54:02,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 20:54:02,094 INFO L87 Difference]: Start difference. First operand 361 states and 503 transitions. cyclomatic complexity: 143 Second operand has 3 states, 3 states have (on average 19.666666666666668) internal successors, (59), 3 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:02,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:02,183 INFO L93 Difference]: Finished difference Result 445 states and 619 transitions. [2022-11-02 20:54:02,183 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 445 states and 619 transitions. [2022-11-02 20:54:02,187 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 428 [2022-11-02 20:54:02,190 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 445 states to 445 states and 619 transitions. [2022-11-02 20:54:02,190 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 445 [2022-11-02 20:54:02,191 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 445 [2022-11-02 20:54:02,191 INFO L73 IsDeterministic]: Start isDeterministic. Operand 445 states and 619 transitions. [2022-11-02 20:54:02,192 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:02,192 INFO L218 hiAutomatonCegarLoop]: Abstraction has 445 states and 619 transitions. [2022-11-02 20:54:02,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states and 619 transitions. [2022-11-02 20:54:02,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 268. [2022-11-02 20:54:02,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 268 states have (on average 1.4104477611940298) internal successors, (378), 267 states have internal predecessors, (378), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:02,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 378 transitions. [2022-11-02 20:54:02,199 INFO L240 hiAutomatonCegarLoop]: Abstraction has 268 states and 378 transitions. [2022-11-02 20:54:02,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 20:54:02,201 INFO L428 stractBuchiCegarLoop]: Abstraction has 268 states and 378 transitions. [2022-11-02 20:54:02,201 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-02 20:54:02,201 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 268 states and 378 transitions. [2022-11-02 20:54:02,204 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 251 [2022-11-02 20:54:02,204 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:02,204 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:02,207 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:02,207 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:02,208 INFO L748 eck$LassoCheckResult]: Stem: 7582#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 7560#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 7474#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 7475#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 7418#L203 assume !(-2 != ~active_side_History_0~0); 7419#L206 assume !(0 != ~manual_selection_History_0~0); 7436#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 7570#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 7524#L215 assume !(-2 != ~active_side_History_1~0); 7525#L218 assume !(0 != ~manual_selection_History_1~0); 7561#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 7574#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 7498#L227 assume !(-2 != ~active_side_History_2~0); 7499#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 7468#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7469#L58 assume !(0 == assume_abort_if_not_~cond#1); 7527#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 7528#L582-2 [2022-11-02 20:54:02,208 INFO L750 eck$LassoCheckResult]: Loop: 7528#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 7552#L170 assume { :end_inline_write_manual_selection_history } true; 7553#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 7554#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 7566#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 7567#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 7531#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 7532#L80 assume { :end_inline_write_side1_failed_history } true; 7517#L277 assume 0 != ~side1Failed~0 % 256; 7518#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 7529#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 7456#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 7429#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 7430#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 7503#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 7504#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 7647#L110 assume { :end_inline_write_side2_failed_history } true; 7646#L334 assume 0 != ~side2Failed~0 % 256; 7645#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 7644#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 7643#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 7635#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 7633#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 7631#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 7541#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7423#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 7424#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 7542#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 7394#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 7460#L140 assume { :end_inline_write_active_side_history } true; 7402#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 7403#L447 assume !(0 == ~side1Failed~0 % 256); 7495#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 7412#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7413#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 7404#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 7405#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 7422#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 7406#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 7407#L457 assume !(0 == check_~tmp___0~0#1); 7383#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7398#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 7399#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7470#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 7545#L487 assume !(0 != check_~tmp___7~0#1 % 256); 7534#L487-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7535#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 7516#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7500#L98-3 check_#t~ret33#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret33#1;havoc check_#t~ret33#1; 7501#L503 assume !(0 == check_~tmp___11~0#1 % 256); 7544#L503-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7505#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 7506#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 7463#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 7464#L158-3 check_#t~ret37#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret37#1;havoc check_#t~ret37#1; 7562#L519 assume !(check_~tmp___20~0#1 > -2); 7444#L519-1 check_#res#1 := 1; 7487#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 7488#L616-44 assume !(0 == assert_~arg#1 % 256); 7577#L611-22 assume { :end_inline_assert } true; 7528#L582-2 [2022-11-02 20:54:02,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:02,209 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 9 times [2022-11-02 20:54:02,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:02,209 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316653225] [2022-11-02 20:54:02,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:02,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:02,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:02,222 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:02,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:02,244 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:02,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:02,246 INFO L85 PathProgramCache]: Analyzing trace with hash 1442417447, now seen corresponding path program 1 times [2022-11-02 20:54:02,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:02,247 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728360315] [2022-11-02 20:54:02,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:02,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:02,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:02,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:02,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:02,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728360315] [2022-11-02 20:54:02,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728360315] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:02,488 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:02,488 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-02 20:54:02,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324234629] [2022-11-02 20:54:02,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:02,489 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:02,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:02,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-02 20:54:02,490 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-02 20:54:02,490 INFO L87 Difference]: Start difference. First operand 268 states and 378 transitions. cyclomatic complexity: 111 Second operand has 7 states, 7 states have (on average 8.571428571428571) internal successors, (60), 7 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:02,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:02,797 INFO L93 Difference]: Finished difference Result 728 states and 1034 transitions. [2022-11-02 20:54:02,798 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 728 states and 1034 transitions. [2022-11-02 20:54:02,802 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 704 [2022-11-02 20:54:02,806 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 728 states to 728 states and 1034 transitions. [2022-11-02 20:54:02,807 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 728 [2022-11-02 20:54:02,808 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 728 [2022-11-02 20:54:02,808 INFO L73 IsDeterministic]: Start isDeterministic. Operand 728 states and 1034 transitions. [2022-11-02 20:54:02,809 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:02,809 INFO L218 hiAutomatonCegarLoop]: Abstraction has 728 states and 1034 transitions. [2022-11-02 20:54:02,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states and 1034 transitions. [2022-11-02 20:54:02,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 273. [2022-11-02 20:54:02,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 273 states, 273 states have (on average 1.4029304029304028) internal successors, (383), 272 states have internal predecessors, (383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:02,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 383 transitions. [2022-11-02 20:54:02,817 INFO L240 hiAutomatonCegarLoop]: Abstraction has 273 states and 383 transitions. [2022-11-02 20:54:02,817 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-02 20:54:02,818 INFO L428 stractBuchiCegarLoop]: Abstraction has 273 states and 383 transitions. [2022-11-02 20:54:02,819 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-02 20:54:02,819 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 273 states and 383 transitions. [2022-11-02 20:54:02,820 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 256 [2022-11-02 20:54:02,820 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:02,821 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:02,821 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:02,822 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:02,822 INFO L748 eck$LassoCheckResult]: Stem: 8621#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 8594#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 8506#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 8507#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 8446#L203 assume !(-2 != ~active_side_History_0~0); 8447#L206 assume !(0 != ~manual_selection_History_0~0); 8464#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 8608#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 8557#L215 assume !(-2 != ~active_side_History_1~0); 8558#L218 assume !(0 != ~manual_selection_History_1~0); 8596#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 8614#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 8529#L227 assume !(-2 != ~active_side_History_2~0); 8530#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 8494#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8495#L58 assume !(0 == assume_abort_if_not_~cond#1); 8559#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 8560#L582-2 [2022-11-02 20:54:02,822 INFO L750 eck$LassoCheckResult]: Loop: 8560#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 8587#L170 assume { :end_inline_write_manual_selection_history } true; 8588#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 8589#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 8602#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 8603#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 8564#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 8565#L80 assume { :end_inline_write_side1_failed_history } true; 8550#L277 assume 0 != ~side1Failed~0 % 256; 8551#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 8563#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 8482#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 8457#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 8458#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 8534#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 8535#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 8668#L110 assume { :end_inline_write_side2_failed_history } true; 8666#L334 assume 0 != ~side2Failed~0 % 256; 8667#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 8681#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 8680#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 8679#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 8611#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 8612#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 8678#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 8675#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 8674#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 8574#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 8420#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 8487#L140 assume { :end_inline_write_active_side_history } true; 8488#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 8585#L447 assume !(0 == ~side1Failed~0 % 256); 8526#L450 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 8440#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8441#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 8432#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 8433#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 8450#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 8434#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 8435#L457 assume !(0 == check_~tmp___0~0#1); 8411#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 8426#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 8427#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 8499#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 8576#L487 assume !(0 != check_~tmp___7~0#1 % 256); 8567#L487-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 8568#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 8548#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 8549#L98-3 check_#t~ret33#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret33#1;havoc check_#t~ret33#1; 8600#L503 assume 0 == check_~tmp___11~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 8598#L118-4 assume !(0 == read_side2_failed_history_~index#1 % 256); 8599#L121-4 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 8607#L128-4 check_#t~ret34#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___12~0#1 := check_#t~ret34#1;havoc check_#t~ret34#1; 8593#L505 assume !(0 != check_~tmp___12~0#1 % 256); 8578#L503-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 8536#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 8537#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 8492#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 8493#L158-3 check_#t~ret37#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret37#1;havoc check_#t~ret37#1; 8597#L519 assume !(check_~tmp___20~0#1 > -2); 8472#L519-1 check_#res#1 := 1; 8518#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 8519#L616-44 assume !(0 == assert_~arg#1 % 256); 8617#L611-22 assume { :end_inline_assert } true; 8560#L582-2 [2022-11-02 20:54:02,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:02,823 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 10 times [2022-11-02 20:54:02,823 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:02,823 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1066998920] [2022-11-02 20:54:02,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:02,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:02,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:02,838 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:02,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:02,853 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:02,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:02,854 INFO L85 PathProgramCache]: Analyzing trace with hash 2140249901, now seen corresponding path program 1 times [2022-11-02 20:54:02,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:02,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1736642127] [2022-11-02 20:54:02,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:02,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:02,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:03,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:03,044 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:03,044 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1736642127] [2022-11-02 20:54:03,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1736642127] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:03,045 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:03,045 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 20:54:03,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1370877108] [2022-11-02 20:54:03,045 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:03,046 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-02 20:54:03,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:54:03,047 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 20:54:03,047 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 20:54:03,047 INFO L87 Difference]: Start difference. First operand 273 states and 383 transitions. cyclomatic complexity: 111 Second operand has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:03,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:54:03,065 INFO L93 Difference]: Finished difference Result 275 states and 384 transitions. [2022-11-02 20:54:03,066 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 275 states and 384 transitions. [2022-11-02 20:54:03,067 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 234 [2022-11-02 20:54:03,069 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 275 states to 251 states and 350 transitions. [2022-11-02 20:54:03,069 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 251 [2022-11-02 20:54:03,069 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 251 [2022-11-02 20:54:03,069 INFO L73 IsDeterministic]: Start isDeterministic. Operand 251 states and 350 transitions. [2022-11-02 20:54:03,070 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:54:03,070 INFO L218 hiAutomatonCegarLoop]: Abstraction has 251 states and 350 transitions. [2022-11-02 20:54:03,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states and 350 transitions. [2022-11-02 20:54:03,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 251. [2022-11-02 20:54:03,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 251 states, 251 states have (on average 1.3944223107569722) internal successors, (350), 250 states have internal predecessors, (350), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:54:03,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 350 transitions. [2022-11-02 20:54:03,075 INFO L240 hiAutomatonCegarLoop]: Abstraction has 251 states and 350 transitions. [2022-11-02 20:54:03,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-02 20:54:03,075 INFO L428 stractBuchiCegarLoop]: Abstraction has 251 states and 350 transitions. [2022-11-02 20:54:03,076 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-02 20:54:03,076 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 251 states and 350 transitions. [2022-11-02 20:54:03,077 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 234 [2022-11-02 20:54:03,077 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:54:03,077 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:54:03,078 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:03,078 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:54:03,079 INFO L748 eck$LassoCheckResult]: Stem: 9166#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 9145#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~ret61#1, main_#t~ret62#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side2Failed~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side1_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side2_written~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_0~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_1~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side1Failed_History_2~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_0~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_1~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~side2Failed_History_2~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_0~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_1~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~active_side_History_2~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_0~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_1~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;~manual_selection_History_2~0 := main_#t~nondet60#1;havoc main_#t~nondet60#1;assume { :begin_inline_init } true;havoc init_#res#1; 9060#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 9061#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 9003#L203 assume !(-2 != ~active_side_History_0~0); 9004#L206 assume !(0 != ~manual_selection_History_0~0); 9021#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 9155#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 9109#L215 assume !(-2 != ~active_side_History_1~0); 9110#L218 assume !(0 != ~manual_selection_History_1~0); 9146#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 9159#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 9083#L227 assume !(-2 != ~active_side_History_2~0); 9084#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 9053#L233 main_#t~ret61#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 9054#L58 assume !(0 == assume_abort_if_not_~cond#1); 9111#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 9112#L582-2 [2022-11-02 20:54:03,079 INFO L750 eck$LassoCheckResult]: Loop: 9112#L582-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 9137#L170 assume { :end_inline_write_manual_selection_history } true; 9138#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 9139#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 9151#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 9152#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 9116#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ret11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_#t~ite14#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 9117#L80 assume { :end_inline_write_side1_failed_history } true; 9102#L277 assume !(0 != ~side1Failed~0 % 256);Side1_activestandby_task_each_pals_period_~side1~0#1 := ~s1s1_old~0;~s1s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~s2s1_old~0;~s2s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := ~cs1_old~0;~cs1_old~0 := ~nomsg~0; 9104#L290 assume Side1_activestandby_task_each_pals_period_~side1~0#1 == Side1_activestandby_task_each_pals_period_~side2~0#1;Side1_activestandby_task_each_pals_period_~next_state~0#1 := 1; 8993#L309-1 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite12#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 8994#L314-1 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite12#1; 9030#L315 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite13#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 9031#L315-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite13#1; 9160#L316 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite14#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 9156#L316-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite14#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite14#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite14#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite14#1;~side1_written~0 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 9157#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ite18#1, Side2_activestandby_task_each_pals_period_#t~ret19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_#t~ite22#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet15#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet15#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 9199#L110 assume { :end_inline_write_side2_failed_history } true; 9198#L334 assume 0 != ~side2Failed~0 % 256; 8999#L335 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s1_new~0; 9000#L335-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 9013#L336 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2s2_new~0; 9066#L336-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1; 9158#L337 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite18#1 := ~s2p_new~0; 9098#L337-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite18#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite18#1;~side2_written~0 := ~nomsg~0; 9099#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 9210#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 9209#L158 Pendulum_prism_task_each_pals_period_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret23#1;havoc Pendulum_prism_task_each_pals_period_#t~ret23#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 9208#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 9202#L408 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 9201#L140 assume { :end_inline_write_active_side_history } true; 9200#L418 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_#t~ret44#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 9167#L447 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 8997#L450-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8998#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 8989#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 8990#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 9007#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 8991#L188 check_#t~ret24#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret24#1;havoc check_#t~ret24#1; 8992#L457 assume !(0 == check_~tmp___0~0#1); 8968#L457-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 8983#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 8984#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 9055#L98-2 check_#t~ret29#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 9127#L487 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 9046#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 9047#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 9121#L128-2 check_#t~ret30#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 9165#L489 assume !(0 == check_~tmp___8~0#1 % 256); 9133#L487-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 9216#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 9215#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 9214#L98-3 check_#t~ret33#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret33#1;havoc check_#t~ret33#1; 9213#L503 assume !(0 == check_~tmp___11~0#1 % 256); 9129#L503-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 9090#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 9091#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 9048#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 9049#L158-3 check_#t~ret37#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret37#1;havoc check_#t~ret37#1; 9147#L519 assume !(check_~tmp___20~0#1 > -2); 9029#L519-1 check_#res#1 := 1; 9072#L537 main_#t~ret62#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret62#1;havoc main_#t~ret62#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 9073#L616-44 assume !(0 == assert_~arg#1 % 256); 9162#L611-22 assume { :end_inline_assert } true; 9112#L582-2 [2022-11-02 20:54:03,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:03,080 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 11 times [2022-11-02 20:54:03,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:03,080 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237653163] [2022-11-02 20:54:03,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:03,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:03,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:03,092 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:03,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:03,104 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:03,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:03,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1136014308, now seen corresponding path program 1 times [2022-11-02 20:54:03,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:03,105 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116821078] [2022-11-02 20:54:03,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:03,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:03,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:03,141 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:54:03,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:54:03,180 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:54:03,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:54:03,182 INFO L85 PathProgramCache]: Analyzing trace with hash 1495995580, now seen corresponding path program 1 times [2022-11-02 20:54:03,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:54:03,182 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647438141] [2022-11-02 20:54:03,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:54:03,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:54:03,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:54:03,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:54:03,310 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:54:03,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647438141] [2022-11-02 20:54:03,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1647438141] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:54:03,311 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:54:03,311 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-02 20:54:03,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876427019] [2022-11-02 20:54:03,311 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:54:08,376 INFO L210 LassoAnalysis]: Preferences: [2022-11-02 20:54:08,376 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-02 20:54:08,377 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-02 20:54:08,377 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-02 20:54:08,377 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-02 20:54:08,377 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:54:08,377 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-02 20:54:08,378 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-02 20:54:08,378 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c_Iteration12_Loop [2022-11-02 20:54:08,378 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-02 20:54:08,378 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-02 20:54:08,406 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,416 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,418 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,420 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,422 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,424 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,426 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,431 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,433 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,435 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,437 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,439 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,444 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,446 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,447 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,449 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,452 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,454 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,456 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,458 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,460 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,461 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,463 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,465 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,467 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,485 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,487 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,489 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,492 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,494 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,499 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,502 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,505 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,507 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,510 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,513 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,515 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,518 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,520 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,522 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,524 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,526 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,531 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,535 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:08,537 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,157 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,163 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,166 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,172 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,175 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,196 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,199 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,201 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,203 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,206 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,208 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,214 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,216 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,218 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,220 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,223 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,225 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,227 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,229 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,250 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,252 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,255 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,259 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,261 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,263 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,265 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,271 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:09,273 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:54:11,206 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 13