./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i --full-output --architecture 32bit
--------------------------------------------------------------------------------
Checking for termination
Using default analysis
Version 5e519f3a
Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )
--witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a37ff9cc75e7eb9f5325f8fa274b6f05ade1742d661d8f4c826631afb9b4bde2
--- Real Ultimate output ---
[0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset.
This is Ultimate 0.2.2-dev-5e519f3
[2022-11-02 20:15:37,139 INFO L177 SettingsManager]: Resetting all preferences to default values...
[2022-11-02 20:15:37,143 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values
[2022-11-02 20:15:37,181 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2022-11-02 20:15:37,182 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2022-11-02 20:15:37,185 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2022-11-02 20:15:37,188 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2022-11-02 20:15:37,191 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values
[2022-11-02 20:15:37,193 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2022-11-02 20:15:37,195 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2022-11-02 20:15:37,196 INFO L181 SettingsManager]: Resetting Sifa preferences to default values
[2022-11-02 20:15:37,197 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2022-11-02 20:15:37,197 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values
[2022-11-02 20:15:37,198 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values
[2022-11-02 20:15:37,200 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2022-11-02 20:15:37,201 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values
[2022-11-02 20:15:37,202 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2022-11-02 20:15:37,206 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2022-11-02 20:15:37,208 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2022-11-02 20:15:37,211 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values
[2022-11-02 20:15:37,219 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2022-11-02 20:15:37,220 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2022-11-02 20:15:37,223 INFO L181 SettingsManager]: Resetting Referee preferences to default values
[2022-11-02 20:15:37,225 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2022-11-02 20:15:37,229 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2022-11-02 20:15:37,236 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2022-11-02 20:15:37,237 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values
[2022-11-02 20:15:37,238 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values
[2022-11-02 20:15:37,240 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2022-11-02 20:15:37,241 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring...
[2022-11-02 20:15:37,242 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values
[2022-11-02 20:15:37,243 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values
[2022-11-02 20:15:37,245 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values
[2022-11-02 20:15:37,247 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values
[2022-11-02 20:15:37,249 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2022-11-02 20:15:37,250 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values
[2022-11-02 20:15:37,251 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2022-11-02 20:15:37,251 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring...
[2022-11-02 20:15:37,251 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values
[2022-11-02 20:15:37,252 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values
[2022-11-02 20:15:37,253 INFO L188 SettingsManager]: Finished resetting all preferences to default values...
[2022-11-02 20:15:37,255 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-32bit-Automizer_Default.epf
[2022-11-02 20:15:37,286 INFO L113 SettingsManager]: Loading preferences was successful
[2022-11-02 20:15:37,287 INFO L115 SettingsManager]: Preferences different from defaults after loading the file:
[2022-11-02 20:15:37,287 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2022-11-02 20:15:37,287 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2022-11-02 20:15:37,289 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2022-11-02 20:15:37,289 INFO L138 SettingsManager]: * Create parallel compositions if possible=false
[2022-11-02 20:15:37,289 INFO L138 SettingsManager]: * Use SBE=true
[2022-11-02 20:15:37,290 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2022-11-02 20:15:37,290 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3
[2022-11-02 20:15:37,290 INFO L138 SettingsManager]: * Use old map elimination=false
[2022-11-02 20:15:37,290 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false
[2022-11-02 20:15:37,291 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true
[2022-11-02 20:15:37,291 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES
[2022-11-02 20:15:37,291 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2022-11-02 20:15:37,291 INFO L138 SettingsManager]: * sizeof long=4
[2022-11-02 20:15:37,292 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2022-11-02 20:15:37,292 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true
[2022-11-02 20:15:37,292 INFO L138 SettingsManager]: * sizeof POINTER=4
[2022-11-02 20:15:37,292 INFO L138 SettingsManager]: * Check division by zero=IGNORE
[2022-11-02 20:15:37,293 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME
[2022-11-02 20:15:37,293 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME
[2022-11-02 20:15:37,293 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME
[2022-11-02 20:15:37,293 INFO L138 SettingsManager]: * sizeof long double=12
[2022-11-02 20:15:37,293 INFO L138 SettingsManager]: * Check if freed pointer was valid=false
[2022-11-02 20:15:37,294 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false
[2022-11-02 20:15:37,294 INFO L138 SettingsManager]: * Use constant arrays=true
[2022-11-02 20:15:37,294 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME
[2022-11-02 20:15:37,294 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2022-11-02 20:15:37,295 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements
[2022-11-02 20:15:37,295 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2022-11-02 20:15:37,295 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL
[2022-11-02 20:15:37,296 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2022-11-02 20:15:37,297 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a37ff9cc75e7eb9f5325f8fa274b6f05ade1742d661d8f4c826631afb9b4bde2
[2022-11-02 20:15:37,542 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp
[2022-11-02 20:15:37,572 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2022-11-02 20:15:37,577 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2022-11-02 20:15:37,579 INFO L271 PluginConnector]: Initializing CDTParser...
[2022-11-02 20:15:37,580 INFO L275 PluginConnector]: CDTParser initialized
[2022-11-02 20:15:37,581 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i
[2022-11-02 20:15:37,667 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/data/2fb04913b/2474e42732c541f88d909d9716453722/FLAG5b4b416b1
[2022-11-02 20:15:38,351 INFO L306 CDTParser]: Found 1 translation units.
[2022-11-02 20:15:38,352 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i
[2022-11-02 20:15:38,372 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/data/2fb04913b/2474e42732c541f88d909d9716453722/FLAG5b4b416b1
[2022-11-02 20:15:38,564 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/data/2fb04913b/2474e42732c541f88d909d9716453722
[2022-11-02 20:15:38,567 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2022-11-02 20:15:38,569 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements.
[2022-11-02 20:15:38,573 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2022-11-02 20:15:38,574 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2022-11-02 20:15:38,577 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized
[2022-11-02 20:15:38,578 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:15:38" (1/1) ...
[2022-11-02 20:15:38,580 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@16cf2e18 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:38, skipping insertion in model container
[2022-11-02 20:15:38,580 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:15:38" (1/1) ...
[2022-11-02 20:15:38,588 INFO L145 MainTranslator]: Starting translation in SV-COMP mode
[2022-11-02 20:15:38,638 INFO L178 MainTranslator]: Built tables and reachable declarations
[2022-11-02 20:15:39,251 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i[33021,33034]
[2022-11-02 20:15:39,432 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i[49681,49694]
[2022-11-02 20:15:39,452 INFO L210 PostProcessor]: Analyzing one entry point: main
[2022-11-02 20:15:39,462 INFO L203 MainTranslator]: Completed pre-run
[2022-11-02 20:15:39,488 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i[33021,33034]
[2022-11-02 20:15:39,571 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test5-3.i[49681,49694]
[2022-11-02 20:15:39,583 INFO L210 PostProcessor]: Analyzing one entry point: main
[2022-11-02 20:15:39,617 INFO L208 MainTranslator]: Completed translation
[2022-11-02 20:15:39,618 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39 WrapperNode
[2022-11-02 20:15:39,618 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2022-11-02 20:15:39,619 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2022-11-02 20:15:39,619 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner...
[2022-11-02 20:15:39,619 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized
[2022-11-02 20:15:39,634 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,674 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,826 INFO L138 Inliner]: procedures = 177, calls = 487, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 1710
[2022-11-02 20:15:39,826 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2022-11-02 20:15:39,827 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2022-11-02 20:15:39,828 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2022-11-02 20:15:39,828 INFO L275 PluginConnector]: Boogie Preprocessor initialized
[2022-11-02 20:15:39,838 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,838 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,852 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,853 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,916 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,934 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,939 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,946 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,959 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2022-11-02 20:15:39,960 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2022-11-02 20:15:39,960 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2022-11-02 20:15:39,960 INFO L275 PluginConnector]: RCFGBuilder initialized
[2022-11-02 20:15:39,961 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (1/1) ...
[2022-11-02 20:15:39,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2022-11-02 20:15:39,999 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:40,020 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2022-11-02 20:15:40,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2022-11-02 20:15:40,069 INFO L130 BoogieDeclarations]: Found specification of procedure read~int
[2022-11-02 20:15:40,069 INFO L130 BoogieDeclarations]: Found specification of procedure write~int
[2022-11-02 20:15:40,069 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset
[2022-11-02 20:15:40,070 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset
[2022-11-02 20:15:40,070 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap
[2022-11-02 20:15:40,071 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2022-11-02 20:15:40,072 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2022-11-02 20:15:40,073 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2022-11-02 20:15:40,073 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp
[2022-11-02 20:15:40,073 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2022-11-02 20:15:40,073 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2022-11-02 20:15:40,073 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int
[2022-11-02 20:15:40,074 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2022-11-02 20:15:40,074 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2022-11-02 20:15:40,430 INFO L235 CfgBuilder]: Building ICFG
[2022-11-02 20:15:40,432 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation
[2022-11-02 20:15:40,436 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2022-11-02 20:15:43,431 INFO L276 CfgBuilder]: Performing block encoding
[2022-11-02 20:15:43,444 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2022-11-02 20:15:43,444 INFO L300 CfgBuilder]: Removed 100 assume(true) statements.
[2022-11-02 20:15:43,448 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:15:43 BoogieIcfgContainer
[2022-11-02 20:15:43,448 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2022-11-02 20:15:43,449 INFO L113 PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2022-11-02 20:15:43,449 INFO L271 PluginConnector]: Initializing BuchiAutomizer...
[2022-11-02 20:15:43,454 INFO L275 PluginConnector]: BuchiAutomizer initialized
[2022-11-02 20:15:43,455 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2022-11-02 20:15:43,455 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 08:15:38" (1/3) ...
[2022-11-02 20:15:43,456 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1fd516a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:15:43, skipping insertion in model container
[2022-11-02 20:15:43,456 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2022-11-02 20:15:43,457 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:15:39" (2/3) ...
[2022-11-02 20:15:43,457 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1fd516a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:15:43, skipping insertion in model container
[2022-11-02 20:15:43,457 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2022-11-02 20:15:43,457 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:15:43" (3/3) ...
[2022-11-02 20:15:43,459 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test5-3.i
[2022-11-02 20:15:43,530 INFO L303 stractBuchiCegarLoop]: Interprodecural is true
[2022-11-02 20:15:43,530 INFO L304 stractBuchiCegarLoop]: Hoare is false
[2022-11-02 20:15:43,531 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2022-11-02 20:15:43,531 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2022-11-02 20:15:43,531 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2022-11-02 20:15:43,531 INFO L308 stractBuchiCegarLoop]: Difference is false
[2022-11-02 20:15:43,531 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2022-11-02 20:15:43,532 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2022-11-02 20:15:43,538 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 306 states, 298 states have (on average 1.6946308724832215) internal successors, (505), 298 states have internal predecessors, (505), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:43,593 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 292
[2022-11-02 20:15:43,594 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:43,594 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:43,601 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:43,601 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:43,601 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============
[2022-11-02 20:15:43,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 306 states, 298 states have (on average 1.6946308724832215) internal successors, (505), 298 states have internal predecessors, (505), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:43,613 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 292
[2022-11-02 20:15:43,614 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:43,614 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:43,614 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:43,615 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:43,623 INFO L748 eck$LassoCheckResult]: Stem: 298#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 218#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem140#1, main_#t~mem139#1, main_#t~mem141#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem143#1, main_#t~mem145#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~switch151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc163#1.base, main_#t~malloc163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~memset~res166#1.base, main_#t~memset~res166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~malloc172#1.base, main_#t~malloc172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~memset~res179#1.base, main_#t~memset~res179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1, main_#t~post190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~short204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~malloc207#1.base, main_#t~malloc207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~memset~res212#1.base, main_#t~memset~res212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem217#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem221#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1, main_#t~ite222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem233#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~pre236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~post241#1, main_#t~mem245#1, main_#t~mem243#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem244#1, main_#t~mem246#1, main_#t~post247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem264#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_#t~ite267#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem272#1, main_#t~mem271#1, main_#t~mem273#1, main_#t~mem274#1, main_#t~mem276#1, main_#t~mem275#1, main_#t~mem277#1, main_#t~mem278#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~switch283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ret309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem314#1, main_#t~mem315#1, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~short322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem345#1, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~post349#1, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1, main_#t~post360#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~short363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1.base, main_#t~mem374#1.offset, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1.base, main_#t~mem380#1.offset, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem382#1, main_#t~mem383#1.base, main_#t~mem383#1.offset, main_#t~mem386#1, main_#t~mem384#1.base, main_#t~mem384#1.offset, main_#t~mem385#1, main_#t~mem387#1.base, main_#t~mem387#1.offset, main_#t~mem388#1.base, main_#t~mem388#1.offset, main_#t~mem389#1, main_#t~post390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~post401#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite319#1.base, main_#t~ite319#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 176#L736-3true
[2022-11-02 20:15:43,624 INFO L750 eck$LassoCheckResult]: Loop: 176#L736-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 47#L738true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 293#L738-2true call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 182#L743-124true assume !true; 30#L744-123true assume !true; 232#L736-2true main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 176#L736-3true
[2022-11-02 20:15:43,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:43,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times
[2022-11-02 20:15:43,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:43,641 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126078391]
[2022-11-02 20:15:43,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:43,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:43,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:43,766 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-02 20:15:43,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:43,848 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-02 20:15:43,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:43,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1452934148, now seen corresponding path program 1 times
[2022-11-02 20:15:43,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:43,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246058493]
[2022-11-02 20:15:43,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:43,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:43,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-02 20:15:43,915 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-02 20:15:43,916 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246058493]
[2022-11-02 20:15:43,917 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic
[2022-11-02 20:15:43,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [592970077]
[2022-11-02 20:15:43,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:43,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-02 20:15:43,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:43,921 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-02 20:15:43,938 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2022-11-02 20:15:44,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-02 20:15:44,102 INFO L263 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 1 conjunts are in the unsatisfiable core
[2022-11-02 20:15:44,103 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2022-11-02 20:15:44,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-02 20:15:44,123 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-02 20:15:44,124 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [592970077] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-02 20:15:44,125 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-02 20:15:44,125 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2022-11-02 20:15:44,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [226311170]
[2022-11-02 20:15:44,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-02 20:15:44,131 INFO L765 eck$LassoCheckResult]: loop already infeasible
[2022-11-02 20:15:44,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-02 20:15:44,175 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2022-11-02 20:15:44,175 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2022-11-02 20:15:44,178 INFO L87 Difference]: Start difference. First operand has 306 states, 298 states have (on average 1.6946308724832215) internal successors, (505), 298 states have internal predecessors, (505), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-02 20:15:44,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-02 20:15:44,235 INFO L93 Difference]: Finished difference Result 306 states and 404 transitions.
[2022-11-02 20:15:44,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 306 states and 404 transitions.
[2022-11-02 20:15:44,243 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 292
[2022-11-02 20:15:44,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 306 states to 302 states and 400 transitions.
[2022-11-02 20:15:44,260 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 302
[2022-11-02 20:15:44,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 302
[2022-11-02 20:15:44,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 302 states and 400 transitions.
[2022-11-02 20:15:44,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-02 20:15:44,275 INFO L218 hiAutomatonCegarLoop]: Abstraction has 302 states and 400 transitions.
[2022-11-02 20:15:44,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302 states and 400 transitions.
[2022-11-02 20:15:44,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302 to 302.
[2022-11-02 20:15:44,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 302 states, 295 states have (on average 1.3152542372881355) internal successors, (388), 294 states have internal predecessors, (388), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:44,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 400 transitions.
[2022-11-02 20:15:44,343 INFO L240 hiAutomatonCegarLoop]: Abstraction has 302 states and 400 transitions.
[2022-11-02 20:15:44,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states.
[2022-11-02 20:15:44,350 INFO L428 stractBuchiCegarLoop]: Abstraction has 302 states and 400 transitions.
[2022-11-02 20:15:44,354 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============
[2022-11-02 20:15:44,355 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 302 states and 400 transitions.
[2022-11-02 20:15:44,363 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 292
[2022-11-02 20:15:44,364 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:44,364 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:44,368 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:44,368 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:44,369 INFO L748 eck$LassoCheckResult]: Stem: 936#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 915#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem140#1, main_#t~mem139#1, main_#t~mem141#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem143#1, main_#t~mem145#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~switch151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc163#1.base, main_#t~malloc163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~memset~res166#1.base, main_#t~memset~res166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~malloc172#1.base, main_#t~malloc172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~memset~res179#1.base, main_#t~memset~res179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1, main_#t~post190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~short204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~malloc207#1.base, main_#t~malloc207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~memset~res212#1.base, main_#t~memset~res212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem217#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem221#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1, main_#t~ite222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem233#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~pre236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~post241#1, main_#t~mem245#1, main_#t~mem243#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem244#1, main_#t~mem246#1, main_#t~post247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem264#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_#t~ite267#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem272#1, main_#t~mem271#1, main_#t~mem273#1, main_#t~mem274#1, main_#t~mem276#1, main_#t~mem275#1, main_#t~mem277#1, main_#t~mem278#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~switch283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ret309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem314#1, main_#t~mem315#1, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~short322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem345#1, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~post349#1, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1, main_#t~post360#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~short363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1.base, main_#t~mem374#1.offset, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1.base, main_#t~mem380#1.offset, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem382#1, main_#t~mem383#1.base, main_#t~mem383#1.offset, main_#t~mem386#1, main_#t~mem384#1.base, main_#t~mem384#1.offset, main_#t~mem385#1, main_#t~mem387#1.base, main_#t~mem387#1.offset, main_#t~mem388#1.base, main_#t~mem388#1.offset, main_#t~mem389#1, main_#t~post390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~post401#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite319#1.base, main_#t~ite319#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 884#L736-3
[2022-11-02 20:15:44,376 INFO L750 eck$LassoCheckResult]: Loop: 884#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 729#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 730#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 890#L743-124 havoc main_~_ha_hashv~0#1; 891#L743-49 goto; 738#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 739#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 800#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 774#L743-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 775#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 853#L743-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 754#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 709#L743-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 710#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 826#L743-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 827#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 886#L743-22 assume !main_#t~switch19#1; 703#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 704#L743-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 887#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 872#L743-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 672#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 673#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 700#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 790#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 888#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 929#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 909#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 910#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 757#L743-42 havoc main_#t~switch19#1; 758#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 667#L743-44 goto; 668#L743-46 goto; 643#L743-48 goto; 644#L743-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 795#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 796#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 896#L743-66 goto; 720#L743-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 784#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 785#L743-70 goto; 913#L743-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 866#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 822#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 823#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 878#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 880#L743-117 goto; 771#L743-119 goto; 736#L743-121 goto; 737#L743-123 goto; 695#L744-123 havoc main_~_ha_hashv~1#1; 696#L744-48 goto; 932#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 678#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 679#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch151#1 := 11 == main_~_hj_k~1#1; 908#L744-9 assume main_#t~switch151#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 755#L744-11 main_#t~switch151#1 := main_#t~switch151#1 || 10 == main_~_hj_k~1#1; 722#L744-12 assume main_#t~switch151#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 723#L744-14 main_#t~switch151#1 := main_#t~switch151#1 || 9 == main_~_hj_k~1#1; 684#L744-15 assume !main_#t~switch151#1; 641#L744-17 main_#t~switch151#1 := main_#t~switch151#1 || 8 == main_~_hj_k~1#1; 642#L744-18 assume main_#t~switch151#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 793#L744-20 main_#t~switch151#1 := main_#t~switch151#1 || 7 == main_~_hj_k~1#1; 794#L744-21 assume main_#t~switch151#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 814#L744-23 main_#t~switch151#1 := main_#t~switch151#1 || 6 == main_~_hj_k~1#1; 858#L744-24 assume main_#t~switch151#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem157#1 % 256);havoc main_#t~mem157#1; 883#L744-26 main_#t~switch151#1 := main_#t~switch151#1 || 5 == main_~_hj_k~1#1; 693#L744-27 assume main_#t~switch151#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem158#1 % 256;havoc main_#t~mem158#1; 694#L744-29 main_#t~switch151#1 := main_#t~switch151#1 || 4 == main_~_hj_k~1#1; 747#L744-30 assume main_#t~switch151#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 717#L744-32 main_#t~switch151#1 := main_#t~switch151#1 || 3 == main_~_hj_k~1#1; 718#L744-33 assume main_#t~switch151#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 931#L744-35 main_#t~switch151#1 := main_#t~switch151#1 || 2 == main_~_hj_k~1#1; 895#L744-36 assume !main_#t~switch151#1; 734#L744-38 main_#t~switch151#1 := main_#t~switch151#1 || 1 == main_~_hj_k~1#1; 735#L744-39 assume main_#t~switch151#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem162#1 % 256;havoc main_#t~mem162#1; 902#L744-41 havoc main_#t~switch151#1; 820#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 821#L744-43 goto; 893#L744-45 goto; 881#L744-47 goto; 756#L744-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 697#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem180#1.base, main_#t~mem180#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset; 698#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_#t~mem181#1.base, 16 + main_#t~mem181#1.offset, 4);call main_#t~mem183#1.base, main_#t~mem183#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem184#1 := read~int(main_#t~mem183#1.base, 20 + main_#t~mem183#1.offset, 4);call write~$Pointer$(main_#t~mem182#1.base, main_#t~mem182#1.offset - main_#t~mem184#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1.base, main_#t~mem183#1.offset;havoc main_#t~mem184#1;call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_#t~mem185#1.base, 16 + main_#t~mem185#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem186#1.base, 8 + main_#t~mem186#1.offset, 4);havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;havoc main_#t~mem186#1.base, main_#t~mem186#1.offset;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset; 761#L744-65 goto; 789#L744-119 havoc main_~_ha_bkt~1#1;call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem189#1 := read~int(main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);main_#t~post190#1 := main_#t~mem189#1;call write~int(1 + main_#t~post190#1, main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1;havoc main_#t~post190#1; 871#L744-70 call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 4 + main_#t~mem191#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem192#1 - 1 then 0 else (if 1 == main_#t~mem192#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem192#1 - 1 || 0 == main_#t~mem192#1 - 1 then main_#t~mem192#1 - 1 else (if main_#t~mem192#1 - 1 >= 0 then (main_#t~mem192#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))));havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1; 934#L744-69 goto; 669#L744-117 call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, main_#t~mem193#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem194#1.base, main_#t~mem194#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem195#1;havoc main_#t~post196#1;call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem197#1.base, main_#t~mem197#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 635#L744-72 assume main_#t~mem198#1.base != 0 || main_#t~mem198#1.offset != 0;havoc main_#t~mem198#1.base, main_#t~mem198#1.offset;call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem199#1.base, 12 + main_#t~mem199#1.offset, 4);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset; 636#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short204#1 := main_#t~mem201#1 % 4294967296 >= 10 * (1 + main_#t~mem200#1) % 4294967296; 724#L744-75 assume !main_#t~short204#1; 904#L744-77 assume !main_#t~short204#1;havoc main_#t~mem201#1;havoc main_#t~mem200#1;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;havoc main_#t~mem203#1;havoc main_#t~short204#1; 685#L744-116 goto; 686#L744-118 goto; 912#L744-120 goto; 930#L744-122 goto; 918#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 884#L736-3
[2022-11-02 20:15:44,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:44,385 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times
[2022-11-02 20:15:44,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:44,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50180435]
[2022-11-02 20:15:44,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:44,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:44,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:44,403 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-02 20:15:44,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:44,422 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-02 20:15:44,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:44,423 INFO L85 PathProgramCache]: Analyzing trace with hash 1715433066, now seen corresponding path program 1 times
[2022-11-02 20:15:44,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:44,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602661500]
[2022-11-02 20:15:44,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:44,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:44,807 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-02 20:15:44,808 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [474045438]
[2022-11-02 20:15:44,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:44,809 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-02 20:15:44,809 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:44,811 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-02 20:15:44,812 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2022-11-02 20:15:46,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-02 20:15:46,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 3579 conjuncts, 3 conjunts are in the unsatisfiable core
[2022-11-02 20:15:46,327 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2022-11-02 20:15:46,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-02 20:15:46,369 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-02 20:15:46,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-02 20:15:46,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602661500]
[2022-11-02 20:15:46,370 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2022-11-02 20:15:46,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [474045438]
[2022-11-02 20:15:46,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [474045438] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-02 20:15:46,371 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-02 20:15:46,371 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2022-11-02 20:15:46,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979263372]
[2022-11-02 20:15:46,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-02 20:15:46,372 INFO L765 eck$LassoCheckResult]: loop already infeasible
[2022-11-02 20:15:46,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-02 20:15:46,373 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2022-11-02 20:15:46,373 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2022-11-02 20:15:46,373 INFO L87 Difference]: Start difference. First operand 302 states and 400 transitions. cyclomatic complexity: 102 Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-02 20:15:46,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-02 20:15:46,491 INFO L93 Difference]: Finished difference Result 323 states and 421 transitions.
[2022-11-02 20:15:46,491 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 323 states and 421 transitions.
[2022-11-02 20:15:46,494 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 313
[2022-11-02 20:15:46,497 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 323 states to 323 states and 421 transitions.
[2022-11-02 20:15:46,497 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 323
[2022-11-02 20:15:46,497 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 323
[2022-11-02 20:15:46,498 INFO L73 IsDeterministic]: Start isDeterministic. Operand 323 states and 421 transitions.
[2022-11-02 20:15:46,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-02 20:15:46,499 INFO L218 hiAutomatonCegarLoop]: Abstraction has 323 states and 421 transitions.
[2022-11-02 20:15:46,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states and 421 transitions.
[2022-11-02 20:15:46,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 322.
[2022-11-02 20:15:46,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 322 states, 315 states have (on average 1.2952380952380953) internal successors, (408), 314 states have internal predecessors, (408), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:46,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 420 transitions.
[2022-11-02 20:15:46,509 INFO L240 hiAutomatonCegarLoop]: Abstraction has 322 states and 420 transitions.
[2022-11-02 20:15:46,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2022-11-02 20:15:46,510 INFO L428 stractBuchiCegarLoop]: Abstraction has 322 states and 420 transitions.
[2022-11-02 20:15:46,510 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============
[2022-11-02 20:15:46,510 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 322 states and 420 transitions.
[2022-11-02 20:15:46,512 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 312
[2022-11-02 20:15:46,512 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:46,512 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:46,516 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:46,517 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:46,517 INFO L748 eck$LassoCheckResult]: Stem: 1859#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1838#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem140#1, main_#t~mem139#1, main_#t~mem141#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem143#1, main_#t~mem145#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~switch151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc163#1.base, main_#t~malloc163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~memset~res166#1.base, main_#t~memset~res166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~malloc172#1.base, main_#t~malloc172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~memset~res179#1.base, main_#t~memset~res179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1, main_#t~post190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~short204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~malloc207#1.base, main_#t~malloc207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~memset~res212#1.base, main_#t~memset~res212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem217#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem221#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1, main_#t~ite222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem233#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~pre236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~post241#1, main_#t~mem245#1, main_#t~mem243#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem244#1, main_#t~mem246#1, main_#t~post247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem264#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_#t~ite267#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem272#1, main_#t~mem271#1, main_#t~mem273#1, main_#t~mem274#1, main_#t~mem276#1, main_#t~mem275#1, main_#t~mem277#1, main_#t~mem278#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~switch283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ret309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem314#1, main_#t~mem315#1, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~short322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem345#1, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~post349#1, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1, main_#t~post360#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~short363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1.base, main_#t~mem374#1.offset, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1.base, main_#t~mem380#1.offset, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem382#1, main_#t~mem383#1.base, main_#t~mem383#1.offset, main_#t~mem386#1, main_#t~mem384#1.base, main_#t~mem384#1.offset, main_#t~mem385#1, main_#t~mem387#1.base, main_#t~mem387#1.offset, main_#t~mem388#1.base, main_#t~mem388#1.offset, main_#t~mem389#1, main_#t~post390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~post401#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite319#1.base, main_#t~ite319#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 1807#L736-3
[2022-11-02 20:15:46,517 INFO L750 eck$LassoCheckResult]: Loop: 1807#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1649#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1650#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 1813#L743-124 havoc main_~_ha_hashv~0#1; 1814#L743-49 goto; 1660#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1661#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1723#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 1696#L743-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 1697#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 1776#L743-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 1676#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 1631#L743-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 1632#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 1749#L743-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 1750#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 1809#L743-22 assume main_#t~switch19#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 1625#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 1626#L743-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 1810#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 1795#L743-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 1594#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 1595#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 1622#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 1711#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 1811#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 1852#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 1831#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 1832#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 1677#L743-42 havoc main_#t~switch19#1; 1678#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1589#L743-44 goto; 1590#L743-46 goto; 1561#L743-48 goto; 1562#L743-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1716#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 1717#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 1818#L743-66 goto; 1642#L743-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 1706#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 1707#L743-70 goto; 1836#L743-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1789#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1743#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 1744#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 1801#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 1803#L743-117 goto; 1693#L743-119 goto; 1658#L743-121 goto; 1659#L743-123 goto; 1617#L744-123 havoc main_~_ha_hashv~1#1; 1618#L744-48 goto; 1855#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 1600#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 1601#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch151#1 := 11 == main_~_hj_k~1#1; 1833#L744-9 assume main_#t~switch151#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 1681#L744-11 main_#t~switch151#1 := main_#t~switch151#1 || 10 == main_~_hj_k~1#1; 1644#L744-12 assume main_#t~switch151#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 1645#L744-14 main_#t~switch151#1 := main_#t~switch151#1 || 9 == main_~_hj_k~1#1; 1606#L744-15 assume !main_#t~switch151#1; 1565#L744-17 main_#t~switch151#1 := main_#t~switch151#1 || 8 == main_~_hj_k~1#1; 1566#L744-18 assume main_#t~switch151#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 1718#L744-20 main_#t~switch151#1 := main_#t~switch151#1 || 7 == main_~_hj_k~1#1; 1719#L744-21 assume main_#t~switch151#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 1737#L744-23 main_#t~switch151#1 := main_#t~switch151#1 || 6 == main_~_hj_k~1#1; 1781#L744-24 assume main_#t~switch151#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem157#1 % 256);havoc main_#t~mem157#1; 1806#L744-26 main_#t~switch151#1 := main_#t~switch151#1 || 5 == main_~_hj_k~1#1; 1615#L744-27 assume main_#t~switch151#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem158#1 % 256;havoc main_#t~mem158#1; 1616#L744-29 main_#t~switch151#1 := main_#t~switch151#1 || 4 == main_~_hj_k~1#1; 1669#L744-30 assume main_#t~switch151#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 1639#L744-32 main_#t~switch151#1 := main_#t~switch151#1 || 3 == main_~_hj_k~1#1; 1640#L744-33 assume main_#t~switch151#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 1854#L744-35 main_#t~switch151#1 := main_#t~switch151#1 || 2 == main_~_hj_k~1#1; 1819#L744-36 assume !main_#t~switch151#1; 1656#L744-38 main_#t~switch151#1 := main_#t~switch151#1 || 1 == main_~_hj_k~1#1; 1657#L744-39 assume main_#t~switch151#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem162#1 % 256;havoc main_#t~mem162#1; 1825#L744-41 havoc main_#t~switch151#1; 1747#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 1748#L744-43 goto; 1816#L744-45 goto; 1804#L744-47 goto; 1682#L744-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 1619#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem180#1.base, main_#t~mem180#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset; 1620#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_#t~mem181#1.base, 16 + main_#t~mem181#1.offset, 4);call main_#t~mem183#1.base, main_#t~mem183#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem184#1 := read~int(main_#t~mem183#1.base, 20 + main_#t~mem183#1.offset, 4);call write~$Pointer$(main_#t~mem182#1.base, main_#t~mem182#1.offset - main_#t~mem184#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1.base, main_#t~mem183#1.offset;havoc main_#t~mem184#1;call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_#t~mem185#1.base, 16 + main_#t~mem185#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem186#1.base, 8 + main_#t~mem186#1.offset, 4);havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;havoc main_#t~mem186#1.base, main_#t~mem186#1.offset;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset; 1688#L744-65 goto; 1710#L744-119 havoc main_~_ha_bkt~1#1;call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem189#1 := read~int(main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);main_#t~post190#1 := main_#t~mem189#1;call write~int(1 + main_#t~post190#1, main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1;havoc main_#t~post190#1; 1794#L744-70 call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 4 + main_#t~mem191#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem192#1 - 1 then 0 else (if 1 == main_#t~mem192#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem192#1 - 1 || 0 == main_#t~mem192#1 - 1 then main_#t~mem192#1 - 1 else (if main_#t~mem192#1 - 1 >= 0 then (main_#t~mem192#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))));havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1; 1858#L744-69 goto; 1591#L744-117 call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, main_#t~mem193#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem194#1.base, main_#t~mem194#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem195#1;havoc main_#t~post196#1;call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem197#1.base, main_#t~mem197#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 1559#L744-72 assume main_#t~mem198#1.base != 0 || main_#t~mem198#1.offset != 0;havoc main_#t~mem198#1.base, main_#t~mem198#1.offset;call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem199#1.base, 12 + main_#t~mem199#1.offset, 4);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset; 1560#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short204#1 := main_#t~mem201#1 % 4294967296 >= 10 * (1 + main_#t~mem200#1) % 4294967296; 1646#L744-75 assume !main_#t~short204#1; 1827#L744-77 assume !main_#t~short204#1;havoc main_#t~mem201#1;havoc main_#t~mem200#1;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;havoc main_#t~mem203#1;havoc main_#t~short204#1; 1609#L744-116 goto; 1610#L744-118 goto; 1835#L744-120 goto; 1853#L744-122 goto; 1841#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1807#L736-3
[2022-11-02 20:15:46,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:46,518 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times
[2022-11-02 20:15:46,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:46,518 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319240482]
[2022-11-02 20:15:46,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:46,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:46,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:46,554 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-02 20:15:46,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:46,584 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-02 20:15:46,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:46,585 INFO L85 PathProgramCache]: Analyzing trace with hash 148675116, now seen corresponding path program 1 times
[2022-11-02 20:15:46,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:46,586 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956445823]
[2022-11-02 20:15:46,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:46,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:46,919 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-02 20:15:46,920 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1806263803]
[2022-11-02 20:15:46,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:46,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-02 20:15:46,921 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:46,923 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-02 20:15:46,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2022-11-02 20:15:48,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-02 20:15:48,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 3585 conjuncts, 3 conjunts are in the unsatisfiable core
[2022-11-02 20:15:48,414 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2022-11-02 20:15:48,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-02 20:15:48,431 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-02 20:15:48,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-02 20:15:48,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956445823]
[2022-11-02 20:15:48,432 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2022-11-02 20:15:48,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1806263803]
[2022-11-02 20:15:48,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1806263803] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-02 20:15:48,432 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-02 20:15:48,433 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2022-11-02 20:15:48,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1878589975]
[2022-11-02 20:15:48,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-02 20:15:48,433 INFO L765 eck$LassoCheckResult]: loop already infeasible
[2022-11-02 20:15:48,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-02 20:15:48,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2022-11-02 20:15:48,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2022-11-02 20:15:48,435 INFO L87 Difference]: Start difference. First operand 322 states and 420 transitions. cyclomatic complexity: 102 Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-02 20:15:48,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-02 20:15:48,520 INFO L93 Difference]: Finished difference Result 343 states and 441 transitions.
[2022-11-02 20:15:48,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 343 states and 441 transitions.
[2022-11-02 20:15:48,523 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 333
[2022-11-02 20:15:48,526 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 343 states to 343 states and 441 transitions.
[2022-11-02 20:15:48,526 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 343
[2022-11-02 20:15:48,526 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 343
[2022-11-02 20:15:48,527 INFO L73 IsDeterministic]: Start isDeterministic. Operand 343 states and 441 transitions.
[2022-11-02 20:15:48,527 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-02 20:15:48,528 INFO L218 hiAutomatonCegarLoop]: Abstraction has 343 states and 441 transitions.
[2022-11-02 20:15:48,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states and 441 transitions.
[2022-11-02 20:15:48,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 342.
[2022-11-02 20:15:48,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 342 states, 335 states have (on average 1.2776119402985076) internal successors, (428), 334 states have internal predecessors, (428), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:48,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 440 transitions.
[2022-11-02 20:15:48,537 INFO L240 hiAutomatonCegarLoop]: Abstraction has 342 states and 440 transitions.
[2022-11-02 20:15:48,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2022-11-02 20:15:48,538 INFO L428 stractBuchiCegarLoop]: Abstraction has 342 states and 440 transitions.
[2022-11-02 20:15:48,539 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============
[2022-11-02 20:15:48,539 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 342 states and 440 transitions.
[2022-11-02 20:15:48,541 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 332
[2022-11-02 20:15:48,541 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:48,541 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:48,542 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:48,542 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:48,542 INFO L748 eck$LassoCheckResult]: Stem: 2824#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 2801#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem140#1, main_#t~mem139#1, main_#t~mem141#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem143#1, main_#t~mem145#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~switch151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc163#1.base, main_#t~malloc163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~memset~res166#1.base, main_#t~memset~res166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~malloc172#1.base, main_#t~malloc172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~memset~res179#1.base, main_#t~memset~res179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1, main_#t~post190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~short204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~malloc207#1.base, main_#t~malloc207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~memset~res212#1.base, main_#t~memset~res212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem217#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem221#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1, main_#t~ite222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem233#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~pre236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~post241#1, main_#t~mem245#1, main_#t~mem243#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem244#1, main_#t~mem246#1, main_#t~post247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem264#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_#t~ite267#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem272#1, main_#t~mem271#1, main_#t~mem273#1, main_#t~mem274#1, main_#t~mem276#1, main_#t~mem275#1, main_#t~mem277#1, main_#t~mem278#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~switch283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ret309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem314#1, main_#t~mem315#1, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~short322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem345#1, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~post349#1, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1, main_#t~post360#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~short363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1.base, main_#t~mem374#1.offset, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1.base, main_#t~mem380#1.offset, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem382#1, main_#t~mem383#1.base, main_#t~mem383#1.offset, main_#t~mem386#1, main_#t~mem384#1.base, main_#t~mem384#1.offset, main_#t~mem385#1, main_#t~mem387#1.base, main_#t~mem387#1.offset, main_#t~mem388#1.base, main_#t~mem388#1.offset, main_#t~mem389#1, main_#t~post390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~post401#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite319#1.base, main_#t~ite319#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 2769#L736-3
[2022-11-02 20:15:48,543 INFO L750 eck$LassoCheckResult]: Loop: 2769#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2611#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2612#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 2775#L743-124 havoc main_~_ha_hashv~0#1; 2776#L743-49 goto; 2622#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2623#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2685#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 2658#L743-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 2659#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 2738#L743-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 2638#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 2593#L743-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 2594#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 2711#L743-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 2712#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 2771#L743-22 assume main_#t~switch19#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 2587#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 2588#L743-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 2772#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 2757#L743-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 2556#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 2557#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 2584#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 2672#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 2773#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 2816#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 2794#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 2795#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 2639#L743-42 havoc main_#t~switch19#1; 2640#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 2551#L743-44 goto; 2552#L743-46 goto; 2523#L743-48 goto; 2524#L743-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2678#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 2679#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 2780#L743-66 goto; 2604#L743-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 2668#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 2669#L743-70 goto; 2799#L743-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2751#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2705#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 2706#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 2763#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 2765#L743-117 goto; 2655#L743-119 goto; 2620#L743-121 goto; 2621#L743-123 goto; 2579#L744-123 havoc main_~_ha_hashv~1#1; 2580#L744-48 goto; 2820#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 2562#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 2563#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch151#1 := 11 == main_~_hj_k~1#1; 2796#L744-9 assume !main_#t~switch151#1; 2802#L744-11 main_#t~switch151#1 := main_#t~switch151#1 || 10 == main_~_hj_k~1#1; 2857#L744-12 assume !main_#t~switch151#1; 2856#L744-14 main_#t~switch151#1 := main_#t~switch151#1 || 9 == main_~_hj_k~1#1; 2855#L744-15 assume !main_#t~switch151#1; 2853#L744-17 main_#t~switch151#1 := main_#t~switch151#1 || 8 == main_~_hj_k~1#1; 2851#L744-18 assume !main_#t~switch151#1; 2849#L744-20 main_#t~switch151#1 := main_#t~switch151#1 || 7 == main_~_hj_k~1#1; 2847#L744-21 assume main_#t~switch151#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 2699#L744-23 main_#t~switch151#1 := main_#t~switch151#1 || 6 == main_~_hj_k~1#1; 2743#L744-24 assume main_#t~switch151#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem157#1 % 256);havoc main_#t~mem157#1; 2768#L744-26 main_#t~switch151#1 := main_#t~switch151#1 || 5 == main_~_hj_k~1#1; 2577#L744-27 assume main_#t~switch151#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem158#1 % 256;havoc main_#t~mem158#1; 2578#L744-29 main_#t~switch151#1 := main_#t~switch151#1 || 4 == main_~_hj_k~1#1; 2631#L744-30 assume main_#t~switch151#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 2601#L744-32 main_#t~switch151#1 := main_#t~switch151#1 || 3 == main_~_hj_k~1#1; 2602#L744-33 assume main_#t~switch151#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 2818#L744-35 main_#t~switch151#1 := main_#t~switch151#1 || 2 == main_~_hj_k~1#1; 2781#L744-36 assume main_#t~switch151#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 2782#L744-38 main_#t~switch151#1 := main_#t~switch151#1 || 1 == main_~_hj_k~1#1; 2819#L744-39 assume main_#t~switch151#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem162#1 % 256;havoc main_#t~mem162#1; 2788#L744-41 havoc main_#t~switch151#1; 2709#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 2710#L744-43 goto; 2778#L744-45 goto; 2766#L744-47 goto; 2644#L744-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 2581#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem180#1.base, main_#t~mem180#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset; 2582#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_#t~mem181#1.base, 16 + main_#t~mem181#1.offset, 4);call main_#t~mem183#1.base, main_#t~mem183#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem184#1 := read~int(main_#t~mem183#1.base, 20 + main_#t~mem183#1.offset, 4);call write~$Pointer$(main_#t~mem182#1.base, main_#t~mem182#1.offset - main_#t~mem184#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1.base, main_#t~mem183#1.offset;havoc main_#t~mem184#1;call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_#t~mem185#1.base, 16 + main_#t~mem185#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem186#1.base, 8 + main_#t~mem186#1.offset, 4);havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;havoc main_#t~mem186#1.base, main_#t~mem186#1.offset;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset; 2648#L744-65 goto; 2675#L744-119 havoc main_~_ha_bkt~1#1;call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem189#1 := read~int(main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);main_#t~post190#1 := main_#t~mem189#1;call write~int(1 + main_#t~post190#1, main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1;havoc main_#t~post190#1; 2756#L744-70 call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 4 + main_#t~mem191#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem192#1 - 1 then 0 else (if 1 == main_#t~mem192#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem192#1 - 1 || 0 == main_#t~mem192#1 - 1 then main_#t~mem192#1 - 1 else (if main_#t~mem192#1 - 1 >= 0 then (main_#t~mem192#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))));havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1; 2822#L744-69 goto; 2553#L744-117 call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, main_#t~mem193#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem194#1.base, main_#t~mem194#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem195#1;havoc main_#t~post196#1;call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem197#1.base, main_#t~mem197#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 2519#L744-72 assume main_#t~mem198#1.base != 0 || main_#t~mem198#1.offset != 0;havoc main_#t~mem198#1.base, main_#t~mem198#1.offset;call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem199#1.base, 12 + main_#t~mem199#1.offset, 4);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset; 2520#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short204#1 := main_#t~mem201#1 % 4294967296 >= 10 * (1 + main_#t~mem200#1) % 4294967296; 2608#L744-75 assume !main_#t~short204#1; 2790#L744-77 assume !main_#t~short204#1;havoc main_#t~mem201#1;havoc main_#t~mem200#1;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;havoc main_#t~mem203#1;havoc main_#t~short204#1; 2571#L744-116 goto; 2572#L744-118 goto; 2798#L744-120 goto; 2817#L744-122 goto; 2805#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 2769#L736-3
[2022-11-02 20:15:48,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:48,544 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times
[2022-11-02 20:15:48,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:48,544 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570237945]
[2022-11-02 20:15:48,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:48,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:48,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:48,564 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-02 20:15:48,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:48,586 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-02 20:15:48,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:48,587 INFO L85 PathProgramCache]: Analyzing trace with hash 193911472, now seen corresponding path program 1 times
[2022-11-02 20:15:48,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:48,587 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074861314]
[2022-11-02 20:15:48,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:48,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:48,811 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-02 20:15:48,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1084930453]
[2022-11-02 20:15:48,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:48,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-02 20:15:48,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:48,818 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-02 20:15:48,826 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2022-11-02 20:15:50,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-02 20:15:50,453 INFO L263 TraceCheckSpWp]: Trace formula consists of 3573 conjuncts, 3 conjunts are in the unsatisfiable core
[2022-11-02 20:15:50,457 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2022-11-02 20:15:50,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-02 20:15:50,487 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-02 20:15:50,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-02 20:15:50,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074861314]
[2022-11-02 20:15:50,491 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2022-11-02 20:15:50,491 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1084930453]
[2022-11-02 20:15:50,491 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1084930453] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-02 20:15:50,492 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-02 20:15:50,492 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2022-11-02 20:15:50,492 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140114829]
[2022-11-02 20:15:50,492 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-02 20:15:50,498 INFO L765 eck$LassoCheckResult]: loop already infeasible
[2022-11-02 20:15:50,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-02 20:15:50,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2022-11-02 20:15:50,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2022-11-02 20:15:50,499 INFO L87 Difference]: Start difference. First operand 342 states and 440 transitions. cyclomatic complexity: 102 Second operand has 4 states, 4 states have (on average 24.5) internal successors, (98), 4 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-02 20:15:50,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-02 20:15:50,644 INFO L93 Difference]: Finished difference Result 460 states and 595 transitions.
[2022-11-02 20:15:50,644 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 460 states and 595 transitions.
[2022-11-02 20:15:50,648 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 440
[2022-11-02 20:15:50,652 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 460 states to 460 states and 595 transitions.
[2022-11-02 20:15:50,652 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 460
[2022-11-02 20:15:50,652 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 460
[2022-11-02 20:15:50,653 INFO L73 IsDeterministic]: Start isDeterministic. Operand 460 states and 595 transitions.
[2022-11-02 20:15:50,654 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-02 20:15:50,654 INFO L218 hiAutomatonCegarLoop]: Abstraction has 460 states and 595 transitions.
[2022-11-02 20:15:50,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states and 595 transitions.
[2022-11-02 20:15:50,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 328.
[2022-11-02 20:15:50,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 328 states, 321 states have (on average 1.2679127725856698) internal successors, (407), 320 states have internal predecessors, (407), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:50,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 419 transitions.
[2022-11-02 20:15:50,663 INFO L240 hiAutomatonCegarLoop]: Abstraction has 328 states and 419 transitions.
[2022-11-02 20:15:50,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2022-11-02 20:15:50,665 INFO L428 stractBuchiCegarLoop]: Abstraction has 328 states and 419 transitions.
[2022-11-02 20:15:50,665 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============
[2022-11-02 20:15:50,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 328 states and 419 transitions.
[2022-11-02 20:15:50,667 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 318
[2022-11-02 20:15:50,667 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:50,667 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:50,668 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:50,668 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:50,669 INFO L748 eck$LassoCheckResult]: Stem: 3926#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 3902#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem140#1, main_#t~mem139#1, main_#t~mem141#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem143#1, main_#t~mem145#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~switch151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc163#1.base, main_#t~malloc163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~memset~res166#1.base, main_#t~memset~res166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~malloc172#1.base, main_#t~malloc172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~memset~res179#1.base, main_#t~memset~res179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1, main_#t~post190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~short204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~malloc207#1.base, main_#t~malloc207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~memset~res212#1.base, main_#t~memset~res212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem217#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem221#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1, main_#t~ite222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem233#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~pre236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~post241#1, main_#t~mem245#1, main_#t~mem243#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem244#1, main_#t~mem246#1, main_#t~post247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem264#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_#t~ite267#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem272#1, main_#t~mem271#1, main_#t~mem273#1, main_#t~mem274#1, main_#t~mem276#1, main_#t~mem275#1, main_#t~mem277#1, main_#t~mem278#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~switch283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ret309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem314#1, main_#t~mem315#1, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~short322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem345#1, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~post349#1, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1, main_#t~post360#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~short363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1.base, main_#t~mem374#1.offset, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1.base, main_#t~mem380#1.offset, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem382#1, main_#t~mem383#1.base, main_#t~mem383#1.offset, main_#t~mem386#1, main_#t~mem384#1.base, main_#t~mem384#1.offset, main_#t~mem385#1, main_#t~mem387#1.base, main_#t~mem387#1.offset, main_#t~mem388#1.base, main_#t~mem388#1.offset, main_#t~mem389#1, main_#t~post390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~post401#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite319#1.base, main_#t~ite319#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 3871#L736-3
[2022-11-02 20:15:50,670 INFO L750 eck$LassoCheckResult]: Loop: 3871#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3714#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3715#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 3877#L743-124 havoc main_~_ha_hashv~0#1; 3878#L743-49 goto; 3725#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3726#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3787#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 3761#L743-10 assume !main_#t~switch19#1; 3762#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 3840#L743-13 assume !main_#t~switch19#1; 3741#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 3696#L743-16 assume !main_#t~switch19#1; 3697#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 3813#L743-19 assume !main_#t~switch19#1; 3814#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 3873#L743-22 assume !main_#t~switch19#1; 3690#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 3691#L743-25 assume !main_#t~switch19#1; 3874#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 3859#L743-28 assume !main_#t~switch19#1; 3658#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 3659#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 3686#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 3774#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 3875#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 3917#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 3895#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 3896#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 3742#L743-42 havoc main_#t~switch19#1; 3743#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 3653#L743-44 goto; 3654#L743-46 goto; 3625#L743-48 goto; 3626#L743-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3780#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 3781#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 3882#L743-66 goto; 3707#L743-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 3770#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 3771#L743-70 goto; 3900#L743-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3853#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 3807#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 3808#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 3865#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 3867#L743-117 goto; 3758#L743-119 goto; 3723#L743-121 goto; 3724#L743-123 goto; 3681#L744-123 havoc main_~_ha_hashv~1#1; 3682#L744-48 goto; 3921#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 3664#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 3665#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch151#1 := 11 == main_~_hj_k~1#1; 3897#L744-9 assume main_#t~switch151#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 3746#L744-11 main_#t~switch151#1 := main_#t~switch151#1 || 10 == main_~_hj_k~1#1; 3709#L744-12 assume main_#t~switch151#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 3710#L744-14 main_#t~switch151#1 := main_#t~switch151#1 || 9 == main_~_hj_k~1#1; 3670#L744-15 assume main_#t~switch151#1;call main_#t~mem154#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem154#1 % 256);havoc main_#t~mem154#1; 3629#L744-17 main_#t~switch151#1 := main_#t~switch151#1 || 8 == main_~_hj_k~1#1; 3630#L744-18 assume main_#t~switch151#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 3782#L744-20 main_#t~switch151#1 := main_#t~switch151#1 || 7 == main_~_hj_k~1#1; 3783#L744-21 assume main_#t~switch151#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 3801#L744-23 main_#t~switch151#1 := main_#t~switch151#1 || 6 == main_~_hj_k~1#1; 3845#L744-24 assume main_#t~switch151#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem157#1 % 256);havoc main_#t~mem157#1; 3870#L744-26 main_#t~switch151#1 := main_#t~switch151#1 || 5 == main_~_hj_k~1#1; 3679#L744-27 assume main_#t~switch151#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem158#1 % 256;havoc main_#t~mem158#1; 3680#L744-29 main_#t~switch151#1 := main_#t~switch151#1 || 4 == main_~_hj_k~1#1; 3734#L744-30 assume main_#t~switch151#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 3704#L744-32 main_#t~switch151#1 := main_#t~switch151#1 || 3 == main_~_hj_k~1#1; 3705#L744-33 assume main_#t~switch151#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 3925#L744-35 main_#t~switch151#1 := main_#t~switch151#1 || 2 == main_~_hj_k~1#1; 3883#L744-36 assume main_#t~switch151#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 3721#L744-38 main_#t~switch151#1 := main_#t~switch151#1 || 1 == main_~_hj_k~1#1; 3722#L744-39 assume main_#t~switch151#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem162#1 % 256;havoc main_#t~mem162#1; 3889#L744-41 havoc main_#t~switch151#1; 3811#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 3812#L744-43 goto; 3880#L744-45 goto; 3868#L744-47 goto; 3747#L744-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 3683#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem180#1.base, main_#t~mem180#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset; 3684#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_#t~mem181#1.base, 16 + main_#t~mem181#1.offset, 4);call main_#t~mem183#1.base, main_#t~mem183#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem184#1 := read~int(main_#t~mem183#1.base, 20 + main_#t~mem183#1.offset, 4);call write~$Pointer$(main_#t~mem182#1.base, main_#t~mem182#1.offset - main_#t~mem184#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1.base, main_#t~mem183#1.offset;havoc main_#t~mem184#1;call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_#t~mem185#1.base, 16 + main_#t~mem185#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem186#1.base, 8 + main_#t~mem186#1.offset, 4);havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;havoc main_#t~mem186#1.base, main_#t~mem186#1.offset;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset; 3751#L744-65 goto; 3777#L744-119 havoc main_~_ha_bkt~1#1;call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem189#1 := read~int(main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);main_#t~post190#1 := main_#t~mem189#1;call write~int(1 + main_#t~post190#1, main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1;havoc main_#t~post190#1; 3858#L744-70 call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 4 + main_#t~mem191#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem192#1 - 1 then 0 else (if 1 == main_#t~mem192#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem192#1 - 1 || 0 == main_#t~mem192#1 - 1 then main_#t~mem192#1 - 1 else (if main_#t~mem192#1 - 1 >= 0 then (main_#t~mem192#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))));havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1; 3923#L744-69 goto; 3655#L744-117 call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, main_#t~mem193#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem194#1.base, main_#t~mem194#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem195#1;havoc main_#t~post196#1;call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem197#1.base, main_#t~mem197#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 3621#L744-72 assume main_#t~mem198#1.base != 0 || main_#t~mem198#1.offset != 0;havoc main_#t~mem198#1.base, main_#t~mem198#1.offset;call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem199#1.base, 12 + main_#t~mem199#1.offset, 4);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset; 3622#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short204#1 := main_#t~mem201#1 % 4294967296 >= 10 * (1 + main_#t~mem200#1) % 4294967296; 3711#L744-75 assume !main_#t~short204#1; 3891#L744-77 assume !main_#t~short204#1;havoc main_#t~mem201#1;havoc main_#t~mem200#1;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;havoc main_#t~mem203#1;havoc main_#t~short204#1; 3673#L744-116 goto; 3674#L744-118 goto; 3899#L744-120 goto; 3918#L744-122 goto; 3906#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3871#L736-3
[2022-11-02 20:15:50,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:50,671 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times
[2022-11-02 20:15:50,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:50,672 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335347864]
[2022-11-02 20:15:50,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:50,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:50,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:50,703 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-02 20:15:50,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:50,733 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-02 20:15:50,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:50,734 INFO L85 PathProgramCache]: Analyzing trace with hash 161446618, now seen corresponding path program 1 times
[2022-11-02 20:15:50,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:50,735 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126292229]
[2022-11-02 20:15:50,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:50,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:51,002 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-02 20:15:51,003 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1108005197]
[2022-11-02 20:15:51,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:51,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-02 20:15:51,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:51,005 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-02 20:15:51,031 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2022-11-02 20:15:52,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-02 20:15:52,914 INFO L263 TraceCheckSpWp]: Trace formula consists of 3555 conjuncts, 3 conjunts are in the unsatisfiable core
[2022-11-02 20:15:52,916 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2022-11-02 20:15:52,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-02 20:15:52,949 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-02 20:15:52,949 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-02 20:15:52,949 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126292229]
[2022-11-02 20:15:52,949 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2022-11-02 20:15:52,950 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1108005197]
[2022-11-02 20:15:52,950 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1108005197] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-02 20:15:52,956 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-02 20:15:52,956 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2022-11-02 20:15:52,957 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883488212]
[2022-11-02 20:15:52,957 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-02 20:15:52,957 INFO L765 eck$LassoCheckResult]: loop already infeasible
[2022-11-02 20:15:52,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-02 20:15:52,958 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2022-11-02 20:15:52,958 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2022-11-02 20:15:52,958 INFO L87 Difference]: Start difference. First operand 328 states and 419 transitions. cyclomatic complexity: 95 Second operand has 4 states, 4 states have (on average 24.5) internal successors, (98), 4 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-02 20:15:53,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-02 20:15:53,074 INFO L93 Difference]: Finished difference Result 535 states and 683 transitions.
[2022-11-02 20:15:53,074 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 535 states and 683 transitions.
[2022-11-02 20:15:53,081 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 442
[2022-11-02 20:15:53,087 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 535 states to 535 states and 683 transitions.
[2022-11-02 20:15:53,087 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 535
[2022-11-02 20:15:53,088 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 535
[2022-11-02 20:15:53,088 INFO L73 IsDeterministic]: Start isDeterministic. Operand 535 states and 683 transitions.
[2022-11-02 20:15:53,089 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-02 20:15:53,089 INFO L218 hiAutomatonCegarLoop]: Abstraction has 535 states and 683 transitions.
[2022-11-02 20:15:53,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 535 states and 683 transitions.
[2022-11-02 20:15:53,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 535 to 314.
[2022-11-02 20:15:53,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 314 states, 307 states have (on average 1.257328990228013) internal successors, (386), 306 states have internal predecessors, (386), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2022-11-02 20:15:53,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 398 transitions.
[2022-11-02 20:15:53,108 INFO L240 hiAutomatonCegarLoop]: Abstraction has 314 states and 398 transitions.
[2022-11-02 20:15:53,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2022-11-02 20:15:53,109 INFO L428 stractBuchiCegarLoop]: Abstraction has 314 states and 398 transitions.
[2022-11-02 20:15:53,109 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============
[2022-11-02 20:15:53,109 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 314 states and 398 transitions.
[2022-11-02 20:15:53,111 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 304
[2022-11-02 20:15:53,111 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-02 20:15:53,111 INFO L119 BuchiIsEmpty]: Starting construction of run
[2022-11-02 20:15:53,112 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-02 20:15:53,112 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-02 20:15:53,112 INFO L748 eck$LassoCheckResult]: Stem: 5087#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 5066#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem140#1, main_#t~mem139#1, main_#t~mem141#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem143#1, main_#t~mem145#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~switch151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc163#1.base, main_#t~malloc163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~memset~res166#1.base, main_#t~memset~res166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~malloc172#1.base, main_#t~malloc172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~memset~res179#1.base, main_#t~memset~res179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1, main_#t~post190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~short204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~malloc207#1.base, main_#t~malloc207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~memset~res212#1.base, main_#t~memset~res212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem217#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem221#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1, main_#t~ite222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem233#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~pre236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~post241#1, main_#t~mem245#1, main_#t~mem243#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem244#1, main_#t~mem246#1, main_#t~post247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem264#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_#t~ite267#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem272#1, main_#t~mem271#1, main_#t~mem273#1, main_#t~mem274#1, main_#t~mem276#1, main_#t~mem275#1, main_#t~mem277#1, main_#t~mem278#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~switch283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ret309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem314#1, main_#t~mem315#1, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~short322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem345#1, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~post349#1, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1, main_#t~post360#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~short363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1.base, main_#t~mem374#1.offset, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1.base, main_#t~mem380#1.offset, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem382#1, main_#t~mem383#1.base, main_#t~mem383#1.offset, main_#t~mem386#1, main_#t~mem384#1.base, main_#t~mem384#1.offset, main_#t~mem385#1, main_#t~mem387#1.base, main_#t~mem387#1.offset, main_#t~mem388#1.base, main_#t~mem388#1.offset, main_#t~mem389#1, main_#t~post390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~post401#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite319#1.base, main_#t~ite319#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 5035#L736-3
[2022-11-02 20:15:53,113 INFO L750 eck$LassoCheckResult]: Loop: 5035#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 4877#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4878#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 5041#L743-124 havoc main_~_ha_hashv~0#1; 5042#L743-49 goto; 4888#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4889#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4950#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 4924#L743-10 assume !main_#t~switch19#1; 4925#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 5004#L743-13 assume !main_#t~switch19#1; 4904#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 4859#L743-16 assume !main_#t~switch19#1; 4860#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 4976#L743-19 assume !main_#t~switch19#1; 4977#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 5037#L743-22 assume !main_#t~switch19#1; 4853#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 4854#L743-25 assume !main_#t~switch19#1; 5038#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 5023#L743-28 assume !main_#t~switch19#1; 4821#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 4822#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 4849#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 4937#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 5039#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 5080#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 5059#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 5060#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 4905#L743-42 havoc main_#t~switch19#1; 4906#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 4816#L743-44 goto; 4817#L743-46 goto; 4788#L743-48 goto; 4789#L743-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4943#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 4944#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 5046#L743-66 goto; 4870#L743-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 4933#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 4934#L743-70 goto; 5064#L743-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5017#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 4970#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 4971#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 5029#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 5031#L743-117 goto; 4921#L743-119 goto; 4886#L743-121 goto; 4887#L743-123 goto; 4844#L744-123 havoc main_~_ha_hashv~1#1; 4845#L744-48 goto; 5083#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 4827#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 4828#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch151#1 := 11 == main_~_hj_k~1#1; 5061#L744-9 assume !main_#t~switch151#1; 4909#L744-11 main_#t~switch151#1 := main_#t~switch151#1 || 10 == main_~_hj_k~1#1; 4872#L744-12 assume !main_#t~switch151#1; 4873#L744-14 main_#t~switch151#1 := main_#t~switch151#1 || 9 == main_~_hj_k~1#1; 4833#L744-15 assume !main_#t~switch151#1; 4792#L744-17 main_#t~switch151#1 := main_#t~switch151#1 || 8 == main_~_hj_k~1#1; 4793#L744-18 assume !main_#t~switch151#1; 4945#L744-20 main_#t~switch151#1 := main_#t~switch151#1 || 7 == main_~_hj_k~1#1; 4946#L744-21 assume !main_#t~switch151#1; 4964#L744-23 main_#t~switch151#1 := main_#t~switch151#1 || 6 == main_~_hj_k~1#1; 5009#L744-24 assume !main_#t~switch151#1; 5034#L744-26 main_#t~switch151#1 := main_#t~switch151#1 || 5 == main_~_hj_k~1#1; 4842#L744-27 assume !main_#t~switch151#1; 4843#L744-29 main_#t~switch151#1 := main_#t~switch151#1 || 4 == main_~_hj_k~1#1; 4897#L744-30 assume main_#t~switch151#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 4867#L744-32 main_#t~switch151#1 := main_#t~switch151#1 || 3 == main_~_hj_k~1#1; 4868#L744-33 assume main_#t~switch151#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 5082#L744-35 main_#t~switch151#1 := main_#t~switch151#1 || 2 == main_~_hj_k~1#1; 5047#L744-36 assume main_#t~switch151#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 4884#L744-38 main_#t~switch151#1 := main_#t~switch151#1 || 1 == main_~_hj_k~1#1; 4885#L744-39 assume main_#t~switch151#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem162#1 % 256;havoc main_#t~mem162#1; 5053#L744-41 havoc main_#t~switch151#1; 4974#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 4975#L744-43 goto; 5044#L744-45 goto; 5032#L744-47 goto; 4910#L744-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 4846#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem180#1.base, main_#t~mem180#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset; 4847#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_#t~mem181#1.base, 16 + main_#t~mem181#1.offset, 4);call main_#t~mem183#1.base, main_#t~mem183#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem184#1 := read~int(main_#t~mem183#1.base, 20 + main_#t~mem183#1.offset, 4);call write~$Pointer$(main_#t~mem182#1.base, main_#t~mem182#1.offset - main_#t~mem184#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1.base, main_#t~mem183#1.offset;havoc main_#t~mem184#1;call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_#t~mem185#1.base, 16 + main_#t~mem185#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem186#1.base, 8 + main_#t~mem186#1.offset, 4);havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;havoc main_#t~mem186#1.base, main_#t~mem186#1.offset;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset; 4914#L744-65 goto; 4940#L744-119 havoc main_~_ha_bkt~1#1;call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem189#1 := read~int(main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);main_#t~post190#1 := main_#t~mem189#1;call write~int(1 + main_#t~post190#1, main_#t~mem188#1.base, 12 + main_#t~mem188#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1;havoc main_#t~post190#1; 5022#L744-70 call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 4 + main_#t~mem191#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem192#1 - 1 then 0 else (if 1 == main_#t~mem192#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem192#1 - 1 || 0 == main_#t~mem192#1 - 1 then main_#t~mem192#1 - 1 else (if main_#t~mem192#1 - 1 >= 0 then (main_#t~mem192#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem192#1 - 1))));havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1; 5085#L744-69 goto; 4818#L744-117 call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, main_#t~mem193#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem194#1.base, main_#t~mem194#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem195#1;havoc main_#t~post196#1;call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem197#1.base, main_#t~mem197#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 4784#L744-72 assume main_#t~mem198#1.base != 0 || main_#t~mem198#1.offset != 0;havoc main_#t~mem198#1.base, main_#t~mem198#1.offset;call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem199#1.base, 12 + main_#t~mem199#1.offset, 4);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset; 4785#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short204#1 := main_#t~mem201#1 % 4294967296 >= 10 * (1 + main_#t~mem200#1) % 4294967296; 4874#L744-75 assume !main_#t~short204#1; 5055#L744-77 assume !main_#t~short204#1;havoc main_#t~mem201#1;havoc main_#t~mem200#1;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;havoc main_#t~mem203#1;havoc main_#t~short204#1; 4836#L744-116 goto; 4837#L744-118 goto; 5063#L744-120 goto; 5081#L744-122 goto; 5069#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 5035#L736-3
[2022-11-02 20:15:53,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:53,114 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times
[2022-11-02 20:15:53,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:53,114 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199787346]
[2022-11-02 20:15:53,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:53,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:53,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:53,140 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-02 20:15:53,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-02 20:15:53,172 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-02 20:15:53,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2022-11-02 20:15:53,173 INFO L85 PathProgramCache]: Analyzing trace with hash -1712927768, now seen corresponding path program 1 times
[2022-11-02 20:15:53,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-02 20:15:53,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195975684]
[2022-11-02 20:15:53,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:53,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-02 20:15:53,413 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-02 20:15:53,413 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2056070101]
[2022-11-02 20:15:53,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-02 20:15:53,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-02 20:15:53,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3
[2022-11-02 20:15:53,418 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-02 20:15:53,429 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5adb35eb-b6e1-42b0-9784-a812fb0d50cd/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process