./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 58cc70f4973f488b4a973a86509de84f36e76ea0c26d31eeea4866a3f6f87e8b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-02 21:12:05,785 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-02 21:12:05,791 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-02 21:12:05,840 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-02 21:12:05,841 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-02 21:12:05,845 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-02 21:12:05,847 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-02 21:12:05,851 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-02 21:12:05,853 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-02 21:12:05,861 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-02 21:12:05,862 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-02 21:12:05,864 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-02 21:12:05,865 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-02 21:12:05,867 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-02 21:12:05,869 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-02 21:12:05,871 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-02 21:12:05,872 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-02 21:12:05,873 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-02 21:12:05,875 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-02 21:12:05,882 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-02 21:12:05,884 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-02 21:12:05,886 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-02 21:12:05,889 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-02 21:12:05,891 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-02 21:12:05,897 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-02 21:12:05,901 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-02 21:12:05,901 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-02 21:12:05,903 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-02 21:12:05,904 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-02 21:12:05,905 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-02 21:12:05,905 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-02 21:12:05,906 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-02 21:12:05,909 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-02 21:12:05,910 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-02 21:12:05,911 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-02 21:12:05,912 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-02 21:12:05,912 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-02 21:12:05,912 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-02 21:12:05,913 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-02 21:12:05,913 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-02 21:12:05,914 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-02 21:12:05,915 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-11-02 21:12:05,956 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-02 21:12:05,957 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-02 21:12:05,957 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-02 21:12:05,958 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-02 21:12:05,958 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-02 21:12:05,959 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-02 21:12:05,959 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-02 21:12:05,960 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-02 21:12:05,960 INFO L138 SettingsManager]: * Use SBE=true [2022-11-02 21:12:05,960 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-02 21:12:05,961 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-02 21:12:05,962 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-02 21:12:05,962 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-02 21:12:05,962 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-02 21:12:05,962 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-02 21:12:05,962 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-02 21:12:05,963 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-02 21:12:05,963 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-02 21:12:05,963 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-02 21:12:05,963 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-02 21:12:05,963 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-02 21:12:05,964 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-02 21:12:05,964 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-02 21:12:05,964 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-02 21:12:05,964 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-02 21:12:05,965 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-02 21:12:05,965 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-02 21:12:05,965 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-02 21:12:05,965 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-02 21:12:05,965 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-02 21:12:05,967 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 58cc70f4973f488b4a973a86509de84f36e76ea0c26d31eeea4866a3f6f87e8b [2022-11-02 21:12:06,282 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-02 21:12:06,315 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-02 21:12:06,319 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-02 21:12:06,320 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-02 21:12:06,321 INFO L275 PluginConnector]: CDTParser initialized [2022-11-02 21:12:06,323 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c [2022-11-02 21:12:06,390 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/129545dfe/9de4c55645f545d7b69017921a6a5668/FLAG05273527a [2022-11-02 21:12:06,976 INFO L306 CDTParser]: Found 1 translation units. [2022-11-02 21:12:06,976 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c [2022-11-02 21:12:06,985 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/129545dfe/9de4c55645f545d7b69017921a6a5668/FLAG05273527a [2022-11-02 21:12:07,309 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/129545dfe/9de4c55645f545d7b69017921a6a5668 [2022-11-02 21:12:07,311 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-02 21:12:07,313 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-02 21:12:07,314 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-02 21:12:07,314 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-02 21:12:07,321 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-02 21:12:07,325 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,328 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@147fd22e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07, skipping insertion in model container [2022-11-02 21:12:07,328 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,336 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-02 21:12:07,390 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-02 21:12:07,533 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c[1107,1120] [2022-11-02 21:12:07,649 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 21:12:07,652 INFO L203 MainTranslator]: Completed pre-run [2022-11-02 21:12:07,662 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c[1107,1120] [2022-11-02 21:12:07,728 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 21:12:07,750 INFO L208 MainTranslator]: Completed translation [2022-11-02 21:12:07,750 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07 WrapperNode [2022-11-02 21:12:07,750 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-02 21:12:07,751 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-02 21:12:07,751 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-02 21:12:07,751 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-02 21:12:07,760 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,773 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,863 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 459 [2022-11-02 21:12:07,864 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-02 21:12:07,865 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-02 21:12:07,865 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-02 21:12:07,865 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-02 21:12:07,875 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,875 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,892 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,902 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,942 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,946 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,950 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,955 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,976 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-02 21:12:07,977 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-02 21:12:07,978 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-02 21:12:07,978 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-02 21:12:07,979 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (1/1) ... [2022-11-02 21:12:07,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-02 21:12:08,012 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:08,031 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:08,056 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-02 21:12:08,077 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-02 21:12:08,078 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-02 21:12:08,279 INFO L235 CfgBuilder]: Building ICFG [2022-11-02 21:12:08,282 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-02 21:12:09,564 INFO L276 CfgBuilder]: Performing block encoding [2022-11-02 21:12:09,573 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-02 21:12:09,573 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-02 21:12:09,575 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:09 BoogieIcfgContainer [2022-11-02 21:12:09,575 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-02 21:12:09,578 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-02 21:12:09,578 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-02 21:12:09,582 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-02 21:12:09,582 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.11 09:12:07" (1/3) ... [2022-11-02 21:12:09,584 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6e0629c2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.11 09:12:09, skipping insertion in model container [2022-11-02 21:12:09,584 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:07" (2/3) ... [2022-11-02 21:12:09,584 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6e0629c2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.11 09:12:09, skipping insertion in model container [2022-11-02 21:12:09,584 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:09" (3/3) ... [2022-11-02 21:12:09,586 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_QF_BV_fru32_p1.c [2022-11-02 21:12:09,604 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-02 21:12:09,604 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-02 21:12:09,651 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-02 21:12:09,660 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@48c15a58, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-02 21:12:09,662 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-02 21:12:09,677 INFO L276 IsEmpty]: Start isEmpty. Operand has 33 states, 31 states have (on average 1.4838709677419355) internal successors, (46), 32 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:09,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:09,683 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:09,684 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:09,684 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:09,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:09,690 INFO L85 PathProgramCache]: Analyzing trace with hash -1799458747, now seen corresponding path program 1 times [2022-11-02 21:12:09,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:09,711 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656906590] [2022-11-02 21:12:09,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:09,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:10,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:14,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:14,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:14,357 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [656906590] [2022-11-02 21:12:14,357 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [656906590] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:14,358 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:14,358 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 21:12:14,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436690405] [2022-11-02 21:12:14,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:14,369 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-02 21:12:14,369 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:14,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 21:12:14,402 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 21:12:14,412 INFO L87 Difference]: Start difference. First operand has 33 states, 31 states have (on average 1.4838709677419355) internal successors, (46), 32 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:15,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:15,687 INFO L93 Difference]: Finished difference Result 88 states and 131 transitions. [2022-11-02 21:12:15,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 21:12:15,696 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:15,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:15,704 INFO L225 Difference]: With dead ends: 88 [2022-11-02 21:12:15,709 INFO L226 Difference]: Without dead ends: 57 [2022-11-02 21:12:15,713 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:15,718 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 72 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:15,719 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [72 Valid, 110 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-02 21:12:15,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2022-11-02 21:12:15,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 31. [2022-11-02 21:12:15,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 1.4) internal successors, (42), 30 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:15,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 42 transitions. [2022-11-02 21:12:15,752 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 42 transitions. Word has length 19 [2022-11-02 21:12:15,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:15,752 INFO L495 AbstractCegarLoop]: Abstraction has 31 states and 42 transitions. [2022-11-02 21:12:15,753 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:15,753 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 42 transitions. [2022-11-02 21:12:15,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:15,754 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:15,754 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:15,754 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-02 21:12:15,755 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:15,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:15,755 INFO L85 PathProgramCache]: Analyzing trace with hash 1474440195, now seen corresponding path program 1 times [2022-11-02 21:12:15,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:15,756 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199745588] [2022-11-02 21:12:15,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:15,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:16,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:18,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:18,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:18,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199745588] [2022-11-02 21:12:18,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [199745588] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:18,461 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:18,461 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:18,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837792068] [2022-11-02 21:12:18,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:18,470 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:18,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:18,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:18,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:18,472 INFO L87 Difference]: Start difference. First operand 31 states and 42 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:19,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:19,006 INFO L93 Difference]: Finished difference Result 86 states and 119 transitions. [2022-11-02 21:12:19,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:19,008 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:19,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:19,009 INFO L225 Difference]: With dead ends: 86 [2022-11-02 21:12:19,009 INFO L226 Difference]: Without dead ends: 59 [2022-11-02 21:12:19,009 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:19,010 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 105 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:19,011 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 145 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-02 21:12:19,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-11-02 21:12:19,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 33. [2022-11-02 21:12:19,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.375) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:19,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2022-11-02 21:12:19,024 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 44 transitions. Word has length 19 [2022-11-02 21:12:19,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:19,024 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-02 21:12:19,025 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:19,026 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 44 transitions. [2022-11-02 21:12:19,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:19,027 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:19,027 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:19,027 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-02 21:12:19,028 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:19,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:19,030 INFO L85 PathProgramCache]: Analyzing trace with hash 463322945, now seen corresponding path program 1 times [2022-11-02 21:12:19,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:19,032 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917488628] [2022-11-02 21:12:19,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:19,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:19,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:20,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:20,447 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:20,447 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917488628] [2022-11-02 21:12:20,447 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [917488628] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:20,448 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:20,455 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-02 21:12:20,455 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037676192] [2022-11-02 21:12:20,455 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:20,456 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-02 21:12:20,457 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:20,458 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 21:12:20,459 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-02 21:12:20,459 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. Second operand has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:21,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:21,391 INFO L93 Difference]: Finished difference Result 92 states and 126 transitions. [2022-11-02 21:12:21,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:21,393 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:21,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:21,394 INFO L225 Difference]: With dead ends: 92 [2022-11-02 21:12:21,394 INFO L226 Difference]: Without dead ends: 65 [2022-11-02 21:12:21,394 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-11-02 21:12:21,396 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 165 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:21,396 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 119 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-11-02 21:12:21,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-11-02 21:12:21,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 35. [2022-11-02 21:12:21,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 34 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:21,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 46 transitions. [2022-11-02 21:12:21,403 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 46 transitions. Word has length 19 [2022-11-02 21:12:21,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:21,403 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 46 transitions. [2022-11-02 21:12:21,404 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:21,404 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 46 transitions. [2022-11-02 21:12:21,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:21,405 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:21,405 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:21,405 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-02 21:12:21,405 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:21,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:21,406 INFO L85 PathProgramCache]: Analyzing trace with hash -346023681, now seen corresponding path program 1 times [2022-11-02 21:12:21,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:21,406 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313883563] [2022-11-02 21:12:21,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:21,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:21,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:23,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:23,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:23,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313883563] [2022-11-02 21:12:23,370 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313883563] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:23,370 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:23,371 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:23,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946553803] [2022-11-02 21:12:23,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:23,371 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:23,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:23,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:23,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:23,373 INFO L87 Difference]: Start difference. First operand 35 states and 46 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:24,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:24,435 INFO L93 Difference]: Finished difference Result 94 states and 127 transitions. [2022-11-02 21:12:24,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:24,438 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:24,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:24,439 INFO L225 Difference]: With dead ends: 94 [2022-11-02 21:12:24,439 INFO L226 Difference]: Without dead ends: 65 [2022-11-02 21:12:24,440 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:24,441 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 101 mSDsluCounter, 108 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 101 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:24,441 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [101 Valid, 149 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-11-02 21:12:24,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-11-02 21:12:24,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 37. [2022-11-02 21:12:24,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.3333333333333333) internal successors, (48), 36 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:24,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 48 transitions. [2022-11-02 21:12:24,451 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 48 transitions. Word has length 19 [2022-11-02 21:12:24,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:24,451 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 48 transitions. [2022-11-02 21:12:24,452 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:24,452 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 48 transitions. [2022-11-02 21:12:24,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:24,452 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:24,453 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:24,453 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-02 21:12:24,453 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:24,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:24,455 INFO L85 PathProgramCache]: Analyzing trace with hash -87858243, now seen corresponding path program 1 times [2022-11-02 21:12:24,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:24,456 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42064737] [2022-11-02 21:12:24,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:24,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:24,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:26,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:26,075 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:26,075 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42064737] [2022-11-02 21:12:26,075 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [42064737] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:26,075 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:26,076 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:26,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231299976] [2022-11-02 21:12:26,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:26,078 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:26,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:26,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:26,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:26,081 INFO L87 Difference]: Start difference. First operand 37 states and 48 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:26,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:26,725 INFO L93 Difference]: Finished difference Result 104 states and 140 transitions. [2022-11-02 21:12:26,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:26,729 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:26,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:26,730 INFO L225 Difference]: With dead ends: 104 [2022-11-02 21:12:26,730 INFO L226 Difference]: Without dead ends: 75 [2022-11-02 21:12:26,731 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:26,732 INFO L413 NwaCegarLoop]: 53 mSDtfsCounter, 91 mSDsluCounter, 109 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 162 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:26,732 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [91 Valid, 162 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-02 21:12:26,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-11-02 21:12:26,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 47. [2022-11-02 21:12:26,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.326086956521739) internal successors, (61), 46 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:26,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 61 transitions. [2022-11-02 21:12:26,745 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 61 transitions. Word has length 19 [2022-11-02 21:12:26,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:26,746 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 61 transitions. [2022-11-02 21:12:26,746 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:26,746 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 61 transitions. [2022-11-02 21:12:26,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:26,747 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:26,747 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:26,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-02 21:12:26,747 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:26,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:26,748 INFO L85 PathProgramCache]: Analyzing trace with hash -87798661, now seen corresponding path program 1 times [2022-11-02 21:12:26,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:26,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247042687] [2022-11-02 21:12:26,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:26,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:27,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:27,403 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:27,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:27,980 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:27,980 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-02 21:12:27,981 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-02 21:12:27,983 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-02 21:12:27,989 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1] [2022-11-02 21:12:27,993 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-02 21:12:28,070 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-02 21:12:28,090 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.11 09:12:28 BoogieIcfgContainer [2022-11-02 21:12:28,090 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-02 21:12:28,091 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-02 21:12:28,091 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-02 21:12:28,091 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-02 21:12:28,092 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:09" (3/4) ... [2022-11-02 21:12:28,094 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-02 21:12:28,095 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-02 21:12:28,095 INFO L158 Benchmark]: Toolchain (without parser) took 20782.72ms. Allocated memory was 125.8MB in the beginning and 388.0MB in the end (delta: 262.1MB). Free memory was 93.1MB in the beginning and 241.5MB in the end (delta: -148.4MB). Peak memory consumption was 113.7MB. Max. memory is 16.1GB. [2022-11-02 21:12:28,096 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 100.7MB. Free memory was 57.2MB in the beginning and 57.2MB in the end (delta: 39.6kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-02 21:12:28,096 INFO L158 Benchmark]: CACSL2BoogieTranslator took 436.31ms. Allocated memory is still 125.8MB. Free memory was 92.8MB in the beginning and 92.4MB in the end (delta: 416.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-02 21:12:28,097 INFO L158 Benchmark]: Boogie Procedure Inliner took 112.78ms. Allocated memory is still 125.8MB. Free memory was 92.4MB in the beginning and 85.4MB in the end (delta: 7.0MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-02 21:12:28,097 INFO L158 Benchmark]: Boogie Preprocessor took 112.26ms. Allocated memory is still 125.8MB. Free memory was 85.4MB in the beginning and 81.5MB in the end (delta: 3.9MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-02 21:12:28,098 INFO L158 Benchmark]: RCFGBuilder took 1597.83ms. Allocated memory was 125.8MB in the beginning and 165.7MB in the end (delta: 39.8MB). Free memory was 81.5MB in the beginning and 118.1MB in the end (delta: -36.6MB). Peak memory consumption was 80.3MB. Max. memory is 16.1GB. [2022-11-02 21:12:28,098 INFO L158 Benchmark]: TraceAbstraction took 18512.69ms. Allocated memory was 165.7MB in the beginning and 388.0MB in the end (delta: 222.3MB). Free memory was 118.1MB in the beginning and 242.6MB in the end (delta: -124.5MB). Peak memory consumption was 220.3MB. Max. memory is 16.1GB. [2022-11-02 21:12:28,098 INFO L158 Benchmark]: Witness Printer took 3.97ms. Allocated memory is still 388.0MB. Free memory was 242.6MB in the beginning and 241.5MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-02 21:12:28,101 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 100.7MB. Free memory was 57.2MB in the beginning and 57.2MB in the end (delta: 39.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 436.31ms. Allocated memory is still 125.8MB. Free memory was 92.8MB in the beginning and 92.4MB in the end (delta: 416.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 112.78ms. Allocated memory is still 125.8MB. Free memory was 92.4MB in the beginning and 85.4MB in the end (delta: 7.0MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 112.26ms. Allocated memory is still 125.8MB. Free memory was 85.4MB in the beginning and 81.5MB in the end (delta: 3.9MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1597.83ms. Allocated memory was 125.8MB in the beginning and 165.7MB in the end (delta: 39.8MB). Free memory was 81.5MB in the beginning and 118.1MB in the end (delta: -36.6MB). Peak memory consumption was 80.3MB. Max. memory is 16.1GB. * TraceAbstraction took 18512.69ms. Allocated memory was 165.7MB in the beginning and 388.0MB in the end (delta: 222.3MB). Free memory was 118.1MB in the beginning and 242.6MB in the end (delta: -124.5MB). Peak memory consumption was 220.3MB. Max. memory is 16.1GB. * Witness Printer took 3.97ms. Allocated memory is still 388.0MB. Free memory was 242.6MB in the beginning and 241.5MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 290, overapproximation of bitwiseComplement at line 321, overapproximation of bitwiseAnd at line 313. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 6); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (6 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 1); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (1 - 1); [L31] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); [L32] const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); [L34] const SORT_24 mask_SORT_24 = (SORT_24)-1 >> (sizeof(SORT_24) * 8 - 5); [L35] const SORT_24 msb_SORT_24 = (SORT_24)1 << (5 - 1); [L37] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L38] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L40] const SORT_1 var_21 = 0; [L41] const SORT_24 var_26 = 31; [L42] const SORT_6 var_28 = 0; [L43] const SORT_33 var_34 = 0; [L44] const SORT_33 var_35 = 1; [L45] const SORT_3 var_37 = 1; [L46] const SORT_3 var_43 = 0; [L47] const SORT_33 var_55 = 2; [L48] const SORT_33 var_72 = 3; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_1 input_5; [L53] SORT_6 input_7; [L54] SORT_3 input_8; [L55] SORT_6 input_9; [L56] SORT_1 input_10; [L57] SORT_1 input_11; [L58] SORT_1 input_12; [L59] SORT_3 input_13; [L60] SORT_3 input_14; [L61] SORT_3 input_15; [L62] SORT_3 input_16; [L63] SORT_3 input_17; [L64] SORT_3 input_18; [L65] SORT_3 input_19; [L66] SORT_3 input_20; [L67] SORT_3 input_117; [L68] SORT_3 input_121; [L69] SORT_1 input_123; [L70] SORT_3 input_125; [L71] SORT_33 input_128; [L72] SORT_3 input_130; [L73] SORT_6 input_133; [L74] SORT_3 input_135; [L76] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] SORT_6 state_29 = __VERIFIER_nondet_uint() & mask_SORT_6; [L78] SORT_6 state_31 = __VERIFIER_nondet_uint() & mask_SORT_6; [L79] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] SORT_3 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] SORT_3 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] SORT_1 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] SORT_3 state_61 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L84] SORT_3 state_65 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] SORT_1 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] SORT_3 state_78 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L87] SORT_3 state_82 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] SORT_3 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] SORT_6 state_95 = __VERIFIER_nondet_uint() & mask_SORT_6; [L90] SORT_1 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] SORT_3 state_115 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L92] SORT_3 state_119 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L94] SORT_1 init_23_arg_1 = var_21; [L95] state_22 = init_23_arg_1 [L96] SORT_6 init_30_arg_1 = var_28; [L97] state_29 = init_30_arg_1 [L98] SORT_6 init_32_arg_1 = var_28; [L99] state_31 = init_32_arg_1 [L100] SORT_1 init_40_arg_1 = var_21; [L101] state_39 = init_40_arg_1 [L102] SORT_3 init_45_arg_1 = var_43; [L103] state_44 = init_45_arg_1 [L104] SORT_3 init_49_arg_1 = var_43; [L105] state_48 = init_49_arg_1 [L106] SORT_1 init_58_arg_1 = var_21; [L107] state_57 = init_58_arg_1 [L108] SORT_3 init_62_arg_1 = var_43; [L109] state_61 = init_62_arg_1 [L110] SORT_3 init_66_arg_1 = var_43; [L111] state_65 = init_66_arg_1 [L112] SORT_1 init_75_arg_1 = var_21; [L113] state_74 = init_75_arg_1 [L114] SORT_3 init_79_arg_1 = var_43; [L115] state_78 = init_79_arg_1 [L116] SORT_3 init_83_arg_1 = var_43; [L117] state_82 = init_83_arg_1 [L118] SORT_3 init_87_arg_1 = var_43; [L119] state_86 = init_87_arg_1 [L120] SORT_6 init_96_arg_1 = var_28; [L121] state_95 = init_96_arg_1 [L122] SORT_1 init_114_arg_1 = var_21; [L123] state_113 = init_114_arg_1 [L124] SORT_3 init_116_arg_1 = var_43; [L125] state_115 = init_116_arg_1 [L126] SORT_3 init_120_arg_1 = var_43; [L127] state_119 = init_120_arg_1 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_37=1, var_43=0, var_55=2, var_72=3] [L130] input_2 = __VERIFIER_nondet_uchar() [L131] input_4 = __VERIFIER_nondet_uchar() [L132] input_4 = input_4 & mask_SORT_3 [L133] input_5 = __VERIFIER_nondet_uchar() [L134] input_5 = input_5 & mask_SORT_1 [L135] input_7 = __VERIFIER_nondet_uint() [L136] input_8 = __VERIFIER_nondet_uchar() [L137] input_8 = input_8 & mask_SORT_3 [L138] input_9 = __VERIFIER_nondet_uint() [L139] input_10 = __VERIFIER_nondet_uchar() [L140] input_10 = input_10 & mask_SORT_1 [L141] input_11 = __VERIFIER_nondet_uchar() [L142] input_11 = input_11 & mask_SORT_1 [L143] input_12 = __VERIFIER_nondet_uchar() [L144] input_13 = __VERIFIER_nondet_uchar() [L145] input_14 = __VERIFIER_nondet_uchar() [L146] input_14 = input_14 & mask_SORT_3 [L147] input_15 = __VERIFIER_nondet_uchar() [L148] input_16 = __VERIFIER_nondet_uchar() [L149] input_16 = input_16 & mask_SORT_3 [L150] input_17 = __VERIFIER_nondet_uchar() [L151] input_17 = input_17 & mask_SORT_3 [L152] input_18 = __VERIFIER_nondet_uchar() [L153] input_18 = input_18 & mask_SORT_3 [L154] input_19 = __VERIFIER_nondet_uchar() [L155] input_19 = input_19 & mask_SORT_3 [L156] input_20 = __VERIFIER_nondet_uchar() [L157] input_117 = __VERIFIER_nondet_uchar() [L158] input_121 = __VERIFIER_nondet_uchar() [L159] input_123 = __VERIFIER_nondet_uchar() [L160] input_125 = __VERIFIER_nondet_uchar() [L161] input_128 = __VERIFIER_nondet_uchar() [L162] input_130 = __VERIFIER_nondet_uchar() [L163] input_133 = __VERIFIER_nondet_uint() [L164] input_135 = __VERIFIER_nondet_uchar() [L167] SORT_1 var_25_arg_0 = state_22; [L168] SORT_24 var_25 = var_25_arg_0 >> 0; [L169] var_25 = var_25 & mask_SORT_24 [L170] SORT_24 var_27_arg_0 = var_25; [L171] SORT_24 var_27_arg_1 = var_26; [L172] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L173] SORT_24 var_102_arg_0 = var_25; [L174] SORT_24 var_102_arg_1 = var_26; [L175] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L176] SORT_1 var_36_arg_0 = state_22; [L177] SORT_3 var_36 = var_36_arg_0 >> 5; [L178] var_36 = var_36 & mask_SORT_3 [L179] SORT_3 var_73_arg_0 = var_36; [L180] SORT_3 var_73_arg_1 = var_37; [L181] SORT_3 var_73 = var_73_arg_0 == var_73_arg_1; [L182] SORT_1 var_76_arg_0 = state_22; [L183] SORT_1 var_76_arg_1 = state_74; [L184] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L185] SORT_3 var_77_arg_0 = var_73; [L186] SORT_3 var_77_arg_1 = var_76; [L187] SORT_3 var_77 = var_77_arg_0 & var_77_arg_1; [L188] SORT_3 var_80_arg_0 = state_78; [L189] SORT_3 var_80_arg_1 = var_37; [L190] SORT_3 var_80 = var_80_arg_0 != var_80_arg_1; [L191] SORT_3 var_81_arg_0 = var_77; [L192] SORT_3 var_81_arg_1 = var_80; [L193] SORT_3 var_81 = var_81_arg_0 & var_81_arg_1; [L194] SORT_3 var_84_arg_0 = state_82; [L195] SORT_3 var_84_arg_1 = var_37; [L196] SORT_3 var_84 = var_84_arg_0 == var_84_arg_1; [L197] SORT_3 var_85_arg_0 = var_81; [L198] SORT_3 var_85_arg_1 = var_84; [L199] SORT_3 var_85 = var_85_arg_0 & var_85_arg_1; [L200] SORT_3 var_88_arg_0 = state_86; [L201] SORT_3 var_88_arg_1 = var_37; [L202] SORT_3 var_88 = var_88_arg_0 == var_88_arg_1; [L203] SORT_3 var_89_arg_0 = var_85; [L204] SORT_3 var_89_arg_1 = var_88; [L205] SORT_3 var_89 = var_89_arg_0 & var_89_arg_1; [L206] SORT_24 var_90_arg_0 = var_25; [L207] SORT_24 var_90_arg_1 = var_26; [L208] SORT_3 var_90 = var_90_arg_0 != var_90_arg_1; [L209] SORT_3 var_91_arg_0 = var_89; [L210] SORT_3 var_91_arg_1 = var_90; [L211] SORT_3 var_91 = var_91_arg_0 & var_91_arg_1; [L212] var_91 = var_91 & mask_SORT_3 [L213] SORT_3 var_56_arg_0 = var_36; [L214] SORT_3 var_56_arg_1 = var_37; [L215] SORT_3 var_56 = var_56_arg_0 == var_56_arg_1; [L216] SORT_1 var_59_arg_0 = state_22; [L217] SORT_1 var_59_arg_1 = state_57; [L218] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L219] SORT_3 var_60_arg_0 = var_56; [L220] SORT_3 var_60_arg_1 = var_59; [L221] SORT_3 var_60 = var_60_arg_0 & var_60_arg_1; [L222] SORT_3 var_63_arg_0 = state_61; [L223] SORT_3 var_63_arg_1 = var_37; [L224] SORT_3 var_63 = var_63_arg_0 == var_63_arg_1; [L225] SORT_3 var_64_arg_0 = var_60; [L226] SORT_3 var_64_arg_1 = var_63; [L227] SORT_3 var_64 = var_64_arg_0 & var_64_arg_1; [L228] SORT_3 var_67_arg_0 = state_65; [L229] SORT_3 var_67_arg_1 = var_37; [L230] SORT_3 var_67 = var_67_arg_0 == var_67_arg_1; [L231] SORT_3 var_68_arg_0 = var_64; [L232] SORT_3 var_68_arg_1 = var_67; [L233] SORT_3 var_68 = var_68_arg_0 & var_68_arg_1; [L234] SORT_24 var_69_arg_0 = var_25; [L235] SORT_24 var_69_arg_1 = var_26; [L236] SORT_3 var_69 = var_69_arg_0 != var_69_arg_1; [L237] SORT_3 var_70_arg_0 = var_68; [L238] SORT_3 var_70_arg_1 = var_69; [L239] SORT_3 var_70 = var_70_arg_0 & var_70_arg_1; [L240] var_70 = var_70 & mask_SORT_3 [L241] SORT_3 var_38_arg_0 = var_36; [L242] SORT_3 var_38_arg_1 = var_37; [L243] SORT_3 var_38 = var_38_arg_0 == var_38_arg_1; [L244] SORT_1 var_41_arg_0 = state_22; [L245] SORT_1 var_41_arg_1 = state_39; [L246] SORT_3 var_41 = var_41_arg_0 == var_41_arg_1; [L247] SORT_3 var_42_arg_0 = var_38; [L248] SORT_3 var_42_arg_1 = var_41; [L249] SORT_3 var_42 = var_42_arg_0 & var_42_arg_1; [L250] SORT_3 var_46_arg_0 = state_44; [L251] SORT_3 var_46_arg_1 = var_37; [L252] SORT_3 var_46 = var_46_arg_0 == var_46_arg_1; [L253] SORT_3 var_47_arg_0 = var_42; [L254] SORT_3 var_47_arg_1 = var_46; [L255] SORT_3 var_47 = var_47_arg_0 & var_47_arg_1; [L256] SORT_3 var_50_arg_0 = state_48; [L257] SORT_3 var_50_arg_1 = var_37; [L258] SORT_3 var_50 = var_50_arg_0 == var_50_arg_1; [L259] SORT_3 var_51_arg_0 = var_47; [L260] SORT_3 var_51_arg_1 = var_50; [L261] SORT_3 var_51 = var_51_arg_0 & var_51_arg_1; [L262] SORT_24 var_52_arg_0 = var_25; [L263] SORT_24 var_52_arg_1 = var_26; [L264] SORT_3 var_52 = var_52_arg_0 != var_52_arg_1; [L265] SORT_3 var_53_arg_0 = var_51; [L266] SORT_3 var_53_arg_1 = var_52; [L267] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L268] var_53 = var_53 & mask_SORT_3 [L269] SORT_3 var_54_arg_0 = var_53; [L270] SORT_33 var_54_arg_1 = var_35; [L271] SORT_33 var_54_arg_2 = var_34; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L272] EXPR var_54_arg_0 ? var_54_arg_1 : var_54_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54_arg_0=0, var_54_arg_0 ? var_54_arg_1 : var_54_arg_2=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L272] SORT_33 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L273] SORT_3 var_71_arg_0 = var_70; [L274] SORT_33 var_71_arg_1 = var_55; [L275] SORT_33 var_71_arg_2 = var_54; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L276] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L276] SORT_33 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L277] SORT_3 var_92_arg_0 = var_91; [L278] SORT_33 var_92_arg_1 = var_72; [L279] SORT_33 var_92_arg_2 = var_71; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0] [L280] EXPR var_92_arg_0 ? var_92_arg_1 : var_92_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92_arg_0=0, var_92_arg_0 ? var_92_arg_1 : var_92_arg_2=0, var_92_arg_1=3, var_92_arg_2=0] [L280] SORT_33 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L281] var_92 = var_92 & mask_SORT_33 [L282] SORT_33 var_99_arg_0 = var_92; [L283] SORT_33 var_99_arg_1 = var_35; [L284] SORT_3 var_99 = var_99_arg_0 == var_99_arg_1; [L285] SORT_33 var_97_arg_0 = var_92; [L286] SORT_33 var_97_arg_1 = var_34; [L287] SORT_3 var_97 = var_97_arg_0 == var_97_arg_1; [L288] SORT_3 var_100_arg_0 = var_99; [L289] SORT_3 var_100_arg_1 = var_97; [L290] SORT_3 var_100 = var_100_arg_0 | var_100_arg_1; [L291] var_100 = var_100 & mask_SORT_3 [L292] SORT_3 var_98_arg_0 = var_97; [L293] SORT_6 var_98_arg_1 = var_28; [L294] SORT_6 var_98_arg_2 = state_95; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L295] EXPR var_98_arg_0 ? var_98_arg_1 : var_98_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98_arg_0=1, var_98_arg_0 ? var_98_arg_1 : var_98_arg_2=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L295] SORT_6 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L296] SORT_33 var_93_arg_0 = var_92; [L297] SORT_33 var_93_arg_1 = var_55; [L298] SORT_3 var_93 = var_93_arg_0 == var_93_arg_1; [L299] SORT_3 var_94_arg_0 = var_93; [L300] SORT_6 var_94_arg_1 = state_31; [L301] SORT_6 var_94_arg_2 = state_29; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L302] EXPR var_94_arg_0 ? var_94_arg_1 : var_94_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94_arg_0=0, var_94_arg_0 ? var_94_arg_1 : var_94_arg_2=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L302] SORT_6 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L303] SORT_3 var_101_arg_0 = var_100; [L304] SORT_6 var_101_arg_1 = var_98; [L305] SORT_6 var_101_arg_2 = var_94; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L306] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101_arg_0=1, var_101_arg_0 ? var_101_arg_1 : var_101_arg_2=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L306] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L307] SORT_3 var_103_arg_0 = var_102; [L308] SORT_6 var_103_arg_1 = var_28; [L309] SORT_6 var_103_arg_2 = var_101; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L310] EXPR var_103_arg_0 ? var_103_arg_1 : var_103_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=1, input_117=5, input_12=10, input_121=3, input_123=12, input_125=7, input_128=1, input_13=14, input_130=15, input_133=2147483650, input_135=4, input_14=0, input_15=9, input_16=0, input_17=0, input_18=1, input_19=0, input_2=13, input_20=8, input_4=0, input_5=0, input_7=2147483664, input_8=0, input_9=2147483659, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103_arg_0=0, var_103_arg_0 ? var_103_arg_1 : var_103_arg_2=0, var_103_arg_1=0, var_103_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L310] SORT_6 var_103 = var_103_arg_0 ? var_103_arg_1 : var_103_arg_2; [L311] SORT_6 var_104_arg_0 = var_103; [L312] SORT_1 var_104 = var_104_arg_0 >> 26; [L313] var_104 = var_104 & mask_SORT_1 [L314] SORT_1 var_105_arg_0 = var_104; [L315] SORT_1 var_105_arg_1 = var_21; [L316] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L317] SORT_3 var_106_arg_0 = var_27; [L318] SORT_3 var_106_arg_1 = var_105; [L319] SORT_3 var_106 = var_106_arg_0 & var_106_arg_1; [L320] SORT_3 var_107_arg_0 = var_106; [L321] SORT_3 var_107 = ~var_107_arg_0; [L322] SORT_3 var_110_arg_0 = var_107; [L323] SORT_3 var_110 = ~var_110_arg_0; [L324] SORT_3 var_111_arg_0 = var_37; [L325] SORT_3 var_111_arg_1 = var_110; [L326] SORT_3 var_111 = var_111_arg_0 & var_111_arg_1; [L327] var_111 = var_111 & mask_SORT_3 [L328] SORT_3 bad_112_arg_0 = var_111; [L329] CALL __VERIFIER_assert(!(bad_112_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 33 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 18.4s, OverallIterations: 6, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 4.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 534 SdHoareTripleChecker+Valid, 4.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 534 mSDsluCounter, 685 SdHoareTripleChecker+Invalid, 4.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 477 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 95 IncrementalHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 208 mSDtfsCounter, 95 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 39 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=47occurred in iteration=5, InterpolantAutomatonStates: 33, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 5 MinimizatonAttempts, 138 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 2.9s SatisfiabilityAnalysisTime, 9.9s InterpolantComputationTime, 114 NumberOfCodeBlocks, 114 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 90 ConstructedInterpolants, 0 QuantifiedInterpolants, 346 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-02 21:12:28,130 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 58cc70f4973f488b4a973a86509de84f36e76ea0c26d31eeea4866a3f6f87e8b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-02 21:12:30,400 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-02 21:12:30,402 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-02 21:12:30,439 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-02 21:12:30,439 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-02 21:12:30,443 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-02 21:12:30,446 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-02 21:12:30,453 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-02 21:12:30,458 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-02 21:12:30,464 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-02 21:12:30,465 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-02 21:12:30,467 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-02 21:12:30,468 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-02 21:12:30,470 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-02 21:12:30,472 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-02 21:12:30,474 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-02 21:12:30,475 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-02 21:12:30,476 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-02 21:12:30,478 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-02 21:12:30,487 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-02 21:12:30,489 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-02 21:12:30,490 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-02 21:12:30,493 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-02 21:12:30,495 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-02 21:12:30,502 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-02 21:12:30,503 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-02 21:12:30,503 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-02 21:12:30,505 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-02 21:12:30,506 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-02 21:12:30,507 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-02 21:12:30,508 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-02 21:12:30,509 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-02 21:12:30,511 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-02 21:12:30,511 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-02 21:12:30,512 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-02 21:12:30,513 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-02 21:12:30,514 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-02 21:12:30,514 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-02 21:12:30,514 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-02 21:12:30,516 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-02 21:12:30,517 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-02 21:12:30,522 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2022-11-02 21:12:30,564 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-02 21:12:30,564 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-02 21:12:30,566 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-02 21:12:30,566 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-02 21:12:30,567 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-02 21:12:30,567 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-02 21:12:30,568 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-02 21:12:30,569 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-02 21:12:30,569 INFO L138 SettingsManager]: * Use SBE=true [2022-11-02 21:12:30,569 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-02 21:12:30,570 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-02 21:12:30,571 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-02 21:12:30,571 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-02 21:12:30,571 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-02 21:12:30,571 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-02 21:12:30,572 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-02 21:12:30,572 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-02 21:12:30,572 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-02 21:12:30,572 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-02 21:12:30,572 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-02 21:12:30,573 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-02 21:12:30,573 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-02 21:12:30,573 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-02 21:12:30,573 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-02 21:12:30,574 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-02 21:12:30,574 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-02 21:12:30,574 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-02 21:12:30,575 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-11-02 21:12:30,575 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-02 21:12:30,575 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-02 21:12:30,575 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-02 21:12:30,575 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-02 21:12:30,576 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-02 21:12:30,576 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 58cc70f4973f488b4a973a86509de84f36e76ea0c26d31eeea4866a3f6f87e8b [2022-11-02 21:12:30,972 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-02 21:12:31,000 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-02 21:12:31,005 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-02 21:12:31,007 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-02 21:12:31,008 INFO L275 PluginConnector]: CDTParser initialized [2022-11-02 21:12:31,010 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c [2022-11-02 21:12:31,088 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/892ffc89b/1f643ec9ef47416db1e809fcbe67332a/FLAGa8f7f925b [2022-11-02 21:12:31,692 INFO L306 CDTParser]: Found 1 translation units. [2022-11-02 21:12:31,696 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c [2022-11-02 21:12:31,709 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/892ffc89b/1f643ec9ef47416db1e809fcbe67332a/FLAGa8f7f925b [2022-11-02 21:12:32,011 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/data/892ffc89b/1f643ec9ef47416db1e809fcbe67332a [2022-11-02 21:12:32,013 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-02 21:12:32,015 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-02 21:12:32,016 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-02 21:12:32,016 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-02 21:12:32,024 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-02 21:12:32,025 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,026 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@36ec121f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32, skipping insertion in model container [2022-11-02 21:12:32,027 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,037 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-02 21:12:32,084 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-02 21:12:32,225 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c[1107,1120] [2022-11-02 21:12:32,428 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 21:12:32,432 INFO L203 MainTranslator]: Completed pre-run [2022-11-02 21:12:32,462 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p1.c[1107,1120] [2022-11-02 21:12:32,558 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 21:12:32,577 INFO L208 MainTranslator]: Completed translation [2022-11-02 21:12:32,578 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32 WrapperNode [2022-11-02 21:12:32,578 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-02 21:12:32,579 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-02 21:12:32,579 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-02 21:12:32,580 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-02 21:12:32,587 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,611 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,660 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 459 [2022-11-02 21:12:32,660 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-02 21:12:32,661 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-02 21:12:32,661 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-02 21:12:32,661 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-02 21:12:32,675 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,675 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,693 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,696 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,712 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,716 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,719 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,721 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,726 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-02 21:12:32,727 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-02 21:12:32,727 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-02 21:12:32,727 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-02 21:12:32,728 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (1/1) ... [2022-11-02 21:12:32,734 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-02 21:12:32,757 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:32,775 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:32,806 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-02 21:12:32,827 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-02 21:12:32,827 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-02 21:12:33,019 INFO L235 CfgBuilder]: Building ICFG [2022-11-02 21:12:33,021 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-02 21:12:33,553 INFO L276 CfgBuilder]: Performing block encoding [2022-11-02 21:12:33,563 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-02 21:12:33,563 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-02 21:12:33,565 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:33 BoogieIcfgContainer [2022-11-02 21:12:33,565 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-02 21:12:33,570 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-02 21:12:33,573 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-02 21:12:33,577 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-02 21:12:33,577 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.11 09:12:32" (1/3) ... [2022-11-02 21:12:33,579 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@440cb595 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.11 09:12:33, skipping insertion in model container [2022-11-02 21:12:33,579 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:32" (2/3) ... [2022-11-02 21:12:33,580 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@440cb595 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.11 09:12:33, skipping insertion in model container [2022-11-02 21:12:33,580 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:33" (3/3) ... [2022-11-02 21:12:33,582 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_QF_BV_fru32_p1.c [2022-11-02 21:12:33,600 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-02 21:12:33,600 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-02 21:12:33,657 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-02 21:12:33,675 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@46007417, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-02 21:12:33,675 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-02 21:12:33,680 INFO L276 IsEmpty]: Start isEmpty. Operand has 33 states, 31 states have (on average 1.4838709677419355) internal successors, (46), 32 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:33,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:33,689 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:33,690 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:33,691 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:33,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:33,699 INFO L85 PathProgramCache]: Analyzing trace with hash -1799458747, now seen corresponding path program 1 times [2022-11-02 21:12:33,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:33,717 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1776477569] [2022-11-02 21:12:33,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:33,718 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:33,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:33,725 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:33,766 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-02 21:12:34,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:34,083 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-02 21:12:34,092 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:34,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:34,252 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:34,254 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:34,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1776477569] [2022-11-02 21:12:34,255 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1776477569] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:34,256 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:34,256 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 21:12:34,257 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972333670] [2022-11-02 21:12:34,258 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:34,263 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-02 21:12:34,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:34,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 21:12:34,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 21:12:34,299 INFO L87 Difference]: Start difference. First operand has 33 states, 31 states have (on average 1.4838709677419355) internal successors, (46), 32 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:34,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:34,463 INFO L93 Difference]: Finished difference Result 113 states and 167 transitions. [2022-11-02 21:12:34,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 21:12:34,467 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:34,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:34,485 INFO L225 Difference]: With dead ends: 113 [2022-11-02 21:12:34,490 INFO L226 Difference]: Without dead ends: 82 [2022-11-02 21:12:34,493 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:34,501 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 107 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:34,504 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 131 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:34,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-02 21:12:34,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 31. [2022-11-02 21:12:34,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 1.4) internal successors, (42), 30 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:34,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 42 transitions. [2022-11-02 21:12:34,554 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 42 transitions. Word has length 19 [2022-11-02 21:12:34,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:34,554 INFO L495 AbstractCegarLoop]: Abstraction has 31 states and 42 transitions. [2022-11-02 21:12:34,554 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:34,555 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 42 transitions. [2022-11-02 21:12:34,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:34,556 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:34,556 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:34,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:34,769 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:34,769 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:34,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:34,770 INFO L85 PathProgramCache]: Analyzing trace with hash 1474440195, now seen corresponding path program 1 times [2022-11-02 21:12:34,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:34,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [120196523] [2022-11-02 21:12:34,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:34,772 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:34,772 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:34,773 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:34,777 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-02 21:12:35,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:35,042 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-02 21:12:35,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:35,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:35,133 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:35,134 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:35,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [120196523] [2022-11-02 21:12:35,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [120196523] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:35,136 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:35,137 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:35,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224349558] [2022-11-02 21:12:35,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:35,143 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:35,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:35,145 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:35,146 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:35,146 INFO L87 Difference]: Start difference. First operand 31 states and 42 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:35,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:35,315 INFO L93 Difference]: Finished difference Result 110 states and 152 transitions. [2022-11-02 21:12:35,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:35,316 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:35,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:35,317 INFO L225 Difference]: With dead ends: 110 [2022-11-02 21:12:35,317 INFO L226 Difference]: Without dead ends: 83 [2022-11-02 21:12:35,318 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:35,319 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 138 mSDsluCounter, 162 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 197 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:35,319 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 197 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:35,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-02 21:12:35,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 33. [2022-11-02 21:12:35,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.375) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:35,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2022-11-02 21:12:35,333 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 44 transitions. Word has length 19 [2022-11-02 21:12:35,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:35,338 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-02 21:12:35,338 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:35,339 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 44 transitions. [2022-11-02 21:12:35,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:35,344 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:35,345 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:35,364 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:35,545 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:35,546 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:35,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:35,547 INFO L85 PathProgramCache]: Analyzing trace with hash 463322945, now seen corresponding path program 1 times [2022-11-02 21:12:35,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:35,547 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [115219760] [2022-11-02 21:12:35,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:35,548 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:35,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:35,552 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:35,588 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-02 21:12:35,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:35,744 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-02 21:12:35,746 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:35,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:35,813 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:35,814 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:35,814 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [115219760] [2022-11-02 21:12:35,816 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [115219760] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:35,817 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:35,817 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:35,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318791044] [2022-11-02 21:12:35,817 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:35,820 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:35,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:35,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:35,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:35,823 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:35,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:35,974 INFO L93 Difference]: Finished difference Result 110 states and 151 transitions. [2022-11-02 21:12:35,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:35,975 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:35,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:35,976 INFO L225 Difference]: With dead ends: 110 [2022-11-02 21:12:35,976 INFO L226 Difference]: Without dead ends: 83 [2022-11-02 21:12:35,976 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:35,977 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 131 mSDsluCounter, 158 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 196 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:35,977 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [131 Valid, 196 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:35,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-02 21:12:35,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 35. [2022-11-02 21:12:35,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 34 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:35,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 46 transitions. [2022-11-02 21:12:35,985 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 46 transitions. Word has length 19 [2022-11-02 21:12:35,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:35,986 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 46 transitions. [2022-11-02 21:12:35,986 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:35,986 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 46 transitions. [2022-11-02 21:12:35,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:35,987 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:35,987 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:36,010 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:36,208 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:36,208 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:36,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:36,209 INFO L85 PathProgramCache]: Analyzing trace with hash 721488383, now seen corresponding path program 1 times [2022-11-02 21:12:36,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:36,210 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1367240224] [2022-11-02 21:12:36,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:36,210 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:36,210 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:36,214 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:36,215 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-02 21:12:36,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:36,389 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-02 21:12:36,393 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:36,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:36,555 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:36,555 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:36,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1367240224] [2022-11-02 21:12:36,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1367240224] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:36,556 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:36,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-11-02 21:12:36,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635487428] [2022-11-02 21:12:36,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:36,557 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-02 21:12:36,557 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:36,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-02 21:12:36,558 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2022-11-02 21:12:36,558 INFO L87 Difference]: Start difference. First operand 35 states and 46 transitions. Second operand has 11 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 11 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:37,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:37,533 INFO L93 Difference]: Finished difference Result 248 states and 339 transitions. [2022-11-02 21:12:37,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-11-02 21:12:37,533 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 11 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:37,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:37,535 INFO L225 Difference]: With dead ends: 248 [2022-11-02 21:12:37,535 INFO L226 Difference]: Without dead ends: 221 [2022-11-02 21:12:37,536 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 300 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=374, Invalid=1108, Unknown=0, NotChecked=0, Total=1482 [2022-11-02 21:12:37,537 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 388 mSDsluCounter, 571 mSDsCounter, 0 mSdLazyCounter, 208 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 388 SdHoareTripleChecker+Valid, 620 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:37,537 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [388 Valid, 620 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 208 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-02 21:12:37,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2022-11-02 21:12:37,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 43. [2022-11-02 21:12:37,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.3571428571428572) internal successors, (57), 42 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:37,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 57 transitions. [2022-11-02 21:12:37,546 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 57 transitions. Word has length 19 [2022-11-02 21:12:37,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:37,547 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 57 transitions. [2022-11-02 21:12:37,547 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 11 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:37,547 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 57 transitions. [2022-11-02 21:12:37,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:37,548 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:37,548 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:37,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:37,761 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:37,763 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:37,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:37,764 INFO L85 PathProgramCache]: Analyzing trace with hash -87858243, now seen corresponding path program 1 times [2022-11-02 21:12:37,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:37,765 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [58140698] [2022-11-02 21:12:37,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:37,765 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:37,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:37,774 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:37,777 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-02 21:12:37,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:37,942 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-02 21:12:37,945 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:38,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:38,017 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:38,017 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:38,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [58140698] [2022-11-02 21:12:38,018 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [58140698] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:38,018 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:38,018 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:38,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846149372] [2022-11-02 21:12:38,031 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:38,031 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:38,032 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:38,032 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:38,032 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:38,033 INFO L87 Difference]: Start difference. First operand 43 states and 57 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:38,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:38,115 INFO L93 Difference]: Finished difference Result 134 states and 182 transitions. [2022-11-02 21:12:38,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:38,116 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:38,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:38,117 INFO L225 Difference]: With dead ends: 134 [2022-11-02 21:12:38,117 INFO L226 Difference]: Without dead ends: 99 [2022-11-02 21:12:38,117 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:38,118 INFO L413 NwaCegarLoop]: 52 mSDtfsCounter, 107 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:38,119 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 194 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-02 21:12:38,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2022-11-02 21:12:38,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 51. [2022-11-02 21:12:38,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 50 states have (on average 1.34) internal successors, (67), 50 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:38,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 67 transitions. [2022-11-02 21:12:38,125 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 67 transitions. Word has length 19 [2022-11-02 21:12:38,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:38,126 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 67 transitions. [2022-11-02 21:12:38,126 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:38,126 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 67 transitions. [2022-11-02 21:12:38,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-02 21:12:38,127 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:38,127 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:38,142 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:38,342 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:38,342 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:38,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:38,343 INFO L85 PathProgramCache]: Analyzing trace with hash -87798661, now seen corresponding path program 1 times [2022-11-02 21:12:38,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:38,343 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1251134522] [2022-11-02 21:12:38,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:38,344 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:38,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:38,345 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:38,385 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-02 21:12:38,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:38,517 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-02 21:12:38,520 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:38,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:38,662 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:38,662 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:38,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1251134522] [2022-11-02 21:12:38,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1251134522] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:38,663 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:38,663 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-02 21:12:38,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635385534] [2022-11-02 21:12:38,664 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:38,665 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-02 21:12:38,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:38,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 21:12:38,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:38,666 INFO L87 Difference]: Start difference. First operand 51 states and 67 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:38,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:38,791 INFO L93 Difference]: Finished difference Result 87 states and 117 transitions. [2022-11-02 21:12:38,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:38,792 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-02 21:12:38,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:38,793 INFO L225 Difference]: With dead ends: 87 [2022-11-02 21:12:38,793 INFO L226 Difference]: Without dead ends: 85 [2022-11-02 21:12:38,793 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-02 21:12:38,794 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 81 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:38,795 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 152 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:38,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-11-02 21:12:38,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 53. [2022-11-02 21:12:38,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.3269230769230769) internal successors, (69), 52 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:38,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 69 transitions. [2022-11-02 21:12:38,809 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 69 transitions. Word has length 19 [2022-11-02 21:12:38,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:38,809 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 69 transitions. [2022-11-02 21:12:38,809 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:38,810 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 69 transitions. [2022-11-02 21:12:38,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:38,811 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:38,811 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:38,826 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:39,024 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:39,024 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:39,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:39,025 INFO L85 PathProgramCache]: Analyzing trace with hash -1892809185, now seen corresponding path program 1 times [2022-11-02 21:12:39,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:39,026 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [373888946] [2022-11-02 21:12:39,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:39,026 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:39,026 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:39,028 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:39,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-02 21:12:39,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:39,289 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-02 21:12:39,292 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:39,338 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:39,338 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:39,339 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:39,339 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [373888946] [2022-11-02 21:12:39,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [373888946] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:39,339 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:39,339 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 21:12:39,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963790138] [2022-11-02 21:12:39,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:39,340 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-02 21:12:39,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:39,341 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 21:12:39,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 21:12:39,341 INFO L87 Difference]: Start difference. First operand 53 states and 69 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:39,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:39,375 INFO L93 Difference]: Finished difference Result 131 states and 178 transitions. [2022-11-02 21:12:39,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 21:12:39,376 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:39,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:39,376 INFO L225 Difference]: With dead ends: 131 [2022-11-02 21:12:39,376 INFO L226 Difference]: Without dead ends: 96 [2022-11-02 21:12:39,377 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:39,378 INFO L413 NwaCegarLoop]: 55 mSDtfsCounter, 59 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:39,378 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 133 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-02 21:12:39,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-02 21:12:39,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 55. [2022-11-02 21:12:39,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 54 states have (on average 1.3148148148148149) internal successors, (71), 54 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:39,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 71 transitions. [2022-11-02 21:12:39,385 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 71 transitions. Word has length 44 [2022-11-02 21:12:39,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:39,385 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 71 transitions. [2022-11-02 21:12:39,386 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:39,386 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 71 transitions. [2022-11-02 21:12:39,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:39,387 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:39,387 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:39,406 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:39,601 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:39,602 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:39,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:39,602 INFO L85 PathProgramCache]: Analyzing trace with hash -1752260575, now seen corresponding path program 1 times [2022-11-02 21:12:39,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:39,603 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [959313746] [2022-11-02 21:12:39,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:39,603 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:39,603 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:39,604 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:39,608 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-02 21:12:39,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:39,866 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-02 21:12:39,869 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:39,918 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:39,918 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:39,919 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:39,919 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [959313746] [2022-11-02 21:12:39,919 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [959313746] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:39,919 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:39,919 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 21:12:39,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504022625] [2022-11-02 21:12:39,920 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:39,920 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-02 21:12:39,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:39,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 21:12:39,921 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 21:12:39,921 INFO L87 Difference]: Start difference. First operand 55 states and 71 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:39,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:39,952 INFO L93 Difference]: Finished difference Result 131 states and 177 transitions. [2022-11-02 21:12:39,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 21:12:39,953 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:39,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:39,955 INFO L225 Difference]: With dead ends: 131 [2022-11-02 21:12:39,956 INFO L226 Difference]: Without dead ends: 96 [2022-11-02 21:12:39,956 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:39,959 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 48 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:39,960 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 138 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-02 21:12:39,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-02 21:12:39,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 59. [2022-11-02 21:12:39,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 58 states have (on average 1.3103448275862069) internal successors, (76), 58 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:39,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 76 transitions. [2022-11-02 21:12:39,967 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 76 transitions. Word has length 44 [2022-11-02 21:12:39,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:39,968 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 76 transitions. [2022-11-02 21:12:39,968 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:39,968 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 76 transitions. [2022-11-02 21:12:39,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:39,974 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:39,975 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:40,000 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:40,200 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:40,200 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:40,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:40,201 INFO L85 PathProgramCache]: Analyzing trace with hash -1329558749, now seen corresponding path program 1 times [2022-11-02 21:12:40,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:40,201 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1773913939] [2022-11-02 21:12:40,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:40,202 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:40,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:40,203 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:40,205 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-02 21:12:40,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:40,467 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-02 21:12:40,470 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:40,526 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:40,526 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 21:12:40,527 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:40,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1773913939] [2022-11-02 21:12:40,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1773913939] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:40,527 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:40,527 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 21:12:40,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387707889] [2022-11-02 21:12:40,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:40,528 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-02 21:12:40,528 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:40,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 21:12:40,529 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-02 21:12:40,529 INFO L87 Difference]: Start difference. First operand 59 states and 76 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:40,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:40,567 INFO L93 Difference]: Finished difference Result 131 states and 176 transitions. [2022-11-02 21:12:40,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 21:12:40,567 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:40,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:40,568 INFO L225 Difference]: With dead ends: 131 [2022-11-02 21:12:40,568 INFO L226 Difference]: Without dead ends: 96 [2022-11-02 21:12:40,570 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-02 21:12:40,572 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 42 mSDsluCounter, 69 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:40,573 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 131 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-02 21:12:40,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-02 21:12:40,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 61. [2022-11-02 21:12:40,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 60 states have (on average 1.3) internal successors, (78), 60 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:40,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 78 transitions. [2022-11-02 21:12:40,601 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 78 transitions. Word has length 44 [2022-11-02 21:12:40,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:40,602 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 78 transitions. [2022-11-02 21:12:40,602 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:40,602 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 78 transitions. [2022-11-02 21:12:40,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:40,602 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:40,603 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:40,622 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:40,811 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:40,811 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:40,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:40,812 INFO L85 PathProgramCache]: Analyzing trace with hash 1276464805, now seen corresponding path program 1 times [2022-11-02 21:12:40,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:40,813 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1036924955] [2022-11-02 21:12:40,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:40,813 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:40,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:40,814 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:40,815 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-02 21:12:41,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:41,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-02 21:12:41,051 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:41,284 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:41,284 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:41,745 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:41,746 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:41,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1036924955] [2022-11-02 21:12:41,746 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1036924955] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:41,746 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-02 21:12:41,746 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 12 [2022-11-02 21:12:41,747 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953702695] [2022-11-02 21:12:41,747 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:41,747 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-02 21:12:41,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:41,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-02 21:12:41,748 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2022-11-02 21:12:41,748 INFO L87 Difference]: Start difference. First operand 61 states and 78 transitions. Second operand has 12 states, 12 states have (on average 5.916666666666667) internal successors, (71), 12 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:42,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:42,092 INFO L93 Difference]: Finished difference Result 165 states and 220 transitions. [2022-11-02 21:12:42,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-02 21:12:42,094 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 5.916666666666667) internal successors, (71), 12 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:42,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:42,094 INFO L225 Difference]: With dead ends: 165 [2022-11-02 21:12:42,094 INFO L226 Difference]: Without dead ends: 130 [2022-11-02 21:12:42,095 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=109, Invalid=271, Unknown=0, NotChecked=0, Total=380 [2022-11-02 21:12:42,096 INFO L413 NwaCegarLoop]: 53 mSDtfsCounter, 189 mSDsluCounter, 382 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 189 SdHoareTripleChecker+Valid, 435 SdHoareTripleChecker+Invalid, 172 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 89 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:42,096 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [189 Valid, 435 Invalid, 172 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 80 Invalid, 0 Unknown, 89 Unchecked, 0.2s Time] [2022-11-02 21:12:42,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-02 21:12:42,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 96. [2022-11-02 21:12:42,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 95 states have (on average 1.3263157894736841) internal successors, (126), 95 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:42,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 126 transitions. [2022-11-02 21:12:42,108 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 126 transitions. Word has length 44 [2022-11-02 21:12:42,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:42,108 INFO L495 AbstractCegarLoop]: Abstraction has 96 states and 126 transitions. [2022-11-02 21:12:42,109 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 5.916666666666667) internal successors, (71), 12 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:42,109 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 126 transitions. [2022-11-02 21:12:42,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:42,109 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:42,110 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:42,130 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:42,310 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:42,310 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:42,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:42,311 INFO L85 PathProgramCache]: Analyzing trace with hash 255396451, now seen corresponding path program 1 times [2022-11-02 21:12:42,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:42,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2059795347] [2022-11-02 21:12:42,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:42,311 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:42,312 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:42,312 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:42,313 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-02 21:12:42,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:42,557 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-02 21:12:42,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:42,826 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-02 21:12:42,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:42,957 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-02 21:12:42,957 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:42,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2059795347] [2022-11-02 21:12:42,957 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2059795347] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:42,958 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-02 21:12:42,958 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2022-11-02 21:12:42,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2063713639] [2022-11-02 21:12:42,958 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:42,959 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-02 21:12:42,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:42,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-02 21:12:42,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2022-11-02 21:12:42,960 INFO L87 Difference]: Start difference. First operand 96 states and 126 transitions. Second operand has 9 states, 9 states have (on average 7.888888888888889) internal successors, (71), 9 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:43,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:43,135 INFO L93 Difference]: Finished difference Result 250 states and 334 transitions. [2022-11-02 21:12:43,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:43,136 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 7.888888888888889) internal successors, (71), 9 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:43,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:43,137 INFO L225 Difference]: With dead ends: 250 [2022-11-02 21:12:43,137 INFO L226 Difference]: Without dead ends: 184 [2022-11-02 21:12:43,137 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2022-11-02 21:12:43,138 INFO L413 NwaCegarLoop]: 64 mSDtfsCounter, 97 mSDsluCounter, 168 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 232 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:43,138 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [97 Valid, 232 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 51 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:43,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2022-11-02 21:12:43,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 100. [2022-11-02 21:12:43,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:43,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 130 transitions. [2022-11-02 21:12:43,146 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 130 transitions. Word has length 44 [2022-11-02 21:12:43,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:43,146 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 130 transitions. [2022-11-02 21:12:43,147 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 7.888888888888889) internal successors, (71), 9 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:43,147 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 130 transitions. [2022-11-02 21:12:43,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:43,148 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:43,148 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:43,171 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:43,362 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:43,362 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:43,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:43,363 INFO L85 PathProgramCache]: Analyzing trace with hash -137630559, now seen corresponding path program 1 times [2022-11-02 21:12:43,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:43,363 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1267264793] [2022-11-02 21:12:43,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:43,364 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:43,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:43,365 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:43,401 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-02 21:12:43,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:43,603 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-02 21:12:43,613 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:43,901 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-02 21:12:43,901 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:44,061 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-02 21:12:44,062 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:44,062 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1267264793] [2022-11-02 21:12:44,062 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1267264793] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:44,062 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-02 21:12:44,062 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 11 [2022-11-02 21:12:44,062 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803896498] [2022-11-02 21:12:44,062 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:44,063 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-02 21:12:44,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:44,063 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-02 21:12:44,063 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-02 21:12:44,064 INFO L87 Difference]: Start difference. First operand 100 states and 130 transitions. Second operand has 11 states, 11 states have (on average 6.636363636363637) internal successors, (73), 11 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:44,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:44,268 INFO L93 Difference]: Finished difference Result 298 states and 403 transitions. [2022-11-02 21:12:44,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 21:12:44,269 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 6.636363636363637) internal successors, (73), 11 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:44,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:44,270 INFO L225 Difference]: With dead ends: 298 [2022-11-02 21:12:44,270 INFO L226 Difference]: Without dead ends: 228 [2022-11-02 21:12:44,270 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2022-11-02 21:12:44,271 INFO L413 NwaCegarLoop]: 64 mSDtfsCounter, 196 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 216 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:44,271 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 216 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:44,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2022-11-02 21:12:44,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 100. [2022-11-02 21:12:44,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:44,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 130 transitions. [2022-11-02 21:12:44,290 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 130 transitions. Word has length 44 [2022-11-02 21:12:44,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:44,291 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 130 transitions. [2022-11-02 21:12:44,291 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 6.636363636363637) internal successors, (73), 11 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:44,291 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 130 transitions. [2022-11-02 21:12:44,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:44,292 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:44,292 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:44,312 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:44,507 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:44,508 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:44,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:44,508 INFO L85 PathProgramCache]: Analyzing trace with hash -946977185, now seen corresponding path program 1 times [2022-11-02 21:12:44,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:44,509 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [215875749] [2022-11-02 21:12:44,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:44,509 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:44,509 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:44,510 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:44,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-02 21:12:44,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:44,775 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-02 21:12:44,778 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:45,238 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-02 21:12:45,238 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:45,883 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-02 21:12:45,883 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:45,883 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [215875749] [2022-11-02 21:12:45,884 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [215875749] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:45,884 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-02 21:12:45,884 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 10 [2022-11-02 21:12:45,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380108532] [2022-11-02 21:12:45,884 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:45,885 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-02 21:12:45,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:45,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-02 21:12:45,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2022-11-02 21:12:45,886 INFO L87 Difference]: Start difference. First operand 100 states and 130 transitions. Second operand has 10 states, 10 states have (on average 7.1) internal successors, (71), 10 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:46,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:46,216 INFO L93 Difference]: Finished difference Result 320 states and 424 transitions. [2022-11-02 21:12:46,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 21:12:46,217 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 7.1) internal successors, (71), 10 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:46,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:46,218 INFO L225 Difference]: With dead ends: 320 [2022-11-02 21:12:46,218 INFO L226 Difference]: Without dead ends: 250 [2022-11-02 21:12:46,218 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=182, Unknown=0, NotChecked=0, Total=272 [2022-11-02 21:12:46,219 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 177 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 255 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:46,219 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [177 Valid, 255 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-02 21:12:46,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2022-11-02 21:12:46,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 108. [2022-11-02 21:12:46,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.2897196261682242) internal successors, (138), 107 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:46,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 138 transitions. [2022-11-02 21:12:46,235 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 138 transitions. Word has length 44 [2022-11-02 21:12:46,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:46,236 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-11-02 21:12:46,237 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 7.1) internal successors, (71), 10 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:46,237 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 138 transitions. [2022-11-02 21:12:46,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:46,238 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:46,238 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:46,257 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:46,452 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:46,452 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:46,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:46,453 INFO L85 PathProgramCache]: Analyzing trace with hash -889718883, now seen corresponding path program 1 times [2022-11-02 21:12:46,453 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:46,453 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1100697783] [2022-11-02 21:12:46,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:46,454 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:46,454 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:46,455 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:46,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-02 21:12:46,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:46,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 15 conjunts are in the unsatisfiable core [2022-11-02 21:12:46,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:46,916 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:46,917 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:46,979 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:46,980 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:46,980 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1100697783] [2022-11-02 21:12:46,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1100697783] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:46,980 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-02 21:12:46,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 9 [2022-11-02 21:12:46,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175440627] [2022-11-02 21:12:46,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:46,981 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-02 21:12:46,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:46,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 21:12:46,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-11-02 21:12:46,982 INFO L87 Difference]: Start difference. First operand 108 states and 138 transitions. Second operand has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:47,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:47,132 INFO L93 Difference]: Finished difference Result 338 states and 441 transitions. [2022-11-02 21:12:47,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-02 21:12:47,133 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:47,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:47,134 INFO L225 Difference]: With dead ends: 338 [2022-11-02 21:12:47,134 INFO L226 Difference]: Without dead ends: 260 [2022-11-02 21:12:47,135 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2022-11-02 21:12:47,135 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 184 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:47,136 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 160 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:47,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2022-11-02 21:12:47,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 134. [2022-11-02 21:12:47,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 133 states have (on average 1.2706766917293233) internal successors, (169), 133 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:47,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 169 transitions. [2022-11-02 21:12:47,144 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 169 transitions. Word has length 44 [2022-11-02 21:12:47,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:47,144 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 169 transitions. [2022-11-02 21:12:47,144 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:47,145 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 169 transitions. [2022-11-02 21:12:47,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:47,145 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:47,145 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:47,160 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:47,360 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:47,360 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:47,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:47,360 INFO L85 PathProgramCache]: Analyzing trace with hash -889659301, now seen corresponding path program 1 times [2022-11-02 21:12:47,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:47,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [489087596] [2022-11-02 21:12:47,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:47,362 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:47,362 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:47,363 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:47,366 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-02 21:12:47,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:47,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 25 conjunts are in the unsatisfiable core [2022-11-02 21:12:47,626 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:47,869 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:47,870 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:48,057 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:48,058 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:48,058 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [489087596] [2022-11-02 21:12:48,058 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [489087596] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:48,058 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-02 21:12:48,058 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2022-11-02 21:12:48,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577550893] [2022-11-02 21:12:48,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:48,060 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-02 21:12:48,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:48,061 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 21:12:48,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2022-11-02 21:12:48,061 INFO L87 Difference]: Start difference. First operand 134 states and 169 transitions. Second operand has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:48,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:48,093 INFO L93 Difference]: Finished difference Result 140 states and 176 transitions. [2022-11-02 21:12:48,094 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:48,094 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:48,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:48,095 INFO L225 Difference]: With dead ends: 140 [2022-11-02 21:12:48,095 INFO L226 Difference]: Without dead ends: 138 [2022-11-02 21:12:48,095 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-11-02 21:12:48,096 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 47 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 18 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:48,096 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 142 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3 Invalid, 0 Unknown, 18 Unchecked, 0.0s Time] [2022-11-02 21:12:48,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2022-11-02 21:12:48,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2022-11-02 21:12:48,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 137 states have (on average 1.2627737226277371) internal successors, (173), 137 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:48,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 173 transitions. [2022-11-02 21:12:48,104 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 173 transitions. Word has length 44 [2022-11-02 21:12:48,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:48,104 INFO L495 AbstractCegarLoop]: Abstraction has 138 states and 173 transitions. [2022-11-02 21:12:48,104 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:48,105 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 173 transitions. [2022-11-02 21:12:48,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:48,105 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:48,105 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:48,122 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:48,314 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:48,314 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:48,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:48,314 INFO L85 PathProgramCache]: Analyzing trace with hash -1900836133, now seen corresponding path program 1 times [2022-11-02 21:12:48,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:48,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1734971051] [2022-11-02 21:12:48,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:48,315 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:48,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:48,316 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:48,319 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-02 21:12:48,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:48,531 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-02 21:12:48,534 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:48,741 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:48,741 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:48,803 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:48,803 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:48,803 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1734971051] [2022-11-02 21:12:48,803 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1734971051] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:48,803 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-02 21:12:48,803 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 9 [2022-11-02 21:12:48,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218569817] [2022-11-02 21:12:48,804 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:48,804 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-02 21:12:48,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:48,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 21:12:48,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-11-02 21:12:48,805 INFO L87 Difference]: Start difference. First operand 138 states and 173 transitions. Second operand has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:48,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:48,953 INFO L93 Difference]: Finished difference Result 388 states and 496 transitions. [2022-11-02 21:12:48,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-02 21:12:48,954 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:48,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:48,955 INFO L225 Difference]: With dead ends: 388 [2022-11-02 21:12:48,955 INFO L226 Difference]: Without dead ends: 280 [2022-11-02 21:12:48,956 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2022-11-02 21:12:48,956 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 166 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 158 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:48,957 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 158 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-02 21:12:48,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2022-11-02 21:12:48,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 142. [2022-11-02 21:12:48,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 141 states have (on average 1.2553191489361701) internal successors, (177), 141 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:48,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 177 transitions. [2022-11-02 21:12:48,965 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 177 transitions. Word has length 44 [2022-11-02 21:12:48,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:48,965 INFO L495 AbstractCegarLoop]: Abstraction has 142 states and 177 transitions. [2022-11-02 21:12:48,965 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:48,965 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 177 transitions. [2022-11-02 21:12:48,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:48,966 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:48,966 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:48,987 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:49,180 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:49,181 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:49,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:49,181 INFO L85 PathProgramCache]: Analyzing trace with hash -1900776551, now seen corresponding path program 1 times [2022-11-02 21:12:49,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:49,181 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [849649776] [2022-11-02 21:12:49,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:49,182 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:49,182 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:49,182 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:49,184 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-02 21:12:49,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:49,432 INFO L263 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-02 21:12:49,435 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:49,693 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:49,693 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:49,871 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 21:12:49,872 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-02 21:12:49,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [849649776] [2022-11-02 21:12:49,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [849649776] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:49,872 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-02 21:12:49,872 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2022-11-02 21:12:49,873 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371520440] [2022-11-02 21:12:49,873 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:49,874 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-02 21:12:49,874 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-02 21:12:49,874 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-02 21:12:49,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2022-11-02 21:12:49,876 INFO L87 Difference]: Start difference. First operand 142 states and 177 transitions. Second operand has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:49,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:49,909 INFO L93 Difference]: Finished difference Result 156 states and 192 transitions. [2022-11-02 21:12:49,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-02 21:12:49,909 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-02 21:12:49,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-02 21:12:49,912 INFO L225 Difference]: With dead ends: 156 [2022-11-02 21:12:49,913 INFO L226 Difference]: Without dead ends: 154 [2022-11-02 21:12:49,913 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-11-02 21:12:49,914 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 35 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-02 21:12:49,918 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 134 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3 Invalid, 0 Unknown, 19 Unchecked, 0.0s Time] [2022-11-02 21:12:49,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-11-02 21:12:49,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 126. [2022-11-02 21:12:49,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 125 states have (on average 1.288) internal successors, (161), 125 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:49,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 161 transitions. [2022-11-02 21:12:49,928 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 161 transitions. Word has length 44 [2022-11-02 21:12:49,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-02 21:12:49,929 INFO L495 AbstractCegarLoop]: Abstraction has 126 states and 161 transitions. [2022-11-02 21:12:49,929 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:49,929 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 161 transitions. [2022-11-02 21:12:49,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-02 21:12:49,929 INFO L187 NwaCegarLoop]: Found error trace [2022-11-02 21:12:49,930 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:49,949 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:50,149 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:50,149 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-02 21:12:50,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:50,150 INFO L85 PathProgramCache]: Analyzing trace with hash -1306901987, now seen corresponding path program 1 times [2022-11-02 21:12:50,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-02 21:12:50,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [398814070] [2022-11-02 21:12:50,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:50,151 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-02 21:12:50,151 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat [2022-11-02 21:12:50,152 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-02 21:12:50,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-02 21:12:50,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:50,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:50,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:50,720 INFO L130 FreeRefinementEngine]: Strategy WOLF found a feasible trace [2022-11-02 21:12:50,720 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-02 21:12:50,721 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-02 21:12:50,742 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:50,937 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/mathsat -unsat_core_generation=3 [2022-11-02 21:12:50,940 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 21:12:50,943 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-02 21:12:51,098 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-02 21:12:51,099 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-02 21:12:51,135 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.11 09:12:51 BoogieIcfgContainer [2022-11-02 21:12:51,136 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-02 21:12:51,136 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-02 21:12:51,136 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-02 21:12:51,136 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-02 21:12:51,137 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:33" (3/4) ... [2022-11-02 21:12:51,139 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-02 21:12:51,202 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-02 21:12:51,202 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-02 21:12:51,351 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/witness.graphml [2022-11-02 21:12:51,351 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-02 21:12:51,352 INFO L158 Benchmark]: Toolchain (without parser) took 19336.82ms. Allocated memory was 69.2MB in the beginning and 161.5MB in the end (delta: 92.3MB). Free memory was 49.3MB in the beginning and 86.3MB in the end (delta: -37.0MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,352 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 69.2MB. Free memory is still 49.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-02 21:12:51,352 INFO L158 Benchmark]: CACSL2BoogieTranslator took 562.58ms. Allocated memory is still 69.2MB. Free memory was 49.0MB in the beginning and 43.2MB in the end (delta: 5.8MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,352 INFO L158 Benchmark]: Boogie Procedure Inliner took 80.96ms. Allocated memory is still 69.2MB. Free memory was 43.2MB in the beginning and 39.5MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,353 INFO L158 Benchmark]: Boogie Preprocessor took 65.33ms. Allocated memory is still 69.2MB. Free memory was 39.5MB in the beginning and 36.9MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,353 INFO L158 Benchmark]: RCFGBuilder took 839.52ms. Allocated memory was 69.2MB in the beginning and 92.3MB in the end (delta: 23.1MB). Free memory was 36.9MB in the beginning and 69.7MB in the end (delta: -32.8MB). Peak memory consumption was 19.4MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,354 INFO L158 Benchmark]: TraceAbstraction took 17565.39ms. Allocated memory was 92.3MB in the beginning and 161.5MB in the end (delta: 69.2MB). Free memory was 69.1MB in the beginning and 119.1MB in the end (delta: -50.0MB). Peak memory consumption was 99.9MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,354 INFO L158 Benchmark]: Witness Printer took 214.85ms. Allocated memory is still 161.5MB. Free memory was 119.1MB in the beginning and 86.3MB in the end (delta: 32.9MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2022-11-02 21:12:51,355 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 69.2MB. Free memory is still 49.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 562.58ms. Allocated memory is still 69.2MB. Free memory was 49.0MB in the beginning and 43.2MB in the end (delta: 5.8MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 80.96ms. Allocated memory is still 69.2MB. Free memory was 43.2MB in the beginning and 39.5MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 65.33ms. Allocated memory is still 69.2MB. Free memory was 39.5MB in the beginning and 36.9MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 839.52ms. Allocated memory was 69.2MB in the beginning and 92.3MB in the end (delta: 23.1MB). Free memory was 36.9MB in the beginning and 69.7MB in the end (delta: -32.8MB). Peak memory consumption was 19.4MB. Max. memory is 16.1GB. * TraceAbstraction took 17565.39ms. Allocated memory was 92.3MB in the beginning and 161.5MB in the end (delta: 69.2MB). Free memory was 69.1MB in the beginning and 119.1MB in the end (delta: -50.0MB). Peak memory consumption was 99.9MB. Max. memory is 16.1GB. * Witness Printer took 214.85ms. Allocated memory is still 161.5MB. Free memory was 119.1MB in the beginning and 86.3MB in the end (delta: 32.9MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 20]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 6); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (6 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 1); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (1 - 1); [L31] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); [L32] const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); [L34] const SORT_24 mask_SORT_24 = (SORT_24)-1 >> (sizeof(SORT_24) * 8 - 5); [L35] const SORT_24 msb_SORT_24 = (SORT_24)1 << (5 - 1); [L37] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L38] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L40] const SORT_1 var_21 = 0; [L41] const SORT_24 var_26 = 31; [L42] const SORT_6 var_28 = 0; [L43] const SORT_33 var_34 = 0; [L44] const SORT_33 var_35 = 1; [L45] const SORT_3 var_37 = 1; [L46] const SORT_3 var_43 = 0; [L47] const SORT_33 var_55 = 2; [L48] const SORT_33 var_72 = 3; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_1 input_5; [L53] SORT_6 input_7; [L54] SORT_3 input_8; [L55] SORT_6 input_9; [L56] SORT_1 input_10; [L57] SORT_1 input_11; [L58] SORT_1 input_12; [L59] SORT_3 input_13; [L60] SORT_3 input_14; [L61] SORT_3 input_15; [L62] SORT_3 input_16; [L63] SORT_3 input_17; [L64] SORT_3 input_18; [L65] SORT_3 input_19; [L66] SORT_3 input_20; [L67] SORT_3 input_117; [L68] SORT_3 input_121; [L69] SORT_1 input_123; [L70] SORT_3 input_125; [L71] SORT_33 input_128; [L72] SORT_3 input_130; [L73] SORT_6 input_133; [L74] SORT_3 input_135; [L76] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] SORT_6 state_29 = __VERIFIER_nondet_uint() & mask_SORT_6; [L78] SORT_6 state_31 = __VERIFIER_nondet_uint() & mask_SORT_6; [L79] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] SORT_3 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] SORT_3 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] SORT_1 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] SORT_3 state_61 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L84] SORT_3 state_65 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] SORT_1 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] SORT_3 state_78 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L87] SORT_3 state_82 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] SORT_3 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] SORT_6 state_95 = __VERIFIER_nondet_uint() & mask_SORT_6; [L90] SORT_1 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] SORT_3 state_115 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L92] SORT_3 state_119 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L94] SORT_1 init_23_arg_1 = var_21; [L95] state_22 = init_23_arg_1 [L96] SORT_6 init_30_arg_1 = var_28; [L97] state_29 = init_30_arg_1 [L98] SORT_6 init_32_arg_1 = var_28; [L99] state_31 = init_32_arg_1 [L100] SORT_1 init_40_arg_1 = var_21; [L101] state_39 = init_40_arg_1 [L102] SORT_3 init_45_arg_1 = var_43; [L103] state_44 = init_45_arg_1 [L104] SORT_3 init_49_arg_1 = var_43; [L105] state_48 = init_49_arg_1 [L106] SORT_1 init_58_arg_1 = var_21; [L107] state_57 = init_58_arg_1 [L108] SORT_3 init_62_arg_1 = var_43; [L109] state_61 = init_62_arg_1 [L110] SORT_3 init_66_arg_1 = var_43; [L111] state_65 = init_66_arg_1 [L112] SORT_1 init_75_arg_1 = var_21; [L113] state_74 = init_75_arg_1 [L114] SORT_3 init_79_arg_1 = var_43; [L115] state_78 = init_79_arg_1 [L116] SORT_3 init_83_arg_1 = var_43; [L117] state_82 = init_83_arg_1 [L118] SORT_3 init_87_arg_1 = var_43; [L119] state_86 = init_87_arg_1 [L120] SORT_6 init_96_arg_1 = var_28; [L121] state_95 = init_96_arg_1 [L122] SORT_1 init_114_arg_1 = var_21; [L123] state_113 = init_114_arg_1 [L124] SORT_3 init_116_arg_1 = var_43; [L125] state_115 = init_116_arg_1 [L126] SORT_3 init_120_arg_1 = var_43; [L127] state_119 = init_120_arg_1 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_37=1, var_43=0, var_55=2, var_72=3] [L130] input_2 = __VERIFIER_nondet_uchar() [L131] input_4 = __VERIFIER_nondet_uchar() [L132] input_4 = input_4 & mask_SORT_3 [L133] input_5 = __VERIFIER_nondet_uchar() [L134] input_5 = input_5 & mask_SORT_1 [L135] input_7 = __VERIFIER_nondet_uint() [L136] input_8 = __VERIFIER_nondet_uchar() [L137] input_8 = input_8 & mask_SORT_3 [L138] input_9 = __VERIFIER_nondet_uint() [L139] input_10 = __VERIFIER_nondet_uchar() [L140] input_10 = input_10 & mask_SORT_1 [L141] input_11 = __VERIFIER_nondet_uchar() [L142] input_11 = input_11 & mask_SORT_1 [L143] input_12 = __VERIFIER_nondet_uchar() [L144] input_13 = __VERIFIER_nondet_uchar() [L145] input_14 = __VERIFIER_nondet_uchar() [L146] input_14 = input_14 & mask_SORT_3 [L147] input_15 = __VERIFIER_nondet_uchar() [L148] input_16 = __VERIFIER_nondet_uchar() [L149] input_16 = input_16 & mask_SORT_3 [L150] input_17 = __VERIFIER_nondet_uchar() [L151] input_17 = input_17 & mask_SORT_3 [L152] input_18 = __VERIFIER_nondet_uchar() [L153] input_18 = input_18 & mask_SORT_3 [L154] input_19 = __VERIFIER_nondet_uchar() [L155] input_19 = input_19 & mask_SORT_3 [L156] input_20 = __VERIFIER_nondet_uchar() [L157] input_117 = __VERIFIER_nondet_uchar() [L158] input_121 = __VERIFIER_nondet_uchar() [L159] input_123 = __VERIFIER_nondet_uchar() [L160] input_125 = __VERIFIER_nondet_uchar() [L161] input_128 = __VERIFIER_nondet_uchar() [L162] input_130 = __VERIFIER_nondet_uchar() [L163] input_133 = __VERIFIER_nondet_uint() [L164] input_135 = __VERIFIER_nondet_uchar() [L167] SORT_1 var_25_arg_0 = state_22; [L168] SORT_24 var_25 = var_25_arg_0 >> 0; [L169] var_25 = var_25 & mask_SORT_24 [L170] SORT_24 var_27_arg_0 = var_25; [L171] SORT_24 var_27_arg_1 = var_26; [L172] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L173] SORT_24 var_102_arg_0 = var_25; [L174] SORT_24 var_102_arg_1 = var_26; [L175] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L176] SORT_1 var_36_arg_0 = state_22; [L177] SORT_3 var_36 = var_36_arg_0 >> 5; [L178] var_36 = var_36 & mask_SORT_3 [L179] SORT_3 var_73_arg_0 = var_36; [L180] SORT_3 var_73_arg_1 = var_37; [L181] SORT_3 var_73 = var_73_arg_0 == var_73_arg_1; [L182] SORT_1 var_76_arg_0 = state_22; [L183] SORT_1 var_76_arg_1 = state_74; [L184] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L185] SORT_3 var_77_arg_0 = var_73; [L186] SORT_3 var_77_arg_1 = var_76; [L187] SORT_3 var_77 = var_77_arg_0 & var_77_arg_1; [L188] SORT_3 var_80_arg_0 = state_78; [L189] SORT_3 var_80_arg_1 = var_37; [L190] SORT_3 var_80 = var_80_arg_0 != var_80_arg_1; [L191] SORT_3 var_81_arg_0 = var_77; [L192] SORT_3 var_81_arg_1 = var_80; [L193] SORT_3 var_81 = var_81_arg_0 & var_81_arg_1; [L194] SORT_3 var_84_arg_0 = state_82; [L195] SORT_3 var_84_arg_1 = var_37; [L196] SORT_3 var_84 = var_84_arg_0 == var_84_arg_1; [L197] SORT_3 var_85_arg_0 = var_81; [L198] SORT_3 var_85_arg_1 = var_84; [L199] SORT_3 var_85 = var_85_arg_0 & var_85_arg_1; [L200] SORT_3 var_88_arg_0 = state_86; [L201] SORT_3 var_88_arg_1 = var_37; [L202] SORT_3 var_88 = var_88_arg_0 == var_88_arg_1; [L203] SORT_3 var_89_arg_0 = var_85; [L204] SORT_3 var_89_arg_1 = var_88; [L205] SORT_3 var_89 = var_89_arg_0 & var_89_arg_1; [L206] SORT_24 var_90_arg_0 = var_25; [L207] SORT_24 var_90_arg_1 = var_26; [L208] SORT_3 var_90 = var_90_arg_0 != var_90_arg_1; [L209] SORT_3 var_91_arg_0 = var_89; [L210] SORT_3 var_91_arg_1 = var_90; [L211] SORT_3 var_91 = var_91_arg_0 & var_91_arg_1; [L212] var_91 = var_91 & mask_SORT_3 [L213] SORT_3 var_56_arg_0 = var_36; [L214] SORT_3 var_56_arg_1 = var_37; [L215] SORT_3 var_56 = var_56_arg_0 == var_56_arg_1; [L216] SORT_1 var_59_arg_0 = state_22; [L217] SORT_1 var_59_arg_1 = state_57; [L218] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L219] SORT_3 var_60_arg_0 = var_56; [L220] SORT_3 var_60_arg_1 = var_59; [L221] SORT_3 var_60 = var_60_arg_0 & var_60_arg_1; [L222] SORT_3 var_63_arg_0 = state_61; [L223] SORT_3 var_63_arg_1 = var_37; [L224] SORT_3 var_63 = var_63_arg_0 == var_63_arg_1; [L225] SORT_3 var_64_arg_0 = var_60; [L226] SORT_3 var_64_arg_1 = var_63; [L227] SORT_3 var_64 = var_64_arg_0 & var_64_arg_1; [L228] SORT_3 var_67_arg_0 = state_65; [L229] SORT_3 var_67_arg_1 = var_37; [L230] SORT_3 var_67 = var_67_arg_0 == var_67_arg_1; [L231] SORT_3 var_68_arg_0 = var_64; [L232] SORT_3 var_68_arg_1 = var_67; [L233] SORT_3 var_68 = var_68_arg_0 & var_68_arg_1; [L234] SORT_24 var_69_arg_0 = var_25; [L235] SORT_24 var_69_arg_1 = var_26; [L236] SORT_3 var_69 = var_69_arg_0 != var_69_arg_1; [L237] SORT_3 var_70_arg_0 = var_68; [L238] SORT_3 var_70_arg_1 = var_69; [L239] SORT_3 var_70 = var_70_arg_0 & var_70_arg_1; [L240] var_70 = var_70 & mask_SORT_3 [L241] SORT_3 var_38_arg_0 = var_36; [L242] SORT_3 var_38_arg_1 = var_37; [L243] SORT_3 var_38 = var_38_arg_0 == var_38_arg_1; [L244] SORT_1 var_41_arg_0 = state_22; [L245] SORT_1 var_41_arg_1 = state_39; [L246] SORT_3 var_41 = var_41_arg_0 == var_41_arg_1; [L247] SORT_3 var_42_arg_0 = var_38; [L248] SORT_3 var_42_arg_1 = var_41; [L249] SORT_3 var_42 = var_42_arg_0 & var_42_arg_1; [L250] SORT_3 var_46_arg_0 = state_44; [L251] SORT_3 var_46_arg_1 = var_37; [L252] SORT_3 var_46 = var_46_arg_0 == var_46_arg_1; [L253] SORT_3 var_47_arg_0 = var_42; [L254] SORT_3 var_47_arg_1 = var_46; [L255] SORT_3 var_47 = var_47_arg_0 & var_47_arg_1; [L256] SORT_3 var_50_arg_0 = state_48; [L257] SORT_3 var_50_arg_1 = var_37; [L258] SORT_3 var_50 = var_50_arg_0 == var_50_arg_1; [L259] SORT_3 var_51_arg_0 = var_47; [L260] SORT_3 var_51_arg_1 = var_50; [L261] SORT_3 var_51 = var_51_arg_0 & var_51_arg_1; [L262] SORT_24 var_52_arg_0 = var_25; [L263] SORT_24 var_52_arg_1 = var_26; [L264] SORT_3 var_52 = var_52_arg_0 != var_52_arg_1; [L265] SORT_3 var_53_arg_0 = var_51; [L266] SORT_3 var_53_arg_1 = var_52; [L267] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L268] var_53 = var_53 & mask_SORT_3 [L269] SORT_3 var_54_arg_0 = var_53; [L270] SORT_33 var_54_arg_1 = var_35; [L271] SORT_33 var_54_arg_2 = var_34; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L272] EXPR var_54_arg_0 ? var_54_arg_1 : var_54_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54_arg_0=0, var_54_arg_0 ? var_54_arg_1 : var_54_arg_2=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L272] SORT_33 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L273] SORT_3 var_71_arg_0 = var_70; [L274] SORT_33 var_71_arg_1 = var_55; [L275] SORT_33 var_71_arg_2 = var_54; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L276] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1] [L276] SORT_33 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L277] SORT_3 var_92_arg_0 = var_91; [L278] SORT_33 var_92_arg_1 = var_72; [L279] SORT_33 var_92_arg_2 = var_71; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0] [L280] EXPR var_92_arg_0 ? var_92_arg_1 : var_92_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92_arg_0=0, var_92_arg_0 ? var_92_arg_1 : var_92_arg_2=0, var_92_arg_1=3, var_92_arg_2=0] [L280] SORT_33 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L281] var_92 = var_92 & mask_SORT_33 [L282] SORT_33 var_99_arg_0 = var_92; [L283] SORT_33 var_99_arg_1 = var_35; [L284] SORT_3 var_99 = var_99_arg_0 == var_99_arg_1; [L285] SORT_33 var_97_arg_0 = var_92; [L286] SORT_33 var_97_arg_1 = var_34; [L287] SORT_3 var_97 = var_97_arg_0 == var_97_arg_1; [L288] SORT_3 var_100_arg_0 = var_99; [L289] SORT_3 var_100_arg_1 = var_97; [L290] SORT_3 var_100 = var_100_arg_0 | var_100_arg_1; [L291] var_100 = var_100 & mask_SORT_3 [L292] SORT_3 var_98_arg_0 = var_97; [L293] SORT_6 var_98_arg_1 = var_28; [L294] SORT_6 var_98_arg_2 = state_95; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L295] EXPR var_98_arg_0 ? var_98_arg_1 : var_98_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98_arg_0=1, var_98_arg_0 ? var_98_arg_1 : var_98_arg_2=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L295] SORT_6 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L296] SORT_33 var_93_arg_0 = var_92; [L297] SORT_33 var_93_arg_1 = var_55; [L298] SORT_3 var_93 = var_93_arg_0 == var_93_arg_1; [L299] SORT_3 var_94_arg_0 = var_93; [L300] SORT_6 var_94_arg_1 = state_31; [L301] SORT_6 var_94_arg_2 = state_29; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L302] EXPR var_94_arg_0 ? var_94_arg_1 : var_94_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94_arg_0=0, var_94_arg_0 ? var_94_arg_1 : var_94_arg_2=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L302] SORT_6 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L303] SORT_3 var_101_arg_0 = var_100; [L304] SORT_6 var_101_arg_1 = var_98; [L305] SORT_6 var_101_arg_2 = var_94; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L306] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101_arg_0=1, var_101_arg_0 ? var_101_arg_1 : var_101_arg_2=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L306] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L307] SORT_3 var_103_arg_0 = var_102; [L308] SORT_6 var_103_arg_1 = var_28; [L309] SORT_6 var_103_arg_2 = var_101; VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L310] EXPR var_103_arg_0 ? var_103_arg_1 : var_103_arg_2 VAL [init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103_arg_0=0, var_103_arg_0 ? var_103_arg_1 : var_103_arg_2=0, var_103_arg_1=0, var_103_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L310] SORT_6 var_103 = var_103_arg_0 ? var_103_arg_1 : var_103_arg_2; [L311] SORT_6 var_104_arg_0 = var_103; [L312] SORT_1 var_104 = var_104_arg_0 >> 26; [L313] var_104 = var_104 & mask_SORT_1 [L314] SORT_1 var_105_arg_0 = var_104; [L315] SORT_1 var_105_arg_1 = var_21; [L316] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L317] SORT_3 var_106_arg_0 = var_27; [L318] SORT_3 var_106_arg_1 = var_105; [L319] SORT_3 var_106 = var_106_arg_0 & var_106_arg_1; [L320] SORT_3 var_107_arg_0 = var_106; [L321] SORT_3 var_107 = ~var_107_arg_0; [L322] SORT_3 var_110_arg_0 = var_107; [L323] SORT_3 var_110 = ~var_110_arg_0; [L324] SORT_3 var_111_arg_0 = var_37; [L325] SORT_3 var_111_arg_1 = var_110; [L326] SORT_3 var_111 = var_111_arg_0 & var_111_arg_1; [L327] var_111 = var_111 & mask_SORT_3 [L328] SORT_3 bad_112_arg_0 = var_111; [L329] CALL __VERIFIER_assert(!(bad_112_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L329] RET __VERIFIER_assert(!(bad_112_arg_0)) [L331] SORT_1 next_138_arg_1 = input_11; [L332] SORT_6 next_139_arg_1 = input_7; [L333] SORT_6 next_140_arg_1 = input_9; [L334] SORT_3 var_141_arg_0 = state_119; [L335] SORT_1 var_141_arg_1 = state_57; [L336] SORT_1 var_141_arg_2 = state_39; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L337] EXPR var_141_arg_0 ? var_141_arg_1 : var_141_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141_arg_0=0, var_141_arg_0 ? var_141_arg_1 : var_141_arg_2=0, var_141_arg_1=0, var_141_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L337] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L338] var_141 = var_141 & mask_SORT_1 [L339] SORT_1 next_142_arg_1 = var_141; [L340] SORT_3 next_143_arg_1 = input_19; [L341] SORT_3 var_144_arg_0 = state_119; [L342] SORT_3 var_144_arg_1 = state_61; [L343] SORT_3 var_144_arg_2 = state_48; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L344] EXPR var_144_arg_0 ? var_144_arg_1 : var_144_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144_arg_0=0, var_144_arg_0 ? var_144_arg_1 : var_144_arg_2=0, var_144_arg_1=0, var_144_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L344] SORT_3 var_144 = var_144_arg_0 ? var_144_arg_1 : var_144_arg_2; [L345] var_144 = var_144 & mask_SORT_3 [L346] SORT_3 next_145_arg_1 = var_144; [L347] SORT_1 next_146_arg_1 = input_10; [L348] SORT_3 next_147_arg_1 = input_8; [L349] SORT_3 next_148_arg_1 = input_18; [L350] SORT_1 next_149_arg_1 = input_5; [L351] SORT_1 var_150_arg_0 = state_113; [L352] SORT_3 var_150 = var_150_arg_0 >> 5; [L353] SORT_1 var_151_arg_0 = state_113; [L354] SORT_3 var_151 = var_151_arg_0 >> 2; [L355] SORT_3 var_152_arg_0 = var_150; [L356] SORT_3 var_152_arg_1 = var_151; [L357] SORT_3 var_152 = var_152_arg_0 & var_152_arg_1; [L358] SORT_1 var_153_arg_0 = state_113; [L359] SORT_3 var_153 = var_153_arg_0 >> 0; [L360] SORT_3 var_154_arg_0 = var_153; [L361] SORT_3 var_154 = ~var_154_arg_0; [L362] SORT_3 var_155_arg_0 = var_152; [L363] SORT_3 var_155_arg_1 = var_154; [L364] SORT_3 var_155 = var_155_arg_0 & var_155_arg_1; [L365] SORT_3 var_156_arg_0 = state_115; [L366] SORT_3 var_156_arg_1 = var_155; [L367] SORT_3 var_156_arg_2 = state_78; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L368] EXPR var_156_arg_0 ? var_156_arg_1 : var_156_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156_arg_0=0, var_156_arg_0 ? var_156_arg_1 : var_156_arg_2=0, var_156_arg_1=0, var_156_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L368] SORT_3 var_156 = var_156_arg_0 ? var_156_arg_1 : var_156_arg_2; [L369] var_156 = var_156 & mask_SORT_3 [L370] SORT_3 next_157_arg_1 = var_156; [L371] SORT_3 next_158_arg_1 = input_4; [L372] SORT_3 next_159_arg_1 = input_17; [L373] SORT_3 var_160_arg_0 = state_119; [L374] SORT_6 var_160_arg_1 = state_31; [L375] SORT_6 var_160_arg_2 = state_95; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L376] EXPR var_160_arg_0 ? var_160_arg_1 : var_160_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, state_113=0, state_115=0, state_119=0, state_22=0, state_29=0, state_31=0, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160_arg_0=0, var_160_arg_0 ? var_160_arg_1 : var_160_arg_2=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L376] SORT_6 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L377] SORT_6 next_161_arg_1 = var_160; [L378] SORT_1 next_162_arg_1 = input_2; [L379] SORT_3 next_163_arg_1 = input_14; [L380] SORT_3 next_164_arg_1 = input_16; [L382] state_22 = next_138_arg_1 [L383] state_29 = next_139_arg_1 [L384] state_31 = next_140_arg_1 [L385] state_39 = next_142_arg_1 [L386] state_44 = next_143_arg_1 [L387] state_48 = next_145_arg_1 [L388] state_57 = next_146_arg_1 [L389] state_61 = next_147_arg_1 [L390] state_65 = next_148_arg_1 [L391] state_74 = next_149_arg_1 [L392] state_78 = next_157_arg_1 [L393] state_82 = next_158_arg_1 [L394] state_86 = next_159_arg_1 [L395] state_95 = next_161_arg_1 [L396] state_113 = next_162_arg_1 [L397] state_115 = next_163_arg_1 [L398] state_119 = next_164_arg_1 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=31, input_117=14, input_12=7, input_121=5, input_123=8, input_125=12, input_128=4, input_13=6, input_130=13, input_133=15, input_135=11, input_14=0, input_15=10, input_16=0, input_17=0, input_18=0, input_19=0, input_2=15, input_20=9, input_4=0, input_5=0, input_7=6, input_8=0, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=0, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=1, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=1, var_52_arg_0=0, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=1, var_69_arg_0=0, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=1, var_90_arg_0=0, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L130] input_2 = __VERIFIER_nondet_uchar() [L131] input_4 = __VERIFIER_nondet_uchar() [L132] input_4 = input_4 & mask_SORT_3 [L133] input_5 = __VERIFIER_nondet_uchar() [L134] input_5 = input_5 & mask_SORT_1 [L135] input_7 = __VERIFIER_nondet_uint() [L136] input_8 = __VERIFIER_nondet_uchar() [L137] input_8 = input_8 & mask_SORT_3 [L138] input_9 = __VERIFIER_nondet_uint() [L139] input_10 = __VERIFIER_nondet_uchar() [L140] input_10 = input_10 & mask_SORT_1 [L141] input_11 = __VERIFIER_nondet_uchar() [L142] input_11 = input_11 & mask_SORT_1 [L143] input_12 = __VERIFIER_nondet_uchar() [L144] input_13 = __VERIFIER_nondet_uchar() [L145] input_14 = __VERIFIER_nondet_uchar() [L146] input_14 = input_14 & mask_SORT_3 [L147] input_15 = __VERIFIER_nondet_uchar() [L148] input_16 = __VERIFIER_nondet_uchar() [L149] input_16 = input_16 & mask_SORT_3 [L150] input_17 = __VERIFIER_nondet_uchar() [L151] input_17 = input_17 & mask_SORT_3 [L152] input_18 = __VERIFIER_nondet_uchar() [L153] input_18 = input_18 & mask_SORT_3 [L154] input_19 = __VERIFIER_nondet_uchar() [L155] input_19 = input_19 & mask_SORT_3 [L156] input_20 = __VERIFIER_nondet_uchar() [L157] input_117 = __VERIFIER_nondet_uchar() [L158] input_121 = __VERIFIER_nondet_uchar() [L159] input_123 = __VERIFIER_nondet_uchar() [L160] input_125 = __VERIFIER_nondet_uchar() [L161] input_128 = __VERIFIER_nondet_uchar() [L162] input_130 = __VERIFIER_nondet_uchar() [L163] input_133 = __VERIFIER_nondet_uint() [L164] input_135 = __VERIFIER_nondet_uchar() [L167] SORT_1 var_25_arg_0 = state_22; [L168] SORT_24 var_25 = var_25_arg_0 >> 0; [L169] var_25 = var_25 & mask_SORT_24 [L170] SORT_24 var_27_arg_0 = var_25; [L171] SORT_24 var_27_arg_1 = var_26; [L172] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L173] SORT_24 var_102_arg_0 = var_25; [L174] SORT_24 var_102_arg_1 = var_26; [L175] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L176] SORT_1 var_36_arg_0 = state_22; [L177] SORT_3 var_36 = var_36_arg_0 >> 5; [L178] var_36 = var_36 & mask_SORT_3 [L179] SORT_3 var_73_arg_0 = var_36; [L180] SORT_3 var_73_arg_1 = var_37; [L181] SORT_3 var_73 = var_73_arg_0 == var_73_arg_1; [L182] SORT_1 var_76_arg_0 = state_22; [L183] SORT_1 var_76_arg_1 = state_74; [L184] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L185] SORT_3 var_77_arg_0 = var_73; [L186] SORT_3 var_77_arg_1 = var_76; [L187] SORT_3 var_77 = var_77_arg_0 & var_77_arg_1; [L188] SORT_3 var_80_arg_0 = state_78; [L189] SORT_3 var_80_arg_1 = var_37; [L190] SORT_3 var_80 = var_80_arg_0 != var_80_arg_1; [L191] SORT_3 var_81_arg_0 = var_77; [L192] SORT_3 var_81_arg_1 = var_80; [L193] SORT_3 var_81 = var_81_arg_0 & var_81_arg_1; [L194] SORT_3 var_84_arg_0 = state_82; [L195] SORT_3 var_84_arg_1 = var_37; [L196] SORT_3 var_84 = var_84_arg_0 == var_84_arg_1; [L197] SORT_3 var_85_arg_0 = var_81; [L198] SORT_3 var_85_arg_1 = var_84; [L199] SORT_3 var_85 = var_85_arg_0 & var_85_arg_1; [L200] SORT_3 var_88_arg_0 = state_86; [L201] SORT_3 var_88_arg_1 = var_37; [L202] SORT_3 var_88 = var_88_arg_0 == var_88_arg_1; [L203] SORT_3 var_89_arg_0 = var_85; [L204] SORT_3 var_89_arg_1 = var_88; [L205] SORT_3 var_89 = var_89_arg_0 & var_89_arg_1; [L206] SORT_24 var_90_arg_0 = var_25; [L207] SORT_24 var_90_arg_1 = var_26; [L208] SORT_3 var_90 = var_90_arg_0 != var_90_arg_1; [L209] SORT_3 var_91_arg_0 = var_89; [L210] SORT_3 var_91_arg_1 = var_90; [L211] SORT_3 var_91 = var_91_arg_0 & var_91_arg_1; [L212] var_91 = var_91 & mask_SORT_3 [L213] SORT_3 var_56_arg_0 = var_36; [L214] SORT_3 var_56_arg_1 = var_37; [L215] SORT_3 var_56 = var_56_arg_0 == var_56_arg_1; [L216] SORT_1 var_59_arg_0 = state_22; [L217] SORT_1 var_59_arg_1 = state_57; [L218] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L219] SORT_3 var_60_arg_0 = var_56; [L220] SORT_3 var_60_arg_1 = var_59; [L221] SORT_3 var_60 = var_60_arg_0 & var_60_arg_1; [L222] SORT_3 var_63_arg_0 = state_61; [L223] SORT_3 var_63_arg_1 = var_37; [L224] SORT_3 var_63 = var_63_arg_0 == var_63_arg_1; [L225] SORT_3 var_64_arg_0 = var_60; [L226] SORT_3 var_64_arg_1 = var_63; [L227] SORT_3 var_64 = var_64_arg_0 & var_64_arg_1; [L228] SORT_3 var_67_arg_0 = state_65; [L229] SORT_3 var_67_arg_1 = var_37; [L230] SORT_3 var_67 = var_67_arg_0 == var_67_arg_1; [L231] SORT_3 var_68_arg_0 = var_64; [L232] SORT_3 var_68_arg_1 = var_67; [L233] SORT_3 var_68 = var_68_arg_0 & var_68_arg_1; [L234] SORT_24 var_69_arg_0 = var_25; [L235] SORT_24 var_69_arg_1 = var_26; [L236] SORT_3 var_69 = var_69_arg_0 != var_69_arg_1; [L237] SORT_3 var_70_arg_0 = var_68; [L238] SORT_3 var_70_arg_1 = var_69; [L239] SORT_3 var_70 = var_70_arg_0 & var_70_arg_1; [L240] var_70 = var_70 & mask_SORT_3 [L241] SORT_3 var_38_arg_0 = var_36; [L242] SORT_3 var_38_arg_1 = var_37; [L243] SORT_3 var_38 = var_38_arg_0 == var_38_arg_1; [L244] SORT_1 var_41_arg_0 = state_22; [L245] SORT_1 var_41_arg_1 = state_39; [L246] SORT_3 var_41 = var_41_arg_0 == var_41_arg_1; [L247] SORT_3 var_42_arg_0 = var_38; [L248] SORT_3 var_42_arg_1 = var_41; [L249] SORT_3 var_42 = var_42_arg_0 & var_42_arg_1; [L250] SORT_3 var_46_arg_0 = state_44; [L251] SORT_3 var_46_arg_1 = var_37; [L252] SORT_3 var_46 = var_46_arg_0 == var_46_arg_1; [L253] SORT_3 var_47_arg_0 = var_42; [L254] SORT_3 var_47_arg_1 = var_46; [L255] SORT_3 var_47 = var_47_arg_0 & var_47_arg_1; [L256] SORT_3 var_50_arg_0 = state_48; [L257] SORT_3 var_50_arg_1 = var_37; [L258] SORT_3 var_50 = var_50_arg_0 == var_50_arg_1; [L259] SORT_3 var_51_arg_0 = var_47; [L260] SORT_3 var_51_arg_1 = var_50; [L261] SORT_3 var_51 = var_51_arg_0 & var_51_arg_1; [L262] SORT_24 var_52_arg_0 = var_25; [L263] SORT_24 var_52_arg_1 = var_26; [L264] SORT_3 var_52 = var_52_arg_0 != var_52_arg_1; [L265] SORT_3 var_53_arg_0 = var_51; [L266] SORT_3 var_53_arg_1 = var_52; [L267] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L268] var_53 = var_53 & mask_SORT_3 [L269] SORT_3 var_54_arg_0 = var_53; [L270] SORT_33 var_54_arg_1 = var_35; [L271] SORT_33 var_54_arg_2 = var_34; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L272] EXPR var_54_arg_0 ? var_54_arg_1 : var_54_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_0 ? var_54_arg_1 : var_54_arg_2=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L272] SORT_33 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L273] SORT_3 var_71_arg_0 = var_70; [L274] SORT_33 var_71_arg_1 = var_55; [L275] SORT_33 var_71_arg_2 = var_54; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L276] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L276] SORT_33 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L277] SORT_3 var_92_arg_0 = var_91; [L278] SORT_33 var_92_arg_1 = var_72; [L279] SORT_33 var_92_arg_2 = var_71; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L280] EXPR var_92_arg_0 ? var_92_arg_1 : var_92_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_0 ? var_92_arg_1 : var_92_arg_2=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L280] SORT_33 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L281] var_92 = var_92 & mask_SORT_33 [L282] SORT_33 var_99_arg_0 = var_92; [L283] SORT_33 var_99_arg_1 = var_35; [L284] SORT_3 var_99 = var_99_arg_0 == var_99_arg_1; [L285] SORT_33 var_97_arg_0 = var_92; [L286] SORT_33 var_97_arg_1 = var_34; [L287] SORT_3 var_97 = var_97_arg_0 == var_97_arg_1; [L288] SORT_3 var_100_arg_0 = var_99; [L289] SORT_3 var_100_arg_1 = var_97; [L290] SORT_3 var_100 = var_100_arg_0 | var_100_arg_1; [L291] var_100 = var_100 & mask_SORT_3 [L292] SORT_3 var_98_arg_0 = var_97; [L293] SORT_6 var_98_arg_1 = var_28; [L294] SORT_6 var_98_arg_2 = state_95; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L295] EXPR var_98_arg_0 ? var_98_arg_1 : var_98_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=0, var_94_arg_2=0, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_0 ? var_98_arg_1 : var_98_arg_2=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L295] SORT_6 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L296] SORT_33 var_93_arg_0 = var_92; [L297] SORT_33 var_93_arg_1 = var_55; [L298] SORT_3 var_93 = var_93_arg_0 == var_93_arg_1; [L299] SORT_3 var_94_arg_0 = var_93; [L300] SORT_6 var_94_arg_1 = state_31; [L301] SORT_6 var_94_arg_2 = state_29; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_1=13, var_94_arg_2=6, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L302] EXPR var_94_arg_0 ? var_94_arg_1 : var_94_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=0, var_94_arg_0=0, var_94_arg_0 ? var_94_arg_1 : var_94_arg_2=6, var_94_arg_1=13, var_94_arg_2=6, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L302] SORT_6 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L303] SORT_3 var_101_arg_0 = var_100; [L304] SORT_6 var_101_arg_1 = var_98; [L305] SORT_6 var_101_arg_2 = var_94; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=6, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=6, var_94_arg_0=0, var_94_arg_1=13, var_94_arg_2=6, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L306] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_0 ? var_101_arg_1 : var_101_arg_2=0, var_101_arg_1=0, var_101_arg_2=6, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=6, var_94_arg_0=0, var_94_arg_1=13, var_94_arg_2=6, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L306] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L307] SORT_3 var_103_arg_0 = var_102; [L308] SORT_6 var_103_arg_1 = var_28; [L309] SORT_6 var_103_arg_2 = var_101; VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=6, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=1, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=6, var_94_arg_0=0, var_94_arg_1=13, var_94_arg_2=6, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L310] EXPR var_103_arg_0 ? var_103_arg_1 : var_103_arg_2 VAL [bad_112_arg_0=0, init_114_arg_1=0, init_116_arg_1=0, init_120_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_40_arg_1=0, init_45_arg_1=0, init_49_arg_1=0, init_58_arg_1=0, init_62_arg_1=0, init_66_arg_1=0, init_75_arg_1=0, init_79_arg_1=0, init_83_arg_1=0, init_87_arg_1=0, init_96_arg_1=0, input_10=0, input_11=0, input_117=25, input_12=26, input_121=20, input_123=28, input_125=23, input_128=17, input_13=21, input_130=24, input_133=28, input_135=22, input_14=0, input_15=19, input_16=0, input_17=0, input_18=0, input_19=0, input_2=27, input_20=18, input_4=0, input_5=0, input_7=25, input_8=0, input_9=24, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_138_arg_1=31, next_139_arg_1=6, next_140_arg_1=13, next_142_arg_1=0, next_143_arg_1=0, next_145_arg_1=0, next_146_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_157_arg_1=0, next_158_arg_1=0, next_159_arg_1=0, next_161_arg_1=0, next_162_arg_1=15, next_163_arg_1=0, next_164_arg_1=0, state_113=15, state_115=0, state_119=0, state_22=31, state_29=6, state_31=13, state_39=0, state_44=0, state_48=0, state_57=0, state_61=0, state_65=0, state_74=0, state_78=0, state_82=0, state_86=0, state_95=0, var_100=1, var_100_arg_0=0, var_100_arg_1=1, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=6, var_102=1, var_102_arg_0=31, var_102_arg_1=31, var_103=0, var_103_arg_0=1, var_103_arg_0 ? var_103_arg_1 : var_103_arg_2=0, var_103_arg_1=0, var_103_arg_2=0, var_104=0, var_104_arg_0=0, var_105=1, var_105_arg_0=0, var_105_arg_1=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=255, var_107_arg_0=0, var_110=0, var_110_arg_0=255, var_111=0, var_111_arg_0=1, var_111_arg_1=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_141_arg_2=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_144_arg_2=0, var_150=0, var_150_arg_0=0, var_151=0, var_151_arg_0=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_154=255, var_154_arg_0=0, var_155=0, var_155_arg_0=0, var_155_arg_1=255, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_160_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_36=0, var_36_arg_0=31, var_37=1, var_38=0, var_38_arg_0=0, var_38_arg_1=1, var_41=0, var_41_arg_0=31, var_41_arg_1=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_46_arg_0=0, var_46_arg_1=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=31, var_52_arg_1=31, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=1, var_54_arg_2=0, var_55=2, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_59=0, var_59_arg_0=31, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_69=0, var_69_arg_0=31, var_69_arg_1=31, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=0, var_71_arg_1=2, var_71_arg_2=0, var_72=3, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_76=0, var_76_arg_0=31, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=0, var_80=1, var_80_arg_0=0, var_80_arg_1=1, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_85=0, var_85_arg_0=0, var_85_arg_1=0, var_88=0, var_88_arg_0=0, var_88_arg_1=1, var_89=0, var_89_arg_0=0, var_89_arg_1=0, var_90=0, var_90_arg_0=31, var_90_arg_1=31, var_91=0, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_92_arg_0=0, var_92_arg_1=3, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_93_arg_1=2, var_94=6, var_94_arg_0=0, var_94_arg_1=13, var_94_arg_2=6, var_97=1, var_97_arg_0=0, var_97_arg_1=0, var_98=0, var_98_arg_0=1, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L310] SORT_6 var_103 = var_103_arg_0 ? var_103_arg_1 : var_103_arg_2; [L311] SORT_6 var_104_arg_0 = var_103; [L312] SORT_1 var_104 = var_104_arg_0 >> 26; [L313] var_104 = var_104 & mask_SORT_1 [L314] SORT_1 var_105_arg_0 = var_104; [L315] SORT_1 var_105_arg_1 = var_21; [L316] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L317] SORT_3 var_106_arg_0 = var_27; [L318] SORT_3 var_106_arg_1 = var_105; [L319] SORT_3 var_106 = var_106_arg_0 & var_106_arg_1; [L320] SORT_3 var_107_arg_0 = var_106; [L321] SORT_3 var_107 = ~var_107_arg_0; [L322] SORT_3 var_110_arg_0 = var_107; [L323] SORT_3 var_110 = ~var_110_arg_0; [L324] SORT_3 var_111_arg_0 = var_37; [L325] SORT_3 var_111_arg_1 = var_110; [L326] SORT_3 var_111 = var_111_arg_0 & var_111_arg_1; [L327] var_111 = var_111 & mask_SORT_3 [L328] SORT_3 bad_112_arg_0 = var_111; [L329] CALL __VERIFIER_assert(!(bad_112_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 33 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 17.3s, OverallIterations: 18, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 2192 SdHoareTripleChecker+Valid, 1.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 2192 mSDsluCounter, 3624 SdHoareTripleChecker+Invalid, 1.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 126 IncrementalHoareTripleChecker+Unchecked, 2708 mSDsCounter, 62 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 694 IncrementalHoareTripleChecker+Invalid, 882 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 62 mSolverCounterUnsat, 916 mSDtfsCounter, 694 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1017 GetRequests, 842 SyntacticMatches, 0 SemanticMatches, 175 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 414 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=142occurred in iteration=16, InterpolantAutomatonStates: 148, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 17 MinimizatonAttempts, 1200 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.0s SsaConstructionTime, 1.9s SatisfiabilityAnalysisTime, 5.1s InterpolantComputationTime, 642 NumberOfCodeBlocks, 642 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 925 ConstructedInterpolants, 70 QuantifiedInterpolants, 7073 SizeOfPredicates, 230 NumberOfNonLiveVariables, 7221 ConjunctsInSsa, 246 ConjunctsInUnsatCore, 25 InterpolantComputations, 13 PerfectInterpolantSequences, 243/304 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-02 21:12:51,417 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c1c8e354-f841-46fa-be7c-2ee2d203a005/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE