./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-02 20:07:54,005 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-02 20:07:54,007 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-02 20:07:54,055 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-02 20:07:54,056 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-02 20:07:54,057 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-02 20:07:54,059 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-02 20:07:54,061 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-02 20:07:54,062 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-02 20:07:54,063 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-02 20:07:54,065 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-02 20:07:54,066 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-02 20:07:54,066 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-02 20:07:54,067 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-02 20:07:54,069 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-02 20:07:54,070 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-02 20:07:54,071 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-02 20:07:54,073 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-02 20:07:54,075 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-02 20:07:54,077 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-02 20:07:54,086 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-02 20:07:54,092 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-02 20:07:54,096 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-02 20:07:54,097 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-02 20:07:54,103 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-02 20:07:54,110 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-02 20:07:54,110 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-02 20:07:54,111 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-02 20:07:54,113 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-02 20:07:54,114 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-02 20:07:54,115 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-02 20:07:54,116 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-02 20:07:54,117 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-02 20:07:54,120 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-02 20:07:54,121 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-02 20:07:54,121 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-02 20:07:54,122 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-02 20:07:54,123 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-02 20:07:54,123 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-02 20:07:54,125 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-02 20:07:54,126 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-02 20:07:54,128 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-11-02 20:07:54,159 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-02 20:07:54,160 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-02 20:07:54,160 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-02 20:07:54,160 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-02 20:07:54,161 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-02 20:07:54,161 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-02 20:07:54,162 INFO L138 SettingsManager]: * Use SBE=true [2022-11-02 20:07:54,162 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-02 20:07:54,162 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-02 20:07:54,162 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-02 20:07:54,162 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-02 20:07:54,163 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-02 20:07:54,163 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-02 20:07:54,163 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-02 20:07:54,163 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-02 20:07:54,164 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-02 20:07:54,164 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-02 20:07:54,164 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-02 20:07:54,164 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-02 20:07:54,164 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-02 20:07:54,164 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-02 20:07:54,165 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-02 20:07:54,165 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-02 20:07:54,166 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-02 20:07:54,166 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-02 20:07:54,167 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-02 20:07:54,167 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-02 20:07:54,168 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-02 20:07:54,169 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-02 20:07:54,169 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2022-11-02 20:07:54,518 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-02 20:07:54,550 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-02 20:07:54,554 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-02 20:07:54,555 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-02 20:07:54,557 INFO L275 PluginConnector]: CDTParser initialized [2022-11-02 20:07:54,559 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2022-11-02 20:07:54,663 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/data/d699f81eb/ef05be9d1f594459aa7eb5b42e25f8a2/FLAG246991347 [2022-11-02 20:07:55,287 INFO L306 CDTParser]: Found 1 translation units. [2022-11-02 20:07:55,288 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2022-11-02 20:07:55,299 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/data/d699f81eb/ef05be9d1f594459aa7eb5b42e25f8a2/FLAG246991347 [2022-11-02 20:07:55,528 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/data/d699f81eb/ef05be9d1f594459aa7eb5b42e25f8a2 [2022-11-02 20:07:55,531 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-02 20:07:55,532 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-02 20:07:55,534 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-02 20:07:55,535 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-02 20:07:55,538 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-02 20:07:55,539 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:07:55" (1/1) ... [2022-11-02 20:07:55,541 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42a9ad35 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:55, skipping insertion in model container [2022-11-02 20:07:55,541 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 08:07:55" (1/1) ... [2022-11-02 20:07:55,549 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-02 20:07:55,578 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-02 20:07:55,908 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 20:07:55,921 INFO L203 MainTranslator]: Completed pre-run [2022-11-02 20:07:56,003 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 20:07:56,040 INFO L208 MainTranslator]: Completed translation [2022-11-02 20:07:56,041 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56 WrapperNode [2022-11-02 20:07:56,041 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-02 20:07:56,042 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-02 20:07:56,042 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-02 20:07:56,043 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-02 20:07:56,051 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,077 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,106 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 54 [2022-11-02 20:07:56,107 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-02 20:07:56,112 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-02 20:07:56,112 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-02 20:07:56,112 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-02 20:07:56,122 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,122 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,133 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,133 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,137 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,141 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,142 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,148 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,157 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-02 20:07:56,158 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-02 20:07:56,159 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-02 20:07:56,159 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-02 20:07:56,161 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (1/1) ... [2022-11-02 20:07:56,169 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:56,184 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:56,201 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:56,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-02 20:07:56,257 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-02 20:07:56,258 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-02 20:07:56,258 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-02 20:07:56,259 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-02 20:07:56,259 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-02 20:07:56,260 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-02 20:07:56,375 INFO L235 CfgBuilder]: Building ICFG [2022-11-02 20:07:56,377 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-02 20:07:56,604 INFO L276 CfgBuilder]: Performing block encoding [2022-11-02 20:07:56,611 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-02 20:07:56,611 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-02 20:07:56,614 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:07:56 BoogieIcfgContainer [2022-11-02 20:07:56,614 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-02 20:07:56,615 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-02 20:07:56,615 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-02 20:07:56,620 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-02 20:07:56,621 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:07:56,621 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 08:07:55" (1/3) ... [2022-11-02 20:07:56,622 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@57ede6d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:07:56, skipping insertion in model container [2022-11-02 20:07:56,622 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:07:56,623 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 08:07:56" (2/3) ... [2022-11-02 20:07:56,623 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@57ede6d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 08:07:56, skipping insertion in model container [2022-11-02 20:07:56,623 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 20:07:56,624 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 08:07:56" (3/3) ... [2022-11-02 20:07:56,625 INFO L332 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2022-11-02 20:07:56,733 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-02 20:07:56,734 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-02 20:07:56,734 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-02 20:07:56,734 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-02 20:07:56,734 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-02 20:07:56,734 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-02 20:07:56,734 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-02 20:07:56,735 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-02 20:07:56,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:56,763 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-02 20:07:56,764 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:07:56,764 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:07:56,771 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2022-11-02 20:07:56,771 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-02 20:07:56,771 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-02 20:07:56,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:56,773 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-02 20:07:56,773 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:07:56,773 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:07:56,774 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2022-11-02 20:07:56,774 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-02 20:07:56,784 INFO L748 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 10#L367true assume !(main_~length~0#1 < 1); 7#L367-2true call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4#L369true assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 5#L370-3true [2022-11-02 20:07:56,785 INFO L750 eck$LassoCheckResult]: Loop: 5#L370-3true assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12#L372true assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15#L370-2true main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5#L370-3true [2022-11-02 20:07:56,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:56,792 INFO L85 PathProgramCache]: Analyzing trace with hash 28695753, now seen corresponding path program 1 times [2022-11-02 20:07:56,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:56,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044868804] [2022-11-02 20:07:56,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:56,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:56,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:56,917 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:56,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:56,956 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:56,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:56,959 INFO L85 PathProgramCache]: Analyzing trace with hash 51737, now seen corresponding path program 1 times [2022-11-02 20:07:56,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:56,961 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961453721] [2022-11-02 20:07:56,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:56,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:57,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:57,000 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:57,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:57,016 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:57,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:57,018 INFO L85 PathProgramCache]: Analyzing trace with hash 176707665, now seen corresponding path program 1 times [2022-11-02 20:07:57,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:57,019 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545055950] [2022-11-02 20:07:57,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:57,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:57,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:57,051 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:57,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:57,077 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:57,598 INFO L210 LassoAnalysis]: Preferences: [2022-11-02 20:07:57,599 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-02 20:07:57,599 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-02 20:07:57,599 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-02 20:07:57,600 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-02 20:07:57,600 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:57,600 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-02 20:07:57,600 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-02 20:07:57,601 INFO L133 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2022-11-02 20:07:57,601 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-02 20:07:57,601 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-02 20:07:57,623 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,636 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,643 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,647 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,653 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,657 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,859 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,862 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,865 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,868 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,871 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:57,875 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:07:58,330 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-02 20:07:58,334 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-02 20:07:58,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,336 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,338 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,341 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-02 20:07:58,342 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,355 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,356 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:07:58,356 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,356 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,357 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,358 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:07:58,358 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:07:58,368 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,403 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,404 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,406 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,413 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-02 20:07:58,429 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,429 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,430 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,430 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,434 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 20:07:58,434 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 20:07:58,451 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,489 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,489 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,489 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,491 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,495 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-02 20:07:58,496 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,508 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,508 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:07:58,509 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,509 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,509 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,510 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:07:58,510 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:07:58,526 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,563 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,564 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,565 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,571 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-02 20:07:58,572 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,584 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,584 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:07:58,584 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,585 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,585 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,586 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:07:58,586 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:07:58,588 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,623 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,627 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,635 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,647 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,648 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:07:58,648 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,648 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,648 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,650 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:07:58,650 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:07:58,652 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-02 20:07:58,671 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,710 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,711 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,712 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,715 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-02 20:07:58,715 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,728 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,728 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:07:58,728 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,728 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,728 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,729 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:07:58,729 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:07:58,739 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,764 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2022-11-02 20:07:58,764 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,766 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-02 20:07:58,768 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,780 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,780 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,780 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,780 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,784 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 20:07:58,784 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 20:07:58,796 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,837 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,838 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,853 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-02 20:07:58,860 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,874 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,874 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,875 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,875 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,882 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 20:07:58,882 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 20:07:58,903 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:07:58,945 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:58,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:58,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:58,948 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:58,956 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:07:58,970 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-02 20:07:58,971 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:07:58,971 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:07:58,971 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:07:58,971 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:07:58,992 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 20:07:58,993 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 20:07:59,027 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-02 20:07:59,077 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-02 20:07:59,077 INFO L444 ModelExtractionUtils]: 6 out of 22 variables were initially zero. Simplification set additionally 13 variables to zero. [2022-11-02 20:07:59,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:07:59,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:07:59,080 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:07:59,088 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-02 20:07:59,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-02 20:07:59,121 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-02 20:07:59,121 INFO L513 LassoAnalysis]: Proved termination. [2022-11-02 20:07:59,122 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~length~0#1) = -1*ULTIMATE.start_main_~i~0#1 + 1*ULTIMATE.start_main_~length~0#1 Supporting invariants [] [2022-11-02 20:07:59,165 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-02 20:07:59,179 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2022-11-02 20:07:59,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:59,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:07:59,223 INFO L263 TraceCheckSpWp]: Trace formula consists of 30 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-02 20:07:59,225 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:07:59,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:07:59,250 INFO L263 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-02 20:07:59,250 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:07:59,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:07:59,313 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-02 20:07:59,315 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:59,371 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 35 states and 50 transitions. Complement of second has 7 states. [2022-11-02 20:07:59,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-02 20:07:59,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:59,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 33 transitions. [2022-11-02 20:07:59,381 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 5 letters. Loop has 3 letters. [2022-11-02 20:07:59,382 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 20:07:59,382 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 8 letters. Loop has 3 letters. [2022-11-02 20:07:59,382 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 20:07:59,382 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 5 letters. Loop has 6 letters. [2022-11-02 20:07:59,383 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 20:07:59,384 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 50 transitions. [2022-11-02 20:07:59,387 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:07:59,391 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 12 states and 17 transitions. [2022-11-02 20:07:59,392 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-11-02 20:07:59,392 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2022-11-02 20:07:59,393 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2022-11-02 20:07:59,393 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:07:59,393 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2022-11-02 20:07:59,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2022-11-02 20:07:59,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2022-11-02 20:07:59,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:59,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2022-11-02 20:07:59,422 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2022-11-02 20:07:59,422 INFO L428 stractBuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2022-11-02 20:07:59,422 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-02 20:07:59,423 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 17 transitions. [2022-11-02 20:07:59,423 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:07:59,423 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:07:59,424 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:07:59,424 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:07:59,424 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:07:59,424 INFO L748 eck$LassoCheckResult]: Stem: 112#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 113#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 120#L367 assume !(main_~length~0#1 < 1); 114#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 115#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 116#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 117#L370-4 main_~j~0#1 := 0; 118#L378-2 [2022-11-02 20:07:59,425 INFO L750 eck$LassoCheckResult]: Loop: 118#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 119#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 118#L378-2 [2022-11-02 20:07:59,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:59,425 INFO L85 PathProgramCache]: Analyzing trace with hash 1806815510, now seen corresponding path program 1 times [2022-11-02 20:07:59,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:59,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169744054] [2022-11-02 20:07:59,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:59,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:59,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:07:59,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:07:59,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:07:59,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169744054] [2022-11-02 20:07:59,553 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169744054] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:07:59,553 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 20:07:59,553 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-02 20:07:59,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464186944] [2022-11-02 20:07:59,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:07:59,556 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:07:59,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:59,558 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 1 times [2022-11-02 20:07:59,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:59,558 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363918236] [2022-11-02 20:07:59,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:59,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:59,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,583 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:59,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,598 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:59,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:07:59,672 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-02 20:07:59,672 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-02 20:07:59,674 INFO L87 Difference]: Start difference. First operand 12 states and 17 transitions. cyclomatic complexity: 7 Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:59,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:07:59,715 INFO L93 Difference]: Finished difference Result 14 states and 19 transitions. [2022-11-02 20:07:59,715 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 19 transitions. [2022-11-02 20:07:59,716 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:07:59,717 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 19 transitions. [2022-11-02 20:07:59,717 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2022-11-02 20:07:59,717 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2022-11-02 20:07:59,717 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 19 transitions. [2022-11-02 20:07:59,718 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 20:07:59,718 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 19 transitions. [2022-11-02 20:07:59,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 19 transitions. [2022-11-02 20:07:59,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2022-11-02 20:07:59,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:07:59,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2022-11-02 20:07:59,720 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 16 transitions. [2022-11-02 20:07:59,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-02 20:07:59,722 INFO L428 stractBuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2022-11-02 20:07:59,722 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-02 20:07:59,722 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2022-11-02 20:07:59,723 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:07:59,723 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:07:59,723 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:07:59,723 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:07:59,724 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:07:59,724 INFO L748 eck$LassoCheckResult]: Stem: 145#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 146#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 153#L367 assume !(main_~length~0#1 < 1); 147#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 148#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 149#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 154#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 156#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 155#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 150#L370-4 main_~j~0#1 := 0; 151#L378-2 [2022-11-02 20:07:59,724 INFO L750 eck$LassoCheckResult]: Loop: 151#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 152#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 151#L378-2 [2022-11-02 20:07:59,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:59,725 INFO L85 PathProgramCache]: Analyzing trace with hash -1982565540, now seen corresponding path program 1 times [2022-11-02 20:07:59,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:59,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450904301] [2022-11-02 20:07:59,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:59,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:59,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,744 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:59,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,763 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:59,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:59,764 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 2 times [2022-11-02 20:07:59,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:59,765 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023894263] [2022-11-02 20:07:59,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:59,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:59,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,773 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:59,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,781 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:59,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:07:59,782 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996831, now seen corresponding path program 1 times [2022-11-02 20:07:59,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:07:59,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14278162] [2022-11-02 20:07:59,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:07:59,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:07:59,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,865 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:07:59,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:07:59,896 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:07:59,902 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:00,269 INFO L210 LassoAnalysis]: Preferences: [2022-11-02 20:08:00,269 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-02 20:08:00,269 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-02 20:08:00,269 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-02 20:08:00,269 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-02 20:08:00,269 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:00,269 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-02 20:08:00,270 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-02 20:08:00,270 INFO L133 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2022-11-02 20:08:00,270 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-02 20:08:00,270 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-02 20:08:00,273 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,276 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,279 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,282 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,285 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,488 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,491 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,494 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,497 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,499 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,503 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 20:08:00,888 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-02 20:08:00,888 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-02 20:08:00,889 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:00,889 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:00,894 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:08:00,902 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:08:00,915 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-02 20:08:00,916 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:08:00,916 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:08:00,916 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:08:00,916 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:08:00,916 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:08:00,917 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:08:00,917 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:08:00,926 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:08:00,964 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:00,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:00,965 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:00,966 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:08:00,970 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:08:00,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-02 20:08:00,982 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:08:00,982 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:08:00,982 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:08:00,983 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:08:00,983 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:08:00,983 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:08:00,983 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:08:00,992 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:08:01,031 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:01,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:01,032 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:01,033 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:08:01,035 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-02 20:08:01,035 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:08:01,048 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:08:01,048 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:08:01,048 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:08:01,048 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:08:01,050 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 20:08:01,050 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 20:08:01,073 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:08:01,118 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:01,118 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:01,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:01,120 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:08:01,122 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:08:01,135 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-02 20:08:01,135 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:08:01,136 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 20:08:01,136 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:08:01,136 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:08:01,136 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:08:01,137 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 20:08:01,137 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 20:08:01,146 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 20:08:01,186 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:01,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:01,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:01,187 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:08:01,192 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 20:08:01,205 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 20:08:01,205 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 20:08:01,205 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 20:08:01,205 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 20:08:01,206 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-02 20:08:01,214 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 20:08:01,214 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 20:08:01,230 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-02 20:08:01,253 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2022-11-02 20:08:01,253 INFO L444 ModelExtractionUtils]: 17 out of 25 variables were initially zero. Simplification set additionally 5 variables to zero. [2022-11-02 20:08:01,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 20:08:01,253 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:01,255 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 20:08:01,280 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-02 20:08:01,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-02 20:08:01,304 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-02 20:08:01,304 INFO L513 LassoAnalysis]: Proved termination. [2022-11-02 20:08:01,304 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2022-11-02 20:08:01,338 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:01,347 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2022-11-02 20:08:01,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:01,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:01,380 INFO L263 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-02 20:08:01,381 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:01,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:01,408 INFO L263 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-02 20:08:01,408 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:01,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:01,425 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-02 20:08:01,425 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:01,450 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 16 states and 22 transitions. Complement of second has 5 states. [2022-11-02 20:08:01,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-11-02 20:08:01,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:01,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 14 transitions. [2022-11-02 20:08:01,453 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 14 transitions. Stem has 10 letters. Loop has 2 letters. [2022-11-02 20:08:01,453 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 20:08:01,453 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 14 transitions. Stem has 12 letters. Loop has 2 letters. [2022-11-02 20:08:01,453 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 20:08:01,453 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 14 transitions. Stem has 10 letters. Loop has 4 letters. [2022-11-02 20:08:01,454 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 20:08:01,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 22 transitions. [2022-11-02 20:08:01,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:01,459 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 22 transitions. [2022-11-02 20:08:01,459 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-02 20:08:01,459 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2022-11-02 20:08:01,460 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2022-11-02 20:08:01,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:01,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2022-11-02 20:08:01,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2022-11-02 20:08:01,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-11-02 20:08:01,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:01,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2022-11-02 20:08:01,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2022-11-02 20:08:01,466 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2022-11-02 20:08:01,466 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-02 20:08:01,467 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2022-11-02 20:08:01,471 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:01,471 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:01,471 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:01,473 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:01,473 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:01,474 INFO L748 eck$LassoCheckResult]: Stem: 241#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 242#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 252#L367 assume !(main_~length~0#1 < 1); 243#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 244#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 245#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 253#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 255#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 254#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 246#L370-4 main_~j~0#1 := 0; 247#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 248#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 249#L378-2 [2022-11-02 20:08:01,474 INFO L750 eck$LassoCheckResult]: Loop: 249#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 256#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 249#L378-2 [2022-11-02 20:08:01,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:01,475 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996833, now seen corresponding path program 1 times [2022-11-02 20:08:01,475 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:01,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223910850] [2022-11-02 20:08:01,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:01,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:01,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:02,113 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:02,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:02,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223910850] [2022-11-02 20:08:02,114 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1223910850] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:02,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1713807047] [2022-11-02 20:08:02,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:02,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:02,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:02,117 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:02,118 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-02 20:08:02,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:02,216 INFO L263 TraceCheckSpWp]: Trace formula consists of 59 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-02 20:08:02,219 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:02,264 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-02 20:08:02,341 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2022-11-02 20:08:02,352 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:02,353 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:08:02,469 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2022-11-02 20:08:02,476 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2022-11-02 20:08:02,499 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:02,499 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1713807047] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:08:02,499 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:08:02,500 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-11-02 20:08:02,500 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491640654] [2022-11-02 20:08:02,500 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:08:02,500 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:08:02,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:02,501 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 3 times [2022-11-02 20:08:02,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:02,505 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525031271] [2022-11-02 20:08:02,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:02,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:02,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:02,514 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:08:02,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:02,522 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:08:02,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:08:02,589 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-02 20:08:02,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-11-02 20:08:02,590 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 9 Second operand has 15 states, 14 states have (on average 1.7857142857142858) internal successors, (25), 15 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:02,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:08:02,786 INFO L93 Difference]: Finished difference Result 30 states and 41 transitions. [2022-11-02 20:08:02,786 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 41 transitions. [2022-11-02 20:08:02,786 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:08:02,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 40 transitions. [2022-11-02 20:08:02,787 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2022-11-02 20:08:02,787 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-11-02 20:08:02,787 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 40 transitions. [2022-11-02 20:08:02,787 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:02,788 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 40 transitions. [2022-11-02 20:08:02,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 40 transitions. [2022-11-02 20:08:02,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2022-11-02 20:08:02,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:02,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2022-11-02 20:08:02,790 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2022-11-02 20:08:02,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 20:08:02,791 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2022-11-02 20:08:02,791 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-02 20:08:02,791 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2022-11-02 20:08:02,792 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:02,792 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:02,792 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:02,793 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:02,793 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:02,793 INFO L748 eck$LassoCheckResult]: Stem: 377#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 378#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 388#L367 assume !(main_~length~0#1 < 1); 379#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 380#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 381#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 389#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 392#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 397#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 396#L370-4 main_~j~0#1 := 0; 395#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 386#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 387#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 384#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 385#L378-2 [2022-11-02 20:08:02,793 INFO L750 eck$LassoCheckResult]: Loop: 385#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 393#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 385#L378-2 [2022-11-02 20:08:02,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:02,794 INFO L85 PathProgramCache]: Analyzing trace with hash -645453020, now seen corresponding path program 1 times [2022-11-02 20:08:02,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:02,794 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612301327] [2022-11-02 20:08:02,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:02,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:02,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:02,908 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:02,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:02,909 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612301327] [2022-11-02 20:08:02,909 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [612301327] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:02,909 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [547231206] [2022-11-02 20:08:02,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:02,909 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:02,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:02,916 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:02,927 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-02 20:08:02,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-02 20:08:02,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:02,988 INFO L263 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-02 20:08:02,990 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:03,044 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:03,044 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:08:03,099 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:03,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [547231206] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:08:03,099 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:08:03,099 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2022-11-02 20:08:03,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079798928] [2022-11-02 20:08:03,100 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:08:03,101 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:08:03,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:03,101 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 4 times [2022-11-02 20:08:03,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:03,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312507305] [2022-11-02 20:08:03,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:03,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:03,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:03,108 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:08:03,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:03,118 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:08:03,169 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:08:03,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-02 20:08:03,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2022-11-02 20:08:03,171 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 13 Second operand has 11 states, 11 states have (on average 2.272727272727273) internal successors, (25), 11 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:03,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:08:03,301 INFO L93 Difference]: Finished difference Result 48 states and 64 transitions. [2022-11-02 20:08:03,302 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 64 transitions. [2022-11-02 20:08:03,303 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:08:03,303 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 43 states and 57 transitions. [2022-11-02 20:08:03,303 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2022-11-02 20:08:03,304 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2022-11-02 20:08:03,304 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 57 transitions. [2022-11-02 20:08:03,304 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:03,304 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 57 transitions. [2022-11-02 20:08:03,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 57 transitions. [2022-11-02 20:08:03,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 37. [2022-11-02 20:08:03,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3513513513513513) internal successors, (50), 36 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:03,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 50 transitions. [2022-11-02 20:08:03,308 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 50 transitions. [2022-11-02 20:08:03,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 20:08:03,309 INFO L428 stractBuchiCegarLoop]: Abstraction has 37 states and 50 transitions. [2022-11-02 20:08:03,309 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-02 20:08:03,309 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 50 transitions. [2022-11-02 20:08:03,310 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:08:03,310 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:03,310 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:03,311 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:03,311 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:03,311 INFO L748 eck$LassoCheckResult]: Stem: 549#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 550#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 560#L367 assume main_~length~0#1 < 1;main_~length~0#1 := 1; 551#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 552#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 580#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 578#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 576#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 577#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 575#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 574#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 572#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 555#L370-4 main_~j~0#1 := 0; 556#L378-2 [2022-11-02 20:08:03,311 INFO L750 eck$LassoCheckResult]: Loop: 556#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 557#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 556#L378-2 [2022-11-02 20:08:03,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:03,312 INFO L85 PathProgramCache]: Analyzing trace with hash 1080825110, now seen corresponding path program 1 times [2022-11-02 20:08:03,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:03,312 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570118138] [2022-11-02 20:08:03,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:03,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:03,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:03,366 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:03,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:03,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570118138] [2022-11-02 20:08:03,367 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [570118138] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:03,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1389737996] [2022-11-02 20:08:03,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:03,368 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:03,368 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:03,369 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:03,388 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-02 20:08:03,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:03,441 INFO L263 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-02 20:08:03,442 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:03,485 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:03,485 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-02 20:08:03,485 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1389737996] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 20:08:03,486 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-02 20:08:03,486 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2022-11-02 20:08:03,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141978043] [2022-11-02 20:08:03,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 20:08:03,492 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:08:03,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:03,493 INFO L85 PathProgramCache]: Analyzing trace with hash 2310, now seen corresponding path program 1 times [2022-11-02 20:08:03,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:03,493 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550671839] [2022-11-02 20:08:03,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:03,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:03,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:03,503 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:08:03,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:03,509 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:08:03,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:08:03,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-02 20:08:03,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-02 20:08:03,566 INFO L87 Difference]: Start difference. First operand 37 states and 50 transitions. cyclomatic complexity: 20 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:03,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:08:03,593 INFO L93 Difference]: Finished difference Result 30 states and 39 transitions. [2022-11-02 20:08:03,593 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 39 transitions. [2022-11-02 20:08:03,595 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:03,597 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 32 transitions. [2022-11-02 20:08:03,597 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2022-11-02 20:08:03,597 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2022-11-02 20:08:03,597 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 32 transitions. [2022-11-02 20:08:03,598 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:03,598 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2022-11-02 20:08:03,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 32 transitions. [2022-11-02 20:08:03,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-11-02 20:08:03,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:03,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2022-11-02 20:08:03,605 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2022-11-02 20:08:03,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-02 20:08:03,607 INFO L428 stractBuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2022-11-02 20:08:03,607 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-02 20:08:03,607 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2022-11-02 20:08:03,609 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:03,609 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:03,609 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:03,610 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:03,610 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:03,611 INFO L748 eck$LassoCheckResult]: Stem: 662#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 663#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 673#L367 assume !(main_~length~0#1 < 1); 664#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 665#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 666#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 674#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 683#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 675#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 676#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 677#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 684#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 682#L370-4 main_~j~0#1 := 0; 681#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 669#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 670#L378-2 [2022-11-02 20:08:03,611 INFO L750 eck$LassoCheckResult]: Loop: 670#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 679#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 670#L378-2 [2022-11-02 20:08:03,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:03,611 INFO L85 PathProgramCache]: Analyzing trace with hash -1295959587, now seen corresponding path program 1 times [2022-11-02 20:08:03,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:03,612 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49172364] [2022-11-02 20:08:03,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:03,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:03,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:04,107 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:04,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:04,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49172364] [2022-11-02 20:08:04,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [49172364] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:04,108 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1628863726] [2022-11-02 20:08:04,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:04,108 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:04,108 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:04,112 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:04,135 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-02 20:08:04,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:04,172 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-02 20:08:04,174 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:04,197 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:08:04,277 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:08:04,279 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-11-02 20:08:04,315 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:08:04,316 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-11-02 20:08:04,375 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2022-11-02 20:08:04,389 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:04,389 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:08:16,541 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_54| Int)) (or (forall ((v_ArrVal_88 Int)) (let ((.cse0 (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_54| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_88) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse0 (* 2 (div .cse0 2))))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_54|)))) is different from false [2022-11-02 20:08:16,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2022-11-02 20:08:16,640 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 138 [2022-11-02 20:08:16,718 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-02 20:08:16,719 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1628863726] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:08:16,719 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:08:16,719 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 18 [2022-11-02 20:08:16,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117200548] [2022-11-02 20:08:16,719 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:08:16,720 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:08:16,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:16,720 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 5 times [2022-11-02 20:08:16,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:16,720 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366672757] [2022-11-02 20:08:16,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:16,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:16,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:16,724 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:08:16,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:16,728 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:08:16,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:08:16,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-02 20:08:16,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=239, Unknown=1, NotChecked=32, Total=342 [2022-11-02 20:08:16,781 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 12 Second operand has 19 states, 18 states have (on average 1.8333333333333333) internal successors, (33), 19 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:28,832 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|))) (and (forall ((|v_ULTIMATE.start_main_~i~0#1_54| Int)) (or (forall ((v_ArrVal_88 Int)) (let ((.cse0 (select (store .cse1 (+ (* |v_ULTIMATE.start_main_~i~0#1_54| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_88) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse0 (* 2 (div .cse0 2))))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_54|)))) (= |c_ULTIMATE.start_main_~i~0#1| 0) (let ((.cse2 (select .cse1 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |c_ULTIMATE.start_main_~i~0#1| 4))))) (<= .cse2 (* (div .cse2 2) 2))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0))) is different from false [2022-11-02 20:08:40,872 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|))) (and (forall ((|v_ULTIMATE.start_main_~i~0#1_54| Int)) (or (forall ((v_ArrVal_88 Int)) (let ((.cse0 (select (store .cse1 (+ (* |v_ULTIMATE.start_main_~i~0#1_54| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_88) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse0 (* 2 (div .cse0 2))))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_54|)))) (let ((.cse2 (select .cse1 |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse2 (* 2 (div .cse2 2)))) (<= 1 |c_ULTIMATE.start_main_~i~0#1|) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0))) is different from false [2022-11-02 20:08:41,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:08:41,109 INFO L93 Difference]: Finished difference Result 42 states and 55 transitions. [2022-11-02 20:08:41,109 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 55 transitions. [2022-11-02 20:08:41,110 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2022-11-02 20:08:41,110 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 41 states and 54 transitions. [2022-11-02 20:08:41,110 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2022-11-02 20:08:41,110 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2022-11-02 20:08:41,111 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 54 transitions. [2022-11-02 20:08:41,111 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:41,111 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 54 transitions. [2022-11-02 20:08:41,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 54 transitions. [2022-11-02 20:08:41,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 26. [2022-11-02 20:08:41,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 25 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:41,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-11-02 20:08:41,113 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-11-02 20:08:41,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-02 20:08:41,117 INFO L428 stractBuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-11-02 20:08:41,117 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-02 20:08:41,117 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 35 transitions. [2022-11-02 20:08:41,118 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:41,118 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:41,118 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:41,120 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:41,120 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:41,120 INFO L748 eck$LassoCheckResult]: Stem: 846#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 847#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 857#L367 assume !(main_~length~0#1 < 1); 848#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 849#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 850#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 858#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 866#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 859#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 860#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 862#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 864#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 855#L370-4 main_~j~0#1 := 0; 856#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 853#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 854#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 851#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 852#L378-2 [2022-11-02 20:08:41,120 INFO L750 eck$LassoCheckResult]: Loop: 852#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 861#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 852#L378-2 [2022-11-02 20:08:41,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:41,121 INFO L85 PathProgramCache]: Analyzing trace with hash 123352160, now seen corresponding path program 1 times [2022-11-02 20:08:41,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:41,121 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202063647] [2022-11-02 20:08:41,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:41,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:41,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:41,446 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:41,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:41,446 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202063647] [2022-11-02 20:08:41,446 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [202063647] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:41,447 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1241424528] [2022-11-02 20:08:41,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:41,447 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:41,447 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:41,451 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:41,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-02 20:08:41,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:41,521 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-02 20:08:41,524 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:41,595 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-02 20:08:41,700 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-02 20:08:41,702 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:41,702 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:08:41,811 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2022-11-02 20:08:41,814 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2022-11-02 20:08:41,837 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:41,838 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1241424528] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:08:41,838 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:08:41,838 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7] total 18 [2022-11-02 20:08:41,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89899635] [2022-11-02 20:08:41,839 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:08:41,839 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:08:41,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:41,840 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 6 times [2022-11-02 20:08:41,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:41,840 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486906939] [2022-11-02 20:08:41,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:41,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:41,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:41,844 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:08:41,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:41,855 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:08:41,915 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:08:41,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-02 20:08:41,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2022-11-02 20:08:41,916 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. cyclomatic complexity: 13 Second operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 19 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:42,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:08:42,118 INFO L93 Difference]: Finished difference Result 41 states and 54 transitions. [2022-11-02 20:08:42,118 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 54 transitions. [2022-11-02 20:08:42,119 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:08:42,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 53 transitions. [2022-11-02 20:08:42,119 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2022-11-02 20:08:42,120 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2022-11-02 20:08:42,120 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 53 transitions. [2022-11-02 20:08:42,120 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:42,120 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 53 transitions. [2022-11-02 20:08:42,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 53 transitions. [2022-11-02 20:08:42,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 33. [2022-11-02 20:08:42,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.3333333333333333) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:42,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2022-11-02 20:08:42,122 INFO L240 hiAutomatonCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-02 20:08:42,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 20:08:42,128 INFO L428 stractBuchiCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-02 20:08:42,129 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-02 20:08:42,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 44 transitions. [2022-11-02 20:08:42,130 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:42,130 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:42,130 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:42,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:42,132 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:42,132 INFO L748 eck$LassoCheckResult]: Stem: 1035#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1036#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1046#L367 assume !(main_~length~0#1 < 1); 1037#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1038#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1039#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1047#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1061#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1048#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1049#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1053#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1054#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1044#L370-4 main_~j~0#1 := 0; 1045#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1042#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1043#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1040#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1041#L378-2 [2022-11-02 20:08:42,132 INFO L750 eck$LassoCheckResult]: Loop: 1041#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1055#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1041#L378-2 [2022-11-02 20:08:42,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:42,133 INFO L85 PathProgramCache]: Analyzing trace with hash -685994466, now seen corresponding path program 2 times [2022-11-02 20:08:42,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:42,134 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997526634] [2022-11-02 20:08:42,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:42,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:42,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:42,479 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:42,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:42,479 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997526634] [2022-11-02 20:08:42,480 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [997526634] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:42,480 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1567794227] [2022-11-02 20:08:42,480 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 20:08:42,480 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:42,480 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:42,487 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:42,511 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-02 20:08:42,560 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 20:08:42,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:08:42,562 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-02 20:08:42,563 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:42,586 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:08:42,702 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2022-11-02 20:08:42,705 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:42,705 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:08:42,798 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2022-11-02 20:08:42,801 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2022-11-02 20:08:42,819 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:42,819 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1567794227] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:08:42,819 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:08:42,820 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 13 [2022-11-02 20:08:42,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934185551] [2022-11-02 20:08:42,820 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:08:42,820 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:08:42,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:42,821 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 7 times [2022-11-02 20:08:42,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:42,821 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [223089785] [2022-11-02 20:08:42,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:42,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:42,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:42,825 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:08:42,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:08:42,829 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:08:42,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:08:42,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-02 20:08:42,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2022-11-02 20:08:42,880 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. cyclomatic complexity: 15 Second operand has 14 states, 13 states have (on average 2.076923076923077) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:43,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:08:43,143 INFO L93 Difference]: Finished difference Result 45 states and 58 transitions. [2022-11-02 20:08:43,143 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 58 transitions. [2022-11-02 20:08:43,143 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:08:43,144 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 57 transitions. [2022-11-02 20:08:43,144 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-02 20:08:43,144 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-02 20:08:43,144 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 57 transitions. [2022-11-02 20:08:43,144 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:08:43,144 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 57 transitions. [2022-11-02 20:08:43,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 57 transitions. [2022-11-02 20:08:43,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 33. [2022-11-02 20:08:43,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.3333333333333333) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:08:43,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2022-11-02 20:08:43,147 INFO L240 hiAutomatonCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-02 20:08:43,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-02 20:08:43,150 INFO L428 stractBuchiCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-02 20:08:43,150 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-02 20:08:43,150 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 44 transitions. [2022-11-02 20:08:43,150 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:08:43,151 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:08:43,151 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:08:43,151 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:08:43,151 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:08:43,151 INFO L748 eck$LassoCheckResult]: Stem: 1230#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1231#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1241#L367 assume !(main_~length~0#1 < 1); 1232#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1233#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1234#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1242#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1262#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1261#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1259#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1260#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1243#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1245#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1248#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1249#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1239#L370-4 main_~j~0#1 := 0; 1240#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1235#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1236#L378-2 [2022-11-02 20:08:43,152 INFO L750 eck$LassoCheckResult]: Loop: 1236#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1250#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1236#L378-2 [2022-11-02 20:08:43,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:08:43,152 INFO L85 PathProgramCache]: Analyzing trace with hash 1119422815, now seen corresponding path program 2 times [2022-11-02 20:08:43,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:08:43,152 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573995308] [2022-11-02 20:08:43,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:08:43,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:08:43,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:08:43,850 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:43,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:08:43,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573995308] [2022-11-02 20:08:43,851 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [573995308] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:08:43,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1932872404] [2022-11-02 20:08:43,851 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 20:08:43,851 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:08:43,852 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:08:43,855 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:08:43,881 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-02 20:08:43,923 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 20:08:43,923 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:08:43,924 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-02 20:08:43,927 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:08:43,957 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:08:44,037 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:08:44,038 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:08:44,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:08:44,067 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:08:44,109 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:08:44,110 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:08:44,187 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-02 20:08:44,190 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-02 20:08:44,191 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 12 [2022-11-02 20:08:44,207 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:08:44,207 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:10:22,002 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2022-11-02 20:10:22,014 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 178 treesize of output 166 [2022-11-02 20:10:22,116 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 20:10:22,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1932872404] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:10:22,117 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:10:22,117 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 9] total 26 [2022-11-02 20:10:22,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517235488] [2022-11-02 20:10:22,117 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:10:22,118 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:10:22,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:22,119 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 8 times [2022-11-02 20:10:22,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:22,119 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117201977] [2022-11-02 20:10:22,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:22,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:22,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:22,124 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:10:22,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:22,129 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:10:22,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:10:22,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-02 20:10:22,205 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=554, Unknown=5, NotChecked=0, Total=702 [2022-11-02 20:10:22,205 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. cyclomatic complexity: 15 Second operand has 27 states, 26 states have (on average 1.8076923076923077) internal successors, (47), 27 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:22,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:10:22,518 INFO L93 Difference]: Finished difference Result 35 states and 45 transitions. [2022-11-02 20:10:22,518 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 45 transitions. [2022-11-02 20:10:22,519 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:10:22,520 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 44 transitions. [2022-11-02 20:10:22,520 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-02 20:10:22,520 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-11-02 20:10:22,520 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 44 transitions. [2022-11-02 20:10:22,521 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:10:22,521 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2022-11-02 20:10:22,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 44 transitions. [2022-11-02 20:10:22,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 29. [2022-11-02 20:10:22,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.3103448275862069) internal successors, (38), 28 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:22,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 38 transitions. [2022-11-02 20:10:22,524 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 38 transitions. [2022-11-02 20:10:22,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 20:10:22,525 INFO L428 stractBuchiCegarLoop]: Abstraction has 29 states and 38 transitions. [2022-11-02 20:10:22,525 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-02 20:10:22,525 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 38 transitions. [2022-11-02 20:10:22,526 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:10:22,526 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:10:22,526 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:10:22,527 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:10:22,527 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:10:22,527 INFO L748 eck$LassoCheckResult]: Stem: 1437#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1438#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1448#L367 assume !(main_~length~0#1 < 1); 1439#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1440#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1441#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1449#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1464#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1450#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1451#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1461#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1460#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1459#L370-4 main_~j~0#1 := 0; 1458#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1457#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1446#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1447#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1444#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1445#L378-2 [2022-11-02 20:10:22,527 INFO L750 eck$LassoCheckResult]: Loop: 1445#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1456#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1445#L378-2 [2022-11-02 20:10:22,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:22,528 INFO L85 PathProgramCache]: Analyzing trace with hash -1717659101, now seen corresponding path program 2 times [2022-11-02 20:10:22,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:22,528 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021769595] [2022-11-02 20:10:22,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:22,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:22,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:10:22,674 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:22,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:10:22,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021769595] [2022-11-02 20:10:22,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1021769595] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:10:22,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1707638313] [2022-11-02 20:10:22,675 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 20:10:22,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:10:22,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:10:22,681 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:10:22,690 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-02 20:10:22,784 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 20:10:22,784 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:10:22,786 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-02 20:10:22,787 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:10:22,898 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:22,898 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:10:22,984 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:22,985 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1707638313] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:10:22,985 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:10:22,985 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2022-11-02 20:10:22,985 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1444051749] [2022-11-02 20:10:22,985 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:10:22,986 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:10:22,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:22,986 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 9 times [2022-11-02 20:10:22,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:22,986 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626841737] [2022-11-02 20:10:22,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:22,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:22,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:22,990 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:10:22,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:23,000 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:10:23,076 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:10:23,076 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-02 20:10:23,076 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2022-11-02 20:10:23,077 INFO L87 Difference]: Start difference. First operand 29 states and 38 transitions. cyclomatic complexity: 13 Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:23,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:10:23,217 INFO L93 Difference]: Finished difference Result 41 states and 52 transitions. [2022-11-02 20:10:23,217 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 52 transitions. [2022-11-02 20:10:23,218 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:10:23,218 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 35 states and 45 transitions. [2022-11-02 20:10:23,219 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2022-11-02 20:10:23,219 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2022-11-02 20:10:23,219 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 45 transitions. [2022-11-02 20:10:23,219 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:10:23,219 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 45 transitions. [2022-11-02 20:10:23,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 45 transitions. [2022-11-02 20:10:23,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 31. [2022-11-02 20:10:23,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.2580645161290323) internal successors, (39), 30 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:23,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 39 transitions. [2022-11-02 20:10:23,221 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 39 transitions. [2022-11-02 20:10:23,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-02 20:10:23,223 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 39 transitions. [2022-11-02 20:10:23,223 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-02 20:10:23,223 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 39 transitions. [2022-11-02 20:10:23,224 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:10:23,224 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:10:23,224 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:10:23,225 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:10:23,225 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:10:23,225 INFO L748 eck$LassoCheckResult]: Stem: 1640#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1641#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1651#L367 assume !(main_~length~0#1 < 1); 1642#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1643#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1644#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1652#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1655#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1653#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1654#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1669#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1670#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1658#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1659#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1657#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1645#L370-4 main_~j~0#1 := 0; 1646#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1649#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1650#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1647#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1648#L378-2 [2022-11-02 20:10:23,225 INFO L750 eck$LassoCheckResult]: Loop: 1648#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1660#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1648#L378-2 [2022-11-02 20:10:23,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:23,226 INFO L85 PathProgramCache]: Analyzing trace with hash 2023500642, now seen corresponding path program 3 times [2022-11-02 20:10:23,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:23,226 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043416868] [2022-11-02 20:10:23,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:23,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:23,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:10:23,651 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:23,651 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:10:23,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043416868] [2022-11-02 20:10:23,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1043416868] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:10:23,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [715492083] [2022-11-02 20:10:23,652 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-02 20:10:23,652 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:10:23,652 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:10:23,659 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:10:23,667 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-02 20:10:23,752 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-02 20:10:23,753 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:10:23,754 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-02 20:10:23,756 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:10:23,788 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:10:23,895 INFO L356 Elim1Store]: treesize reduction 29, result has 27.5 percent of original size [2022-11-02 20:10:23,896 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-11-02 20:10:23,973 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-11-02 20:10:23,977 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:23,977 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:10:36,164 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_78| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_78|)) (forall ((v_ArrVal_188 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_78| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_188) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2))))) is different from false [2022-11-02 20:10:36,182 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2022-11-02 20:10:36,189 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 134 treesize of output 126 [2022-11-02 20:10:36,243 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-02 20:10:36,243 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [715492083] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:10:36,243 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:10:36,244 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2022-11-02 20:10:36,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962179757] [2022-11-02 20:10:36,244 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:10:36,245 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:10:36,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:36,245 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 10 times [2022-11-02 20:10:36,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:36,246 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500105781] [2022-11-02 20:10:36,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:36,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:36,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:36,251 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:10:36,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:36,256 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:10:36,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:10:36,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-02 20:10:36,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=221, Unknown=1, NotChecked=30, Total=306 [2022-11-02 20:10:36,334 INFO L87 Difference]: Start difference. First operand 31 states and 39 transitions. cyclomatic complexity: 12 Second operand has 18 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 18 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:48,411 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|))) (and (forall ((|v_ULTIMATE.start_main_~i~0#1_78| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_78|)) (forall ((v_ArrVal_188 Int)) (= 0 (mod (select (store .cse0 (+ (* |v_ULTIMATE.start_main_~i~0#1_78| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_188) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2))))) (<= 1 |c_ULTIMATE.start_main_~i~0#1|) (= (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |c_ULTIMATE.start_main_~i~0#1| 4))) 0) (<= |c_ULTIMATE.start_main_~i~0#1| 1))) is different from false [2022-11-02 20:10:48,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:10:48,541 INFO L93 Difference]: Finished difference Result 45 states and 57 transitions. [2022-11-02 20:10:48,541 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 57 transitions. [2022-11-02 20:10:48,542 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:10:48,542 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 56 transitions. [2022-11-02 20:10:48,542 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2022-11-02 20:10:48,543 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2022-11-02 20:10:48,543 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 56 transitions. [2022-11-02 20:10:48,543 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:10:48,543 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 56 transitions. [2022-11-02 20:10:48,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 56 transitions. [2022-11-02 20:10:48,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 34. [2022-11-02 20:10:48,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:48,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 44 transitions. [2022-11-02 20:10:48,546 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2022-11-02 20:10:48,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-02 20:10:48,547 INFO L428 stractBuchiCegarLoop]: Abstraction has 34 states and 44 transitions. [2022-11-02 20:10:48,547 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-02 20:10:48,548 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 44 transitions. [2022-11-02 20:10:48,548 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:10:48,548 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:10:48,548 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:10:48,549 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:10:48,549 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:10:48,549 INFO L748 eck$LassoCheckResult]: Stem: 1855#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1856#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1866#L367 assume !(main_~length~0#1 < 1); 1857#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1858#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1859#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1867#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1870#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1868#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1869#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1887#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1885#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1874#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1881#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1879#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1878#L370-4 main_~j~0#1 := 0; 1871#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1872#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1876#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1862#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1863#L378-2 [2022-11-02 20:10:48,549 INFO L750 eck$LassoCheckResult]: Loop: 1863#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1877#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1863#L378-2 [2022-11-02 20:10:48,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:48,550 INFO L85 PathProgramCache]: Analyzing trace with hash -761055450, now seen corresponding path program 4 times [2022-11-02 20:10:48,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:48,550 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331128699] [2022-11-02 20:10:48,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:48,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:48,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:10:49,134 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:49,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:10:49,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331128699] [2022-11-02 20:10:49,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1331128699] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:10:49,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1281547624] [2022-11-02 20:10:49,135 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-02 20:10:49,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:10:49,136 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:10:49,143 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:10:49,175 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-02 20:10:49,230 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-02 20:10:49,231 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:10:49,232 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-02 20:10:49,234 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:10:49,263 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:10:49,400 INFO L356 Elim1Store]: treesize reduction 29, result has 27.5 percent of original size [2022-11-02 20:10:49,400 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2022-11-02 20:10:49,453 INFO L356 Elim1Store]: treesize reduction 29, result has 27.5 percent of original size [2022-11-02 20:10:49,453 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2022-11-02 20:10:49,567 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2022-11-02 20:10:49,574 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:49,575 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:10:49,842 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2022-11-02 20:10:49,848 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2022-11-02 20:10:49,875 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:49,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1281547624] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:10:49,876 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:10:49,876 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2022-11-02 20:10:49,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504809416] [2022-11-02 20:10:49,876 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:10:49,878 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:10:49,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:49,879 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 11 times [2022-11-02 20:10:49,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:49,879 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134533894] [2022-11-02 20:10:49,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:49,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:49,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:49,884 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:10:49,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:10:49,891 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:10:49,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:10:49,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-02 20:10:49,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2022-11-02 20:10:49,965 INFO L87 Difference]: Start difference. First operand 34 states and 44 transitions. cyclomatic complexity: 14 Second operand has 17 states, 16 states have (on average 2.0625) internal successors, (33), 17 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:50,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:10:50,377 INFO L93 Difference]: Finished difference Result 71 states and 92 transitions. [2022-11-02 20:10:50,377 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 92 transitions. [2022-11-02 20:10:50,378 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2022-11-02 20:10:50,379 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 70 states and 91 transitions. [2022-11-02 20:10:50,379 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-11-02 20:10:50,379 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-11-02 20:10:50,379 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 91 transitions. [2022-11-02 20:10:50,380 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:10:50,380 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 91 transitions. [2022-11-02 20:10:50,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 91 transitions. [2022-11-02 20:10:50,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 41. [2022-11-02 20:10:50,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.3658536585365855) internal successors, (56), 40 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:10:50,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 56 transitions. [2022-11-02 20:10:50,383 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41 states and 56 transitions. [2022-11-02 20:10:50,384 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-02 20:10:50,385 INFO L428 stractBuchiCegarLoop]: Abstraction has 41 states and 56 transitions. [2022-11-02 20:10:50,385 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-11-02 20:10:50,385 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 56 transitions. [2022-11-02 20:10:50,386 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:10:50,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:10:50,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:10:50,387 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:10:50,387 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:10:50,387 INFO L748 eck$LassoCheckResult]: Stem: 2102#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2103#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2113#L367 assume !(main_~length~0#1 < 1); 2104#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2105#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2106#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2114#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2129#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2128#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2126#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2127#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2142#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2141#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2118#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2137#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2107#L370-4 main_~j~0#1 := 0; 2108#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2111#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2112#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2120#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2124#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2109#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2110#L378-2 [2022-11-02 20:10:50,388 INFO L750 eck$LassoCheckResult]: Loop: 2110#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2123#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2110#L378-2 [2022-11-02 20:10:50,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:10:50,391 INFO L85 PathProgramCache]: Analyzing trace with hash -643041689, now seen corresponding path program 5 times [2022-11-02 20:10:50,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:10:50,392 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81506314] [2022-11-02 20:10:50,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:10:50,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:10:50,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:10:50,790 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:50,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:10:50,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [81506314] [2022-11-02 20:10:50,791 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [81506314] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:10:50,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1604260196] [2022-11-02 20:10:50,791 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-02 20:10:50,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:10:50,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:10:50,797 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:10:50,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-02 20:10:50,893 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-11-02 20:10:50,893 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:10:50,895 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-02 20:10:50,897 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:10:50,923 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:10:50,998 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-02 20:10:51,023 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-02 20:10:51,516 INFO L356 Elim1Store]: treesize reduction 24, result has 11.1 percent of original size [2022-11-02 20:10:51,517 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 35 treesize of output 13 [2022-11-02 20:10:51,522 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:10:51,522 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:10:53,233 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~j~0#1_90| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |c_ULTIMATE.start_main_~i~0#1| 4)) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_90| 4))) (or (not (<= 0 |v_ULTIMATE.start_main_~j~0#1_90|)) (not (= (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 4)) 2) 0)) (not (<= |v_ULTIMATE.start_main_~j~0#1_90| 0)) (= (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 8)) 2) 0)))) is different from false [2022-11-02 20:11:03,135 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 56 [2022-11-02 20:11:03,145 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-02 20:11:03,146 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 105 treesize of output 91 [2022-11-02 20:11:03,258 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-02 20:11:03,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1604260196] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:11:03,258 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:11:03,258 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12, 12] total 29 [2022-11-02 20:11:03,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702014859] [2022-11-02 20:11:03,258 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:11:03,259 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:11:03,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:11:03,259 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 12 times [2022-11-02 20:11:03,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:11:03,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955134495] [2022-11-02 20:11:03,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:11:03,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:11:03,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:11:03,264 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:11:03,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:11:03,268 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:11:03,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:11:03,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-11-02 20:11:03,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=678, Unknown=7, NotChecked=54, Total=870 [2022-11-02 20:11:03,343 INFO L87 Difference]: Start difference. First operand 41 states and 56 transitions. cyclomatic complexity: 19 Second operand has 30 states, 29 states have (on average 1.793103448275862) internal successors, (52), 30 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:11:04,769 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|))) (and (forall ((|v_ULTIMATE.start_main_~j~0#1_90| Int)) (let ((.cse0 (store .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |c_ULTIMATE.start_main_~i~0#1| 4)) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_90| 4))) (or (not (<= 0 |v_ULTIMATE.start_main_~j~0#1_90|)) (not (= (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 4)) 2) 0)) (not (<= |v_ULTIMATE.start_main_~j~0#1_90| 0)) (= (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 8)) 2) 0)))) (exists ((|ULTIMATE.start_main_~i~0#1| Int)) (let ((.cse3 (* |ULTIMATE.start_main_~i~0#1| 4))) (and (= (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse3)) 0) (<= |ULTIMATE.start_main_~i~0#1| 2) (= (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (- 4) .cse3)) 0) (<= 2 |ULTIMATE.start_main_~i~0#1|)))))) is different from false [2022-11-02 20:11:05,896 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|))) (and (forall ((|v_ULTIMATE.start_main_~j~0#1_90| Int)) (let ((.cse0 (store .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |c_ULTIMATE.start_main_~i~0#1| 4)) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_90| 4))) (or (not (<= 0 |v_ULTIMATE.start_main_~j~0#1_90|)) (not (= (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 4)) 2) 0)) (not (<= |v_ULTIMATE.start_main_~j~0#1_90| 0)) (= (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 8)) 2) 0)))) (= (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 8)) 0))) is different from false [2022-11-02 20:11:06,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:11:06,007 INFO L93 Difference]: Finished difference Result 71 states and 92 transitions. [2022-11-02 20:11:06,007 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 92 transitions. [2022-11-02 20:11:06,008 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:11:06,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 69 states and 89 transitions. [2022-11-02 20:11:06,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-02 20:11:06,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-02 20:11:06,009 INFO L73 IsDeterministic]: Start isDeterministic. Operand 69 states and 89 transitions. [2022-11-02 20:11:06,010 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:11:06,010 INFO L218 hiAutomatonCegarLoop]: Abstraction has 69 states and 89 transitions. [2022-11-02 20:11:06,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states and 89 transitions. [2022-11-02 20:11:06,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 54. [2022-11-02 20:11:06,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.3518518518518519) internal successors, (73), 53 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:11:06,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 73 transitions. [2022-11-02 20:11:06,014 INFO L240 hiAutomatonCegarLoop]: Abstraction has 54 states and 73 transitions. [2022-11-02 20:11:06,019 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-02 20:11:06,020 INFO L428 stractBuchiCegarLoop]: Abstraction has 54 states and 73 transitions. [2022-11-02 20:11:06,020 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-11-02 20:11:06,020 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 73 transitions. [2022-11-02 20:11:06,021 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:11:06,021 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:11:06,021 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:11:06,022 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:11:06,022 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:11:06,022 INFO L748 eck$LassoCheckResult]: Stem: 2386#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2387#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2395#L367 assume !(main_~length~0#1 < 1); 2384#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2385#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2388#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2396#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2399#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2397#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2398#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2433#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2431#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2428#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2427#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2426#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2389#L370-4 main_~j~0#1 := 0; 2390#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2393#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2394#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2403#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2404#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2391#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2392#L378-2 [2022-11-02 20:11:06,022 INFO L750 eck$LassoCheckResult]: Loop: 2392#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2402#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2392#L378-2 [2022-11-02 20:11:06,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:11:06,025 INFO L85 PathProgramCache]: Analyzing trace with hash -1036068699, now seen corresponding path program 6 times [2022-11-02 20:11:06,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:11:06,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089706680] [2022-11-02 20:11:06,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:11:06,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:11:06,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:11:06,619 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:11:06,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:11:06,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089706680] [2022-11-02 20:11:06,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089706680] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:11:06,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [991268787] [2022-11-02 20:11:06,620 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-02 20:11:06,620 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:11:06,620 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:11:06,627 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:11:06,629 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-11-02 20:11:06,724 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-11-02 20:11:06,724 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:11:06,726 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-02 20:11:06,730 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:11:06,815 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:11:07,241 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-11-02 20:11:07,242 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2022-11-02 20:11:07,264 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:11:07,264 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:11:07,872 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2022-11-02 20:11:07,881 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2022-11-02 20:11:07,956 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:11:07,956 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [991268787] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:11:07,956 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:11:07,956 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 12] total 28 [2022-11-02 20:11:07,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1243854525] [2022-11-02 20:11:07,957 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:11:07,957 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:11:07,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:11:07,957 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 13 times [2022-11-02 20:11:07,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:11:07,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766590002] [2022-11-02 20:11:07,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:11:07,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:11:07,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:11:07,962 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:11:07,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:11:07,983 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:11:08,053 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:11:08,053 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-02 20:11:08,055 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=691, Unknown=0, NotChecked=0, Total=812 [2022-11-02 20:11:08,056 INFO L87 Difference]: Start difference. First operand 54 states and 73 transitions. cyclomatic complexity: 23 Second operand has 29 states, 28 states have (on average 1.75) internal successors, (49), 29 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:11:08,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:11:08,728 INFO L93 Difference]: Finished difference Result 65 states and 85 transitions. [2022-11-02 20:11:08,728 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 85 transitions. [2022-11-02 20:11:08,729 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:11:08,729 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 50 states and 66 transitions. [2022-11-02 20:11:08,729 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-02 20:11:08,730 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-11-02 20:11:08,730 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 66 transitions. [2022-11-02 20:11:08,730 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:11:08,730 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 66 transitions. [2022-11-02 20:11:08,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 66 transitions. [2022-11-02 20:11:08,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2022-11-02 20:11:08,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.32) internal successors, (66), 49 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:11:08,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 66 transitions. [2022-11-02 20:11:08,733 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 66 transitions. [2022-11-02 20:11:08,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-02 20:11:08,743 INFO L428 stractBuchiCegarLoop]: Abstraction has 50 states and 66 transitions. [2022-11-02 20:11:08,743 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2022-11-02 20:11:08,743 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 66 transitions. [2022-11-02 20:11:08,743 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:11:08,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:11:08,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:11:08,744 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:11:08,744 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:11:08,744 INFO L748 eck$LassoCheckResult]: Stem: 2689#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2690#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2700#L367 assume !(main_~length~0#1 < 1); 2691#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2692#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2693#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2701#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2704#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2738#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2737#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2736#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2735#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2734#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2726#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2724#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2722#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2720#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2717#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2716#L370-4 main_~j~0#1 := 0; 2705#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2696#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2697#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2694#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2695#L378-2 [2022-11-02 20:11:08,745 INFO L750 eck$LassoCheckResult]: Loop: 2695#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2710#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2695#L378-2 [2022-11-02 20:11:08,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:11:08,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1786248672, now seen corresponding path program 7 times [2022-11-02 20:11:08,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:11:08,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045596302] [2022-11-02 20:11:08,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:11:08,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:11:08,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:11:09,319 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:11:09,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:11:09,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045596302] [2022-11-02 20:11:09,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2045596302] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:11:09,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1566052102] [2022-11-02 20:11:09,320 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-02 20:11:09,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:11:09,320 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:11:09,323 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:11:09,339 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-11-02 20:11:09,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:11:09,436 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-02 20:11:09,446 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:11:09,533 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:11:09,612 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:11:09,613 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:11:09,627 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:11:09,628 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:11:09,679 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:11:09,680 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:11:09,698 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-02 20:11:09,699 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-02 20:11:09,825 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-02 20:11:09,828 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 2 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:11:09,828 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:11:22,046 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_104| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_104|)) (forall ((v_ArrVal_307 Int)) (= (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_104| 4)) v_ArrVal_307) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2) 0)))) is different from false [2022-11-02 20:11:34,240 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_105| Int)) (or (forall ((|v_ULTIMATE.start_main_~i~0#1_104| Int) (v_ArrVal_307 Int) (v_ArrVal_304 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_105| 1) |v_ULTIMATE.start_main_~i~0#1_104|)) (= (mod (select (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_105| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_304) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_104| 4)) v_ArrVal_307) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2) 0))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_105|)))) is different from false [2022-11-02 20:11:34,264 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2022-11-02 20:11:34,271 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 286 treesize of output 278 [2022-11-02 20:11:34,421 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-02 20:11:34,422 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1566052102] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:11:34,422 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:11:34,422 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 27 [2022-11-02 20:11:34,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204798237] [2022-11-02 20:11:34,423 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:11:34,423 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:11:34,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:11:34,424 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 14 times [2022-11-02 20:11:34,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:11:34,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981443586] [2022-11-02 20:11:34,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:11:34,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:11:34,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:11:34,433 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:11:34,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:11:34,441 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:11:34,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:11:34,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-11-02 20:11:34,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=540, Unknown=2, NotChecked=98, Total=756 [2022-11-02 20:11:34,532 INFO L87 Difference]: Start difference. First operand 50 states and 66 transitions. cyclomatic complexity: 20 Second operand has 28 states, 27 states have (on average 2.074074074074074) internal successors, (56), 28 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:11:46,639 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|))) (and (= (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |c_ULTIMATE.start_main_~i~0#1| 4))) 0) (forall ((|v_ULTIMATE.start_main_~i~0#1_105| Int)) (or (forall ((|v_ULTIMATE.start_main_~i~0#1_104| Int) (v_ArrVal_307 Int) (v_ArrVal_304 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_105| 1) |v_ULTIMATE.start_main_~i~0#1_104|)) (= (mod (select (store (store .cse0 (+ (* |v_ULTIMATE.start_main_~i~0#1_105| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_304) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_104| 4)) v_ArrVal_307) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2) 0))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_105|)))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0) (= |c_ULTIMATE.start_main_~i~0#1| 1))) is different from false [2022-11-02 20:11:58,689 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse1 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4))) (and (= 0 (select .cse0 .cse1)) (<= 2 |c_ULTIMATE.start_main_~i~0#1|) (forall ((|v_ULTIMATE.start_main_~i~0#1_104| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_104|)) (forall ((v_ArrVal_307 Int)) (= (mod (select (store .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_104| 4)) v_ArrVal_307) .cse1) 2) 0)))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0))) is different from false [2022-11-02 20:12:10,744 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse1 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4))) (and (= 0 (select .cse0 .cse1)) (<= 3 |c_ULTIMATE.start_main_~i~0#1|) (forall ((|v_ULTIMATE.start_main_~i~0#1_104| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_104|)) (forall ((v_ArrVal_307 Int)) (= (mod (select (store .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_104| 4)) v_ArrVal_307) .cse1) 2) 0)))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0))) is different from false [2022-11-02 20:12:10,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:12:10,864 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-11-02 20:12:10,864 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 107 transitions. [2022-11-02 20:12:10,865 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-02 20:12:10,866 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 82 states and 105 transitions. [2022-11-02 20:12:10,866 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-11-02 20:12:10,866 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-11-02 20:12:10,866 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 105 transitions. [2022-11-02 20:12:10,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:12:10,866 INFO L218 hiAutomatonCegarLoop]: Abstraction has 82 states and 105 transitions. [2022-11-02 20:12:10,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 105 transitions. [2022-11-02 20:12:10,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 61. [2022-11-02 20:12:10,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.3114754098360655) internal successors, (80), 60 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:12:10,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 80 transitions. [2022-11-02 20:12:10,870 INFO L240 hiAutomatonCegarLoop]: Abstraction has 61 states and 80 transitions. [2022-11-02 20:12:10,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-02 20:12:10,871 INFO L428 stractBuchiCegarLoop]: Abstraction has 61 states and 80 transitions. [2022-11-02 20:12:10,871 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2022-11-02 20:12:10,871 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 80 transitions. [2022-11-02 20:12:10,874 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:12:10,874 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:12:10,874 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:12:10,875 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:12:10,875 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:12:10,875 INFO L748 eck$LassoCheckResult]: Stem: 2997#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2998#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3008#L367 assume !(main_~length~0#1 < 1); 2999#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3000#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3001#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3009#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3049#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3047#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3046#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3045#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3043#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3040#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3037#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3035#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3032#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3030#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3027#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3025#L370-4 main_~j~0#1 := 0; 3023#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3021#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3016#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3004#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3005#L378-2 [2022-11-02 20:12:10,875 INFO L750 eck$LassoCheckResult]: Loop: 3005#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3015#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3005#L378-2 [2022-11-02 20:12:10,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:12:10,876 INFO L85 PathProgramCache]: Analyzing trace with hash 775131422, now seen corresponding path program 8 times [2022-11-02 20:12:10,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:12:10,876 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125916412] [2022-11-02 20:12:10,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:12:10,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:12:10,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:12:11,544 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:12:11,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:12:11,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125916412] [2022-11-02 20:12:11,544 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [125916412] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:12:11,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1039414297] [2022-11-02 20:12:11,545 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 20:12:11,545 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:12:11,545 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:12:11,551 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:12:11,567 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-11-02 20:12:11,632 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 20:12:11,632 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:12:11,634 INFO L263 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-02 20:12:11,639 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:12:11,661 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:12:11,753 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-02 20:12:11,754 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2022-11-02 20:12:11,777 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-02 20:12:11,777 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2022-11-02 20:12:11,831 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-02 20:12:11,832 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2022-11-02 20:12:11,854 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-02 20:12:11,855 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2022-11-02 20:12:11,919 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2022-11-02 20:12:11,922 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 2 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:12:11,922 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 20:12:12,229 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2022-11-02 20:12:12,236 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2022-11-02 20:12:12,258 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-02 20:12:12,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1039414297] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 20:12:12,258 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 20:12:12,258 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 17 [2022-11-02 20:12:12,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1547238962] [2022-11-02 20:12:12,259 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 20:12:12,260 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 20:12:12,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:12:12,261 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 15 times [2022-11-02 20:12:12,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:12:12,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105321012] [2022-11-02 20:12:12,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:12:12,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:12:12,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:12:12,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 20:12:12,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 20:12:12,269 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 20:12:12,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 20:12:12,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-02 20:12:12,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2022-11-02 20:12:12,347 INFO L87 Difference]: Start difference. First operand 61 states and 80 transitions. cyclomatic complexity: 24 Second operand has 18 states, 17 states have (on average 2.235294117647059) internal successors, (38), 18 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:12:12,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 20:12:12,655 INFO L93 Difference]: Finished difference Result 67 states and 86 transitions. [2022-11-02 20:12:12,655 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 86 transitions. [2022-11-02 20:12:12,656 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:12:12,656 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 66 states and 84 transitions. [2022-11-02 20:12:12,656 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2022-11-02 20:12:12,657 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2022-11-02 20:12:12,657 INFO L73 IsDeterministic]: Start isDeterministic. Operand 66 states and 84 transitions. [2022-11-02 20:12:12,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-02 20:12:12,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 66 states and 84 transitions. [2022-11-02 20:12:12,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states and 84 transitions. [2022-11-02 20:12:12,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 36. [2022-11-02 20:12:12,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.25) internal successors, (45), 35 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 20:12:12,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 45 transitions. [2022-11-02 20:12:12,659 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 45 transitions. [2022-11-02 20:12:12,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-02 20:12:12,666 INFO L428 stractBuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2022-11-02 20:12:12,666 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2022-11-02 20:12:12,666 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 45 transitions. [2022-11-02 20:12:12,667 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-02 20:12:12,667 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 20:12:12,667 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 20:12:12,668 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-02 20:12:12,668 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 20:12:12,668 INFO L748 eck$LassoCheckResult]: Stem: 3284#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3285#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3295#L367 assume !(main_~length~0#1 < 1); 3286#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3287#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3288#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3296#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3319#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3318#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3317#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3316#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3315#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3313#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3312#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3311#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3310#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3299#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3301#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3289#L370-4 main_~j~0#1 := 0; 3290#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3293#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3294#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3304#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3303#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3291#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3292#L378-2 [2022-11-02 20:12:12,668 INFO L750 eck$LassoCheckResult]: Loop: 3292#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3302#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3292#L378-2 [2022-11-02 20:12:12,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 20:12:12,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1478926751, now seen corresponding path program 9 times [2022-11-02 20:12:12,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 20:12:12,669 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385312872] [2022-11-02 20:12:12,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 20:12:12,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 20:12:12,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 20:12:13,179 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:12:13,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 20:12:13,180 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385312872] [2022-11-02 20:12:13,180 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [385312872] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 20:12:13,180 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [709407246] [2022-11-02 20:12:13,180 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-02 20:12:13,180 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 20:12:13,180 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 20:12:13,183 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 20:12:13,203 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_febb85cb-f63a-47fd-9d35-8e6065053aca/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-11-02 20:12:13,315 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-02 20:12:13,315 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 20:12:13,316 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-02 20:12:13,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 20:12:13,349 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-02 20:12:13,423 INFO L356 Elim1Store]: treesize reduction 29, result has 27.5 percent of original size [2022-11-02 20:12:13,423 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-11-02 20:12:13,534 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-11-02 20:12:13,537 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 20:12:13,537 INFO L328 TraceCheckSpWp]: Computing backward predicates...