./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_3-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_3-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-02 21:12:03,869 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-02 21:12:03,874 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-02 21:12:03,913 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-02 21:12:03,913 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-02 21:12:03,918 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-02 21:12:03,921 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-02 21:12:03,925 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-02 21:12:03,927 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-02 21:12:03,928 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-02 21:12:03,929 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-02 21:12:03,929 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-02 21:12:03,930 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-02 21:12:03,931 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-02 21:12:03,932 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-02 21:12:03,933 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-02 21:12:03,934 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-02 21:12:03,939 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-02 21:12:03,941 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-02 21:12:03,951 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-02 21:12:03,954 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-02 21:12:03,958 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-02 21:12:03,959 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-02 21:12:03,960 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-02 21:12:03,963 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-02 21:12:03,963 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-02 21:12:03,964 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-02 21:12:03,964 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-02 21:12:03,965 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-02 21:12:03,966 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-02 21:12:03,966 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-02 21:12:03,973 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-02 21:12:03,975 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-02 21:12:03,977 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-02 21:12:03,978 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-02 21:12:03,978 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-02 21:12:03,979 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-02 21:12:03,979 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-02 21:12:03,979 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-02 21:12:03,980 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-02 21:12:03,980 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-02 21:12:03,981 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-02 21:12:04,032 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-02 21:12:04,032 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-02 21:12:04,033 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-02 21:12:04,033 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-02 21:12:04,034 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-02 21:12:04,034 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-02 21:12:04,034 INFO L138 SettingsManager]: * Use SBE=true [2022-11-02 21:12:04,034 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-02 21:12:04,035 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-02 21:12:04,035 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-02 21:12:04,035 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-02 21:12:04,035 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-02 21:12:04,035 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-02 21:12:04,036 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-02 21:12:04,036 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-02 21:12:04,036 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-02 21:12:04,036 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-02 21:12:04,036 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-02 21:12:04,036 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-02 21:12:04,037 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-02 21:12:04,037 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-02 21:12:04,037 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-02 21:12:04,037 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-02 21:12:04,037 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-02 21:12:04,037 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-02 21:12:04,038 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-02 21:12:04,038 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-02 21:12:04,038 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-02 21:12:04,040 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-02 21:12:04,041 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-02 21:12:04,041 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-02 21:12:04,042 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-02 21:12:04,042 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 [2022-11-02 21:12:04,289 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-02 21:12:04,314 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-02 21:12:04,317 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-02 21:12:04,318 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-02 21:12:04,319 INFO L275 PluginConnector]: CDTParser initialized [2022-11-02 21:12:04,321 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/../../sv-benchmarks/c/loop-acceleration/array_3-1.i [2022-11-02 21:12:04,401 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/data/bb5bcc1ad/bc2e84af5853494fbc9582a8d28b25d7/FLAG4228a5610 [2022-11-02 21:12:04,932 INFO L306 CDTParser]: Found 1 translation units. [2022-11-02 21:12:04,934 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/sv-benchmarks/c/loop-acceleration/array_3-1.i [2022-11-02 21:12:04,942 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/data/bb5bcc1ad/bc2e84af5853494fbc9582a8d28b25d7/FLAG4228a5610 [2022-11-02 21:12:05,293 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/data/bb5bcc1ad/bc2e84af5853494fbc9582a8d28b25d7 [2022-11-02 21:12:05,296 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-02 21:12:05,298 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-02 21:12:05,299 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-02 21:12:05,299 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-02 21:12:05,303 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-02 21:12:05,304 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,305 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@d937b68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05, skipping insertion in model container [2022-11-02 21:12:05,305 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,312 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-02 21:12:05,326 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-02 21:12:05,520 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/sv-benchmarks/c/loop-acceleration/array_3-1.i[849,862] [2022-11-02 21:12:05,530 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 21:12:05,538 INFO L203 MainTranslator]: Completed pre-run [2022-11-02 21:12:05,551 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/sv-benchmarks/c/loop-acceleration/array_3-1.i[849,862] [2022-11-02 21:12:05,555 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-02 21:12:05,569 INFO L208 MainTranslator]: Completed translation [2022-11-02 21:12:05,569 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05 WrapperNode [2022-11-02 21:12:05,569 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-02 21:12:05,571 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-02 21:12:05,571 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-02 21:12:05,571 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-02 21:12:05,579 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,585 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,603 INFO L138 Inliner]: procedures = 16, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 43 [2022-11-02 21:12:05,603 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-02 21:12:05,604 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-02 21:12:05,604 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-02 21:12:05,604 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-02 21:12:05,613 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,614 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,615 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,616 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,620 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,624 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,625 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,626 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,628 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-02 21:12:05,629 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-02 21:12:05,629 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-02 21:12:05,629 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-02 21:12:05,630 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (1/1) ... [2022-11-02 21:12:05,640 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:05,650 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:05,661 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:05,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-02 21:12:05,714 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-02 21:12:05,714 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-02 21:12:05,715 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-02 21:12:05,715 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-02 21:12:05,715 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-02 21:12:05,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-02 21:12:05,715 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-02 21:12:05,715 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-02 21:12:05,797 INFO L235 CfgBuilder]: Building ICFG [2022-11-02 21:12:05,799 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-02 21:12:05,998 INFO L276 CfgBuilder]: Performing block encoding [2022-11-02 21:12:06,004 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-02 21:12:06,004 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-02 21:12:06,006 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:06 BoogieIcfgContainer [2022-11-02 21:12:06,007 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-02 21:12:06,008 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-02 21:12:06,008 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-02 21:12:06,013 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-02 21:12:06,013 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 21:12:06,014 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 09:12:05" (1/3) ... [2022-11-02 21:12:06,015 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@50b275ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 09:12:06, skipping insertion in model container [2022-11-02 21:12:06,015 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 21:12:06,015 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 09:12:05" (2/3) ... [2022-11-02 21:12:06,016 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@50b275ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 09:12:06, skipping insertion in model container [2022-11-02 21:12:06,016 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-02 21:12:06,016 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 09:12:06" (3/3) ... [2022-11-02 21:12:06,018 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_3-1.i [2022-11-02 21:12:06,078 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-02 21:12:06,078 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-02 21:12:06,079 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-02 21:12:06,079 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-02 21:12:06,079 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-02 21:12:06,079 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-02 21:12:06,079 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-02 21:12:06,080 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-02 21:12:06,087 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:06,117 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-02 21:12:06,121 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:06,121 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:06,127 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 21:12:06,128 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 21:12:06,128 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-02 21:12:06,128 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:06,131 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-02 21:12:06,131 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:06,131 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:06,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-02 21:12:06,132 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-02 21:12:06,140 INFO L748 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 13#L24-3true [2022-11-02 21:12:06,141 INFO L750 eck$LassoCheckResult]: Loop: 13#L24-3true assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 5#L24-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 13#L24-3true [2022-11-02 21:12:06,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:06,148 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-02 21:12:06,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:06,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089215865] [2022-11-02 21:12:06,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:06,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:06,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:06,318 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:06,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:06,346 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:06,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:06,349 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-02 21:12:06,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:06,350 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304648132] [2022-11-02 21:12:06,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:06,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:06,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:06,361 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:06,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:06,371 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:06,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:06,372 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-02 21:12:06,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:06,373 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136142864] [2022-11-02 21:12:06,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:06,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:06,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:06,399 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:06,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:06,419 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:06,808 INFO L210 LassoAnalysis]: Preferences: [2022-11-02 21:12:06,809 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-02 21:12:06,809 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-02 21:12:06,809 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-02 21:12:06,810 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-02 21:12:06,810 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:06,810 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-02 21:12:06,810 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-02 21:12:06,811 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_3-1.i_Iteration1_Lasso [2022-11-02 21:12:06,811 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-02 21:12:06,811 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-02 21:12:06,833 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:06,847 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:06,851 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:06,855 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:07,114 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:07,118 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:07,120 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-02 21:12:07,376 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-02 21:12:07,380 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-02 21:12:07,382 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,382 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,384 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,393 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,406 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,406 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,406 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,406 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,413 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 21:12:07,414 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 21:12:07,416 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-02 21:12:07,429 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,464 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,464 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,465 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,475 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-02 21:12:07,477 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,491 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,491 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 21:12:07,491 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,492 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,492 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,494 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 21:12:07,494 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 21:12:07,518 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,562 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,562 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,562 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,564 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,572 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,572 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-02 21:12:07,585 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,585 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 21:12:07,585 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,585 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,585 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,586 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 21:12:07,586 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 21:12:07,596 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,639 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,640 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,640 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,641 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,646 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-02 21:12:07,647 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,661 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,662 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,662 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,662 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,666 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 21:12:07,667 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 21:12:07,694 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,725 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,726 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,727 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,729 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-02 21:12:07,730 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,742 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,743 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-02 21:12:07,743 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,743 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,743 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,744 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-02 21:12:07,744 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-02 21:12:07,758 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,792 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,792 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,793 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,794 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-02 21:12:07,799 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,812 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,812 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,812 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,812 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,815 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 21:12:07,815 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 21:12:07,827 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,861 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,862 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,863 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,865 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-02 21:12:07,865 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,875 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,876 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,876 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,876 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:07,881 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 21:12:07,881 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 21:12:07,894 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-02 21:12:07,933 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:07,934 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:07,934 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:07,935 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:07,972 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-02 21:12:07,972 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-02 21:12:07,985 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-02 21:12:07,986 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-02 21:12:07,986 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-02 21:12:07,986 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-02 21:12:08,003 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-02 21:12:08,003 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-02 21:12:08,022 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-02 21:12:08,048 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2022-11-02 21:12:08,048 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 7 variables to zero. [2022-11-02 21:12:08,050 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-02 21:12:08,050 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:08,056 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-02 21:12:08,083 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-02 21:12:08,083 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-02 21:12:08,101 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-02 21:12:08,101 INFO L513 LassoAnalysis]: Proved termination. [2022-11-02 21:12:08,102 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2047*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2022-11-02 21:12:08,134 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:08,150 INFO L156 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2022-11-02 21:12:08,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:08,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:08,190 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-02 21:12:08,191 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:08,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:08,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-02 21:12:08,206 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:08,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:08,268 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-02 21:12:08,270 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,313 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 31 states and 43 transitions. Complement of second has 8 states. [2022-11-02 21:12:08,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-02 21:12:08,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 21 transitions. [2022-11-02 21:12:08,335 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-02 21:12:08,336 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 21:12:08,336 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-02 21:12:08,336 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 21:12:08,336 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-02 21:12:08,337 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-02 21:12:08,337 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 43 transitions. [2022-11-02 21:12:08,340 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:08,343 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 10 states and 12 transitions. [2022-11-02 21:12:08,344 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-02 21:12:08,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-11-02 21:12:08,345 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2022-11-02 21:12:08,345 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:08,345 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2022-11-02 21:12:08,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2022-11-02 21:12:08,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2022-11-02 21:12:08,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2022-11-02 21:12:08,382 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2022-11-02 21:12:08,383 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2022-11-02 21:12:08,383 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-02 21:12:08,383 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2022-11-02 21:12:08,384 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:08,384 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:08,384 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:08,384 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-02 21:12:08,385 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:08,385 INFO L748 eck$LassoCheckResult]: Stem: 106#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 107#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 114#L24-3 assume !(main_~i~0#1 < 1024); 115#L24-4 main_~i~0#1 := 0; 113#L28-4 [2022-11-02 21:12:08,385 INFO L750 eck$LassoCheckResult]: Loop: 113#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 110#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 111#L29 assume !(main_~i~0#1 >= 1023); 112#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 113#L28-4 [2022-11-02 21:12:08,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:08,386 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-02 21:12:08,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:08,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684165074] [2022-11-02 21:12:08,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:08,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:08,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:08,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:08,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:08,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684165074] [2022-11-02 21:12:08,458 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684165074] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-02 21:12:08,458 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-02 21:12:08,458 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-02 21:12:08,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492746390] [2022-11-02 21:12:08,459 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-02 21:12:08,462 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 21:12:08,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:08,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 1 times [2022-11-02 21:12:08,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:08,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996502485] [2022-11-02 21:12:08,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:08,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:08,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:08,482 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:08,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:08,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:08,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:08,565 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-02 21:12:08,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-02 21:12:08,569 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:08,595 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-11-02 21:12:08,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2022-11-02 21:12:08,599 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:08,600 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2022-11-02 21:12:08,600 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2022-11-02 21:12:08,601 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2022-11-02 21:12:08,601 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2022-11-02 21:12:08,601 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:08,602 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-02 21:12:08,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2022-11-02 21:12:08,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 10. [2022-11-02 21:12:08,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2022-11-02 21:12:08,604 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2022-11-02 21:12:08,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-02 21:12:08,605 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2022-11-02 21:12:08,605 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-02 21:12:08,605 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2022-11-02 21:12:08,606 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:08,606 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:08,606 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:08,606 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-02 21:12:08,606 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:08,606 INFO L748 eck$LassoCheckResult]: Stem: 137#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 138#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 145#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 139#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 140#L24-3 assume !(main_~i~0#1 < 1024); 146#L24-4 main_~i~0#1 := 0; 144#L28-4 [2022-11-02 21:12:08,607 INFO L750 eck$LassoCheckResult]: Loop: 144#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 141#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 142#L29 assume !(main_~i~0#1 >= 1023); 143#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 144#L28-4 [2022-11-02 21:12:08,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:08,607 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-02 21:12:08,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:08,607 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060662134] [2022-11-02 21:12:08,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:08,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:08,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:08,660 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:08,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:08,661 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060662134] [2022-11-02 21:12:08,661 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060662134] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:08,661 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1250603508] [2022-11-02 21:12:08,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:08,662 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 21:12:08,662 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:08,663 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 21:12:08,682 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-02 21:12:08,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:08,712 INFO L263 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-02 21:12:08,713 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:08,725 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:08,725 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:08,744 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:08,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1250603508] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:08,745 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 21:12:08,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-02 21:12:08,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778065099] [2022-11-02 21:12:08,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:08,746 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 21:12:08,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:08,746 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 2 times [2022-11-02 21:12:08,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:08,747 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271641005] [2022-11-02 21:12:08,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:08,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:08,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:08,752 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:08,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:08,757 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:08,799 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:08,799 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-02 21:12:08,799 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-02 21:12:08,800 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:08,846 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2022-11-02 21:12:08,846 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2022-11-02 21:12:08,847 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:08,848 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2022-11-02 21:12:08,848 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-02 21:12:08,848 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-02 21:12:08,848 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2022-11-02 21:12:08,848 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:08,849 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-11-02 21:12:08,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2022-11-02 21:12:08,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 16. [2022-11-02 21:12:08,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:08,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2022-11-02 21:12:08,851 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2022-11-02 21:12:08,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-02 21:12:08,852 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2022-11-02 21:12:08,852 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-02 21:12:08,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2022-11-02 21:12:08,853 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:08,853 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:08,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:08,854 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-02 21:12:08,854 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:08,854 INFO L748 eck$LassoCheckResult]: Stem: 214#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 215#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 222#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 216#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 217#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 223#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 229#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 228#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 227#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 226#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 225#L24-3 assume !(main_~i~0#1 < 1024); 224#L24-4 main_~i~0#1 := 0; 221#L28-4 [2022-11-02 21:12:08,854 INFO L750 eck$LassoCheckResult]: Loop: 221#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 218#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 219#L29 assume !(main_~i~0#1 >= 1023); 220#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 221#L28-4 [2022-11-02 21:12:08,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:08,854 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-02 21:12:08,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:08,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930891706] [2022-11-02 21:12:08,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:08,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:08,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:09,056 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:09,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:09,057 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930891706] [2022-11-02 21:12:09,057 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930891706] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:09,057 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [220773786] [2022-11-02 21:12:09,057 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-02 21:12:09,058 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 21:12:09,058 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:09,071 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-02 21:12:09,072 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 21:12:09,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-02 21:12:09,132 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-02 21:12:09,132 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 21:12:09,133 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-02 21:12:09,135 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:09,159 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:09,160 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:09,222 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:09,223 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [220773786] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:09,223 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 21:12:09,223 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-02 21:12:09,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1332105921] [2022-11-02 21:12:09,224 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:09,224 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 21:12:09,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:09,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 3 times [2022-11-02 21:12:09,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:09,225 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107321943] [2022-11-02 21:12:09,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:09,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:09,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:09,230 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:09,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:09,234 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:09,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:09,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-02 21:12:09,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-02 21:12:09,276 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:09,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:09,388 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2022-11-02 21:12:09,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 64 transitions. [2022-11-02 21:12:09,390 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:09,391 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 63 states and 64 transitions. [2022-11-02 21:12:09,391 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2022-11-02 21:12:09,392 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2022-11-02 21:12:09,392 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 64 transitions. [2022-11-02 21:12:09,392 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:09,393 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 64 transitions. [2022-11-02 21:12:09,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 64 transitions. [2022-11-02 21:12:09,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 28. [2022-11-02 21:12:09,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:09,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2022-11-02 21:12:09,396 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2022-11-02 21:12:09,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-02 21:12:09,397 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2022-11-02 21:12:09,397 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-02 21:12:09,398 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2022-11-02 21:12:09,398 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:09,398 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:09,399 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:09,399 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2022-11-02 21:12:09,400 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:09,400 INFO L748 eck$LassoCheckResult]: Stem: 375#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 376#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 383#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 384#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 385#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 377#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 378#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 402#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 401#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 400#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 399#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 398#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 397#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 396#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 395#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 394#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 393#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 392#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 391#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 390#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 389#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 388#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 387#L24-3 assume !(main_~i~0#1 < 1024); 386#L24-4 main_~i~0#1 := 0; 382#L28-4 [2022-11-02 21:12:09,400 INFO L750 eck$LassoCheckResult]: Loop: 382#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 379#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 380#L29 assume !(main_~i~0#1 >= 1023); 381#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 382#L28-4 [2022-11-02 21:12:09,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:09,401 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2022-11-02 21:12:09,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:09,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391913315] [2022-11-02 21:12:09,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:09,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:09,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:09,738 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:09,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:09,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391913315] [2022-11-02 21:12:09,739 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [391913315] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:09,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1464013071] [2022-11-02 21:12:09,740 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-02 21:12:09,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 21:12:09,740 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:09,742 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 21:12:09,768 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-02 21:12:09,899 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-02 21:12:09,899 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 21:12:09,901 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-02 21:12:09,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:09,968 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:09,968 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:10,236 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:10,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1464013071] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:10,236 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 21:12:10,237 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-11-02 21:12:10,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362755988] [2022-11-02 21:12:10,239 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:10,240 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 21:12:10,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:10,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 4 times [2022-11-02 21:12:10,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:10,244 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504063794] [2022-11-02 21:12:10,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:10,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:10,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:10,250 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:10,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:10,260 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:10,306 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:10,307 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-02 21:12:10,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-11-02 21:12:10,309 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:10,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:10,607 INFO L93 Difference]: Finished difference Result 135 states and 136 transitions. [2022-11-02 21:12:10,607 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 136 transitions. [2022-11-02 21:12:10,619 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:10,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 135 states and 136 transitions. [2022-11-02 21:12:10,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2022-11-02 21:12:10,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2022-11-02 21:12:10,625 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 136 transitions. [2022-11-02 21:12:10,625 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:10,628 INFO L218 hiAutomatonCegarLoop]: Abstraction has 135 states and 136 transitions. [2022-11-02 21:12:10,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 136 transitions. [2022-11-02 21:12:10,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 52. [2022-11-02 21:12:10,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:10,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2022-11-02 21:12:10,636 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2022-11-02 21:12:10,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-02 21:12:10,638 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2022-11-02 21:12:10,639 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-02 21:12:10,639 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2022-11-02 21:12:10,639 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:10,641 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:10,641 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:10,642 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2022-11-02 21:12:10,644 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:10,644 INFO L748 eck$LassoCheckResult]: Stem: 704#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 705#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 712#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 713#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 714#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 706#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 707#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 755#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 754#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 753#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 752#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 751#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 750#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 749#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 748#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 747#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 746#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 745#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 744#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 743#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 742#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 741#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 740#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 739#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 738#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 737#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 736#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 735#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 734#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 733#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 732#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 731#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 730#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 729#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 728#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 727#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 726#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 725#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 724#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 723#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 722#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 721#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 720#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 719#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 718#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 717#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 716#L24-3 assume !(main_~i~0#1 < 1024); 715#L24-4 main_~i~0#1 := 0; 711#L28-4 [2022-11-02 21:12:10,645 INFO L750 eck$LassoCheckResult]: Loop: 711#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 708#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 709#L29 assume !(main_~i~0#1 >= 1023); 710#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 711#L28-4 [2022-11-02 21:12:10,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:10,646 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2022-11-02 21:12:10,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:10,646 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497628844] [2022-11-02 21:12:10,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:10,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:10,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:11,440 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:11,440 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:11,440 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497628844] [2022-11-02 21:12:11,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1497628844] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:11,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1132088761] [2022-11-02 21:12:11,441 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-02 21:12:11,441 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 21:12:11,441 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:11,446 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 21:12:11,455 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-02 21:12:11,580 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-02 21:12:11,580 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 21:12:11,582 INFO L263 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-02 21:12:11,586 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:11,727 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:11,727 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:12,625 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:12,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1132088761] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:12,626 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 21:12:12,626 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-11-02 21:12:12,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246137288] [2022-11-02 21:12:12,626 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:12,627 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 21:12:12,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:12,627 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 5 times [2022-11-02 21:12:12,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:12,628 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1928094509] [2022-11-02 21:12:12,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:12,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:12,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:12,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:12,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:12,638 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:12,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:12,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-02 21:12:12,696 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-11-02 21:12:12,699 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:13,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:13,296 INFO L93 Difference]: Finished difference Result 279 states and 280 transitions. [2022-11-02 21:12:13,297 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 279 states and 280 transitions. [2022-11-02 21:12:13,299 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:13,301 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 279 states to 279 states and 280 transitions. [2022-11-02 21:12:13,301 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 187 [2022-11-02 21:12:13,302 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 187 [2022-11-02 21:12:13,302 INFO L73 IsDeterministic]: Start isDeterministic. Operand 279 states and 280 transitions. [2022-11-02 21:12:13,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:13,303 INFO L218 hiAutomatonCegarLoop]: Abstraction has 279 states and 280 transitions. [2022-11-02 21:12:13,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states and 280 transitions. [2022-11-02 21:12:13,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 100. [2022-11-02 21:12:13,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:13,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2022-11-02 21:12:13,311 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2022-11-02 21:12:13,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-02 21:12:13,312 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2022-11-02 21:12:13,313 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-02 21:12:13,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2022-11-02 21:12:13,314 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:13,314 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:13,314 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:13,316 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2022-11-02 21:12:13,316 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:13,316 INFO L748 eck$LassoCheckResult]: Stem: 1369#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 1370#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 1377#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1378#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1379#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1371#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1372#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1468#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1467#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1466#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1465#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1464#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1463#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1462#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1461#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1460#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1459#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1458#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1457#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1456#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1455#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1454#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1453#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1452#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1451#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1450#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1449#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1448#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1447#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1446#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1445#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1444#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1443#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1442#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1441#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1440#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1439#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1438#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1437#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1436#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1435#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1434#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1433#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1432#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1431#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1430#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1429#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1428#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1427#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1426#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1425#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1424#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1423#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1422#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1421#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1420#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1419#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1418#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1417#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1416#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1415#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1414#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1413#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1412#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1411#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1410#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1409#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1408#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1407#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1406#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1405#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1404#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1403#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1402#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1401#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1400#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1399#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1398#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1397#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1396#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1395#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1394#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1393#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1392#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1391#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1390#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1389#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1388#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1387#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1386#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1385#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1384#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1383#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1382#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1381#L24-3 assume !(main_~i~0#1 < 1024); 1380#L24-4 main_~i~0#1 := 0; 1376#L28-4 [2022-11-02 21:12:13,317 INFO L750 eck$LassoCheckResult]: Loop: 1376#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 1373#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 1374#L29 assume !(main_~i~0#1 >= 1023); 1375#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1376#L28-4 [2022-11-02 21:12:13,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:13,317 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2022-11-02 21:12:13,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:13,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184017719] [2022-11-02 21:12:13,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:13,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:13,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:15,639 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:15,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:15,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184017719] [2022-11-02 21:12:15,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [184017719] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:15,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1897949957] [2022-11-02 21:12:15,640 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-02 21:12:15,640 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 21:12:15,640 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:15,643 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 21:12:15,664 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-02 21:12:19,436 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-11-02 21:12:19,436 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-02 21:12:19,449 INFO L263 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-02 21:12:19,454 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-02 21:12:19,675 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:19,675 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-02 21:12:22,912 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:22,912 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1897949957] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-02 21:12:22,912 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-02 21:12:22,913 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2022-11-02 21:12:22,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463662420] [2022-11-02 21:12:22,914 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-02 21:12:22,919 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-02 21:12:22,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:22,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 6 times [2022-11-02 21:12:22,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:22,921 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481213861] [2022-11-02 21:12:22,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:22,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:22,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:22,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-02 21:12:22,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-02 21:12:22,928 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-02 21:12:22,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-02 21:12:22,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-02 21:12:22,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-11-02 21:12:22,976 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:24,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-02 21:12:24,932 INFO L93 Difference]: Finished difference Result 567 states and 568 transitions. [2022-11-02 21:12:24,932 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 567 states and 568 transitions. [2022-11-02 21:12:24,936 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:24,939 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 567 states to 567 states and 568 transitions. [2022-11-02 21:12:24,939 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 379 [2022-11-02 21:12:24,940 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 379 [2022-11-02 21:12:24,940 INFO L73 IsDeterministic]: Start isDeterministic. Operand 567 states and 568 transitions. [2022-11-02 21:12:24,942 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-02 21:12:24,942 INFO L218 hiAutomatonCegarLoop]: Abstraction has 567 states and 568 transitions. [2022-11-02 21:12:24,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states and 568 transitions. [2022-11-02 21:12:24,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 196. [2022-11-02 21:12:24,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-02 21:12:24,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2022-11-02 21:12:24,954 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2022-11-02 21:12:24,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-11-02 21:12:24,955 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2022-11-02 21:12:24,955 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-02 21:12:24,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2022-11-02 21:12:24,957 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-02 21:12:24,957 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-02 21:12:24,957 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-02 21:12:24,962 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2022-11-02 21:12:24,962 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-02 21:12:24,963 INFO L748 eck$LassoCheckResult]: Stem: 2706#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 2707#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 2714#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2715#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2716#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2708#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2709#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2901#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2900#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2899#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2898#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2897#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2896#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2895#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2894#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2893#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2892#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2891#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2890#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2889#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2888#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2887#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2886#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2885#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2884#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2883#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2882#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2881#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2880#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2879#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2878#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2877#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2876#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2875#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2874#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2873#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2872#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2871#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2870#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2869#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2868#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2867#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2866#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2865#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2864#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2863#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2862#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2861#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2860#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2859#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2858#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2857#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2856#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2855#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2854#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2853#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2852#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2851#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2850#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2849#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2848#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2847#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2846#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2845#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2844#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2843#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2842#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2841#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2840#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2839#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2838#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2837#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2836#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2835#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2834#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2833#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2832#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2831#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2830#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2829#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2828#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2827#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2826#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2825#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2824#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2823#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2822#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2821#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2820#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2819#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2818#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2817#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2816#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2815#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2814#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2813#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2812#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2811#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2810#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2809#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2808#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2807#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2806#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2805#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2804#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2803#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2802#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2801#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2800#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2799#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2798#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2797#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2796#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2795#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2794#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2793#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2792#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2791#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2790#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2789#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2788#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2787#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2786#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2785#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2784#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2783#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2782#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2781#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2780#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2779#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2778#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2777#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2776#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2775#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2774#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2773#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2772#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2771#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2770#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2769#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2768#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2767#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2766#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2765#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2764#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2763#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2762#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2761#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2760#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2759#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2758#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2757#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2756#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2755#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2754#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2753#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2752#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2751#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2750#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2749#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2748#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2747#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2746#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2745#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2744#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2743#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2742#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2741#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2740#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2739#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2738#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2737#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2736#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2735#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2734#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2733#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2732#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2731#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2730#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2729#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2728#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2727#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2726#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2725#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2724#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2723#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2722#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2721#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2720#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2719#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2718#L24-3 assume !(main_~i~0#1 < 1024); 2717#L24-4 main_~i~0#1 := 0; 2713#L28-4 [2022-11-02 21:12:24,963 INFO L750 eck$LassoCheckResult]: Loop: 2713#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 2710#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 2711#L29 assume !(main_~i~0#1 >= 1023); 2712#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2713#L28-4 [2022-11-02 21:12:24,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-02 21:12:24,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2022-11-02 21:12:24,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-02 21:12:24,965 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436882530] [2022-11-02 21:12:24,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-02 21:12:24,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-02 21:12:25,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-02 21:12:32,226 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-02 21:12:32,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-02 21:12:32,226 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [436882530] [2022-11-02 21:12:32,227 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [436882530] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-02 21:12:32,227 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2039593542] [2022-11-02 21:12:32,227 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-02 21:12:32,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-02 21:12:32,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 [2022-11-02 21:12:32,234 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-02 21:12:32,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad7d91f0-358f-4882-9002-5f04c56d355f/bin/uautomizer-Dbtcem3rbc/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process