./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash dd1724e619d2e8fc18a4dc8aa6c726656a51fc7e14f993d511c4c773ed4748f3 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:28:50,039 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:28:50,042 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:28:50,082 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:28:50,084 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:28:50,089 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:28:50,091 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:28:50,095 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:28:50,099 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:28:50,102 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:28:50,104 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:28:50,107 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:28:50,108 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:28:50,113 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:28:50,115 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:28:50,117 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:28:50,119 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:28:50,121 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:28:50,123 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:28:50,131 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:28:50,134 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:28:50,135 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:28:50,139 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:28:50,140 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:28:50,150 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:28:50,150 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:28:50,151 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:28:50,152 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:28:50,152 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:28:50,153 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:28:50,154 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:28:50,155 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:28:50,156 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:28:50,157 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:28:50,158 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:28:50,159 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:28:50,160 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:28:50,160 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:28:50,160 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:28:50,162 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:28:50,163 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:28:50,164 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 12:28:50,188 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:28:50,188 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:28:50,188 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:28:50,188 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:28:50,190 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:28:50,190 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:28:50,190 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:28:50,190 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 12:28:50,191 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 12:28:50,191 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 12:28:50,191 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 12:28:50,191 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 12:28:50,191 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 12:28:50,192 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:28:50,192 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 12:28:50,192 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 12:28:50,192 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:28:50,192 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 12:28:50,193 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:28:50,193 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 12:28:50,193 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 12:28:50,193 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 12:28:50,193 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 12:28:50,194 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:28:50,194 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 12:28:50,194 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:28:50,194 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 12:28:50,197 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:28:50,198 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:28:50,199 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:28:50,199 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:28:50,200 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 12:28:50,201 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dd1724e619d2e8fc18a4dc8aa6c726656a51fc7e14f993d511c4c773ed4748f3 [2022-11-16 12:28:50,537 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:28:50,565 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:28:50,568 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:28:50,570 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:28:50,571 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:28:50,572 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2022-11-16 12:28:50,662 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/data/4d9985109/d890068dc60f4715b1b17f1ea966b5d3/FLAG828ff0928 [2022-11-16 12:28:51,245 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:28:51,246 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2022-11-16 12:28:51,264 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/data/4d9985109/d890068dc60f4715b1b17f1ea966b5d3/FLAG828ff0928 [2022-11-16 12:28:51,588 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/data/4d9985109/d890068dc60f4715b1b17f1ea966b5d3 [2022-11-16 12:28:51,591 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:28:51,593 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:28:51,594 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:28:51,595 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:28:51,601 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:28:51,602 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:28:51" (1/1) ... [2022-11-16 12:28:51,603 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ca16cb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:51, skipping insertion in model container [2022-11-16 12:28:51,604 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:28:51" (1/1) ... [2022-11-16 12:28:51,610 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:28:51,660 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:28:51,929 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c[17005,17018] [2022-11-16 12:28:51,929 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:28:51,940 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:28:52,024 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c[17005,17018] [2022-11-16 12:28:52,024 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:28:52,055 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:28:52,055 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52 WrapperNode [2022-11-16 12:28:52,055 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:28:52,056 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:28:52,056 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:28:52,057 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:28:52,063 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,074 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,116 INFO L138 Inliner]: procedures = 26, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 392 [2022-11-16 12:28:52,117 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:28:52,118 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:28:52,118 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:28:52,118 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:28:52,127 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,127 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,131 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,131 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,140 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,147 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,150 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,153 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,157 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:28:52,158 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:28:52,159 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:28:52,159 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:28:52,160 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (1/1) ... [2022-11-16 12:28:52,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:28:52,183 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:28:52,213 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:28:52,243 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c923283e-2f77-4f72-8410-a9fa1ad45183/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 12:28:52,276 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 12:28:52,276 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 12:28:52,277 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:28:52,277 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:28:52,434 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:28:52,436 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:28:53,299 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:28:53,314 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:28:53,315 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 12:28:53,319 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:28:53 BoogieIcfgContainer [2022-11-16 12:28:53,319 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:28:53,321 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 12:28:53,321 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 12:28:53,326 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 12:28:53,327 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:28:53,327 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 12:28:51" (1/3) ... [2022-11-16 12:28:53,328 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2b1e1c1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 12:28:53, skipping insertion in model container [2022-11-16 12:28:53,329 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:28:53,329 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:28:52" (2/3) ... [2022-11-16 12:28:53,329 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2b1e1c1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 12:28:53, skipping insertion in model container [2022-11-16 12:28:53,329 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:28:53,330 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:28:53" (3/3) ... [2022-11-16 12:28:53,331 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2022-11-16 12:28:53,419 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 12:28:53,420 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 12:28:53,420 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 12:28:53,420 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 12:28:53,420 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 12:28:53,420 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 12:28:53,421 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 12:28:53,421 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 12:28:53,426 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 122 states, 121 states have (on average 1.7520661157024793) internal successors, (212), 121 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:53,455 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 71 [2022-11-16 12:28:53,455 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:28:53,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:28:53,464 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:53,465 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:53,465 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 12:28:53,466 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 122 states, 121 states have (on average 1.7520661157024793) internal successors, (212), 121 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:53,478 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 71 [2022-11-16 12:28:53,478 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:28:53,478 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:28:53,480 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:53,480 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:53,489 INFO L748 eck$LassoCheckResult]: Stem: 106#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~alive6~0 := 0;~alive5~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~alive2~0 := 0;~send1~0 := 0;~alive1~0 := 0;~send2~0 := 0;~alive4~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~alive3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~r1~0 := 0; 35#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 105#L293true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 90#L293-1true init_#res#1 := init_~tmp~0#1; 94#L458true main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 37#L22true assume 0 == assume_abort_if_not_~cond#1;assume false; 87#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 47#L534-2true [2022-11-16 12:28:53,490 INFO L750 eck$LassoCheckResult]: Loop: 47#L534-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 104#L84true assume !(0 != ~mode1~0 % 256); 110#L107true assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 36#L110-2true ~mode1~0 := 1; 22#L84-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 74#L124true assume !(0 != ~mode2~0 % 256); 40#L141true assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 63#L144-2true ~mode2~0 := 1; 51#L124-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 16#L158true assume !(0 != ~mode3~0 % 256); 4#L175true assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 9#L178-2true ~mode3~0 := 1; 14#L158-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 85#L192true assume !(0 != ~mode4~0 % 256); 96#L209true assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 117#L212-2true ~mode4~0 := 1; 83#L192-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 12#L226true assume !(0 != ~mode5~0 % 256); 72#L243true assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 15#L246-2true ~mode5~0 := 1; 34#L226-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 56#L260true assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 112#L263true assume !(node6_~m6~0#1 != ~nomsg~0); 120#L263-1true ~mode6~0 := 0; 84#L260-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 116#L466true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 66#L466-1true check_#res#1 := check_~tmp~1#1; 121#L478true main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 98#L566true assume !(0 == assert_~arg#1 % 256); 62#L561true assume { :end_inline_assert } true; 47#L534-2true [2022-11-16 12:28:53,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:53,496 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845626, now seen corresponding path program 1 times [2022-11-16 12:28:53,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:53,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100911764] [2022-11-16 12:28:53,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:53,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:53,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:28:53,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:28:53,736 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:28:53,738 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100911764] [2022-11-16 12:28:53,739 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [100911764] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:28:53,739 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:28:53,741 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:28:53,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321055606] [2022-11-16 12:28:53,744 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:28:53,749 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:28:53,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:53,753 INFO L85 PathProgramCache]: Analyzing trace with hash 290825599, now seen corresponding path program 1 times [2022-11-16 12:28:53,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:53,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1099933067] [2022-11-16 12:28:53,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:53,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:53,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:28:54,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:28:54,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:28:54,265 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1099933067] [2022-11-16 12:28:54,265 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1099933067] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:28:54,266 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:28:54,266 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:28:54,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400331522] [2022-11-16 12:28:54,266 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:28:54,268 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 12:28:54,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:28:54,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-16 12:28:54,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-16 12:28:54,308 INFO L87 Difference]: Start difference. First operand has 122 states, 121 states have (on average 1.7520661157024793) internal successors, (212), 121 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:54,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:28:54,327 INFO L93 Difference]: Finished difference Result 118 states and 205 transitions. [2022-11-16 12:28:54,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 118 states and 205 transitions. [2022-11-16 12:28:54,332 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2022-11-16 12:28:54,338 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 118 states to 117 states and 204 transitions. [2022-11-16 12:28:54,339 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2022-11-16 12:28:54,340 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2022-11-16 12:28:54,341 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 204 transitions. [2022-11-16 12:28:54,342 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:28:54,342 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 204 transitions. [2022-11-16 12:28:54,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 204 transitions. [2022-11-16 12:28:54,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2022-11-16 12:28:54,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.7435897435897436) internal successors, (204), 116 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:54,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 204 transitions. [2022-11-16 12:28:54,378 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 204 transitions. [2022-11-16 12:28:54,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-16 12:28:54,382 INFO L428 stractBuchiCegarLoop]: Abstraction has 117 states and 204 transitions. [2022-11-16 12:28:54,382 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 12:28:54,383 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 204 transitions. [2022-11-16 12:28:54,385 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2022-11-16 12:28:54,385 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:28:54,385 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:28:54,386 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:54,387 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:54,387 INFO L748 eck$LassoCheckResult]: Stem: 365#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~alive6~0 := 0;~alive5~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~alive2~0 := 0;~send1~0 := 0;~alive1~0 := 0;~send2~0 := 0;~alive4~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~alive3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~r1~0 := 0; 304#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 305#L293 assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 257#L293-1 init_#res#1 := init_~tmp~0#1; 359#L458 main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 307#L22 assume !(0 == assume_abort_if_not_~cond#1); 308#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 320#L534-2 [2022-11-16 12:28:54,387 INFO L750 eck$LassoCheckResult]: Loop: 320#L534-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 321#L84 assume !(0 != ~mode1~0 % 256); 364#L107 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 306#L110-2 ~mode1~0 := 1; 289#L84-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 290#L124 assume !(0 != ~mode2~0 % 256); 311#L141 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 264#L144-2 ~mode2~0 := 1; 327#L124-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 279#L158 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 273#L161 assume !(node3_~m3~0#1 != ~nomsg~0); 275#L161-1 ~mode3~0 := 0; 265#L158-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 276#L192 assume !(0 != ~mode4~0 % 256); 354#L209 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 343#L212-2 ~mode4~0 := 1; 315#L192-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 270#L226 assume !(0 != ~mode5~0 % 256); 272#L243 assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 277#L246-2 ~mode5~0 := 1; 278#L226-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 303#L260 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 333#L263 assume !(node6_~m6~0#1 != ~nomsg~0); 284#L263-1 ~mode6~0 := 0; 352#L260-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 353#L466 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 339#L466-1 check_#res#1 := check_~tmp~1#1; 340#L478 main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 361#L566 assume !(0 == assert_~arg#1 % 256); 337#L561 assume { :end_inline_assert } true; 320#L534-2 [2022-11-16 12:28:54,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:54,388 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845688, now seen corresponding path program 1 times [2022-11-16 12:28:54,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:54,389 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379574692] [2022-11-16 12:28:54,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:54,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:54,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:28:54,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:28:54,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:28:54,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379574692] [2022-11-16 12:28:54,452 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379574692] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:28:54,452 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:28:54,453 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:28:54,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723212214] [2022-11-16 12:28:54,454 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:28:54,455 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:28:54,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:54,456 INFO L85 PathProgramCache]: Analyzing trace with hash 890143038, now seen corresponding path program 1 times [2022-11-16 12:28:54,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:54,457 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243332309] [2022-11-16 12:28:54,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:54,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:54,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:28:54,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:28:54,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:28:54,785 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243332309] [2022-11-16 12:28:54,785 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243332309] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:28:54,786 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:28:54,786 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:28:54,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452375257] [2022-11-16 12:28:54,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:28:54,789 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 12:28:54,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:28:54,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:28:54,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:28:54,793 INFO L87 Difference]: Start difference. First operand 117 states and 204 transitions. cyclomatic complexity: 88 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:54,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:28:54,923 INFO L93 Difference]: Finished difference Result 120 states and 206 transitions. [2022-11-16 12:28:54,923 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 206 transitions. [2022-11-16 12:28:54,925 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2022-11-16 12:28:54,926 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 117 states and 163 transitions. [2022-11-16 12:28:54,926 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2022-11-16 12:28:54,927 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2022-11-16 12:28:54,927 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 163 transitions. [2022-11-16 12:28:54,928 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:28:54,928 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 163 transitions. [2022-11-16 12:28:54,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 163 transitions. [2022-11-16 12:28:54,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2022-11-16 12:28:54,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.393162393162393) internal successors, (163), 116 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:54,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 163 transitions. [2022-11-16 12:28:54,935 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 163 transitions. [2022-11-16 12:28:54,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:28:54,936 INFO L428 stractBuchiCegarLoop]: Abstraction has 117 states and 163 transitions. [2022-11-16 12:28:54,937 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 12:28:54,937 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 163 transitions. [2022-11-16 12:28:54,938 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2022-11-16 12:28:54,938 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:28:54,938 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:28:54,940 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:54,940 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:54,941 INFO L748 eck$LassoCheckResult]: Stem: 617#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~alive6~0 := 0;~alive5~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~alive2~0 := 0;~send1~0 := 0;~alive1~0 := 0;~send2~0 := 0;~alive4~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~alive3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~r1~0 := 0; 555#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 556#L293 assume 0 == ~r1~0 % 256; 614#L294 assume ~alive1~0 % 256 + ~alive2~0 % 256 + ~alive3~0 % 256 + ~alive4~0 % 256 + ~alive5~0 % 256 + ~alive6~0 % 256 >= 1; 512#L295 assume ~id1~0 >= 0; 513#L296 assume 0 == ~st1~0; 546#L297 assume ~send1~0 == ~id1~0; 544#L298 assume 0 == ~mode1~0 % 256; 545#L299 assume ~id2~0 >= 0; 553#L300 assume 0 == ~st2~0; 587#L301 assume ~send2~0 == ~id2~0; 602#L302 assume 0 == ~mode2~0 % 256; 603#L303 assume ~id3~0 >= 0; 610#L304 assume 0 == ~st3~0; 574#L305 assume ~send3~0 == ~id3~0; 575#L306 assume 0 == ~mode3~0 % 256; 599#L307 assume ~id4~0 >= 0; 519#L308 assume 0 == ~st4~0; 520#L309 assume ~send4~0 == ~id4~0; 593#L310 assume 0 == ~mode4~0 % 256; 563#L311 assume ~id5~0 >= 0; 564#L312 assume 0 == ~st5~0; 538#L313 assume ~send5~0 == ~id5~0; 539#L314 assume 0 == ~mode5~0 % 256; 560#L315 assume ~id6~0 >= 0; 561#L316 assume 0 == ~st6~0; 510#L317 assume ~send6~0 == ~id6~0; 511#L318 assume 0 == ~mode6~0 % 256; 618#L319 assume ~id1~0 != ~id2~0; 601#L320 assume ~id1~0 != ~id3~0; 583#L321 assume ~id1~0 != ~id4~0; 584#L322 assume ~id1~0 != ~id5~0; 503#L323 assume ~id1~0 != ~id6~0; 504#L324 assume ~id2~0 != ~id3~0; 531#L325 assume ~id2~0 != ~id4~0; 543#L326 assume ~id2~0 != ~id5~0; 532#L327 assume ~id2~0 != ~id6~0; 533#L328 assume ~id3~0 != ~id4~0; 548#L329 assume ~id3~0 != ~id5~0; 549#L330 assume ~id3~0 != ~id6~0; 516#L331 assume ~id4~0 != ~id5~0; 517#L332 assume ~id4~0 != ~id6~0; 542#L333 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 578#L293-1 init_#res#1 := init_~tmp~0#1; 611#L458 main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 558#L22 assume !(0 == assume_abort_if_not_~cond#1); 559#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 571#L534-2 [2022-11-16 12:28:54,941 INFO L750 eck$LassoCheckResult]: Loop: 571#L534-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 572#L84 assume !(0 != ~mode1~0 % 256); 616#L107 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 557#L110-2 ~mode1~0 := 1; 540#L84-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 541#L124 assume !(0 != ~mode2~0 % 256); 562#L141 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 515#L144-2 ~mode2~0 := 1; 579#L124-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 530#L158 assume !(0 != ~mode3~0 % 256); 507#L175 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 508#L178-2 ~mode3~0 := 1; 518#L158-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 527#L192 assume !(0 != ~mode4~0 % 256); 606#L209 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 595#L212-2 ~mode4~0 := 1; 566#L192-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 521#L226 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 522#L229 assume !(node5_~m5~0#1 != ~nomsg~0); 573#L229-1 ~mode5~0 := 0; 529#L226-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 554#L260 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 585#L263 assume !(node6_~m6~0#1 != ~nomsg~0); 535#L263-1 ~mode6~0 := 0; 604#L260-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 605#L466 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 591#L466-1 check_#res#1 := check_~tmp~1#1; 592#L478 main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 613#L566 assume !(0 == assert_~arg#1 % 256); 589#L561 assume { :end_inline_assert } true; 571#L534-2 [2022-11-16 12:28:54,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:54,942 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 1 times [2022-11-16 12:28:54,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:54,942 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1441977704] [2022-11-16 12:28:54,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:54,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:54,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:28:54,962 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:28:54,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:28:55,009 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:28:55,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:55,009 INFO L85 PathProgramCache]: Analyzing trace with hash 2108272702, now seen corresponding path program 1 times [2022-11-16 12:28:55,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:55,010 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991432146] [2022-11-16 12:28:55,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:55,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:55,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:28:55,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:28:55,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:28:55,201 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991432146] [2022-11-16 12:28:55,201 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1991432146] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:28:55,201 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:28:55,201 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:28:55,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [260540814] [2022-11-16 12:28:55,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:28:55,202 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 12:28:55,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:28:55,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:28:55,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:28:55,203 INFO L87 Difference]: Start difference. First operand 117 states and 163 transitions. cyclomatic complexity: 47 Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:55,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:28:55,265 INFO L93 Difference]: Finished difference Result 120 states and 165 transitions. [2022-11-16 12:28:55,265 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 165 transitions. [2022-11-16 12:28:55,267 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2022-11-16 12:28:55,269 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 117 states and 161 transitions. [2022-11-16 12:28:55,269 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2022-11-16 12:28:55,269 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2022-11-16 12:28:55,270 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 161 transitions. [2022-11-16 12:28:55,270 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:28:55,271 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 161 transitions. [2022-11-16 12:28:55,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 161 transitions. [2022-11-16 12:28:55,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2022-11-16 12:28:55,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.376068376068376) internal successors, (161), 116 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:28:55,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 161 transitions. [2022-11-16 12:28:55,277 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 161 transitions. [2022-11-16 12:28:55,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:28:55,286 INFO L428 stractBuchiCegarLoop]: Abstraction has 117 states and 161 transitions. [2022-11-16 12:28:55,286 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 12:28:55,286 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 161 transitions. [2022-11-16 12:28:55,291 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2022-11-16 12:28:55,291 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:28:55,291 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:28:55,299 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:55,299 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:28:55,299 INFO L748 eck$LassoCheckResult]: Stem: 866#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~alive6~0 := 0;~alive5~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~alive2~0 := 0;~send1~0 := 0;~alive1~0 := 0;~send2~0 := 0;~alive4~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~alive3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~r1~0 := 0; 804#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 805#L293 assume 0 == ~r1~0 % 256; 863#L294 assume ~alive1~0 % 256 + ~alive2~0 % 256 + ~alive3~0 % 256 + ~alive4~0 % 256 + ~alive5~0 % 256 + ~alive6~0 % 256 >= 1; 761#L295 assume ~id1~0 >= 0; 762#L296 assume 0 == ~st1~0; 795#L297 assume ~send1~0 == ~id1~0; 793#L298 assume 0 == ~mode1~0 % 256; 794#L299 assume ~id2~0 >= 0; 802#L300 assume 0 == ~st2~0; 836#L301 assume ~send2~0 == ~id2~0; 851#L302 assume 0 == ~mode2~0 % 256; 852#L303 assume ~id3~0 >= 0; 859#L304 assume 0 == ~st3~0; 823#L305 assume ~send3~0 == ~id3~0; 824#L306 assume 0 == ~mode3~0 % 256; 848#L307 assume ~id4~0 >= 0; 768#L308 assume 0 == ~st4~0; 769#L309 assume ~send4~0 == ~id4~0; 842#L310 assume 0 == ~mode4~0 % 256; 812#L311 assume ~id5~0 >= 0; 813#L312 assume 0 == ~st5~0; 787#L313 assume ~send5~0 == ~id5~0; 788#L314 assume 0 == ~mode5~0 % 256; 809#L315 assume ~id6~0 >= 0; 810#L316 assume 0 == ~st6~0; 759#L317 assume ~send6~0 == ~id6~0; 760#L318 assume 0 == ~mode6~0 % 256; 867#L319 assume ~id1~0 != ~id2~0; 850#L320 assume ~id1~0 != ~id3~0; 832#L321 assume ~id1~0 != ~id4~0; 833#L322 assume ~id1~0 != ~id5~0; 752#L323 assume ~id1~0 != ~id6~0; 753#L324 assume ~id2~0 != ~id3~0; 780#L325 assume ~id2~0 != ~id4~0; 792#L326 assume ~id2~0 != ~id5~0; 781#L327 assume ~id2~0 != ~id6~0; 782#L328 assume ~id3~0 != ~id4~0; 797#L329 assume ~id3~0 != ~id5~0; 798#L330 assume ~id3~0 != ~id6~0; 765#L331 assume ~id4~0 != ~id5~0; 766#L332 assume ~id4~0 != ~id6~0; 791#L333 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 827#L293-1 init_#res#1 := init_~tmp~0#1; 860#L458 main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 807#L22 assume !(0 == assume_abort_if_not_~cond#1); 808#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 820#L534-2 [2022-11-16 12:28:55,300 INFO L750 eck$LassoCheckResult]: Loop: 820#L534-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 821#L84 assume !(0 != ~mode1~0 % 256); 865#L107 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 806#L110-2 ~mode1~0 := 1; 789#L84-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 790#L124 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 849#L127 assume !(node2_~m2~0#1 != ~nomsg~0); 818#L127-1 ~mode2~0 := 0; 828#L124-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 779#L158 assume !(0 != ~mode3~0 % 256); 756#L175 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 757#L178-2 ~mode3~0 := 1; 767#L158-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 776#L192 assume !(0 != ~mode4~0 % 256); 855#L209 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 844#L212-2 ~mode4~0 := 1; 815#L192-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 770#L226 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 771#L229 assume !(node5_~m5~0#1 != ~nomsg~0); 822#L229-1 ~mode5~0 := 0; 778#L226-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 803#L260 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 834#L263 assume !(node6_~m6~0#1 != ~nomsg~0); 784#L263-1 ~mode6~0 := 0; 853#L260-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 854#L466 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 868#L467 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 840#L466-1 check_#res#1 := check_~tmp~1#1; 841#L478 main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 862#L566 assume !(0 == assert_~arg#1 % 256); 838#L561 assume { :end_inline_assert } true; 820#L534-2 [2022-11-16 12:28:55,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:55,300 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 2 times [2022-11-16 12:28:55,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:55,301 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405834342] [2022-11-16 12:28:55,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:55,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:55,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:28:55,320 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:28:55,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:28:55,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:28:55,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:55,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1959206920, now seen corresponding path program 1 times [2022-11-16 12:28:55,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:55,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999031749] [2022-11-16 12:28:55,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:55,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:55,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:28:55,370 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:28:55,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:28:55,393 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:28:55,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:28:55,394 INFO L85 PathProgramCache]: Analyzing trace with hash -1084176041, now seen corresponding path program 1 times [2022-11-16 12:28:55,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:28:55,394 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850364203] [2022-11-16 12:28:55,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:28:55,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:28:55,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:28:55,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:28:55,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:28:55,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1850364203] [2022-11-16 12:28:55,490 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1850364203] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:28:55,494 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:28:55,494 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:28:55,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [365666864] [2022-11-16 12:28:55,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:28:57,936 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 12:28:57,937 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 12:28:57,937 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 12:28:57,937 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 12:28:57,938 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-16 12:28:57,938 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:28:57,938 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 12:28:57,938 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 12:28:57,938 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-16 12:28:57,938 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 12:28:57,939 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 12:28:57,974 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,011 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,017 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,020 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,038 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,041 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,955 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,962 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,969 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,975 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,977 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,983 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,988 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,991 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:28:58,995 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:29:00,869 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 20