./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b4e7977192ae56aeb09dc050b873d7b40c1e47d710f31b358c00a46d3bffe743 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 10:59:56,721 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 10:59:56,724 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 10:59:56,765 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 10:59:56,767 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 10:59:56,768 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 10:59:56,771 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 10:59:56,778 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 10:59:56,781 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 10:59:56,783 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 10:59:56,785 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 10:59:56,786 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 10:59:56,788 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 10:59:56,791 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 10:59:56,792 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 10:59:56,793 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 10:59:56,795 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 10:59:56,800 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 10:59:56,802 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 10:59:56,803 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 10:59:56,807 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 10:59:56,808 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 10:59:56,809 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 10:59:56,812 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 10:59:56,816 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 10:59:56,821 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 10:59:56,821 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 10:59:56,822 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 10:59:56,824 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 10:59:56,825 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 10:59:56,825 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 10:59:56,827 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 10:59:56,828 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 10:59:56,829 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 10:59:56,830 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 10:59:56,831 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 10:59:56,831 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 10:59:56,832 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 10:59:56,832 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 10:59:56,833 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 10:59:56,834 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 10:59:56,835 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 10:59:56,879 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 10:59:56,880 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 10:59:56,880 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 10:59:56,881 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 10:59:56,882 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 10:59:56,882 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 10:59:56,883 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 10:59:56,883 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 10:59:56,883 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 10:59:56,883 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 10:59:56,885 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 10:59:56,885 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 10:59:56,885 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 10:59:56,886 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 10:59:56,886 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 10:59:56,886 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 10:59:56,886 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 10:59:56,887 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 10:59:56,887 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 10:59:56,887 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 10:59:56,887 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 10:59:56,888 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 10:59:56,888 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 10:59:56,888 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 10:59:56,888 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 10:59:56,889 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 10:59:56,889 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 10:59:56,890 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 10:59:56,891 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 10:59:56,891 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 10:59:56,891 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 10:59:56,893 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 10:59:56,893 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b4e7977192ae56aeb09dc050b873d7b40c1e47d710f31b358c00a46d3bffe743 [2022-11-16 10:59:57,225 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 10:59:57,252 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 10:59:57,255 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 10:59:57,256 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 10:59:57,257 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 10:59:57,259 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c [2022-11-16 10:59:57,337 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/data/aaa353df9/292ef1e137b243b19b500a0e9007af91/FLAG7bba1a784 [2022-11-16 10:59:57,848 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 10:59:57,849 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c [2022-11-16 10:59:57,857 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/data/aaa353df9/292ef1e137b243b19b500a0e9007af91/FLAG7bba1a784 [2022-11-16 10:59:58,164 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/data/aaa353df9/292ef1e137b243b19b500a0e9007af91 [2022-11-16 10:59:58,167 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 10:59:58,168 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 10:59:58,172 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 10:59:58,172 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 10:59:58,176 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 10:59:58,177 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,179 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@acc56b1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58, skipping insertion in model container [2022-11-16 10:59:58,180 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,187 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 10:59:58,243 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 10:59:58,508 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c[15112,15125] [2022-11-16 10:59:58,509 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 10:59:58,518 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 10:59:58,575 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c[15112,15125] [2022-11-16 10:59:58,576 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 10:59:58,591 INFO L208 MainTranslator]: Completed translation [2022-11-16 10:59:58,591 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58 WrapperNode [2022-11-16 10:59:58,591 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 10:59:58,593 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 10:59:58,593 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 10:59:58,593 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 10:59:58,601 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,617 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,653 INFO L138 Inliner]: procedures = 25, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 348 [2022-11-16 10:59:58,653 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 10:59:58,654 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 10:59:58,654 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 10:59:58,654 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 10:59:58,670 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,670 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,674 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,674 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,681 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,687 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,689 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,691 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,695 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 10:59:58,696 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 10:59:58,696 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 10:59:58,696 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 10:59:58,697 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (1/1) ... [2022-11-16 10:59:58,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 10:59:58,729 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 10:59:58,759 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 10:59:58,791 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d3846e69-cc9b-417d-8eba-130d9ce1369d/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 10:59:58,817 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 10:59:58,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 10:59:58,817 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 10:59:58,817 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 10:59:58,964 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 10:59:58,966 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 10:59:59,481 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 10:59:59,490 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 10:59:59,498 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 10:59:59,501 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 10:59:59 BoogieIcfgContainer [2022-11-16 10:59:59,501 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 10:59:59,502 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 10:59:59,502 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 10:59:59,508 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 10:59:59,509 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 10:59:59,509 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 10:59:58" (1/3) ... [2022-11-16 10:59:59,510 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6ef4e409 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 10:59:59, skipping insertion in model container [2022-11-16 10:59:59,510 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 10:59:59,510 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:59:58" (2/3) ... [2022-11-16 10:59:59,511 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6ef4e409 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 10:59:59, skipping insertion in model container [2022-11-16 10:59:59,511 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 10:59:59,511 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 10:59:59" (3/3) ... [2022-11-16 10:59:59,513 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.1.ufo.BOUNDED-12.pals.c [2022-11-16 10:59:59,582 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 10:59:59,582 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 10:59:59,582 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 10:59:59,582 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 10:59:59,582 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 10:59:59,583 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 10:59:59,583 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 10:59:59,583 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 10:59:59,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:59:59,616 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-16 10:59:59,616 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:59:59,616 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:59:59,624 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:59:59,624 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:59:59,625 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 10:59:59,625 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:59:59,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-16 10:59:59,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:59:59,632 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:59:59,634 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:59:59,634 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:59:59,642 INFO L748 eck$LassoCheckResult]: Stem: 83#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 27#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 55#L230true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 93#L230-1true init_#res#1 := init_~tmp~0#1; 63#L391true main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 29#L22true assume !(0 == assume_abort_if_not_~cond#1); 70#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 25#L469-2true [2022-11-16 10:59:59,643 INFO L750 eck$LassoCheckResult]: Loop: 25#L469-2true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 14#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 31#L78-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 82#L106true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 34#L106-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 30#L131true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 69#L131-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 91#L156true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 26#L156-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 68#L181true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 32#L181-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 24#L206true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 51#L206-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 49#L399true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 87#L399-1true check_#res#1 := check_~tmp~1#1; 4#L419true main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 28#L502true assume !(0 == assert_~arg#1 % 256); 88#L497true assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 25#L469-2true [2022-11-16 10:59:59,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:59:59,649 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2022-11-16 10:59:59,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:59:59,659 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264087807] [2022-11-16 10:59:59,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:59:59,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:59:59,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 10:59:59,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 10:59:59,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 10:59:59,981 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264087807] [2022-11-16 10:59:59,982 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264087807] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 10:59:59,982 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 10:59:59,983 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 10:59:59,984 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476022117] [2022-11-16 10:59:59,985 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 10:59:59,989 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 10:59:59,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:59:59,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 1 times [2022-11-16 10:59:59,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:59:59,991 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141624467] [2022-11-16 10:59:59,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:59:59,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:00,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:00:00,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:00:00,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:00:00,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141624467] [2022-11-16 11:00:00,525 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1141624467] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:00:00,526 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:00:00,526 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:00:00,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479787470] [2022-11-16 11:00:00,526 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:00:00,529 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:00:00,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:00:00,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:00:00,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:00:00,575 INFO L87 Difference]: Start difference. First operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:00:00,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:00:00,756 INFO L93 Difference]: Finished difference Result 100 states and 168 transitions. [2022-11-16 11:00:00,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 168 transitions. [2022-11-16 11:00:00,761 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:00:00,767 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 92 states and 121 transitions. [2022-11-16 11:00:00,768 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-16 11:00:00,768 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-16 11:00:00,769 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions. [2022-11-16 11:00:00,770 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:00:00,770 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 11:00:00,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions. [2022-11-16 11:00:00,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-16 11:00:00,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:00:00,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions. [2022-11-16 11:00:00,817 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 11:00:00,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:00:00,823 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 11:00:00,824 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 11:00:00,826 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions. [2022-11-16 11:00:00,829 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:00:00,833 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:00:00,834 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:00:00,835 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:00:00,838 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:00:00,839 INFO L748 eck$LassoCheckResult]: Stem: 300#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 292#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 238#L230 assume 0 == ~r1~0; 239#L231 assume ~id1~0 >= 0; 248#L232 assume 0 == ~st1~0; 305#L233 assume ~send1~0 == ~id1~0; 228#L234 assume 0 == ~mode1~0 % 256; 229#L235 assume ~id2~0 >= 0; 297#L236 assume 0 == ~st2~0; 282#L237 assume ~send2~0 == ~id2~0; 269#L238 assume 0 == ~mode2~0 % 256; 270#L239 assume ~id3~0 >= 0; 267#L240 assume 0 == ~st3~0; 268#L241 assume ~send3~0 == ~id3~0; 274#L242 assume 0 == ~mode3~0 % 256; 246#L243 assume ~id4~0 >= 0; 240#L244 assume 0 == ~st4~0; 241#L245 assume ~send4~0 == ~id4~0; 273#L246 assume 0 == ~mode4~0 % 256; 287#L247 assume ~id5~0 >= 0; 288#L248 assume 0 == ~st5~0; 230#L249 assume ~send5~0 == ~id5~0; 231#L250 assume 0 == ~mode5~0 % 256; 249#L251 assume ~id6~0 >= 0; 250#L252 assume 0 == ~st6~0; 257#L253 assume ~send6~0 == ~id6~0; 258#L254 assume 0 == ~mode6~0 % 256; 259#L255 assume ~id1~0 != ~id2~0; 260#L256 assume ~id1~0 != ~id3~0; 299#L257 assume ~id1~0 != ~id4~0; 279#L258 assume ~id1~0 != ~id5~0; 215#L259 assume ~id1~0 != ~id6~0; 216#L260 assume ~id2~0 != ~id3~0; 306#L261 assume ~id2~0 != ~id4~0; 301#L262 assume ~id2~0 != ~id5~0; 302#L263 assume ~id2~0 != ~id6~0; 303#L264 assume ~id3~0 != ~id4~0; 224#L265 assume ~id3~0 != ~id5~0; 225#L266 assume ~id3~0 != ~id6~0; 247#L267 assume ~id4~0 != ~id5~0; 261#L268 assume ~id4~0 != ~id6~0; 262#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 304#L230-1 init_#res#1 := init_~tmp~0#1; 255#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 256#L22 assume !(0 == assume_abort_if_not_~cond#1); 277#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 278#L469-2 [2022-11-16 11:00:00,839 INFO L750 eck$LassoCheckResult]: Loop: 278#L469-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 263#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 245#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 296#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 298#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 294#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 275#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 276#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 283#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 271#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 272#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 280#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 222#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 223#L399 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 290#L399-1 check_#res#1 := check_~tmp~1#1; 226#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 227#L502 assume !(0 == assert_~arg#1 % 256); 291#L497 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 278#L469-2 [2022-11-16 11:00:00,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:00,849 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2022-11-16 11:00:00,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:00,850 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889285345] [2022-11-16 11:00:00,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:00,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:00,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:00,891 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:00:00,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:00,956 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:00:00,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:00,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 2 times [2022-11-16 11:00:00,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:00,958 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095660432] [2022-11-16 11:00:00,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:00,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:00,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:00:01,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:00:01,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:00:01,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095660432] [2022-11-16 11:00:01,186 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095660432] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:00:01,186 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:00:01,187 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:00:01,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [742677479] [2022-11-16 11:00:01,187 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:00:01,188 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:00:01,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:00:01,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:00:01,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:00:01,190 INFO L87 Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:00:01,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:00:01,281 INFO L93 Difference]: Finished difference Result 95 states and 123 transitions. [2022-11-16 11:00:01,281 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions. [2022-11-16 11:00:01,290 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:00:01,294 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions. [2022-11-16 11:00:01,294 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-16 11:00:01,295 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-16 11:00:01,295 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions. [2022-11-16 11:00:01,296 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:00:01,296 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 11:00:01,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions. [2022-11-16 11:00:01,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-16 11:00:01,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:00:01,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions. [2022-11-16 11:00:01,307 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 11:00:01,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:00:01,308 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 11:00:01,309 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 11:00:01,309 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions. [2022-11-16 11:00:01,310 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:00:01,310 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:00:01,310 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:00:01,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:00:01,312 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:00:01,312 INFO L748 eck$LassoCheckResult]: Stem: 499#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 491#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 434#L230 assume 0 == ~r1~0; 435#L231 assume ~id1~0 >= 0; 447#L232 assume 0 == ~st1~0; 504#L233 assume ~send1~0 == ~id1~0; 427#L234 assume 0 == ~mode1~0 % 256; 428#L235 assume ~id2~0 >= 0; 495#L236 assume 0 == ~st2~0; 481#L237 assume ~send2~0 == ~id2~0; 468#L238 assume 0 == ~mode2~0 % 256; 469#L239 assume ~id3~0 >= 0; 466#L240 assume 0 == ~st3~0; 467#L241 assume ~send3~0 == ~id3~0; 473#L242 assume 0 == ~mode3~0 % 256; 445#L243 assume ~id4~0 >= 0; 439#L244 assume 0 == ~st4~0; 440#L245 assume ~send4~0 == ~id4~0; 472#L246 assume 0 == ~mode4~0 % 256; 488#L247 assume ~id5~0 >= 0; 489#L248 assume 0 == ~st5~0; 429#L249 assume ~send5~0 == ~id5~0; 430#L250 assume 0 == ~mode5~0 % 256; 448#L251 assume ~id6~0 >= 0; 449#L252 assume 0 == ~st6~0; 456#L253 assume ~send6~0 == ~id6~0; 457#L254 assume 0 == ~mode6~0 % 256; 458#L255 assume ~id1~0 != ~id2~0; 459#L256 assume ~id1~0 != ~id3~0; 498#L257 assume ~id1~0 != ~id4~0; 478#L258 assume ~id1~0 != ~id5~0; 416#L259 assume ~id1~0 != ~id6~0; 417#L260 assume ~id2~0 != ~id3~0; 505#L261 assume ~id2~0 != ~id4~0; 500#L262 assume ~id2~0 != ~id5~0; 501#L263 assume ~id2~0 != ~id6~0; 502#L264 assume ~id3~0 != ~id4~0; 423#L265 assume ~id3~0 != ~id5~0; 424#L266 assume ~id3~0 != ~id6~0; 446#L267 assume ~id4~0 != ~id5~0; 460#L268 assume ~id4~0 != ~id6~0; 461#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 503#L230-1 init_#res#1 := init_~tmp~0#1; 454#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 455#L22 assume !(0 == assume_abort_if_not_~cond#1); 476#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 477#L469-2 [2022-11-16 11:00:01,313 INFO L750 eck$LassoCheckResult]: Loop: 477#L469-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 462#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 444#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 496#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 497#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 493#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 474#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 475#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 482#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 470#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 471#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 479#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 414#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 415#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 431#L400 assume ~r1~0 >= 6; 432#L404 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 487#L399-1 check_#res#1 := check_~tmp~1#1; 425#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 426#L502 assume !(0 == assert_~arg#1 % 256); 490#L497 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 477#L469-2 [2022-11-16 11:00:01,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:01,313 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2022-11-16 11:00:01,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:01,314 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808401783] [2022-11-16 11:00:01,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:01,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:01,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,341 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:00:01,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,378 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:00:01,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:01,381 INFO L85 PathProgramCache]: Analyzing trace with hash -204006149, now seen corresponding path program 1 times [2022-11-16 11:00:01,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:01,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122846345] [2022-11-16 11:00:01,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:01,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:01,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:00:01,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:00:01,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:00:01,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1122846345] [2022-11-16 11:00:01,435 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1122846345] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:00:01,435 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:00:01,436 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:00:01,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702031328] [2022-11-16 11:00:01,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:00:01,437 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:00:01,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:00:01,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:00:01,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:00:01,439 INFO L87 Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:00:01,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:00:01,482 INFO L93 Difference]: Finished difference Result 132 states and 179 transitions. [2022-11-16 11:00:01,482 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions. [2022-11-16 11:00:01,484 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-16 11:00:01,489 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions. [2022-11-16 11:00:01,489 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2022-11-16 11:00:01,491 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 132 [2022-11-16 11:00:01,492 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions. [2022-11-16 11:00:01,492 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:00:01,493 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 11:00:01,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions. [2022-11-16 11:00:01,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2022-11-16 11:00:01,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:00:01,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions. [2022-11-16 11:00:01,501 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 11:00:01,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:00:01,507 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 11:00:01,507 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 11:00:01,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions. [2022-11-16 11:00:01,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-16 11:00:01,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:00:01,509 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:00:01,510 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:00:01,511 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:00:01,511 INFO L748 eck$LassoCheckResult]: Stem: 730#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 721#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 661#L230 assume 0 == ~r1~0; 662#L231 assume ~id1~0 >= 0; 676#L232 assume 0 == ~st1~0; 737#L233 assume ~send1~0 == ~id1~0; 657#L234 assume 0 == ~mode1~0 % 256; 658#L235 assume ~id2~0 >= 0; 726#L236 assume 0 == ~st2~0; 711#L237 assume ~send2~0 == ~id2~0; 698#L238 assume 0 == ~mode2~0 % 256; 699#L239 assume ~id3~0 >= 0; 696#L240 assume 0 == ~st3~0; 697#L241 assume ~send3~0 == ~id3~0; 703#L242 assume 0 == ~mode3~0 % 256; 674#L243 assume ~id4~0 >= 0; 668#L244 assume 0 == ~st4~0; 669#L245 assume ~send4~0 == ~id4~0; 702#L246 assume 0 == ~mode4~0 % 256; 717#L247 assume ~id5~0 >= 0; 718#L248 assume 0 == ~st5~0; 659#L249 assume ~send5~0 == ~id5~0; 660#L250 assume 0 == ~mode5~0 % 256; 677#L251 assume ~id6~0 >= 0; 678#L252 assume 0 == ~st6~0; 685#L253 assume ~send6~0 == ~id6~0; 686#L254 assume 0 == ~mode6~0 % 256; 687#L255 assume ~id1~0 != ~id2~0; 688#L256 assume ~id1~0 != ~id3~0; 729#L257 assume ~id1~0 != ~id4~0; 708#L258 assume ~id1~0 != ~id5~0; 644#L259 assume ~id1~0 != ~id6~0; 645#L260 assume ~id2~0 != ~id3~0; 738#L261 assume ~id2~0 != ~id4~0; 733#L262 assume ~id2~0 != ~id5~0; 734#L263 assume ~id2~0 != ~id6~0; 735#L264 assume ~id3~0 != ~id4~0; 653#L265 assume ~id3~0 != ~id5~0; 654#L266 assume ~id3~0 != ~id6~0; 675#L267 assume ~id4~0 != ~id5~0; 689#L268 assume ~id4~0 != ~id6~0; 690#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 736#L230-1 init_#res#1 := init_~tmp~0#1; 683#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 684#L22 assume !(0 == assume_abort_if_not_~cond#1); 706#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 707#L469-2 [2022-11-16 11:00:01,511 INFO L750 eck$LassoCheckResult]: Loop: 707#L469-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 771#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 673#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 767#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 765#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 760#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 757#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 755#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 751#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 749#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 745#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 743#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 741#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 740#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 739#L400 assume !(~r1~0 >= 6); 731#L403 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 732#L404 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 775#L399-1 check_#res#1 := check_~tmp~1#1; 774#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 773#L502 assume !(0 == assert_~arg#1 % 256); 772#L497 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 707#L469-2 [2022-11-16 11:00:01,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:01,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2022-11-16 11:00:01,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:01,513 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [15149556] [2022-11-16 11:00:01,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:01,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:01,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,549 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:00:01,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,586 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:00:01,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:01,587 INFO L85 PathProgramCache]: Analyzing trace with hash -382651293, now seen corresponding path program 1 times [2022-11-16 11:00:01,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:01,587 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087849802] [2022-11-16 11:00:01,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:01,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:01,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:00:01,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,648 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:00:01,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:00:01,649 INFO L85 PathProgramCache]: Analyzing trace with hash -706871679, now seen corresponding path program 1 times [2022-11-16 11:00:01,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:00:01,649 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886018491] [2022-11-16 11:00:01,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:00:01,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:00:01,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,685 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:00:01,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:00:01,727 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:00:08,006 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 11:00:08,007 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 11:00:08,007 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 11:00:08,007 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 11:00:08,007 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-16 11:00:08,007 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 11:00:08,007 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 11:00:08,008 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 11:00:08,008 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.1.ufo.BOUNDED-12.pals.c_Iteration4_Loop [2022-11-16 11:00:08,008 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 11:00:08,008 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 11:00:08,061 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:08,070 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:08,079 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:08,084 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,248 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,256 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,262 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,268 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,274 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,280 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,286 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,291 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,294 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:10,299 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:00:12,982 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 28