./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 11:29:23,077 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 11:29:23,079 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 11:29:23,116 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 11:29:23,117 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 11:29:23,118 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 11:29:23,119 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 11:29:23,121 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 11:29:23,123 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 11:29:23,124 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 11:29:23,125 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 11:29:23,126 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 11:29:23,130 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 11:29:23,136 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 11:29:23,138 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 11:29:23,140 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 11:29:23,142 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 11:29:23,144 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 11:29:23,149 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 11:29:23,155 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 11:29:23,157 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 11:29:23,160 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 11:29:23,163 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 11:29:23,164 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 11:29:23,170 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 11:29:23,173 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 11:29:23,174 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 11:29:23,176 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 11:29:23,176 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 11:29:23,177 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 11:29:23,178 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 11:29:23,179 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 11:29:23,180 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 11:29:23,182 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 11:29:23,183 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 11:29:23,184 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 11:29:23,184 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 11:29:23,185 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 11:29:23,185 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 11:29:23,186 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 11:29:23,186 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 11:29:23,187 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 11:29:23,228 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 11:29:23,231 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 11:29:23,232 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 11:29:23,232 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 11:29:23,233 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 11:29:23,234 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 11:29:23,234 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 11:29:23,234 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 11:29:23,234 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 11:29:23,235 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 11:29:23,236 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 11:29:23,236 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 11:29:23,236 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 11:29:23,237 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 11:29:23,237 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 11:29:23,237 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 11:29:23,237 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 11:29:23,238 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 11:29:23,238 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 11:29:23,238 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 11:29:23,238 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 11:29:23,239 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 11:29:23,239 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 11:29:23,241 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 11:29:23,241 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 11:29:23,241 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 11:29:23,241 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 11:29:23,242 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 11:29:23,242 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 11:29:23,242 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 11:29:23,243 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 11:29:23,244 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 11:29:23,244 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b [2022-11-16 11:29:23,507 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 11:29:23,531 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 11:29:23,534 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 11:29:23,535 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 11:29:23,536 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 11:29:23,537 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2022-11-16 11:29:23,614 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/data/74132b301/ce466846e0d24414b20230ba1e048159/FLAGa420ffcf1 [2022-11-16 11:29:24,165 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 11:29:24,166 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2022-11-16 11:29:24,177 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/data/74132b301/ce466846e0d24414b20230ba1e048159/FLAGa420ffcf1 [2022-11-16 11:29:24,575 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/data/74132b301/ce466846e0d24414b20230ba1e048159 [2022-11-16 11:29:24,579 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 11:29:24,580 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 11:29:24,582 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 11:29:24,582 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 11:29:24,587 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 11:29:24,588 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:24,590 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2af98f7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24, skipping insertion in model container [2022-11-16 11:29:24,590 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:24,597 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 11:29:24,648 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 11:29:24,914 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c[15075,15088] [2022-11-16 11:29:24,914 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:29:24,924 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 11:29:24,974 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c[15075,15088] [2022-11-16 11:29:24,975 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:29:24,990 INFO L208 MainTranslator]: Completed translation [2022-11-16 11:29:24,990 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24 WrapperNode [2022-11-16 11:29:24,991 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 11:29:24,992 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 11:29:24,992 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 11:29:24,992 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 11:29:25,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,009 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,039 INFO L138 Inliner]: procedures = 25, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 347 [2022-11-16 11:29:25,039 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 11:29:25,040 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 11:29:25,040 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 11:29:25,040 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 11:29:25,054 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,054 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,058 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,058 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,065 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,071 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,074 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,076 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,079 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 11:29:25,080 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 11:29:25,080 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 11:29:25,080 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 11:29:25,081 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (1/1) ... [2022-11-16 11:29:25,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 11:29:25,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:29:25,113 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 11:29:25,121 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_923cccac-47c2-4fd8-8379-16f986d8e276/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 11:29:25,161 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 11:29:25,161 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 11:29:25,162 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 11:29:25,162 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 11:29:25,260 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 11:29:25,262 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 11:29:25,719 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 11:29:25,726 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 11:29:25,742 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 11:29:25,745 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:29:25 BoogieIcfgContainer [2022-11-16 11:29:25,745 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 11:29:25,746 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 11:29:25,746 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 11:29:25,750 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 11:29:25,750 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:29:25,751 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 11:29:24" (1/3) ... [2022-11-16 11:29:25,751 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@365c6b6e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 11:29:25, skipping insertion in model container [2022-11-16 11:29:25,752 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:29:25,752 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:29:24" (2/3) ... [2022-11-16 11:29:25,752 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@365c6b6e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 11:29:25, skipping insertion in model container [2022-11-16 11:29:25,752 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:29:25,753 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:29:25" (3/3) ... [2022-11-16 11:29:25,754 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.BOUNDED-12.pals.c [2022-11-16 11:29:25,819 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 11:29:25,819 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 11:29:25,820 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 11:29:25,820 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 11:29:25,820 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 11:29:25,820 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 11:29:25,820 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 11:29:25,821 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 11:29:25,828 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:25,899 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-16 11:29:25,900 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:29:25,900 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:29:25,909 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:25,909 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:25,910 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 11:29:25,911 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:25,918 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-16 11:29:25,921 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:29:25,921 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:29:25,923 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:25,923 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:25,932 INFO L748 eck$LassoCheckResult]: Stem: 82#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 36#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 62#L228true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 44#L228-1true init_#res#1 := init_~tmp~0#1; 14#L389true main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 39#L22true assume !(0 == assume_abort_if_not_~cond#1); 67#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 72#L467-2true [2022-11-16 11:29:25,942 INFO L750 eck$LassoCheckResult]: Loop: 72#L467-2true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 20#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 40#L78-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 18#L104true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 94#L104-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 79#L129true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 10#L129-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 66#L154true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 95#L154-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 84#L179true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 22#L179-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 76#L204true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 68#L204-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 86#L397true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 73#L397-1true check_#res#1 := check_~tmp~1#1; 34#L417true main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 81#L500true assume !(0 == assert_~arg#1 % 256); 23#L495true assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 72#L467-2true [2022-11-16 11:29:25,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:25,953 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2022-11-16 11:29:25,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:25,963 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945187233] [2022-11-16 11:29:25,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:25,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:26,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:29:26,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:29:26,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:29:26,317 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945187233] [2022-11-16 11:29:26,318 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1945187233] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:29:26,318 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:29:26,318 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:29:26,320 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052494916] [2022-11-16 11:29:26,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:29:26,330 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 11:29:26,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:26,331 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 1 times [2022-11-16 11:29:26,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:26,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084219020] [2022-11-16 11:29:26,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:26,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:26,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:29:26,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:29:26,838 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:29:26,839 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084219020] [2022-11-16 11:29:26,839 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2084219020] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:29:26,839 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:29:26,839 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:29:26,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083770152] [2022-11-16 11:29:26,840 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:29:26,841 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:29:26,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:29:26,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:29:26,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:29:26,880 INFO L87 Difference]: Start difference. First operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:27,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:29:27,048 INFO L93 Difference]: Finished difference Result 100 states and 168 transitions. [2022-11-16 11:29:27,050 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 168 transitions. [2022-11-16 11:29:27,054 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:29:27,058 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 92 states and 121 transitions. [2022-11-16 11:29:27,059 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-16 11:29:27,060 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-16 11:29:27,061 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions. [2022-11-16 11:29:27,061 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:29:27,061 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 11:29:27,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions. [2022-11-16 11:29:27,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-16 11:29:27,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:27,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions. [2022-11-16 11:29:27,095 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 11:29:27,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:29:27,100 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 11:29:27,100 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 11:29:27,100 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions. [2022-11-16 11:29:27,102 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:29:27,102 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:29:27,103 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:29:27,104 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:27,104 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:27,105 INFO L748 eck$LassoCheckResult]: Stem: 300#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 293#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 259#L228 assume 0 == ~r1~0; 260#L229 assume ~id1~0 >= 0; 231#L230 assume 0 == ~st1~0; 232#L231 assume ~send1~0 == ~id1~0; 244#L232 assume 0 == ~mode1~0 % 256; 305#L233 assume ~id2~0 >= 0; 221#L234 assume 0 == ~st2~0; 222#L235 assume ~send2~0 == ~id2~0; 295#L236 assume 0 == ~mode2~0 % 256; 287#L237 assume ~id3~0 >= 0; 275#L238 assume 0 == ~st3~0; 276#L239 assume ~send3~0 == ~id3~0; 273#L240 assume 0 == ~mode3~0 % 256; 274#L241 assume ~id4~0 >= 0; 278#L242 assume 0 == ~st4~0; 239#L243 assume ~send4~0 == ~id4~0; 233#L244 assume 0 == ~mode4~0 % 256; 234#L245 assume ~id5~0 >= 0; 277#L246 assume 0 == ~st5~0; 290#L247 assume ~send5~0 == ~id5~0; 291#L248 assume 0 == ~mode5~0 % 256; 223#L249 assume ~id6~0 >= 0; 224#L250 assume 0 == ~st6~0; 245#L251 assume ~send6~0 == ~id6~0; 246#L252 assume 0 == ~mode6~0 % 256; 252#L253 assume ~id1~0 != ~id2~0; 253#L254 assume ~id1~0 != ~id3~0; 254#L255 assume ~id1~0 != ~id4~0; 255#L256 assume ~id1~0 != ~id5~0; 299#L257 assume ~id1~0 != ~id6~0; 285#L258 assume ~id2~0 != ~id3~0; 215#L259 assume ~id2~0 != ~id4~0; 216#L260 assume ~id2~0 != ~id5~0; 306#L261 assume ~id2~0 != ~id6~0; 302#L262 assume ~id3~0 != ~id4~0; 303#L263 assume ~id3~0 != ~id5~0; 304#L264 assume ~id3~0 != ~id6~0; 219#L265 assume ~id4~0 != ~id5~0; 220#L266 assume ~id4~0 != ~id6~0; 240#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 272#L228-1 init_#res#1 := init_~tmp~0#1; 247#L389 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 248#L22 assume !(0 == assume_abort_if_not_~cond#1); 282#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 270#L467-2 [2022-11-16 11:29:27,105 INFO L750 eck$LassoCheckResult]: Loop: 270#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 264#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 238#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 256#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 258#L104-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 296#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 241#L129-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 242#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 251#L154-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 301#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 267#L179-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 268#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 283#L204-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 284#L397 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 236#L397-1 check_#res#1 := check_~tmp~1#1; 289#L417 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 292#L500 assume !(0 == assert_~arg#1 % 256); 269#L495 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 270#L467-2 [2022-11-16 11:29:27,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:27,106 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2022-11-16 11:29:27,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:27,107 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2192234] [2022-11-16 11:29:27,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:27,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:27,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,148 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:29:27,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,219 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:29:27,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:27,221 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 2 times [2022-11-16 11:29:27,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:27,221 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063853785] [2022-11-16 11:29:27,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:27,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:27,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:29:27,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:29:27,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:29:27,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2063853785] [2022-11-16 11:29:27,544 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2063853785] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:29:27,545 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:29:27,545 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:29:27,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [57012218] [2022-11-16 11:29:27,545 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:29:27,545 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:29:27,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:29:27,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:29:27,546 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:29:27,547 INFO L87 Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:27,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:29:27,606 INFO L93 Difference]: Finished difference Result 95 states and 123 transitions. [2022-11-16 11:29:27,606 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions. [2022-11-16 11:29:27,610 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:29:27,613 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions. [2022-11-16 11:29:27,613 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-16 11:29:27,614 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-16 11:29:27,614 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions. [2022-11-16 11:29:27,615 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:29:27,616 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 11:29:27,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions. [2022-11-16 11:29:27,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-16 11:29:27,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:27,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions. [2022-11-16 11:29:27,627 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 11:29:27,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:29:27,629 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 11:29:27,629 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 11:29:27,629 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions. [2022-11-16 11:29:27,633 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 11:29:27,633 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:29:27,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:29:27,639 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:27,639 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:27,639 INFO L748 eck$LassoCheckResult]: Stem: 499#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 492#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 457#L228 assume 0 == ~r1~0; 458#L229 assume ~id1~0 >= 0; 430#L230 assume 0 == ~st1~0; 431#L231 assume ~send1~0 == ~id1~0; 442#L232 assume 0 == ~mode1~0 % 256; 504#L233 assume ~id2~0 >= 0; 420#L234 assume 0 == ~st2~0; 421#L235 assume ~send2~0 == ~id2~0; 494#L236 assume 0 == ~mode2~0 % 256; 486#L237 assume ~id3~0 >= 0; 474#L238 assume 0 == ~st3~0; 475#L239 assume ~send3~0 == ~id3~0; 472#L240 assume 0 == ~mode3~0 % 256; 473#L241 assume ~id4~0 >= 0; 480#L242 assume 0 == ~st4~0; 437#L243 assume ~send4~0 == ~id4~0; 434#L244 assume 0 == ~mode4~0 % 256; 435#L245 assume ~id5~0 >= 0; 476#L246 assume 0 == ~st5~0; 489#L247 assume ~send5~0 == ~id5~0; 490#L248 assume 0 == ~mode5~0 % 256; 425#L249 assume ~id6~0 >= 0; 426#L250 assume 0 == ~st6~0; 443#L251 assume ~send6~0 == ~id6~0; 444#L252 assume 0 == ~mode6~0 % 256; 450#L253 assume ~id1~0 != ~id2~0; 451#L254 assume ~id1~0 != ~id3~0; 452#L255 assume ~id1~0 != ~id4~0; 453#L256 assume ~id1~0 != ~id5~0; 498#L257 assume ~id1~0 != ~id6~0; 484#L258 assume ~id2~0 != ~id3~0; 414#L259 assume ~id2~0 != ~id4~0; 415#L260 assume ~id2~0 != ~id5~0; 505#L261 assume ~id2~0 != ~id6~0; 501#L262 assume ~id3~0 != ~id4~0; 502#L263 assume ~id3~0 != ~id5~0; 503#L264 assume ~id3~0 != ~id6~0; 418#L265 assume ~id4~0 != ~id5~0; 419#L266 assume ~id4~0 != ~id6~0; 438#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 471#L228-1 init_#res#1 := init_~tmp~0#1; 445#L389 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 446#L22 assume !(0 == assume_abort_if_not_~cond#1); 481#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 469#L467-2 [2022-11-16 11:29:27,640 INFO L750 eck$LassoCheckResult]: Loop: 469#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 465#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 436#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 454#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 456#L104-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 495#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 440#L129-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 441#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 449#L154-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 500#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 463#L179-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 464#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 482#L204-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 483#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 497#L398 assume ~r1~0 >= 6; 433#L402 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 459#L397-1 check_#res#1 := check_~tmp~1#1; 488#L417 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 491#L500 assume !(0 == assert_~arg#1 % 256); 468#L495 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 469#L467-2 [2022-11-16 11:29:27,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:27,641 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2022-11-16 11:29:27,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:27,641 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986339503] [2022-11-16 11:29:27,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:27,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:27,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,693 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:29:27,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,741 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:29:27,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:27,744 INFO L85 PathProgramCache]: Analyzing trace with hash -204006149, now seen corresponding path program 1 times [2022-11-16 11:29:27,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:27,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035590055] [2022-11-16 11:29:27,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:27,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:27,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:29:27,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:29:27,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:29:27,803 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035590055] [2022-11-16 11:29:27,803 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1035590055] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:29:27,803 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:29:27,804 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:29:27,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2114699717] [2022-11-16 11:29:27,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:29:27,805 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:29:27,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:29:27,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:29:27,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:29:27,807 INFO L87 Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:27,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:29:27,848 INFO L93 Difference]: Finished difference Result 132 states and 179 transitions. [2022-11-16 11:29:27,848 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions. [2022-11-16 11:29:27,850 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-16 11:29:27,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions. [2022-11-16 11:29:27,854 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2022-11-16 11:29:27,856 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 132 [2022-11-16 11:29:27,856 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions. [2022-11-16 11:29:27,861 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:29:27,861 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 11:29:27,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions. [2022-11-16 11:29:27,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2022-11-16 11:29:27,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:29:27,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions. [2022-11-16 11:29:27,872 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 11:29:27,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:29:27,874 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 11:29:27,874 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 11:29:27,875 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions. [2022-11-16 11:29:27,877 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-16 11:29:27,877 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:29:27,877 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:29:27,878 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:27,878 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:29:27,879 INFO L748 eck$LassoCheckResult]: Stem: 731#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 724#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 687#L228 assume 0 == ~r1~0; 688#L229 assume ~id1~0 >= 0; 660#L230 assume 0 == ~st1~0; 661#L231 assume ~send1~0 == ~id1~0; 672#L232 assume 0 == ~mode1~0 % 256; 737#L233 assume ~id2~0 >= 0; 650#L234 assume 0 == ~st2~0; 651#L235 assume ~send2~0 == ~id2~0; 726#L236 assume 0 == ~mode2~0 % 256; 716#L237 assume ~id3~0 >= 0; 704#L238 assume 0 == ~st3~0; 705#L239 assume ~send3~0 == ~id3~0; 702#L240 assume 0 == ~mode3~0 % 256; 703#L241 assume ~id4~0 >= 0; 707#L242 assume 0 == ~st4~0; 667#L243 assume ~send4~0 == ~id4~0; 662#L244 assume 0 == ~mode4~0 % 256; 663#L245 assume ~id5~0 >= 0; 706#L246 assume 0 == ~st5~0; 720#L247 assume ~send5~0 == ~id5~0; 721#L248 assume 0 == ~mode5~0 % 256; 652#L249 assume ~id6~0 >= 0; 653#L250 assume 0 == ~st6~0; 673#L251 assume ~send6~0 == ~id6~0; 674#L252 assume 0 == ~mode6~0 % 256; 680#L253 assume ~id1~0 != ~id2~0; 681#L254 assume ~id1~0 != ~id3~0; 682#L255 assume ~id1~0 != ~id4~0; 683#L256 assume ~id1~0 != ~id5~0; 730#L257 assume ~id1~0 != ~id6~0; 714#L258 assume ~id2~0 != ~id3~0; 644#L259 assume ~id2~0 != ~id4~0; 645#L260 assume ~id2~0 != ~id5~0; 738#L261 assume ~id2~0 != ~id6~0; 734#L262 assume ~id3~0 != ~id4~0; 735#L263 assume ~id3~0 != ~id5~0; 736#L264 assume ~id3~0 != ~id6~0; 648#L265 assume ~id4~0 != ~id5~0; 649#L266 assume ~id4~0 != ~id6~0; 668#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 701#L228-1 init_#res#1 := init_~tmp~0#1; 675#L389 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 676#L22 assume !(0 == assume_abort_if_not_~cond#1); 711#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 699#L467-2 [2022-11-16 11:29:27,879 INFO L750 eck$LassoCheckResult]: Loop: 699#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 693#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 666#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 684#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 686#L104-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 727#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 669#L129-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 670#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 679#L154-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 732#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 696#L179-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 697#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 712#L204-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 713#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 733#L398 assume !(~r1~0 >= 6); 664#L401 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 665#L402 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 718#L397-1 check_#res#1 := check_~tmp~1#1; 719#L417 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 723#L500 assume !(0 == assert_~arg#1 % 256); 698#L495 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 699#L467-2 [2022-11-16 11:29:27,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:27,880 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2022-11-16 11:29:27,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:27,881 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101041987] [2022-11-16 11:29:27,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:27,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:27,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,916 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:29:27,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,946 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:29:27,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:27,951 INFO L85 PathProgramCache]: Analyzing trace with hash -382651293, now seen corresponding path program 1 times [2022-11-16 11:29:27,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:27,952 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284286575] [2022-11-16 11:29:27,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:27,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:27,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:27,984 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:29:28,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:28,010 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:29:28,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:29:28,011 INFO L85 PathProgramCache]: Analyzing trace with hash -706871679, now seen corresponding path program 1 times [2022-11-16 11:29:28,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:29:28,011 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [377980606] [2022-11-16 11:29:28,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:29:28,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:29:28,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:28,045 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:29:28,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:29:28,088 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:29:33,757 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 11:29:33,758 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 11:29:33,758 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 11:29:33,758 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 11:29:33,758 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-16 11:29:33,759 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 11:29:33,759 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 11:29:33,759 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 11:29:33,759 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.BOUNDED-12.pals.c_Iteration4_Loop [2022-11-16 11:29:33,759 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 11:29:33,760 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 11:29:33,797 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:33,807 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:33,813 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:33,818 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:33,821 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:35,965 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:35,992 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:35,998 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:36,005 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:36,011 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:36,016 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:36,023 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:36,025 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:36,029 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:29:38,767 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 28