./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2e89791a2e8bde62b11f5e3f45edc8f6b1d8831a0e105552a6da22a3ff44c454 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 10:56:05,805 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 10:56:05,807 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 10:56:05,827 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 10:56:05,828 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 10:56:05,829 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 10:56:05,830 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 10:56:05,832 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 10:56:05,834 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 10:56:05,835 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 10:56:05,836 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 10:56:05,838 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 10:56:05,838 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 10:56:05,839 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 10:56:05,841 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 10:56:05,842 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 10:56:05,843 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 10:56:05,845 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 10:56:05,846 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 10:56:05,849 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 10:56:05,851 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 10:56:05,859 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 10:56:05,860 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 10:56:05,862 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 10:56:05,867 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 10:56:05,876 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 10:56:05,876 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 10:56:05,877 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 10:56:05,878 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 10:56:05,879 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 10:56:05,879 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 10:56:05,880 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 10:56:05,881 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 10:56:05,882 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 10:56:05,884 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 10:56:05,885 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 10:56:05,886 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 10:56:05,887 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 10:56:05,887 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 10:56:05,888 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 10:56:05,889 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 10:56:05,890 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 10:56:05,925 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 10:56:05,929 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 10:56:05,930 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 10:56:05,930 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 10:56:05,931 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 10:56:05,932 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 10:56:05,932 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 10:56:05,932 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 10:56:05,932 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 10:56:05,932 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 10:56:05,933 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 10:56:05,934 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 10:56:05,934 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 10:56:05,934 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 10:56:05,934 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 10:56:05,935 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 10:56:05,935 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 10:56:05,935 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 10:56:05,935 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 10:56:05,935 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 10:56:05,936 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 10:56:05,936 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 10:56:05,936 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 10:56:05,938 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 10:56:05,938 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 10:56:05,938 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 10:56:05,938 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 10:56:05,938 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 10:56:05,939 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 10:56:05,939 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 10:56:05,939 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 10:56:05,940 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 10:56:05,941 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2e89791a2e8bde62b11f5e3f45edc8f6b1d8831a0e105552a6da22a3ff44c454 [2022-11-16 10:56:06,213 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 10:56:06,249 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 10:56:06,252 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 10:56:06,253 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 10:56:06,254 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 10:56:06,256 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c [2022-11-16 10:56:06,321 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/data/25a61cade/af9bd3f72e4045dcbeded3dabad1ece7/FLAG56bf5337c [2022-11-16 10:56:06,752 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 10:56:06,753 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c [2022-11-16 10:56:06,762 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/data/25a61cade/af9bd3f72e4045dcbeded3dabad1ece7/FLAG56bf5337c [2022-11-16 10:56:07,119 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/data/25a61cade/af9bd3f72e4045dcbeded3dabad1ece7 [2022-11-16 10:56:07,121 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 10:56:07,123 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 10:56:07,130 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 10:56:07,131 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 10:56:07,134 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 10:56:07,134 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,135 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@59621ee8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07, skipping insertion in model container [2022-11-16 10:56:07,135 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,141 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 10:56:07,176 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 10:56:07,504 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c[15177,15190] [2022-11-16 10:56:07,504 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 10:56:07,514 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 10:56:07,582 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c[15177,15190] [2022-11-16 10:56:07,584 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 10:56:07,606 INFO L208 MainTranslator]: Completed translation [2022-11-16 10:56:07,606 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07 WrapperNode [2022-11-16 10:56:07,607 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 10:56:07,608 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 10:56:07,608 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 10:56:07,608 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 10:56:07,616 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,625 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,665 INFO L138 Inliner]: procedures = 26, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 344 [2022-11-16 10:56:07,665 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 10:56:07,666 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 10:56:07,666 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 10:56:07,666 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 10:56:07,675 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,676 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,679 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,679 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,686 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,692 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,694 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,696 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,699 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 10:56:07,700 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 10:56:07,700 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 10:56:07,701 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 10:56:07,702 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (1/1) ... [2022-11-16 10:56:07,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 10:56:07,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 10:56:07,744 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 10:56:07,753 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ad551633-98ab-4dcb-ba0b-357d740996b4/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 10:56:07,787 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 10:56:07,787 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 10:56:07,787 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 10:56:07,787 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 10:56:07,914 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 10:56:07,916 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 10:56:08,423 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 10:56:08,432 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 10:56:08,432 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 10:56:08,434 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 10:56:08 BoogieIcfgContainer [2022-11-16 10:56:08,434 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 10:56:08,435 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 10:56:08,435 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 10:56:08,452 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 10:56:08,453 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 10:56:08,453 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 10:56:07" (1/3) ... [2022-11-16 10:56:08,454 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7b1af7bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 10:56:08, skipping insertion in model container [2022-11-16 10:56:08,455 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 10:56:08,455 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 10:56:07" (2/3) ... [2022-11-16 10:56:08,455 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7b1af7bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 10:56:08, skipping insertion in model container [2022-11-16 10:56:08,455 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 10:56:08,455 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 10:56:08" (3/3) ... [2022-11-16 10:56:08,457 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c [2022-11-16 10:56:08,514 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 10:56:08,514 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 10:56:08,515 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 10:56:08,515 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 10:56:08,515 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 10:56:08,515 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 10:56:08,515 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 10:56:08,516 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 10:56:08,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:08,545 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-16 10:56:08,546 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:56:08,546 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:56:08,554 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:08,554 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:08,554 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 10:56:08,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:08,561 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-16 10:56:08,562 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:56:08,562 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:56:08,563 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:08,563 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:08,572 INFO L748 eck$LassoCheckResult]: Stem: 83#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 26#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 54#L230true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 93#L230-1true init_#res#1 := init_~tmp~0#1; 63#L391true main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 30#L24true assume !(0 == assume_abort_if_not_~cond#1); 9#L23true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 23#L469-2true [2022-11-16 10:56:08,573 INFO L750 eck$LassoCheckResult]: Loop: 23#L469-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 7#L80true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 13#L80-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 81#L106true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 32#L106-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 27#L131true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 69#L131-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 91#L156true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 25#L156-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 68#L181true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 28#L181-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 22#L206true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 50#L206-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 48#L399true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 87#L399-1true check_#res#1 := check_~tmp~1#1; 3#L419true main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 29#L501true assume !(0 == assert_~arg#1 % 256); 61#L496true assume { :end_inline_assert } true; 23#L469-2true [2022-11-16 10:56:08,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:08,579 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2022-11-16 10:56:08,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:08,590 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765105244] [2022-11-16 10:56:08,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:08,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:08,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 10:56:08,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 10:56:08,945 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 10:56:08,945 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765105244] [2022-11-16 10:56:08,946 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1765105244] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 10:56:08,946 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 10:56:08,946 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 10:56:08,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265028277] [2022-11-16 10:56:08,948 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 10:56:08,953 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 10:56:08,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:08,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 1 times [2022-11-16 10:56:08,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:08,954 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022903832] [2022-11-16 10:56:08,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:08,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:09,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 10:56:09,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 10:56:09,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 10:56:09,417 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022903832] [2022-11-16 10:56:09,418 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022903832] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 10:56:09,418 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 10:56:09,418 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 10:56:09,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402360549] [2022-11-16 10:56:09,419 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 10:56:09,420 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 10:56:09,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 10:56:09,461 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 10:56:09,462 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 10:56:09,466 INFO L87 Difference]: Start difference. First operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:09,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 10:56:09,628 INFO L93 Difference]: Finished difference Result 96 states and 164 transitions. [2022-11-16 10:56:09,629 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 164 transitions. [2022-11-16 10:56:09,633 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 10:56:09,637 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 92 states and 121 transitions. [2022-11-16 10:56:09,639 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-16 10:56:09,639 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-16 10:56:09,640 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions. [2022-11-16 10:56:09,640 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 10:56:09,641 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 10:56:09,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions. [2022-11-16 10:56:09,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-16 10:56:09,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:09,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions. [2022-11-16 10:56:09,677 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 10:56:09,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 10:56:09,687 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-16 10:56:09,688 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 10:56:09,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions. [2022-11-16 10:56:09,692 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 10:56:09,697 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:56:09,698 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:56:09,700 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:09,700 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:09,701 INFO L748 eck$LassoCheckResult]: Stem: 296#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 232#L230 assume 0 == ~r1~0 % 256; 233#L231 assume ~id1~0 >= 0; 244#L232 assume 0 == ~st1~0; 301#L233 assume ~send1~0 == ~id1~0; 222#L234 assume 0 == ~mode1~0 % 256; 223#L235 assume ~id2~0 >= 0; 293#L236 assume 0 == ~st2~0; 279#L237 assume ~send2~0 == ~id2~0; 268#L238 assume 0 == ~mode2~0 % 256; 269#L239 assume ~id3~0 >= 0; 264#L240 assume 0 == ~st3~0; 265#L241 assume ~send3~0 == ~id3~0; 273#L242 assume 0 == ~mode3~0 % 256; 242#L243 assume ~id4~0 >= 0; 234#L244 assume 0 == ~st4~0; 235#L245 assume ~send4~0 == ~id4~0; 272#L246 assume 0 == ~mode4~0 % 256; 285#L247 assume ~id5~0 >= 0; 286#L248 assume 0 == ~st5~0; 224#L249 assume ~send5~0 == ~id5~0; 225#L250 assume 0 == ~mode5~0 % 256; 247#L251 assume ~id6~0 >= 0; 248#L252 assume 0 == ~st6~0; 256#L253 assume ~send6~0 == ~id6~0; 257#L254 assume 0 == ~mode6~0 % 256; 258#L255 assume ~id1~0 != ~id2~0; 259#L256 assume ~id1~0 != ~id3~0; 295#L257 assume ~id1~0 != ~id4~0; 276#L258 assume ~id1~0 != ~id5~0; 211#L259 assume ~id1~0 != ~id6~0; 212#L260 assume ~id2~0 != ~id3~0; 302#L261 assume ~id2~0 != ~id4~0; 297#L262 assume ~id2~0 != ~id5~0; 298#L263 assume ~id2~0 != ~id6~0; 299#L264 assume ~id3~0 != ~id4~0; 218#L265 assume ~id3~0 != ~id5~0; 219#L266 assume ~id3~0 != ~id6~0; 243#L267 assume ~id4~0 != ~id5~0; 261#L268 assume ~id4~0 != ~id6~0; 262#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 300#L230-1 init_#res#1 := init_~tmp~0#1; 254#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 255#L24 assume !(0 == assume_abort_if_not_~cond#1); 245#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 246#L469-2 [2022-11-16 10:56:09,701 INFO L750 eck$LassoCheckResult]: Loop: 246#L469-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 239#L80 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 241#L80-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 260#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 294#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 291#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 274#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 275#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 281#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 270#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 271#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 277#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 216#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 217#L399 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 288#L399-1 check_#res#1 := check_~tmp~1#1; 220#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 221#L501 assume !(0 == assert_~arg#1 % 256); 249#L496 assume { :end_inline_assert } true; 246#L469-2 [2022-11-16 10:56:09,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:09,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2022-11-16 10:56:09,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:09,703 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767012849] [2022-11-16 10:56:09,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:09,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:09,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:09,739 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 10:56:09,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:09,803 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 10:56:09,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:09,804 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 2 times [2022-11-16 10:56:09,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:09,805 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735746099] [2022-11-16 10:56:09,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:09,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:09,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 10:56:10,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 10:56:10,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 10:56:10,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [735746099] [2022-11-16 10:56:10,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [735746099] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 10:56:10,064 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 10:56:10,065 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 10:56:10,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236738806] [2022-11-16 10:56:10,065 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 10:56:10,066 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 10:56:10,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 10:56:10,067 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 10:56:10,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 10:56:10,068 INFO L87 Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:10,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 10:56:10,140 INFO L93 Difference]: Finished difference Result 95 states and 123 transitions. [2022-11-16 10:56:10,140 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions. [2022-11-16 10:56:10,143 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 10:56:10,144 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions. [2022-11-16 10:56:10,144 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-16 10:56:10,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-16 10:56:10,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions. [2022-11-16 10:56:10,146 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 10:56:10,146 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 10:56:10,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions. [2022-11-16 10:56:10,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-16 10:56:10,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:10,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions. [2022-11-16 10:56:10,156 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 10:56:10,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 10:56:10,160 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-16 10:56:10,160 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 10:56:10,160 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions. [2022-11-16 10:56:10,162 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-16 10:56:10,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:56:10,162 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:56:10,163 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:10,163 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:10,164 INFO L748 eck$LassoCheckResult]: Stem: 495#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 488#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 428#L230 assume 0 == ~r1~0 % 256; 429#L231 assume ~id1~0 >= 0; 443#L232 assume 0 == ~st1~0; 500#L233 assume ~send1~0 == ~id1~0; 421#L234 assume 0 == ~mode1~0 % 256; 422#L235 assume ~id2~0 >= 0; 492#L236 assume 0 == ~st2~0; 478#L237 assume ~send2~0 == ~id2~0; 467#L238 assume 0 == ~mode2~0 % 256; 468#L239 assume ~id3~0 >= 0; 463#L240 assume 0 == ~st3~0; 464#L241 assume ~send3~0 == ~id3~0; 472#L242 assume 0 == ~mode3~0 % 256; 441#L243 assume ~id4~0 >= 0; 433#L244 assume 0 == ~st4~0; 434#L245 assume ~send4~0 == ~id4~0; 471#L246 assume 0 == ~mode4~0 % 256; 486#L247 assume ~id5~0 >= 0; 487#L248 assume 0 == ~st5~0; 423#L249 assume ~send5~0 == ~id5~0; 424#L250 assume 0 == ~mode5~0 % 256; 446#L251 assume ~id6~0 >= 0; 447#L252 assume 0 == ~st6~0; 455#L253 assume ~send6~0 == ~id6~0; 456#L254 assume 0 == ~mode6~0 % 256; 457#L255 assume ~id1~0 != ~id2~0; 458#L256 assume ~id1~0 != ~id3~0; 494#L257 assume ~id1~0 != ~id4~0; 475#L258 assume ~id1~0 != ~id5~0; 412#L259 assume ~id1~0 != ~id6~0; 413#L260 assume ~id2~0 != ~id3~0; 501#L261 assume ~id2~0 != ~id4~0; 496#L262 assume ~id2~0 != ~id5~0; 497#L263 assume ~id2~0 != ~id6~0; 498#L264 assume ~id3~0 != ~id4~0; 417#L265 assume ~id3~0 != ~id5~0; 418#L266 assume ~id3~0 != ~id6~0; 442#L267 assume ~id4~0 != ~id5~0; 460#L268 assume ~id4~0 != ~id6~0; 461#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 499#L230-1 init_#res#1 := init_~tmp~0#1; 453#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 454#L24 assume !(0 == assume_abort_if_not_~cond#1); 444#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 445#L469-2 [2022-11-16 10:56:10,164 INFO L750 eck$LassoCheckResult]: Loop: 445#L469-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 438#L80 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 440#L80-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 459#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 493#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 490#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 473#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 474#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 480#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 469#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 470#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 476#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 410#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 411#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 425#L400 assume ~r1~0 % 256 >= 6; 426#L404 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 485#L399-1 check_#res#1 := check_~tmp~1#1; 419#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 420#L501 assume !(0 == assert_~arg#1 % 256); 448#L496 assume { :end_inline_assert } true; 445#L469-2 [2022-11-16 10:56:10,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:10,165 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2022-11-16 10:56:10,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:10,165 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091756410] [2022-11-16 10:56:10,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:10,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:10,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 10:56:10,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,234 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 10:56:10,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:10,241 INFO L85 PathProgramCache]: Analyzing trace with hash -204006149, now seen corresponding path program 1 times [2022-11-16 10:56:10,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:10,242 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039970482] [2022-11-16 10:56:10,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:10,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:10,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 10:56:10,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 10:56:10,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 10:56:10,291 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039970482] [2022-11-16 10:56:10,291 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2039970482] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 10:56:10,292 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 10:56:10,292 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 10:56:10,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370634769] [2022-11-16 10:56:10,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 10:56:10,293 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 10:56:10,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 10:56:10,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 10:56:10,294 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 10:56:10,295 INFO L87 Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:10,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 10:56:10,335 INFO L93 Difference]: Finished difference Result 132 states and 179 transitions. [2022-11-16 10:56:10,336 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions. [2022-11-16 10:56:10,338 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-16 10:56:10,343 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions. [2022-11-16 10:56:10,343 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2022-11-16 10:56:10,345 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 132 [2022-11-16 10:56:10,345 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions. [2022-11-16 10:56:10,351 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 10:56:10,351 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 10:56:10,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions. [2022-11-16 10:56:10,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2022-11-16 10:56:10,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 10:56:10,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions. [2022-11-16 10:56:10,369 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 10:56:10,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 10:56:10,370 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-16 10:56:10,371 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 10:56:10,371 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions. [2022-11-16 10:56:10,372 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-16 10:56:10,374 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 10:56:10,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 10:56:10,375 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:10,377 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 10:56:10,378 INFO L748 eck$LassoCheckResult]: Stem: 725#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 718#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 660#L230 assume 0 == ~r1~0 % 256; 661#L231 assume ~id1~0 >= 0; 672#L232 assume 0 == ~st1~0; 733#L233 assume ~send1~0 == ~id1~0; 651#L234 assume 0 == ~mode1~0 % 256; 652#L235 assume ~id2~0 >= 0; 722#L236 assume 0 == ~st2~0; 708#L237 assume ~send2~0 == ~id2~0; 697#L238 assume 0 == ~mode2~0 % 256; 698#L239 assume ~id3~0 >= 0; 693#L240 assume 0 == ~st3~0; 694#L241 assume ~send3~0 == ~id3~0; 702#L242 assume 0 == ~mode3~0 % 256; 670#L243 assume ~id4~0 >= 0; 662#L244 assume 0 == ~st4~0; 663#L245 assume ~send4~0 == ~id4~0; 701#L246 assume 0 == ~mode4~0 % 256; 714#L247 assume ~id5~0 >= 0; 715#L248 assume 0 == ~st5~0; 653#L249 assume ~send5~0 == ~id5~0; 654#L250 assume 0 == ~mode5~0 % 256; 675#L251 assume ~id6~0 >= 0; 676#L252 assume 0 == ~st6~0; 685#L253 assume ~send6~0 == ~id6~0; 686#L254 assume 0 == ~mode6~0 % 256; 687#L255 assume ~id1~0 != ~id2~0; 688#L256 assume ~id1~0 != ~id3~0; 724#L257 assume ~id1~0 != ~id4~0; 705#L258 assume ~id1~0 != ~id5~0; 640#L259 assume ~id1~0 != ~id6~0; 641#L260 assume ~id2~0 != ~id3~0; 734#L261 assume ~id2~0 != ~id4~0; 729#L262 assume ~id2~0 != ~id5~0; 730#L263 assume ~id2~0 != ~id6~0; 731#L264 assume ~id3~0 != ~id4~0; 647#L265 assume ~id3~0 != ~id5~0; 648#L266 assume ~id3~0 != ~id6~0; 671#L267 assume ~id4~0 != ~id5~0; 690#L268 assume ~id4~0 != ~id6~0; 691#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 732#L230-1 init_#res#1 := init_~tmp~0#1; 683#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 684#L24 assume !(0 == assume_abort_if_not_~cond#1); 673#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 674#L469-2 [2022-11-16 10:56:10,379 INFO L750 eck$LassoCheckResult]: Loop: 674#L469-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 767#L80 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 728#L80-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 763#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 761#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 756#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 753#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 751#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 747#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 745#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 741#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 739#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 737#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 736#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 735#L400 assume !(~r1~0 % 256 >= 6); 726#L403 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 727#L404 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 771#L399-1 check_#res#1 := check_~tmp~1#1; 770#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 769#L501 assume !(0 == assert_~arg#1 % 256); 768#L496 assume { :end_inline_assert } true; 674#L469-2 [2022-11-16 10:56:10,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:10,379 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2022-11-16 10:56:10,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:10,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091334681] [2022-11-16 10:56:10,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:10,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:10,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,396 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 10:56:10,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,419 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 10:56:10,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:10,420 INFO L85 PathProgramCache]: Analyzing trace with hash -382651293, now seen corresponding path program 1 times [2022-11-16 10:56:10,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:10,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950513550] [2022-11-16 10:56:10,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:10,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:10,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 10:56:10,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,492 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 10:56:10,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 10:56:10,493 INFO L85 PathProgramCache]: Analyzing trace with hash -706871679, now seen corresponding path program 1 times [2022-11-16 10:56:10,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 10:56:10,494 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432583789] [2022-11-16 10:56:10,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 10:56:10,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 10:56:10,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,567 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 10:56:10,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 10:56:10,682 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 10:56:16,107 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 10:56:16,108 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 10:56:16,108 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 10:56:16,109 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 10:56:16,109 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-16 10:56:16,109 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 10:56:16,109 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 10:56:16,109 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 10:56:16,109 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-16 10:56:16,110 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 10:56:16,110 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 10:56:16,148 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:16,157 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:16,162 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:16,167 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:16,170 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,323 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,333 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,338 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,345 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,350 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,355 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:18,364 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 10:56:21,015 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 28