./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.BOUNDED-16.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.BOUNDED-16.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6327d27f7abe073a313b5cd298156d916d823d684efcd0c205043cb09610f085 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 11:50:12,566 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 11:50:12,569 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 11:50:12,616 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 11:50:12,619 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 11:50:12,625 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 11:50:12,628 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 11:50:12,639 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 11:50:12,641 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 11:50:12,644 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 11:50:12,646 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 11:50:12,649 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 11:50:12,650 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 11:50:12,657 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 11:50:12,660 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 11:50:12,663 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 11:50:12,665 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 11:50:12,668 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 11:50:12,671 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 11:50:12,679 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 11:50:12,682 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 11:50:12,685 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 11:50:12,689 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 11:50:12,690 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 11:50:12,698 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 11:50:12,702 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 11:50:12,702 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 11:50:12,705 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 11:50:12,706 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 11:50:12,707 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 11:50:12,708 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 11:50:12,709 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 11:50:12,712 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 11:50:12,714 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 11:50:12,717 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 11:50:12,717 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 11:50:12,718 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 11:50:12,719 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 11:50:12,719 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 11:50:12,721 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 11:50:12,722 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 11:50:12,723 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 11:50:12,778 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 11:50:12,778 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 11:50:12,779 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 11:50:12,780 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 11:50:12,781 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 11:50:12,781 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 11:50:12,782 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 11:50:12,782 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 11:50:12,782 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 11:50:12,783 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 11:50:12,784 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 11:50:12,785 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 11:50:12,785 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 11:50:12,785 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 11:50:12,786 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 11:50:12,786 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 11:50:12,786 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 11:50:12,786 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 11:50:12,787 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 11:50:12,787 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 11:50:12,787 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 11:50:12,788 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 11:50:12,788 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 11:50:12,790 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 11:50:12,790 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 11:50:12,791 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 11:50:12,791 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 11:50:12,791 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 11:50:12,792 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 11:50:12,792 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 11:50:12,793 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 11:50:12,794 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 11:50:12,795 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6327d27f7abe073a313b5cd298156d916d823d684efcd0c205043cb09610f085 [2022-11-16 11:50:13,148 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 11:50:13,172 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 11:50:13,176 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 11:50:13,192 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 11:50:13,199 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 11:50:13,200 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.BOUNDED-16.pals.c [2022-11-16 11:50:13,286 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/data/567296b61/00e33a9e08c1413a81c9eda63b49d00b/FLAG521af6d43 [2022-11-16 11:50:13,914 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 11:50:13,915 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.BOUNDED-16.pals.c [2022-11-16 11:50:13,939 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/data/567296b61/00e33a9e08c1413a81c9eda63b49d00b/FLAG521af6d43 [2022-11-16 11:50:14,199 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/data/567296b61/00e33a9e08c1413a81c9eda63b49d00b [2022-11-16 11:50:14,203 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 11:50:14,204 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 11:50:14,211 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 11:50:14,211 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 11:50:14,216 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 11:50:14,217 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,221 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@515f061e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14, skipping insertion in model container [2022-11-16 11:50:14,222 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,231 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 11:50:14,302 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 11:50:14,729 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.BOUNDED-16.pals.c[26453,26466] [2022-11-16 11:50:14,731 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:50:14,744 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 11:50:14,842 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.BOUNDED-16.pals.c[26453,26466] [2022-11-16 11:50:14,847 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:50:14,875 INFO L208 MainTranslator]: Completed translation [2022-11-16 11:50:14,875 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14 WrapperNode [2022-11-16 11:50:14,876 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 11:50:14,877 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 11:50:14,877 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 11:50:14,877 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 11:50:14,887 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,913 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,966 INFO L138 Inliner]: procedures = 27, calls = 19, calls flagged for inlining = 14, calls inlined = 14, statements flattened = 465 [2022-11-16 11:50:14,967 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 11:50:14,968 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 11:50:14,968 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 11:50:14,969 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 11:50:14,978 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,979 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,983 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,984 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:14,995 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:15,003 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:15,007 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:15,010 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:15,015 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 11:50:15,016 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 11:50:15,016 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 11:50:15,016 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 11:50:15,018 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (1/1) ... [2022-11-16 11:50:15,026 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 11:50:15,047 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:50:15,062 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 11:50:15,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80d6033f-2b36-4220-8ef3-91805ece1691/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 11:50:15,149 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 11:50:15,149 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 11:50:15,149 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 11:50:15,150 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 11:50:15,328 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 11:50:15,344 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 11:50:16,108 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 11:50:16,119 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 11:50:16,120 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 11:50:16,130 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:50:16 BoogieIcfgContainer [2022-11-16 11:50:16,130 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 11:50:16,132 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 11:50:16,132 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 11:50:16,138 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 11:50:16,139 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:50:16,139 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 11:50:14" (1/3) ... [2022-11-16 11:50:16,140 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2c796e7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 11:50:16, skipping insertion in model container [2022-11-16 11:50:16,140 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:50:16,140 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:50:14" (2/3) ... [2022-11-16 11:50:16,141 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2c796e7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 11:50:16, skipping insertion in model container [2022-11-16 11:50:16,141 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:50:16,141 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:50:16" (3/3) ... [2022-11-16 11:50:16,143 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.ufo.BOUNDED-16.pals.c [2022-11-16 11:50:16,217 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 11:50:16,217 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 11:50:16,218 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 11:50:16,218 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 11:50:16,218 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 11:50:16,218 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 11:50:16,218 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 11:50:16,219 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 11:50:16,224 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 130 states, 129 states have (on average 1.7906976744186047) internal successors, (231), 129 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:16,259 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2022-11-16 11:50:16,259 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:50:16,259 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:50:16,270 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:16,270 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:16,271 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 11:50:16,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 130 states, 129 states have (on average 1.7906976744186047) internal successors, (231), 129 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:16,282 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2022-11-16 11:50:16,283 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:50:16,283 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:50:16,286 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:16,286 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:16,298 INFO L748 eck$LassoCheckResult]: Stem: 121#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_#t~post39#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 7#L295true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 100#L295-1true init_#res#1 := init_~tmp~0#1; 21#L540true main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 40#L22true assume !(0 == assume_abort_if_not_~cond#1); 95#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 45#L630-2true [2022-11-16 11:50:16,300 INFO L750 eck$LassoCheckResult]: Loop: 45#L630-2true assume !!(main_~i2~0#1 < 16);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 114#L92true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 59#L92-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 92#L118true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 54#L118-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 98#L143true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 11#L143-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 6#L168true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 8#L168-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 55#L193true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 49#L193-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 38#L218true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 12#L218-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 77#L243true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 129#L243-2true assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 17#L268true assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 101#L268-2true assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 58#L548true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 110#L548-1true check_#res#1 := check_~tmp~1#1; 130#L568true main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 113#L669true assume !(0 == assert_~arg#1 % 256); 35#L664true assume { :end_inline_assert } true;main_#t~post39#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post39#1;havoc main_#t~post39#1; 45#L630-2true [2022-11-16 11:50:16,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:16,308 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2022-11-16 11:50:16,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:16,323 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34296710] [2022-11-16 11:50:16,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:16,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:16,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:50:16,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:50:16,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:50:16,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34296710] [2022-11-16 11:50:16,883 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34296710] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:50:16,884 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:50:16,885 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:50:16,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121441998] [2022-11-16 11:50:16,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:50:16,892 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 11:50:16,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:16,893 INFO L85 PathProgramCache]: Analyzing trace with hash 1944610393, now seen corresponding path program 1 times [2022-11-16 11:50:16,893 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:16,894 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430797736] [2022-11-16 11:50:16,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:16,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:16,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:50:17,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:50:17,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:50:17,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430797736] [2022-11-16 11:50:17,416 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1430797736] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:50:17,416 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:50:17,416 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:50:17,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1033431142] [2022-11-16 11:50:17,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:50:17,418 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:50:17,420 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:50:17,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:50:17,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:50:17,473 INFO L87 Difference]: Start difference. First operand has 130 states, 129 states have (on average 1.7906976744186047) internal successors, (231), 129 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:17,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:50:17,720 INFO L93 Difference]: Finished difference Result 133 states and 230 transitions. [2022-11-16 11:50:17,722 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 133 states and 230 transitions. [2022-11-16 11:50:17,728 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-11-16 11:50:17,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 133 states to 125 states and 162 transitions. [2022-11-16 11:50:17,738 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 125 [2022-11-16 11:50:17,740 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2022-11-16 11:50:17,740 INFO L73 IsDeterministic]: Start isDeterministic. Operand 125 states and 162 transitions. [2022-11-16 11:50:17,742 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:50:17,742 INFO L218 hiAutomatonCegarLoop]: Abstraction has 125 states and 162 transitions. [2022-11-16 11:50:17,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states and 162 transitions. [2022-11-16 11:50:17,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2022-11-16 11:50:17,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 125 states have (on average 1.296) internal successors, (162), 124 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:17,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 162 transitions. [2022-11-16 11:50:17,782 INFO L240 hiAutomatonCegarLoop]: Abstraction has 125 states and 162 transitions. [2022-11-16 11:50:17,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:50:17,794 INFO L428 stractBuchiCegarLoop]: Abstraction has 125 states and 162 transitions. [2022-11-16 11:50:17,794 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 11:50:17,794 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 125 states and 162 transitions. [2022-11-16 11:50:17,797 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-11-16 11:50:17,797 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:50:17,797 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:50:17,799 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:17,800 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:17,801 INFO L748 eck$LassoCheckResult]: Stem: 404#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 339#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_#t~post39#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 290#L295 assume 0 == ~r1~0; 291#L296 assume ~id1~0 >= 0; 326#L297 assume 0 == ~st1~0; 321#L298 assume ~send1~0 == ~id1~0; 322#L299 assume 0 == ~mode1~0 % 256; 334#L300 assume ~id2~0 >= 0; 376#L301 assume 0 == ~st2~0; 386#L302 assume ~send2~0 == ~id2~0; 387#L303 assume 0 == ~mode2~0 % 256; 396#L304 assume ~id3~0 >= 0; 366#L305 assume 0 == ~st3~0; 367#L306 assume ~send3~0 == ~id3~0; 383#L307 assume 0 == ~mode3~0 % 256; 295#L308 assume ~id4~0 >= 0; 296#L309 assume 0 == ~st4~0; 379#L310 assume ~send4~0 == ~id4~0; 353#L311 assume 0 == ~mode4~0 % 256; 354#L312 assume ~id5~0 >= 0; 312#L313 assume 0 == ~st5~0; 313#L314 assume ~send5~0 == ~id5~0; 347#L315 assume 0 == ~mode5~0 % 256; 348#L316 assume ~id6~0 >= 0; 285#L317 assume 0 == ~st6~0; 286#L318 assume ~send6~0 == ~id6~0; 405#L319 assume 0 == ~mode6~0 % 256; 385#L320 assume ~id7~0 >= 0; 374#L321 assume 0 == ~st7~0; 375#L322 assume ~send7~0 == ~id7~0; 281#L323 assume 0 == ~mode7~0 % 256; 282#L324 assume ~id8~0 >= 0; 300#L325 assume 0 == ~st8~0; 320#L326 assume ~send8~0 == ~id8~0; 303#L327 assume 0 == ~mode8~0 % 256; 304#L328 assume ~id1~0 != ~id2~0; 328#L329 assume ~id1~0 != ~id3~0; 329#L330 assume ~id1~0 != ~id4~0; 293#L331 assume ~id1~0 != ~id5~0; 294#L332 assume ~id1~0 != ~id6~0; 319#L333 assume ~id1~0 != ~id7~0; 327#L334 assume ~id1~0 != ~id8~0; 310#L335 assume ~id2~0 != ~id3~0; 311#L336 assume ~id2~0 != ~id4~0; 382#L337 assume ~id2~0 != ~id5~0; 357#L338 assume ~id2~0 != ~id6~0; 358#L339 assume ~id2~0 != ~id7~0; 398#L340 assume ~id2~0 != ~id8~0; 394#L341 assume ~id3~0 != ~id4~0; 330#L342 assume ~id3~0 != ~id5~0; 331#L343 assume ~id3~0 != ~id6~0; 323#L344 assume ~id3~0 != ~id7~0; 324#L345 assume ~id3~0 != ~id8~0; 349#L346 assume ~id4~0 != ~id5~0; 350#L347 assume ~id4~0 != ~id6~0; 403#L348 assume ~id4~0 != ~id7~0; 389#L349 assume ~id4~0 != ~id8~0; 390#L350 assume ~id5~0 != ~id6~0; 377#L351 assume ~id5~0 != ~id7~0; 378#L352 assume ~id5~0 != ~id8~0; 395#L353 assume ~id6~0 != ~id7~0; 364#L354 assume ~id6~0 != ~id8~0; 332#L355 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 333#L295-1 init_#res#1 := init_~tmp~0#1; 314#L540 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 315#L22 assume !(0 == assume_abort_if_not_~cond#1); 345#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 336#L630-2 [2022-11-16 11:50:17,801 INFO L750 eck$LassoCheckResult]: Loop: 336#L630-2 assume !!(main_~i2~0#1 < 16);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 351#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 368#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 369#L118 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 361#L118-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 362#L143 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 297#L143-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 287#L168 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 289#L168-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 292#L193 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 356#L193-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 340#L218 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 298#L218-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 299#L243 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 302#L243-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 306#L268 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 307#L268-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 365#L548 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 343#L548-1 check_#res#1 := check_~tmp~1#1; 400#L568 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 401#L669 assume !(0 == assert_~arg#1 % 256); 335#L664 assume { :end_inline_assert } true;main_#t~post39#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post39#1;havoc main_#t~post39#1; 336#L630-2 [2022-11-16 11:50:17,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:17,802 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2022-11-16 11:50:17,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:17,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720961895] [2022-11-16 11:50:17,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:17,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:17,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:17,848 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:50:17,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:17,952 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:50:17,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:17,953 INFO L85 PathProgramCache]: Analyzing trace with hash 1944610393, now seen corresponding path program 2 times [2022-11-16 11:50:17,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:17,954 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961920769] [2022-11-16 11:50:17,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:17,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:18,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:50:18,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:50:18,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:50:18,227 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961920769] [2022-11-16 11:50:18,227 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961920769] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:50:18,227 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:50:18,227 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 11:50:18,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412702603] [2022-11-16 11:50:18,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:50:18,228 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:50:18,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:50:18,229 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:50:18,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:50:18,230 INFO L87 Difference]: Start difference. First operand 125 states and 162 transitions. cyclomatic complexity: 38 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:18,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:50:18,292 INFO L93 Difference]: Finished difference Result 128 states and 164 transitions. [2022-11-16 11:50:18,293 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 128 states and 164 transitions. [2022-11-16 11:50:18,295 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-11-16 11:50:18,296 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 128 states to 125 states and 159 transitions. [2022-11-16 11:50:18,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 125 [2022-11-16 11:50:18,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2022-11-16 11:50:18,298 INFO L73 IsDeterministic]: Start isDeterministic. Operand 125 states and 159 transitions. [2022-11-16 11:50:18,298 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:50:18,299 INFO L218 hiAutomatonCegarLoop]: Abstraction has 125 states and 159 transitions. [2022-11-16 11:50:18,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states and 159 transitions. [2022-11-16 11:50:18,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2022-11-16 11:50:18,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 125 states have (on average 1.272) internal successors, (159), 124 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:18,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 159 transitions. [2022-11-16 11:50:18,307 INFO L240 hiAutomatonCegarLoop]: Abstraction has 125 states and 159 transitions. [2022-11-16 11:50:18,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:50:18,308 INFO L428 stractBuchiCegarLoop]: Abstraction has 125 states and 159 transitions. [2022-11-16 11:50:18,308 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 11:50:18,309 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 125 states and 159 transitions. [2022-11-16 11:50:18,310 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-11-16 11:50:18,310 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:50:18,311 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:50:18,313 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:18,313 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:18,314 INFO L748 eck$LassoCheckResult]: Stem: 669#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 604#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_#t~post39#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 555#L295 assume 0 == ~r1~0; 556#L296 assume ~id1~0 >= 0; 591#L297 assume 0 == ~st1~0; 586#L298 assume ~send1~0 == ~id1~0; 587#L299 assume 0 == ~mode1~0 % 256; 599#L300 assume ~id2~0 >= 0; 640#L301 assume 0 == ~st2~0; 651#L302 assume ~send2~0 == ~id2~0; 652#L303 assume 0 == ~mode2~0 % 256; 661#L304 assume ~id3~0 >= 0; 630#L305 assume 0 == ~st3~0; 631#L306 assume ~send3~0 == ~id3~0; 647#L307 assume 0 == ~mode3~0 % 256; 560#L308 assume ~id4~0 >= 0; 561#L309 assume 0 == ~st4~0; 643#L310 assume ~send4~0 == ~id4~0; 617#L311 assume 0 == ~mode4~0 % 256; 618#L312 assume ~id5~0 >= 0; 577#L313 assume 0 == ~st5~0; 578#L314 assume ~send5~0 == ~id5~0; 611#L315 assume 0 == ~mode5~0 % 256; 612#L316 assume ~id6~0 >= 0; 550#L317 assume 0 == ~st6~0; 551#L318 assume ~send6~0 == ~id6~0; 670#L319 assume 0 == ~mode6~0 % 256; 650#L320 assume ~id7~0 >= 0; 638#L321 assume 0 == ~st7~0; 639#L322 assume ~send7~0 == ~id7~0; 546#L323 assume 0 == ~mode7~0 % 256; 547#L324 assume ~id8~0 >= 0; 565#L325 assume 0 == ~st8~0; 585#L326 assume ~send8~0 == ~id8~0; 568#L327 assume 0 == ~mode8~0 % 256; 569#L328 assume ~id1~0 != ~id2~0; 593#L329 assume ~id1~0 != ~id3~0; 594#L330 assume ~id1~0 != ~id4~0; 558#L331 assume ~id1~0 != ~id5~0; 559#L332 assume ~id1~0 != ~id6~0; 584#L333 assume ~id1~0 != ~id7~0; 592#L334 assume ~id1~0 != ~id8~0; 575#L335 assume ~id2~0 != ~id3~0; 576#L336 assume ~id2~0 != ~id4~0; 646#L337 assume ~id2~0 != ~id5~0; 621#L338 assume ~id2~0 != ~id6~0; 622#L339 assume ~id2~0 != ~id7~0; 663#L340 assume ~id2~0 != ~id8~0; 659#L341 assume ~id3~0 != ~id4~0; 595#L342 assume ~id3~0 != ~id5~0; 596#L343 assume ~id3~0 != ~id6~0; 588#L344 assume ~id3~0 != ~id7~0; 589#L345 assume ~id3~0 != ~id8~0; 613#L346 assume ~id4~0 != ~id5~0; 614#L347 assume ~id4~0 != ~id6~0; 668#L348 assume ~id4~0 != ~id7~0; 654#L349 assume ~id4~0 != ~id8~0; 655#L350 assume ~id5~0 != ~id6~0; 641#L351 assume ~id5~0 != ~id7~0; 642#L352 assume ~id5~0 != ~id8~0; 660#L353 assume ~id6~0 != ~id7~0; 628#L354 assume ~id6~0 != ~id8~0; 597#L355 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 598#L295-1 init_#res#1 := init_~tmp~0#1; 579#L540 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 580#L22 assume !(0 == assume_abort_if_not_~cond#1); 609#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 601#L630-2 [2022-11-16 11:50:18,314 INFO L750 eck$LassoCheckResult]: Loop: 601#L630-2 assume !!(main_~i2~0#1 < 16);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 615#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 632#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 633#L118 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 625#L118-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 626#L143 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 562#L143-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 552#L168 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 554#L168-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 557#L193 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 620#L193-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 605#L218 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 563#L218-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 564#L243 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 567#L243-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 571#L268 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 572#L268-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 629#L548 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 616#L549 assume ~r1~0 >= 8; 608#L553 assume ~r1~0 < 8;check_~tmp~1#1 := 1; 648#L548-1 check_#res#1 := check_~tmp~1#1; 665#L568 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 666#L669 assume !(0 == assert_~arg#1 % 256); 600#L664 assume { :end_inline_assert } true;main_#t~post39#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post39#1;havoc main_#t~post39#1; 601#L630-2 [2022-11-16 11:50:18,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:18,315 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2022-11-16 11:50:18,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:18,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623498812] [2022-11-16 11:50:18,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:18,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:18,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,346 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:50:18,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,384 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:50:18,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:18,385 INFO L85 PathProgramCache]: Analyzing trace with hash -955997591, now seen corresponding path program 1 times [2022-11-16 11:50:18,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:18,385 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732905414] [2022-11-16 11:50:18,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:18,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:18,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:50:18,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:50:18,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:50:18,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732905414] [2022-11-16 11:50:18,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732905414] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:50:18,443 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:50:18,444 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:50:18,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148113644] [2022-11-16 11:50:18,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:50:18,445 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:50:18,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:50:18,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:50:18,449 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:50:18,450 INFO L87 Difference]: Start difference. First operand 125 states and 159 transitions. cyclomatic complexity: 35 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:18,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:50:18,492 INFO L93 Difference]: Finished difference Result 177 states and 240 transitions. [2022-11-16 11:50:18,492 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 177 states and 240 transitions. [2022-11-16 11:50:18,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 110 [2022-11-16 11:50:18,502 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 177 states to 177 states and 240 transitions. [2022-11-16 11:50:18,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 177 [2022-11-16 11:50:18,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 177 [2022-11-16 11:50:18,505 INFO L73 IsDeterministic]: Start isDeterministic. Operand 177 states and 240 transitions. [2022-11-16 11:50:18,512 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:50:18,512 INFO L218 hiAutomatonCegarLoop]: Abstraction has 177 states and 240 transitions. [2022-11-16 11:50:18,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states and 240 transitions. [2022-11-16 11:50:18,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2022-11-16 11:50:18,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 177 states have (on average 1.3559322033898304) internal successors, (240), 176 states have internal predecessors, (240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:50:18,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 240 transitions. [2022-11-16 11:50:18,539 INFO L240 hiAutomatonCegarLoop]: Abstraction has 177 states and 240 transitions. [2022-11-16 11:50:18,540 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:50:18,541 INFO L428 stractBuchiCegarLoop]: Abstraction has 177 states and 240 transitions. [2022-11-16 11:50:18,541 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 11:50:18,542 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 240 transitions. [2022-11-16 11:50:18,543 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 110 [2022-11-16 11:50:18,544 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:50:18,544 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:50:18,546 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:18,546 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:50:18,547 INFO L748 eck$LassoCheckResult]: Stem: 984#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 912#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_#t~post39#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 863#L295 assume 0 == ~r1~0; 864#L296 assume ~id1~0 >= 0; 899#L297 assume 0 == ~st1~0; 894#L298 assume ~send1~0 == ~id1~0; 895#L299 assume 0 == ~mode1~0 % 256; 907#L300 assume ~id2~0 >= 0; 951#L301 assume 0 == ~st2~0; 962#L302 assume ~send2~0 == ~id2~0; 963#L303 assume 0 == ~mode2~0 % 256; 975#L304 assume ~id3~0 >= 0; 943#L305 assume 0 == ~st3~0; 944#L306 assume ~send3~0 == ~id3~0; 959#L307 assume 0 == ~mode3~0 % 256; 868#L308 assume ~id4~0 >= 0; 869#L309 assume 0 == ~st4~0; 955#L310 assume ~send4~0 == ~id4~0; 928#L311 assume 0 == ~mode4~0 % 256; 929#L312 assume ~id5~0 >= 0; 885#L313 assume 0 == ~st5~0; 886#L314 assume ~send5~0 == ~id5~0; 920#L315 assume 0 == ~mode5~0 % 256; 921#L316 assume ~id6~0 >= 0; 858#L317 assume 0 == ~st6~0; 859#L318 assume ~send6~0 == ~id6~0; 985#L319 assume 0 == ~mode6~0 % 256; 961#L320 assume ~id7~0 >= 0; 949#L321 assume 0 == ~st7~0; 950#L322 assume ~send7~0 == ~id7~0; 856#L323 assume 0 == ~mode7~0 % 256; 857#L324 assume ~id8~0 >= 0; 873#L325 assume 0 == ~st8~0; 893#L326 assume ~send8~0 == ~id8~0; 876#L327 assume 0 == ~mode8~0 % 256; 877#L328 assume ~id1~0 != ~id2~0; 901#L329 assume ~id1~0 != ~id3~0; 902#L330 assume ~id1~0 != ~id4~0; 866#L331 assume ~id1~0 != ~id5~0; 867#L332 assume ~id1~0 != ~id6~0; 892#L333 assume ~id1~0 != ~id7~0; 900#L334 assume ~id1~0 != ~id8~0; 883#L335 assume ~id2~0 != ~id3~0; 884#L336 assume ~id2~0 != ~id4~0; 958#L337 assume ~id2~0 != ~id5~0; 931#L338 assume ~id2~0 != ~id6~0; 932#L339 assume ~id2~0 != ~id7~0; 976#L340 assume ~id2~0 != ~id8~0; 970#L341 assume ~id3~0 != ~id4~0; 903#L342 assume ~id3~0 != ~id5~0; 904#L343 assume ~id3~0 != ~id6~0; 896#L344 assume ~id3~0 != ~id7~0; 897#L345 assume ~id3~0 != ~id8~0; 922#L346 assume ~id4~0 != ~id5~0; 923#L347 assume ~id4~0 != ~id6~0; 983#L348 assume ~id4~0 != ~id7~0; 965#L349 assume ~id4~0 != ~id8~0; 966#L350 assume ~id5~0 != ~id6~0; 952#L351 assume ~id5~0 != ~id7~0; 953#L352 assume ~id5~0 != ~id8~0; 972#L353 assume ~id6~0 != ~id7~0; 938#L354 assume ~id6~0 != ~id8~0; 905#L355 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 906#L295-1 init_#res#1 := init_~tmp~0#1; 887#L540 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 888#L22 assume !(0 == assume_abort_if_not_~cond#1); 918#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 973#L630-2 [2022-11-16 11:50:18,547 INFO L750 eck$LassoCheckResult]: Loop: 973#L630-2 assume !!(main_~i2~0#1 < 16);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1024#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 954#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 1021#L118 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 1018#L118-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 1016#L143 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 1012#L143-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 1010#L168 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 1006#L168-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 1004#L193 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 1002#L193-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 1000#L218 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 871#L218-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 872#L243 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 875#L243-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 879#L268 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 880#L268-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 939#L548 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 940#L549 assume !(~r1~0 >= 8); 916#L552 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 917#L553 assume ~r1~0 < 8;check_~tmp~1#1 := 1; 1028#L548-1 check_#res#1 := check_~tmp~1#1; 1027#L568 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1026#L669 assume !(0 == assert_~arg#1 % 256); 1025#L664 assume { :end_inline_assert } true;main_#t~post39#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post39#1;havoc main_#t~post39#1; 973#L630-2 [2022-11-16 11:50:18,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:18,548 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2022-11-16 11:50:18,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:18,549 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1674700695] [2022-11-16 11:50:18,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:18,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:18,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,591 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:50:18,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,644 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:50:18,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:18,645 INFO L85 PathProgramCache]: Analyzing trace with hash 2075417959, now seen corresponding path program 1 times [2022-11-16 11:50:18,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:18,646 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450886761] [2022-11-16 11:50:18,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:18,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:18,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,727 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:50:18,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,800 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:50:18,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:50:18,801 INFO L85 PathProgramCache]: Analyzing trace with hash -1273038936, now seen corresponding path program 1 times [2022-11-16 11:50:18,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:50:18,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466991896] [2022-11-16 11:50:18,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:50:18,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:50:18,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:18,929 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:50:19,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:50:19,110 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:50:29,377 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 11:50:29,378 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 11:50:29,378 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 11:50:29,378 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 11:50:29,379 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-16 11:50:29,379 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 11:50:29,379 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 11:50:29,379 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 11:50:29,379 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.ufo.BOUNDED-16.pals.c_Iteration4_Loop [2022-11-16 11:50:29,380 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 11:50:29,380 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 11:50:29,457 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,475 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,478 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,482 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,488 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,491 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,498 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,502 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,506 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,510 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,517 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,521 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,526 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,530 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,537 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,545 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,553 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,558 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,562 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,567 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,571 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,574 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,578 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,582 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,590 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,598 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:29,602 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:34,744 WARN L233 SmtUtils]: Spent 5.12s on a formula simplification. DAG size of input: 304 DAG size of output: 209 (called from [L 269] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.setFormulaAndSimplify) [2022-11-16 11:50:34,747 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:34,754 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:34,764 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:34,768 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:34,774 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 11:50:40,609 WARN L233 SmtUtils]: Spent 5.43s on a formula simplification. DAG size of input: 489 DAG size of output: 436 (called from [L 68] de.uni_freiburg.informatik.ultimate.icfgtransformer.transformulatransformers.SimplifyPreprocessor.process) [2022-11-16 11:50:40,652 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 45