./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum10.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum10.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:42:24,631 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:42:24,633 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:42:24,667 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:42:24,669 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:42:24,673 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:42:24,676 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:42:24,680 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:42:24,682 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:42:24,688 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:42:24,689 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:42:24,691 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:42:24,693 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:42:24,694 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:42:24,696 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:42:24,697 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:42:24,698 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:42:24,699 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:42:24,700 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:42:24,701 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:42:24,703 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:42:24,704 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:42:24,705 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:42:24,706 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:42:24,710 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:42:24,710 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:42:24,710 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:42:24,711 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:42:24,712 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:42:24,713 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:42:24,713 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:42:24,714 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:42:24,715 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:42:24,716 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:42:24,717 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:42:24,717 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:42:24,718 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:42:24,718 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:42:24,719 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:42:24,720 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:42:24,721 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:42:24,722 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 12:42:24,770 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:42:24,771 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:42:24,772 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:42:24,772 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:42:24,773 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:42:24,774 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:42:24,774 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:42:24,774 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 12:42:24,774 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 12:42:24,775 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 12:42:24,776 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 12:42:24,776 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 12:42:24,776 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 12:42:24,777 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:42:24,777 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 12:42:24,777 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 12:42:24,777 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:42:24,777 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 12:42:24,778 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:42:24,778 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 12:42:24,778 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 12:42:24,778 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 12:42:24,779 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 12:42:24,780 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:42:24,780 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 12:42:24,781 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:42:24,781 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 12:42:24,781 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:42:24,781 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:42:24,782 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:42:24,782 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:42:24,783 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 12:42:24,784 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 [2022-11-16 12:42:25,029 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:42:25,053 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:42:25,055 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:42:25,057 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:42:25,058 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:42:25,059 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/reducercommutativity/rangesum10.i [2022-11-16 12:42:25,158 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/data/2bbbd7e91/b06d14c33ea043d49ac10baa66187d48/FLAGe3fa58d51 [2022-11-16 12:42:25,682 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:42:25,683 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/sv-benchmarks/c/reducercommutativity/rangesum10.i [2022-11-16 12:42:25,690 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/data/2bbbd7e91/b06d14c33ea043d49ac10baa66187d48/FLAGe3fa58d51 [2022-11-16 12:42:26,057 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/data/2bbbd7e91/b06d14c33ea043d49ac10baa66187d48 [2022-11-16 12:42:26,062 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:42:26,064 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:42:26,069 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:42:26,069 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:42:26,074 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:42:26,074 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,077 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4274f429 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26, skipping insertion in model container [2022-11-16 12:42:26,077 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,085 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:42:26,103 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:42:26,307 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/sv-benchmarks/c/reducercommutativity/rangesum10.i[1465,1478] [2022-11-16 12:42:26,308 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:42:26,315 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:42:26,337 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/sv-benchmarks/c/reducercommutativity/rangesum10.i[1465,1478] [2022-11-16 12:42:26,338 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:42:26,351 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:42:26,352 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26 WrapperNode [2022-11-16 12:42:26,352 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:42:26,353 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:42:26,354 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:42:26,354 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:42:26,361 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,368 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,395 INFO L138 Inliner]: procedures = 17, calls = 23, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 135 [2022-11-16 12:42:26,395 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:42:26,396 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:42:26,396 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:42:26,396 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:42:26,407 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,408 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,410 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,411 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,417 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,423 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,431 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,432 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,434 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:42:26,435 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:42:26,436 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:42:26,437 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:42:26,438 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (1/1) ... [2022-11-16 12:42:26,453 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:26,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:26,474 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:26,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 12:42:26,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 12:42:26,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 12:42:26,514 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 12:42:26,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-16 12:42:26,514 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:42:26,514 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:42:26,514 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-16 12:42:26,514 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 12:42:26,581 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:42:26,583 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:42:26,807 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:42:26,832 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:42:26,832 INFO L300 CfgBuilder]: Removed 5 assume(true) statements. [2022-11-16 12:42:26,834 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:42:26 BoogieIcfgContainer [2022-11-16 12:42:26,834 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:42:26,835 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 12:42:26,835 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 12:42:26,845 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 12:42:26,846 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:42:26,846 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 12:42:26" (1/3) ... [2022-11-16 12:42:26,847 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3d50c6d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 12:42:26, skipping insertion in model container [2022-11-16 12:42:26,847 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:42:26,847 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:42:26" (2/3) ... [2022-11-16 12:42:26,848 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3d50c6d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 12:42:26, skipping insertion in model container [2022-11-16 12:42:26,848 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:42:26,848 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:42:26" (3/3) ... [2022-11-16 12:42:26,849 INFO L332 chiAutomizerObserver]: Analyzing ICFG rangesum10.i [2022-11-16 12:42:26,971 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 12:42:26,971 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 12:42:26,971 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 12:42:26,971 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 12:42:26,971 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 12:42:26,972 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 12:42:26,972 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 12:42:26,972 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 12:42:26,976 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:26,997 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2022-11-16 12:42:27,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:27,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:27,007 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 12:42:27,007 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-16 12:42:27,008 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 12:42:27,009 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:27,018 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2022-11-16 12:42:27,018 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:27,018 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:27,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 12:42:27,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-16 12:42:27,029 INFO L748 eck$LassoCheckResult]: Stem: 15#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 6#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 21#L17-3true [2022-11-16 12:42:27,029 INFO L750 eck$LassoCheckResult]: Loop: 21#L17-3true assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10#L17-2true init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 21#L17-3true [2022-11-16 12:42:27,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:27,042 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-16 12:42:27,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:27,053 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131627580] [2022-11-16 12:42:27,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:27,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:27,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:27,165 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:27,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:27,194 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:27,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:27,197 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-16 12:42:27,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:27,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149715988] [2022-11-16 12:42:27,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:27,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:27,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:27,209 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:27,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:27,217 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:27,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:27,219 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-16 12:42:27,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:27,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1505649379] [2022-11-16 12:42:27,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:27,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:27,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:27,243 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:27,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:27,261 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:27,747 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 12:42:27,748 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 12:42:27,748 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 12:42:27,748 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 12:42:27,748 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-16 12:42:27,748 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:27,749 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 12:42:27,749 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 12:42:27,749 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration1_Lasso [2022-11-16 12:42:27,749 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 12:42:27,749 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 12:42:27,772 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:27,783 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:27,786 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:27,791 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:27,797 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,232 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,235 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,238 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,241 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,244 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,248 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,254 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,258 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,261 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,264 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,267 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,271 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,274 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:28,634 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-16 12:42:28,637 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-16 12:42:28,639 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,639 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,642 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,649 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,662 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-16 12:42:28,663 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,664 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:28,664 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,664 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,664 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,670 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:28,670 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:28,680 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,688 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,689 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,691 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,697 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,701 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-16 12:42:28,709 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,709 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:28,709 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,710 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,710 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,710 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:28,711 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:28,719 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,727 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,728 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,729 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,733 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-16 12:42:28,748 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,748 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:28,748 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,749 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,749 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,749 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:28,749 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:28,759 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,763 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,766 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,774 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,783 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-16 12:42:28,787 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,787 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,788 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,788 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,795 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:28,796 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:28,814 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,818 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,819 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,819 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,821 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,836 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,848 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,848 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:28,848 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,848 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,848 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,850 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:28,850 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:28,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-16 12:42:28,862 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,871 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,872 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,884 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,896 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,896 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:28,896 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,896 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,896 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,897 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:28,897 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:28,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-16 12:42:28,914 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,922 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,923 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,923 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,924 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-16 12:42:28,932 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,945 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,945 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,945 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,945 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:28,948 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:28,949 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:28,960 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:28,968 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:28,968 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:28,969 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:28,970 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:28,979 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:28,992 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:28,993 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:28,993 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:28,993 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:29,001 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:29,001 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:29,002 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-16 12:42:29,022 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:29,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:29,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:29,031 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:29,032 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:29,036 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:29,050 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:29,051 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:29,051 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:29,051 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:29,052 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-16 12:42:29,067 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:29,068 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:29,085 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-16 12:42:29,166 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-16 12:42:29,166 INFO L444 ModelExtractionUtils]: 9 out of 22 variables were initially zero. Simplification set additionally 10 variables to zero. [2022-11-16 12:42:29,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:29,168 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:29,198 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:29,252 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-16 12:42:29,252 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-16 12:42:29,280 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-16 12:42:29,280 INFO L513 LassoAnalysis]: Proved termination. [2022-11-16 12:42:29,281 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_init_nondet_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#x~0#1.base)_1) = -8*ULTIMATE.start_init_nondet_~i~0#1 + 19*v_rep(select #length ULTIMATE.start_main_~#x~0#1.base)_1 Supporting invariants [] [2022-11-16 12:42:29,306 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:29,344 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:29,355 INFO L156 tatePredicateManager]: 8 out of 9 supporting invariants were superfluous and have been removed [2022-11-16 12:42:29,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:29,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:29,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 12:42:29,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:29,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:29,442 WARN L261 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 12:42:29,445 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:29,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:29,547 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-16 12:42:29,549 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:29,652 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 75 states and 119 transitions. Complement of second has 8 states. [2022-11-16 12:42:29,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-16 12:42:29,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:29,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 79 transitions. [2022-11-16 12:42:29,674 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 79 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-16 12:42:29,675 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:29,675 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 79 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-16 12:42:29,675 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:29,675 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 79 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-16 12:42:29,675 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:29,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 119 transitions. [2022-11-16 12:42:29,686 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:29,690 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 22 states and 32 transitions. [2022-11-16 12:42:29,691 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-16 12:42:29,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-16 12:42:29,692 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 32 transitions. [2022-11-16 12:42:29,693 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:29,693 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 32 transitions. [2022-11-16 12:42:29,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 32 transitions. [2022-11-16 12:42:29,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-11-16 12:42:29,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:29,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 32 transitions. [2022-11-16 12:42:29,719 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 32 transitions. [2022-11-16 12:42:29,720 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2022-11-16 12:42:29,720 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 12:42:29,720 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 32 transitions. [2022-11-16 12:42:29,720 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:29,720 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:29,721 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:29,721 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-16 12:42:29,721 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:29,721 INFO L748 eck$LassoCheckResult]: Stem: 183#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 184#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 195#L17-3 assume !(init_nondet_~i~0#1 < 10); 190#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 191#L28-3 [2022-11-16 12:42:29,722 INFO L750 eck$LassoCheckResult]: Loop: 191#L28-3 assume !!(rangesum_~i~1#1 < 10); 192#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 193#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 191#L28-3 [2022-11-16 12:42:29,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:29,722 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-16 12:42:29,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:29,723 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339491249] [2022-11-16 12:42:29,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:29,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:29,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:29,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:29,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:29,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339491249] [2022-11-16 12:42:29,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [339491249] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:42:29,785 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:42:29,785 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:42:29,785 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797427770] [2022-11-16 12:42:29,786 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:42:29,788 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:42:29,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:29,788 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2022-11-16 12:42:29,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:29,789 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316579159] [2022-11-16 12:42:29,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:29,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:29,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:29,806 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:29,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:29,812 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:29,872 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:29,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:42:29,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:42:29,877 INFO L87 Difference]: Start difference. First operand 22 states and 32 transitions. cyclomatic complexity: 15 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:29,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:29,896 INFO L93 Difference]: Finished difference Result 23 states and 32 transitions. [2022-11-16 12:42:29,897 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 32 transitions. [2022-11-16 12:42:29,897 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:29,898 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 32 transitions. [2022-11-16 12:42:29,898 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-16 12:42:29,898 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-16 12:42:29,898 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 32 transitions. [2022-11-16 12:42:29,898 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:29,898 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 32 transitions. [2022-11-16 12:42:29,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 32 transitions. [2022-11-16 12:42:29,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-11-16 12:42:29,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:29,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2022-11-16 12:42:29,901 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2022-11-16 12:42:29,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:42:29,902 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2022-11-16 12:42:29,902 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 12:42:29,902 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2022-11-16 12:42:29,903 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:29,903 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:29,903 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:29,903 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-16 12:42:29,903 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:29,903 INFO L748 eck$LassoCheckResult]: Stem: 234#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 235#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 247#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 248#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 249#L17-3 assume !(init_nondet_~i~0#1 < 10); 241#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 242#L28-3 [2022-11-16 12:42:29,903 INFO L750 eck$LassoCheckResult]: Loop: 242#L28-3 assume !!(rangesum_~i~1#1 < 10); 243#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 244#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 242#L28-3 [2022-11-16 12:42:29,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:29,904 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-16 12:42:29,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:29,904 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36486523] [2022-11-16 12:42:29,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:29,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:29,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:29,981 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:29,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:29,982 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36486523] [2022-11-16 12:42:29,982 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [36486523] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:29,982 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1193809014] [2022-11-16 12:42:29,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:29,983 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:29,983 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:29,984 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:30,002 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-16 12:42:30,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:30,049 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 12:42:30,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:30,065 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:30,065 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:30,087 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:30,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1193809014] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:30,092 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:30,092 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-16 12:42:30,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119978276] [2022-11-16 12:42:30,093 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:30,093 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:42:30,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:30,094 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 2 times [2022-11-16 12:42:30,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:30,095 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1290278692] [2022-11-16 12:42:30,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:30,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:30,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,111 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:30,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,116 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:30,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:30,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-16 12:42:30,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:42:30,185 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 14 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:30,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:30,226 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-11-16 12:42:30,226 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 37 transitions. [2022-11-16 12:42:30,229 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:30,230 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 37 transitions. [2022-11-16 12:42:30,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-16 12:42:30,231 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-16 12:42:30,231 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 37 transitions. [2022-11-16 12:42:30,231 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:30,231 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-16 12:42:30,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 37 transitions. [2022-11-16 12:42:30,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-11-16 12:42:30,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.3214285714285714) internal successors, (37), 27 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:30,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2022-11-16 12:42:30,236 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-16 12:42:30,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:42:30,238 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-16 12:42:30,238 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 12:42:30,238 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 37 transitions. [2022-11-16 12:42:30,242 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:30,242 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:30,242 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:30,243 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-16 12:42:30,243 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:30,244 INFO L748 eck$LassoCheckResult]: Stem: 324#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 336#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 337#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 338#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 339#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 351#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 350#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 349#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 348#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 347#L17-3 assume !(init_nondet_~i~0#1 < 10); 331#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 332#L28-3 [2022-11-16 12:42:30,244 INFO L750 eck$LassoCheckResult]: Loop: 332#L28-3 assume !!(rangesum_~i~1#1 < 10); 333#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 334#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 332#L28-3 [2022-11-16 12:42:30,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:30,245 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-16 12:42:30,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:30,245 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265811369] [2022-11-16 12:42:30,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:30,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:30,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:30,406 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:30,406 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:30,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265811369] [2022-11-16 12:42:30,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [265811369] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:30,407 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349689107] [2022-11-16 12:42:30,407 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:42:30,407 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:30,408 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:30,409 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:30,438 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-16 12:42:30,486 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:42:30,486 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:42:30,487 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 12:42:30,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:30,524 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:30,524 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:30,615 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:30,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [349689107] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:30,616 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:30,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-16 12:42:30,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2060666872] [2022-11-16 12:42:30,617 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:30,617 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:42:30,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:30,618 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 3 times [2022-11-16 12:42:30,618 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:30,618 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453789590] [2022-11-16 12:42:30,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:30,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:30,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,624 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:30,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,629 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:30,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:30,704 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-16 12:42:30,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-16 12:42:30,705 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. cyclomatic complexity: 14 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:30,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:30,755 INFO L93 Difference]: Finished difference Result 40 states and 49 transitions. [2022-11-16 12:42:30,756 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 49 transitions. [2022-11-16 12:42:30,756 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:30,757 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 49 transitions. [2022-11-16 12:42:30,757 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-16 12:42:30,757 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-16 12:42:30,757 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 49 transitions. [2022-11-16 12:42:30,757 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:30,757 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2022-11-16 12:42:30,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 49 transitions. [2022-11-16 12:42:30,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2022-11-16 12:42:30,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.225) internal successors, (49), 39 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:30,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2022-11-16 12:42:30,760 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2022-11-16 12:42:30,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 12:42:30,761 INFO L428 stractBuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2022-11-16 12:42:30,762 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-16 12:42:30,762 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 49 transitions. [2022-11-16 12:42:30,762 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:30,762 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:30,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:30,763 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2022-11-16 12:42:30,763 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:30,764 INFO L748 eck$LassoCheckResult]: Stem: 474#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 475#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 486#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 487#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 488#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 489#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 494#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 513#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 512#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 511#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 510#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 509#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 508#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 507#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 506#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 505#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 504#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 503#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 502#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 501#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 500#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 499#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 498#L17-3 assume !(init_nondet_~i~0#1 < 10); 481#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 482#L28-3 [2022-11-16 12:42:30,764 INFO L750 eck$LassoCheckResult]: Loop: 482#L28-3 assume !!(rangesum_~i~1#1 < 10); 483#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 484#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 482#L28-3 [2022-11-16 12:42:30,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:30,764 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2022-11-16 12:42:30,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:30,765 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448952054] [2022-11-16 12:42:30,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:30,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:30,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,795 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:30,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,819 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:30,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:30,820 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 4 times [2022-11-16 12:42:30,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:30,822 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732467868] [2022-11-16 12:42:30,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:30,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:30,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:30,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:30,839 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:30,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:30,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1328180093, now seen corresponding path program 1 times [2022-11-16 12:42:30,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:30,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266582709] [2022-11-16 12:42:30,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:30,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:30,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:30,936 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:30,936 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:30,936 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266582709] [2022-11-16 12:42:30,936 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1266582709] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:42:30,937 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:42:30,937 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:42:30,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1170771082] [2022-11-16 12:42:30,937 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:42:30,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:30,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:42:31,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:42:31,000 INFO L87 Difference]: Start difference. First operand 40 states and 49 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:31,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:31,039 INFO L93 Difference]: Finished difference Result 49 states and 58 transitions. [2022-11-16 12:42:31,039 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 58 transitions. [2022-11-16 12:42:31,039 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:31,040 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 49 states and 58 transitions. [2022-11-16 12:42:31,040 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2022-11-16 12:42:31,040 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2022-11-16 12:42:31,041 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 58 transitions. [2022-11-16 12:42:31,041 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:31,041 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 58 transitions. [2022-11-16 12:42:31,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 58 transitions. [2022-11-16 12:42:31,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2022-11-16 12:42:31,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1956521739130435) internal successors, (55), 45 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:31,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 55 transitions. [2022-11-16 12:42:31,044 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 55 transitions. [2022-11-16 12:42:31,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:42:31,046 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 55 transitions. [2022-11-16 12:42:31,046 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-16 12:42:31,046 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 55 transitions. [2022-11-16 12:42:31,047 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:31,047 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:31,047 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:31,047 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:31,048 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:31,048 INFO L748 eck$LassoCheckResult]: Stem: 571#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 572#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 584#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 585#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 586#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 587#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 616#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 615#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 614#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 613#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 612#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 611#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 610#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 609#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 608#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 607#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 606#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 605#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 604#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 603#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 602#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 599#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 598#L17-3 assume !(init_nondet_~i~0#1 < 10); 577#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 578#L28-3 assume !!(rangesum_~i~1#1 < 10); 579#L29 assume !(rangesum_~i~1#1 > 5); 580#L28-2 [2022-11-16 12:42:31,048 INFO L750 eck$LassoCheckResult]: Loop: 580#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 581#L28-3 assume !!(rangesum_~i~1#1 < 10); 601#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 580#L28-2 [2022-11-16 12:42:31,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:31,049 INFO L85 PathProgramCache]: Analyzing trace with hash -95702812, now seen corresponding path program 1 times [2022-11-16 12:42:31,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:31,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [15203279] [2022-11-16 12:42:31,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:31,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,070 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:31,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,087 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:31,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:31,088 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 5 times [2022-11-16 12:42:31,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:31,089 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561887909] [2022-11-16 12:42:31,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:31,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,093 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:31,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,097 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:31,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:31,097 INFO L85 PathProgramCache]: Analyzing trace with hash 775842814, now seen corresponding path program 1 times [2022-11-16 12:42:31,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:31,098 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800452911] [2022-11-16 12:42:31,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:31,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:31,238 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:31,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:31,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800452911] [2022-11-16 12:42:31,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [800452911] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:31,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [936311111] [2022-11-16 12:42:31,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,239 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:31,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:31,261 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:31,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-16 12:42:31,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:31,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 12:42:31,350 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:31,374 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:31,374 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:31,395 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:31,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [936311111] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:31,396 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:31,396 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-11-16 12:42:31,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71065069] [2022-11-16 12:42:31,399 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:31,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:31,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-16 12:42:31,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:42:31,464 INFO L87 Difference]: Start difference. First operand 46 states and 55 transitions. cyclomatic complexity: 14 Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:31,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:31,564 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2022-11-16 12:42:31,564 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 76 states and 85 transitions. [2022-11-16 12:42:31,565 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2022-11-16 12:42:31,568 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 76 states to 76 states and 85 transitions. [2022-11-16 12:42:31,569 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2022-11-16 12:42:31,569 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2022-11-16 12:42:31,569 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 85 transitions. [2022-11-16 12:42:31,570 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:31,571 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 85 transitions. [2022-11-16 12:42:31,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 85 transitions. [2022-11-16 12:42:31,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 73. [2022-11-16 12:42:31,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1232876712328768) internal successors, (82), 72 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:31,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 82 transitions. [2022-11-16 12:42:31,578 INFO L240 hiAutomatonCegarLoop]: Abstraction has 73 states and 82 transitions. [2022-11-16 12:42:31,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:42:31,580 INFO L428 stractBuchiCegarLoop]: Abstraction has 73 states and 82 transitions. [2022-11-16 12:42:31,580 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-16 12:42:31,580 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 82 transitions. [2022-11-16 12:42:31,582 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:31,583 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:31,583 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:31,585 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 3, 1, 1, 1, 1] [2022-11-16 12:42:31,585 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:31,586 INFO L748 eck$LassoCheckResult]: Stem: 873#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 874#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 886#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 887#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 888#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 889#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 923#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 922#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 921#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 920#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 919#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 918#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 917#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 916#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 915#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 914#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 913#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 912#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 911#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 910#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 909#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 902#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 901#L17-3 assume !(init_nondet_~i~0#1 < 10); 879#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 880#L28-3 assume !!(rangesum_~i~1#1 < 10); 930#L29 assume !(rangesum_~i~1#1 > 5); 883#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 884#L28-3 assume !!(rangesum_~i~1#1 < 10); 881#L29 assume !(rangesum_~i~1#1 > 5); 882#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 928#L28-3 assume !!(rangesum_~i~1#1 < 10); 927#L29 assume !(rangesum_~i~1#1 > 5); 926#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 925#L28-3 assume !!(rangesum_~i~1#1 < 10); 924#L29 assume !(rangesum_~i~1#1 > 5); 908#L28-2 [2022-11-16 12:42:31,587 INFO L750 eck$LassoCheckResult]: Loop: 908#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 905#L28-3 assume !!(rangesum_~i~1#1 < 10); 906#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 908#L28-2 [2022-11-16 12:42:31,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:31,587 INFO L85 PathProgramCache]: Analyzing trace with hash 1594065280, now seen corresponding path program 1 times [2022-11-16 12:42:31,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:31,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031815612] [2022-11-16 12:42:31,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:31,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:31,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,651 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:31,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:31,651 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 6 times [2022-11-16 12:42:31,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:31,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513243283] [2022-11-16 12:42:31,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:31,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,656 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:31,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:31,659 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:31,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:31,660 INFO L85 PathProgramCache]: Analyzing trace with hash -654604830, now seen corresponding path program 2 times [2022-11-16 12:42:31,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:31,660 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775804005] [2022-11-16 12:42:31,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:31,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:31,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:31,769 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:31,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:31,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775804005] [2022-11-16 12:42:31,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [775804005] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:31,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1081304151] [2022-11-16 12:42:31,770 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:42:31,770 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:31,770 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:31,774 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:31,806 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-16 12:42:31,881 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:42:31,881 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:42:31,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 12:42:31,884 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:31,922 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:31,922 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:31,973 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-16 12:42:31,973 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1081304151] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:31,973 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:31,973 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 8 [2022-11-16 12:42:31,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758127623] [2022-11-16 12:42:31,974 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:32,056 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:32,057 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-16 12:42:32,057 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:42:32,057 INFO L87 Difference]: Start difference. First operand 73 states and 82 transitions. cyclomatic complexity: 14 Second operand has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:32,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:32,177 INFO L93 Difference]: Finished difference Result 94 states and 103 transitions. [2022-11-16 12:42:32,177 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 103 transitions. [2022-11-16 12:42:32,178 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2022-11-16 12:42:32,179 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 94 states and 103 transitions. [2022-11-16 12:42:32,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2022-11-16 12:42:32,179 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2022-11-16 12:42:32,179 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 103 transitions. [2022-11-16 12:42:32,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:42:32,180 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 103 transitions. [2022-11-16 12:42:32,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 103 transitions. [2022-11-16 12:42:32,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2022-11-16 12:42:32,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.098901098901099) internal successors, (100), 90 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:32,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2022-11-16 12:42:32,184 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 100 transitions. [2022-11-16 12:42:32,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 12:42:32,185 INFO L428 stractBuchiCegarLoop]: Abstraction has 91 states and 100 transitions. [2022-11-16 12:42:32,186 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-16 12:42:32,186 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 100 transitions. [2022-11-16 12:42:32,186 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:32,187 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:32,187 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:32,187 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 5, 1, 1, 1, 1] [2022-11-16 12:42:32,188 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:32,188 INFO L748 eck$LassoCheckResult]: Stem: 1276#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1277#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1289#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1290#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1291#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1292#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1328#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1327#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1326#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1325#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1324#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1323#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1322#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1321#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1320#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1319#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1318#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1317#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1316#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1315#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1314#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1307#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1306#L17-3 assume !(init_nondet_~i~0#1 < 10); 1282#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1283#L28-3 assume !!(rangesum_~i~1#1 < 10); 1341#L29 assume !(rangesum_~i~1#1 > 5); 1286#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1287#L28-3 assume !!(rangesum_~i~1#1 < 10); 1284#L29 assume !(rangesum_~i~1#1 > 5); 1285#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1339#L28-3 assume !!(rangesum_~i~1#1 < 10); 1338#L29 assume !(rangesum_~i~1#1 > 5); 1337#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1336#L28-3 assume !!(rangesum_~i~1#1 < 10); 1335#L29 assume !(rangesum_~i~1#1 > 5); 1334#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1333#L28-3 assume !!(rangesum_~i~1#1 < 10); 1332#L29 assume !(rangesum_~i~1#1 > 5); 1331#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1330#L28-3 assume !!(rangesum_~i~1#1 < 10); 1329#L29 assume !(rangesum_~i~1#1 > 5); 1313#L28-2 [2022-11-16 12:42:32,188 INFO L750 eck$LassoCheckResult]: Loop: 1313#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1310#L28-3 assume !!(rangesum_~i~1#1 < 10); 1311#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1313#L28-2 [2022-11-16 12:42:32,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:32,189 INFO L85 PathProgramCache]: Analyzing trace with hash 2114090752, now seen corresponding path program 2 times [2022-11-16 12:42:32,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:32,189 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120243995] [2022-11-16 12:42:32,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:32,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:32,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:32,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:32,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:32,222 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:32,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:32,223 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 7 times [2022-11-16 12:42:32,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:32,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642879528] [2022-11-16 12:42:32,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:32,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:32,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:32,227 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:32,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:32,230 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:32,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:32,231 INFO L85 PathProgramCache]: Analyzing trace with hash -522805150, now seen corresponding path program 3 times [2022-11-16 12:42:32,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:32,231 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407700504] [2022-11-16 12:42:32,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:32,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:32,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:32,253 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:32,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:32,279 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:39,308 WARN L233 SmtUtils]: Spent 6.96s on a formula simplification. DAG size of input: 260 DAG size of output: 197 (called from [L 278] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-11-16 12:42:40,300 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 12:42:40,300 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 12:42:40,300 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 12:42:40,300 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 12:42:40,300 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-16 12:42:40,301 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:40,301 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 12:42:40,301 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 12:42:40,301 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration8_Lasso [2022-11-16 12:42:40,301 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 12:42:40,301 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 12:42:40,305 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:40,308 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:40,310 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:40,313 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,455 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,457 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,460 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,463 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,466 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,468 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,471 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,474 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,476 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,478 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,480 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,484 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,487 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,489 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,491 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,493 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,495 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,497 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:42,502 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:43,034 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-16 12:42:43,035 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-16 12:42:43,035 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,035 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,041 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,047 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-16 12:42:43,048 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,058 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,058 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:43,058 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,058 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,058 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,059 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:43,059 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:43,060 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,067 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,067 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,068 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-16 12:42:43,071 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,081 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,081 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:43,081 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,081 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,082 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,082 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:43,082 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:43,083 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,087 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,087 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,088 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-11-16 12:42:43,091 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,101 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,101 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:43,101 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,101 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,101 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,102 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:43,102 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:43,126 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,131 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,131 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,131 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,132 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-11-16 12:42:43,147 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,158 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,159 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,159 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,159 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,161 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,161 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,172 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,177 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,177 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,177 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,178 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,192 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,204 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,204 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,204 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,204 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,206 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,206 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,208 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-11-16 12:42:43,222 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,231 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,232 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,240 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,252 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,252 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,253 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,253 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,254 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,254 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-11-16 12:42:43,270 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,278 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,279 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,279 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,280 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,288 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-11-16 12:42:43,289 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,301 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,301 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,301 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,301 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,303 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,303 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,314 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,322 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,322 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,323 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,329 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,341 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,341 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,341 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,341 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,344 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,345 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,346 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2022-11-16 12:42:43,357 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,363 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,363 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,363 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,364 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,365 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2022-11-16 12:42:43,366 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,376 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,376 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,376 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,376 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,378 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,378 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,381 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,385 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,387 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2022-11-16 12:42:43,391 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,401 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,401 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,401 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,401 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,403 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,403 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,407 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,409 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,409 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,411 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2022-11-16 12:42:43,413 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,423 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,423 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,423 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,423 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,425 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,425 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,428 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,431 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2022-11-16 12:42:43,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,432 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,437 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2022-11-16 12:42:43,438 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,448 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,448 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,448 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,448 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,450 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,450 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,462 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,464 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2022-11-16 12:42:43,464 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,465 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,465 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2022-11-16 12:42:43,468 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,477 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,478 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,478 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,478 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,479 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,479 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,483 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:43,485 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2022-11-16 12:42:43,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,486 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,487 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,489 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2022-11-16 12:42:43,490 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:43,500 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:43,500 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:43,500 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:43,500 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:43,508 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-16 12:42:43,508 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-16 12:42:43,532 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-16 12:42:43,559 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2022-11-16 12:42:43,559 INFO L444 ModelExtractionUtils]: 20 out of 31 variables were initially zero. Simplification set additionally 8 variables to zero. [2022-11-16 12:42:43,559 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:43,560 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:43,562 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:43,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2022-11-16 12:42:43,565 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-16 12:42:43,576 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-16 12:42:43,576 INFO L513 LassoAnalysis]: Proved termination. [2022-11-16 12:42:43,576 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 17 Supporting invariants [] [2022-11-16 12:42:43,579 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2022-11-16 12:42:43,795 INFO L156 tatePredicateManager]: 41 out of 41 supporting invariants were superfluous and have been removed [2022-11-16 12:42:43,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:43,832 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:43,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:43,875 INFO L263 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 12:42:43,878 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:43,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:43,943 INFO L263 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-16 12:42:43,943 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:43,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:43,970 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2022-11-16 12:42:43,970 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,005 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 104 states and 116 transitions. Complement of second has 7 states. [2022-11-16 12:42:44,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-16 12:42:44,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 16 transitions. [2022-11-16 12:42:44,010 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 3 letters. [2022-11-16 12:42:44,011 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:44,011 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 44 letters. Loop has 3 letters. [2022-11-16 12:42:44,011 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:44,011 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 6 letters. [2022-11-16 12:42:44,012 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:44,012 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 104 states and 116 transitions. [2022-11-16 12:42:44,013 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-16 12:42:44,014 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 104 states to 93 states and 104 transitions. [2022-11-16 12:42:44,014 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2022-11-16 12:42:44,015 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2022-11-16 12:42:44,015 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 104 transitions. [2022-11-16 12:42:44,015 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-16 12:42:44,016 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 104 transitions. [2022-11-16 12:42:44,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 104 transitions. [2022-11-16 12:42:44,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2022-11-16 12:42:44,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.118279569892473) internal successors, (104), 92 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 104 transitions. [2022-11-16 12:42:44,030 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 104 transitions. [2022-11-16 12:42:44,030 INFO L428 stractBuchiCegarLoop]: Abstraction has 93 states and 104 transitions. [2022-11-16 12:42:44,031 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-16 12:42:44,031 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 104 transitions. [2022-11-16 12:42:44,031 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-16 12:42:44,032 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:44,032 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:44,036 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:44,036 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:44,037 INFO L748 eck$LassoCheckResult]: Stem: 1791#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1792#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1807#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1808#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1809#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1810#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1868#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1867#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1866#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1865#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1864#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1863#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1862#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1861#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1860#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1859#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1858#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1857#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1856#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1855#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1854#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1824#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1823#L17-3 assume !(init_nondet_~i~0#1 < 10); 1797#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1798#L28-3 assume !!(rangesum_~i~1#1 < 10); 1799#L29 assume !(rangesum_~i~1#1 > 5); 1800#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1803#L28-3 assume !!(rangesum_~i~1#1 < 10); 1848#L29 assume !(rangesum_~i~1#1 > 5); 1804#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1805#L28-3 assume !!(rangesum_~i~1#1 < 10); 1801#L29 assume !(rangesum_~i~1#1 > 5); 1802#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1845#L28-3 assume !!(rangesum_~i~1#1 < 10); 1843#L29 assume !(rangesum_~i~1#1 > 5); 1841#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1839#L28-3 assume !!(rangesum_~i~1#1 < 10); 1837#L29 assume !(rangesum_~i~1#1 > 5); 1835#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1833#L28-3 assume !!(rangesum_~i~1#1 < 10); 1830#L29 assume !(rangesum_~i~1#1 > 5); 1825#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1818#L28-3 assume !(rangesum_~i~1#1 < 10); 1819#L28-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 1813#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1795#L28-8 assume !!(rangesum_~i~1#1 < 10); 1796#L29-2 assume !(rangesum_~i~1#1 > 5); 1811#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1812#L28-8 assume !!(rangesum_~i~1#1 < 10); 1853#L29-2 assume !(rangesum_~i~1#1 > 5); 1852#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1851#L28-8 assume !!(rangesum_~i~1#1 < 10); 1850#L29-2 assume !(rangesum_~i~1#1 > 5); 1849#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1847#L28-8 assume !!(rangesum_~i~1#1 < 10); 1846#L29-2 assume !(rangesum_~i~1#1 > 5); 1844#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1842#L28-8 assume !!(rangesum_~i~1#1 < 10); 1840#L29-2 assume !(rangesum_~i~1#1 > 5); 1838#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1836#L28-8 assume !!(rangesum_~i~1#1 < 10); 1834#L29-2 assume !(rangesum_~i~1#1 > 5); 1831#L28-7 [2022-11-16 12:42:44,037 INFO L750 eck$LassoCheckResult]: Loop: 1831#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1826#L28-8 assume !!(rangesum_~i~1#1 < 10); 1827#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1831#L28-7 [2022-11-16 12:42:44,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:44,037 INFO L85 PathProgramCache]: Analyzing trace with hash -365260545, now seen corresponding path program 1 times [2022-11-16 12:42:44,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:44,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517006706] [2022-11-16 12:42:44,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:44,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:44,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:44,125 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-16 12:42:44,126 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:44,126 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [517006706] [2022-11-16 12:42:44,126 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [517006706] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:42:44,126 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:42:44,126 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:42:44,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443074296] [2022-11-16 12:42:44,126 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:42:44,127 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:42:44,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:44,128 INFO L85 PathProgramCache]: Analyzing trace with hash 85178, now seen corresponding path program 1 times [2022-11-16 12:42:44,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:44,128 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185592285] [2022-11-16 12:42:44,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:44,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:44,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:44,142 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:44,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:44,145 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:44,208 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:44,208 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:42:44,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:42:44,209 INFO L87 Difference]: Start difference. First operand 93 states and 104 transitions. cyclomatic complexity: 16 Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:44,269 INFO L93 Difference]: Finished difference Result 108 states and 123 transitions. [2022-11-16 12:42:44,269 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 108 states and 123 transitions. [2022-11-16 12:42:44,270 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2022-11-16 12:42:44,271 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 108 states to 106 states and 119 transitions. [2022-11-16 12:42:44,271 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2022-11-16 12:42:44,271 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2022-11-16 12:42:44,271 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 119 transitions. [2022-11-16 12:42:44,271 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-16 12:42:44,272 INFO L218 hiAutomatonCegarLoop]: Abstraction has 106 states and 119 transitions. [2022-11-16 12:42:44,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 119 transitions. [2022-11-16 12:42:44,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 95. [2022-11-16 12:42:44,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.0947368421052632) internal successors, (104), 94 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 104 transitions. [2022-11-16 12:42:44,275 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 104 transitions. [2022-11-16 12:42:44,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:42:44,281 INFO L428 stractBuchiCegarLoop]: Abstraction has 95 states and 104 transitions. [2022-11-16 12:42:44,281 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-16 12:42:44,282 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 104 transitions. [2022-11-16 12:42:44,282 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 10 [2022-11-16 12:42:44,282 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:44,282 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:44,283 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:44,283 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:44,284 INFO L748 eck$LassoCheckResult]: Stem: 1999#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2000#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2015#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2016#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2017#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2018#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2051#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2050#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2049#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2048#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2047#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2046#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2045#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2044#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2043#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2042#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2041#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2040#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2039#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2038#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2037#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2032#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2031#L17-3 assume !(init_nondet_~i~0#1 < 10); 2005#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2006#L28-3 assume !!(rangesum_~i~1#1 < 10); 2007#L29 assume !(rangesum_~i~1#1 > 5); 2008#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2011#L28-3 assume !!(rangesum_~i~1#1 < 10); 2077#L29 assume !(rangesum_~i~1#1 > 5); 2012#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2013#L28-3 assume !!(rangesum_~i~1#1 < 10); 2009#L29 assume !(rangesum_~i~1#1 > 5); 2010#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2076#L28-3 assume !!(rangesum_~i~1#1 < 10); 2075#L29 assume !(rangesum_~i~1#1 > 5); 2074#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2073#L28-3 assume !!(rangesum_~i~1#1 < 10); 2072#L29 assume !(rangesum_~i~1#1 > 5); 2071#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2070#L28-3 assume !!(rangesum_~i~1#1 < 10); 2069#L29 assume !(rangesum_~i~1#1 > 5); 2054#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2068#L28-3 assume !!(rangesum_~i~1#1 < 10); 2053#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2033#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2026#L28-3 assume !(rangesum_~i~1#1 < 10); 2027#L28-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2020#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2021#L28-8 assume !!(rangesum_~i~1#1 < 10); 2030#L29-2 assume !(rangesum_~i~1#1 > 5); 2019#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2003#L28-8 assume !!(rangesum_~i~1#1 < 10); 2004#L29-2 assume !(rangesum_~i~1#1 > 5); 2067#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2066#L28-8 assume !!(rangesum_~i~1#1 < 10); 2065#L29-2 assume !(rangesum_~i~1#1 > 5); 2064#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2063#L28-8 assume !!(rangesum_~i~1#1 < 10); 2062#L29-2 assume !(rangesum_~i~1#1 > 5); 2061#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2060#L28-8 assume !!(rangesum_~i~1#1 < 10); 2059#L29-2 assume !(rangesum_~i~1#1 > 5); 2058#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2057#L28-8 assume !!(rangesum_~i~1#1 < 10); 2056#L29-2 assume !(rangesum_~i~1#1 > 5); 2052#L28-7 [2022-11-16 12:42:44,284 INFO L750 eck$LassoCheckResult]: Loop: 2052#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2055#L28-8 assume !!(rangesum_~i~1#1 < 10); 2035#L29-2 assume !(rangesum_~i~1#1 > 5); 2052#L28-7 [2022-11-16 12:42:44,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:44,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1039890653, now seen corresponding path program 1 times [2022-11-16 12:42:44,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:44,284 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734005480] [2022-11-16 12:42:44,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:44,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:44,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:44,400 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2022-11-16 12:42:44,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:44,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734005480] [2022-11-16 12:42:44,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1734005480] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:44,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2108339291] [2022-11-16 12:42:44,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:44,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:44,401 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,402 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-11-16 12:42:44,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:44,516 INFO L263 TraceCheckSpWp]: Trace formula consists of 261 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 12:42:44,518 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:44,560 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2022-11-16 12:42:44,560 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 12:42:44,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2108339291] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:42:44,560 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 12:42:44,561 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2022-11-16 12:42:44,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736670905] [2022-11-16 12:42:44,561 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:42:44,561 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:42:44,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:44,562 INFO L85 PathProgramCache]: Analyzing trace with hash 85180, now seen corresponding path program 1 times [2022-11-16 12:42:44,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:44,562 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826110456] [2022-11-16 12:42:44,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:44,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:44,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:44,564 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:44,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:44,566 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:44,583 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 12:42:44,584 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 12:42:44,584 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 12:42:44,584 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 12:42:44,584 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-16 12:42:44,584 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,584 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 12:42:44,584 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 12:42:44,584 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration10_Loop [2022-11-16 12:42:44,584 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 12:42:44,584 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 12:42:44,585 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:44,596 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:44,622 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-16 12:42:44,623 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-11-16 12:42:44,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,626 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,632 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-11-16 12:42:44,632 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-11-16 12:42:44,644 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2022-11-16 12:42:44,655 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-11-16 12:42:44,656 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_rangesum_#t~post3#1=0} Honda state: {ULTIMATE.start_rangesum_#t~post3#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-11-16 12:42:44,667 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:44,668 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,669 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,673 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-11-16 12:42:44,673 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-11-16 12:42:44,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2022-11-16 12:42:44,714 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:44,715 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,715 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,716 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,723 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-11-16 12:42:44,723 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-11-16 12:42:44,736 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2022-11-16 12:42:44,819 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-11-16 12:42:44,827 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:44,828 INFO L210 LassoAnalysis]: Preferences: [2022-11-16 12:42:44,828 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-16 12:42:44,828 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-16 12:42:44,828 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-16 12:42:44,828 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-16 12:42:44,828 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,828 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-16 12:42:44,828 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-16 12:42:44,828 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration10_Loop [2022-11-16 12:42:44,828 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-16 12:42:44,828 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-16 12:42:44,829 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:44,831 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-16 12:42:44,852 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-16 12:42:44,852 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-16 12:42:44,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,852 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,853 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,857 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:44,869 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:44,869 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:44,869 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:44,869 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:44,869 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:44,870 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:44,870 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:44,871 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2022-11-16 12:42:44,889 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-16 12:42:44,897 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:44,897 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,897 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,898 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,902 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-16 12:42:44,914 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-16 12:42:44,914 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-16 12:42:44,914 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-16 12:42:44,914 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-16 12:42:44,914 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-16 12:42:44,916 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-16 12:42:44,916 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-16 12:42:44,918 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2022-11-16 12:42:44,928 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-16 12:42:44,939 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2022-11-16 12:42:44,939 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2022-11-16 12:42:44,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:42:44,940 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:44,945 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:42:44,946 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-16 12:42:44,946 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-11-16 12:42:44,946 INFO L513 LassoAnalysis]: Proved termination. [2022-11-16 12:42:44,946 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 9 Supporting invariants [] [2022-11-16 12:42:44,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2022-11-16 12:42:44,950 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:44,950 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-11-16 12:42:44,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:45,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:45,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 261 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 12:42:45,051 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:45,068 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:45,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:45,161 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-16 12:42:45,162 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:45,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:45,174 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-16 12:42:45,175 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 95 states and 104 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,218 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 95 states and 104 transitions. cyclomatic complexity: 14. Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 114 states and 126 transitions. Complement of second has 5 states. [2022-11-16 12:42:45,218 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-11-16 12:42:45,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-11-16 12:42:45,220 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 65 letters. Loop has 3 letters. [2022-11-16 12:42:45,221 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:45,222 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 68 letters. Loop has 3 letters. [2022-11-16 12:42:45,222 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:45,222 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 65 letters. Loop has 6 letters. [2022-11-16 12:42:45,225 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-16 12:42:45,226 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 126 transitions. [2022-11-16 12:42:45,227 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-16 12:42:45,227 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 99 states and 109 transitions. [2022-11-16 12:42:45,227 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 42 [2022-11-16 12:42:45,228 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2022-11-16 12:42:45,228 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 109 transitions. [2022-11-16 12:42:45,228 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-16 12:42:45,228 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 109 transitions. [2022-11-16 12:42:45,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 109 transitions. [2022-11-16 12:42:45,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 98. [2022-11-16 12:42:45,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.1020408163265305) internal successors, (108), 97 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2022-11-16 12:42:45,233 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 108 transitions. [2022-11-16 12:42:45,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:45,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:42:45,233 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:42:45,233 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:45,255 INFO L93 Difference]: Finished difference Result 109 states and 122 transitions. [2022-11-16 12:42:45,255 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 109 states and 122 transitions. [2022-11-16 12:42:45,256 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-16 12:42:45,256 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 109 states to 109 states and 122 transitions. [2022-11-16 12:42:45,257 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2022-11-16 12:42:45,257 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2022-11-16 12:42:45,257 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 122 transitions. [2022-11-16 12:42:45,257 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-16 12:42:45,257 INFO L218 hiAutomatonCegarLoop]: Abstraction has 109 states and 122 transitions. [2022-11-16 12:42:45,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 122 transitions. [2022-11-16 12:42:45,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 98. [2022-11-16 12:42:45,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.0816326530612246) internal successors, (106), 97 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 106 transitions. [2022-11-16 12:42:45,260 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 106 transitions. [2022-11-16 12:42:45,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:42:45,261 INFO L428 stractBuchiCegarLoop]: Abstraction has 98 states and 106 transitions. [2022-11-16 12:42:45,261 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-16 12:42:45,261 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 106 transitions. [2022-11-16 12:42:45,262 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-16 12:42:45,262 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:45,262 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:45,263 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:45,263 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:45,264 INFO L748 eck$LassoCheckResult]: Stem: 2832#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2833#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2850#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2851#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2852#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2853#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2889#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2888#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2887#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2886#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2885#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2884#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2883#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2882#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2881#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2880#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2879#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2878#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2875#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2873#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2872#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2869#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2868#L17-3 assume !(init_nondet_~i~0#1 < 10); 2840#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2841#L28-3 assume !!(rangesum_~i~1#1 < 10); 2842#L29 assume !(rangesum_~i~1#1 > 5); 2843#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2847#L28-3 assume !!(rangesum_~i~1#1 < 10); 2902#L29 assume !(rangesum_~i~1#1 > 5); 2848#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2849#L28-3 assume !!(rangesum_~i~1#1 < 10); 2844#L29 assume !(rangesum_~i~1#1 > 5); 2845#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2901#L28-3 assume !!(rangesum_~i~1#1 < 10); 2900#L29 assume !(rangesum_~i~1#1 > 5); 2899#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2898#L28-3 assume !!(rangesum_~i~1#1 < 10); 2897#L29 assume !(rangesum_~i~1#1 > 5); 2896#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2895#L28-3 assume !!(rangesum_~i~1#1 < 10); 2894#L29 assume !(rangesum_~i~1#1 > 5); 2877#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2893#L28-3 assume !!(rangesum_~i~1#1 < 10); 2876#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2874#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2863#L28-3 assume !(rangesum_~i~1#1 < 10); 2864#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 2858#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2859#L28-8 assume !!(rangesum_~i~1#1 < 10); 2867#L29-2 assume !(rangesum_~i~1#1 > 5); 2854#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2838#L28-8 assume !!(rangesum_~i~1#1 < 10); 2839#L29-2 assume !(rangesum_~i~1#1 > 5); 2855#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2856#L28-8 assume !!(rangesum_~i~1#1 < 10); 2913#L29-2 assume !(rangesum_~i~1#1 > 5); 2912#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2911#L28-8 assume !!(rangesum_~i~1#1 < 10); 2910#L29-2 assume !(rangesum_~i~1#1 > 5); 2909#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2908#L28-8 assume !!(rangesum_~i~1#1 < 10); 2905#L29-2 assume !(rangesum_~i~1#1 > 5); 2906#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2907#L28-8 assume !!(rangesum_~i~1#1 < 10); 2892#L29-2 assume !(rangesum_~i~1#1 > 5); 2890#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2836#L28-8 assume !!(rangesum_~i~1#1 < 10); 2837#L29-2 [2022-11-16 12:42:45,264 INFO L750 eck$LassoCheckResult]: Loop: 2837#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2871#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2870#L28-8 assume !!(rangesum_~i~1#1 < 10); 2837#L29-2 [2022-11-16 12:42:45,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:45,264 INFO L85 PathProgramCache]: Analyzing trace with hash -1815162476, now seen corresponding path program 1 times [2022-11-16 12:42:45,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:45,265 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213335101] [2022-11-16 12:42:45,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:45,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:45,282 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 12:42:45,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1480564473] [2022-11-16 12:42:45,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:45,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:45,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:45,284 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:45,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-11-16 12:42:45,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:45,418 INFO L263 TraceCheckSpWp]: Trace formula consists of 263 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 12:42:45,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:45,508 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2022-11-16 12:42:45,509 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:45,618 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2022-11-16 12:42:45,618 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:45,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213335101] [2022-11-16 12:42:45,618 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-16 12:42:45,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1480564473] [2022-11-16 12:42:45,618 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1480564473] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:45,618 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 12:42:45,619 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 12 [2022-11-16 12:42:45,619 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474030261] [2022-11-16 12:42:45,619 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:45,619 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:42:45,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:45,620 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 2 times [2022-11-16 12:42:45,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:45,620 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237706923] [2022-11-16 12:42:45,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:45,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:45,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:45,623 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:45,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:45,625 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:45,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:45,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-16 12:42:45,688 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2022-11-16 12:42:45,689 INFO L87 Difference]: Start difference. First operand 98 states and 106 transitions. cyclomatic complexity: 14 Second operand has 12 states, 12 states have (on average 3.5) internal successors, (42), 12 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:45,875 INFO L93 Difference]: Finished difference Result 145 states and 162 transitions. [2022-11-16 12:42:45,875 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 145 states and 162 transitions. [2022-11-16 12:42:45,877 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 19 [2022-11-16 12:42:45,879 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 145 states to 139 states and 156 transitions. [2022-11-16 12:42:45,879 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2022-11-16 12:42:45,879 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2022-11-16 12:42:45,879 INFO L73 IsDeterministic]: Start isDeterministic. Operand 139 states and 156 transitions. [2022-11-16 12:42:45,879 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-16 12:42:45,880 INFO L218 hiAutomatonCegarLoop]: Abstraction has 139 states and 156 transitions. [2022-11-16 12:42:45,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states and 156 transitions. [2022-11-16 12:42:45,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 116. [2022-11-16 12:42:45,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.0948275862068966) internal successors, (127), 115 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:45,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 127 transitions. [2022-11-16 12:42:45,883 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 127 transitions. [2022-11-16 12:42:45,884 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 12:42:45,884 INFO L428 stractBuchiCegarLoop]: Abstraction has 116 states and 127 transitions. [2022-11-16 12:42:45,884 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-16 12:42:45,884 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 127 transitions. [2022-11-16 12:42:45,885 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-16 12:42:45,885 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:45,885 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:45,886 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 9, 6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:45,886 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:42:45,887 INFO L748 eck$LassoCheckResult]: Stem: 3486#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 3487#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 3505#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3506#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3507#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3508#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3561#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3559#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3557#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3555#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3553#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3551#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3549#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3547#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3545#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3543#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3541#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3539#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3537#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3535#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3530#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3526#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3525#L17-3 assume !(init_nondet_~i~0#1 < 10); 3494#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3495#L28-3 assume !!(rangesum_~i~1#1 < 10); 3496#L29 assume !(rangesum_~i~1#1 > 5); 3497#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3500#L28-3 assume !!(rangesum_~i~1#1 < 10); 3520#L29 assume !(rangesum_~i~1#1 > 5); 3501#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3502#L28-3 assume !!(rangesum_~i~1#1 < 10); 3498#L29 assume !(rangesum_~i~1#1 > 5); 3499#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3577#L28-3 assume !!(rangesum_~i~1#1 < 10); 3576#L29 assume !(rangesum_~i~1#1 > 5); 3575#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3574#L28-3 assume !!(rangesum_~i~1#1 < 10); 3573#L29 assume !(rangesum_~i~1#1 > 5); 3572#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3571#L28-3 assume !!(rangesum_~i~1#1 < 10); 3570#L29 assume !(rangesum_~i~1#1 > 5); 3534#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3569#L28-3 assume !!(rangesum_~i~1#1 < 10); 3568#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3567#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3566#L28-3 assume !!(rangesum_~i~1#1 < 10); 3565#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3564#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3563#L28-3 assume !!(rangesum_~i~1#1 < 10); 3562#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3533#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3536#L28-3 assume !!(rangesum_~i~1#1 < 10); 3531#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3532#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3518#L28-3 assume !(rangesum_~i~1#1 < 10); 3519#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 3512#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3490#L28-8 assume !!(rangesum_~i~1#1 < 10); 3491#L29-2 assume !(rangesum_~i~1#1 > 5); 3509#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3510#L28-8 assume !!(rangesum_~i~1#1 < 10); 3581#L29-2 assume !(rangesum_~i~1#1 > 5); 3580#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3578#L28-8 assume !!(rangesum_~i~1#1 < 10); 3579#L29-2 assume !(rangesum_~i~1#1 > 5); 3586#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3585#L28-8 assume !!(rangesum_~i~1#1 < 10); 3584#L29-2 assume !(rangesum_~i~1#1 > 5); 3583#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3582#L28-8 assume !!(rangesum_~i~1#1 < 10); 3523#L29-2 assume !(rangesum_~i~1#1 > 5); 3524#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3587#L28-8 assume !!(rangesum_~i~1#1 < 10); 3560#L29-2 assume !(rangesum_~i~1#1 > 5); 3558#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3556#L28-8 assume !!(rangesum_~i~1#1 < 10); 3554#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3552#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3550#L28-8 assume !!(rangesum_~i~1#1 < 10); 3548#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3546#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3544#L28-8 assume !!(rangesum_~i~1#1 < 10); 3542#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3540#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3538#L28-8 assume !!(rangesum_~i~1#1 < 10); 3528#L29-2 [2022-11-16 12:42:45,887 INFO L750 eck$LassoCheckResult]: Loop: 3528#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3529#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3527#L28-8 assume !!(rangesum_~i~1#1 < 10); 3528#L29-2 [2022-11-16 12:42:45,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:45,887 INFO L85 PathProgramCache]: Analyzing trace with hash -1484601769, now seen corresponding path program 1 times [2022-11-16 12:42:45,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:45,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453533879] [2022-11-16 12:42:45,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:45,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:45,905 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 12:42:45,906 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1839301606] [2022-11-16 12:42:45,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:45,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:45,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:45,907 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:45,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-11-16 12:42:46,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:46,116 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:46,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:46,289 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:46,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:46,289 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 3 times [2022-11-16 12:42:46,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:46,289 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526183917] [2022-11-16 12:42:46,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:46,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:46,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:46,293 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:46,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:46,296 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:46,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:46,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1801965686, now seen corresponding path program 2 times [2022-11-16 12:42:46,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:46,297 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865691958] [2022-11-16 12:42:46,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:46,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:46,315 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 12:42:46,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [466136038] [2022-11-16 12:42:46,315 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:42:46,315 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:46,316 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:46,321 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:46,342 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-11-16 12:42:46,482 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:42:46,482 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:42:46,484 INFO L263 TraceCheckSpWp]: Trace formula consists of 347 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 12:42:46,486 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:46,530 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 302 trivial. 0 not checked. [2022-11-16 12:42:46,530 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 12:42:46,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:46,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865691958] [2022-11-16 12:42:46,531 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-16 12:42:46,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [466136038] [2022-11-16 12:42:46,531 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [466136038] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:42:46,531 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:42:46,532 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:42:46,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71342320] [2022-11-16 12:42:46,532 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:42:46,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:46,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-16 12:42:46,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:42:46,591 INFO L87 Difference]: Start difference. First operand 116 states and 127 transitions. cyclomatic complexity: 17 Second operand has 7 states, 6 states have (on average 4.666666666666667) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:46,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:46,690 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2022-11-16 12:42:46,690 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 139 states and 143 transitions. [2022-11-16 12:42:46,691 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-16 12:42:46,692 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 139 states to 115 states and 119 transitions. [2022-11-16 12:42:46,692 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2022-11-16 12:42:46,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2022-11-16 12:42:46,692 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 119 transitions. [2022-11-16 12:42:46,692 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-16 12:42:46,692 INFO L218 hiAutomatonCegarLoop]: Abstraction has 115 states and 119 transitions. [2022-11-16 12:42:46,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 119 transitions. [2022-11-16 12:42:46,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 96. [2022-11-16 12:42:46,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 96 states have (on average 1.0416666666666667) internal successors, (100), 95 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:46,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2022-11-16 12:42:46,694 INFO L240 hiAutomatonCegarLoop]: Abstraction has 96 states and 100 transitions. [2022-11-16 12:42:46,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:42:46,696 INFO L428 stractBuchiCegarLoop]: Abstraction has 96 states and 100 transitions. [2022-11-16 12:42:46,696 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-16 12:42:46,696 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 100 transitions. [2022-11-16 12:42:46,697 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-16 12:42:46,697 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:42:46,697 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:42:46,700 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 10, 6, 6, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:46,700 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-16 12:42:46,701 INFO L748 eck$LassoCheckResult]: Stem: 4014#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 4015#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 4031#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4032#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4033#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4034#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4098#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4096#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4094#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4092#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4090#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4088#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4086#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4085#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4083#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4080#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4075#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4074#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4073#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4072#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4071#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4051#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4050#L17-3 assume !(init_nondet_~i~0#1 < 10); 4022#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4023#L28-3 assume !!(rangesum_~i~1#1 < 10); 4024#L29 assume !(rangesum_~i~1#1 > 5); 4025#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4028#L28-3 assume !!(rangesum_~i~1#1 < 10); 4026#L29 assume !(rangesum_~i~1#1 > 5); 4027#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4029#L28-3 assume !!(rangesum_~i~1#1 < 10); 4102#L29 assume !(rangesum_~i~1#1 > 5); 4101#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4100#L28-3 assume !!(rangesum_~i~1#1 < 10); 4099#L29 assume !(rangesum_~i~1#1 > 5); 4097#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4095#L28-3 assume !!(rangesum_~i~1#1 < 10); 4093#L29 assume !(rangesum_~i~1#1 > 5); 4091#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4089#L28-3 assume !!(rangesum_~i~1#1 < 10); 4087#L29 assume !(rangesum_~i~1#1 > 5); 4082#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4084#L28-3 assume !!(rangesum_~i~1#1 < 10); 4081#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4079#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4043#L28-3 assume !!(rangesum_~i~1#1 < 10); 4044#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4068#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4066#L28-3 assume !!(rangesum_~i~1#1 < 10); 4064#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4062#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4060#L28-3 assume !!(rangesum_~i~1#1 < 10); 4058#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4056#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4054#L28-3 assume !(rangesum_~i~1#1 < 10); 4046#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4038#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4039#L28-8 assume !!(rangesum_~i~1#1 < 10); 4048#L29-2 assume !(rangesum_~i~1#1 > 5); 4035#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4036#L28-8 assume !!(rangesum_~i~1#1 < 10); 4109#L29-2 assume !(rangesum_~i~1#1 > 5); 4037#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4020#L28-8 assume !!(rangesum_~i~1#1 < 10); 4021#L29-2 assume !(rangesum_~i~1#1 > 5); 4049#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4108#L28-8 assume !!(rangesum_~i~1#1 < 10); 4107#L29-2 assume !(rangesum_~i~1#1 > 5); 4106#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4105#L28-8 assume !!(rangesum_~i~1#1 < 10); 4104#L29-2 assume !(rangesum_~i~1#1 > 5); 4103#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4077#L28-8 assume !!(rangesum_~i~1#1 < 10); 4078#L29-2 assume !(rangesum_~i~1#1 > 5); 4076#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4018#L28-8 assume !!(rangesum_~i~1#1 < 10); 4019#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4070#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4069#L28-8 assume !!(rangesum_~i~1#1 < 10); 4067#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4065#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4063#L28-8 assume !!(rangesum_~i~1#1 < 10); 4061#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4059#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4057#L28-8 assume !!(rangesum_~i~1#1 < 10); 4055#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4053#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4052#L28-8 assume !(rangesum_~i~1#1 < 10); 4045#L28-9 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4040#L37-1 main_#t~ret8#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret2~0#1 := main_#t~ret8#1;havoc main_#t~ret8#1;call main_#t~mem9#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem9#1;havoc main_#t~mem9#1;main_~i~2#1 := 0; 4041#L54-3 [2022-11-16 12:42:46,704 INFO L750 eck$LassoCheckResult]: Loop: 4041#L54-3 assume !!(main_~i~2#1 < 9);call main_#t~mem11#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset + 4 * (1 + main_~i~2#1), 4);call write~int(main_#t~mem11#1, main_~#x~0#1.base, main_~#x~0#1.offset + 4 * main_~i~2#1, 4);havoc main_#t~mem11#1; 4042#L54-2 main_#t~post10#1 := main_~i~2#1;main_~i~2#1 := 1 + main_#t~post10#1;havoc main_#t~post10#1; 4041#L54-3 [2022-11-16 12:42:46,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:46,709 INFO L85 PathProgramCache]: Analyzing trace with hash 817204024, now seen corresponding path program 1 times [2022-11-16 12:42:46,709 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:46,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364054455] [2022-11-16 12:42:46,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:46,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:46,729 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 12:42:46,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [300411209] [2022-11-16 12:42:46,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:46,730 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:46,730 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:46,738 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:46,758 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-11-16 12:42:46,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:46,962 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:47,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:47,260 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:47,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:47,261 INFO L85 PathProgramCache]: Analyzing trace with hash 3331, now seen corresponding path program 1 times [2022-11-16 12:42:47,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:47,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706719848] [2022-11-16 12:42:47,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:47,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:47,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:47,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:47,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:47,267 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:42:47,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:47,268 INFO L85 PathProgramCache]: Analyzing trace with hash -645945734, now seen corresponding path program 1 times [2022-11-16 12:42:47,268 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:47,268 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879386813] [2022-11-16 12:42:47,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:47,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:47,287 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 12:42:47,287 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1271671990] [2022-11-16 12:42:47,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:47,288 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:47,288 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:47,291 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:47,318 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_858ef55b-0c92-4450-b65c-c23a5b0162c5/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-11-16 12:42:47,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:47,551 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:42:47,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:42:47,894 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:45:22,255 WARN L233 SmtUtils]: Spent 2.57m on a formula simplification. DAG size of input: 533 DAG size of output: 391 (called from [L 278] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition)