./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:24:22,541 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:24:22,543 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:24:22,573 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:24:22,574 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:24:22,582 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:24:22,585 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:24:22,590 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:24:22,594 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:24:22,601 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:24:22,603 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:24:22,605 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:24:22,606 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:24:22,610 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:24:22,612 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:24:22,615 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:24:22,617 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:24:22,618 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:24:22,620 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:24:22,631 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:24:22,633 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:24:22,634 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:24:22,638 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:24:22,639 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:24:22,650 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:24:22,650 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:24:22,651 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:24:22,653 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:24:22,654 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:24:22,655 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:24:22,656 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:24:22,658 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:24:22,660 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:24:22,662 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:24:22,665 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:24:22,665 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:24:22,666 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:24:22,666 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:24:22,667 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:24:22,668 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:24:22,669 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:24:22,670 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 12:24:22,735 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:24:22,735 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:24:22,736 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:24:22,737 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:24:22,738 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:24:22,739 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:24:22,739 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:24:22,740 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 12:24:22,740 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 12:24:22,740 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 12:24:22,742 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 12:24:22,742 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 12:24:22,743 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 12:24:22,743 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:24:22,743 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 12:24:22,744 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 12:24:22,744 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:24:22,745 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 12:24:22,745 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:24:22,745 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 12:24:22,746 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 12:24:22,746 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 12:24:22,746 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 12:24:22,747 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:24:22,747 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 12:24:22,748 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:24:22,748 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 12:24:22,748 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:24:22,749 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:24:22,749 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:24:22,750 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:24:22,751 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 12:24:22,752 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 [2022-11-16 12:24:23,132 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:24:23,163 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:24:23,166 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:24:23,168 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:24:23,168 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:24:23,170 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2022-11-16 12:24:23,256 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/data/5232f1e4c/8e9a14f70c4e44ff919f3bc9e060283d/FLAGb3246cc31 [2022-11-16 12:24:23,957 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:24:23,958 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2022-11-16 12:24:23,988 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/data/5232f1e4c/8e9a14f70c4e44ff919f3bc9e060283d/FLAGb3246cc31 [2022-11-16 12:24:24,178 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/data/5232f1e4c/8e9a14f70c4e44ff919f3bc9e060283d [2022-11-16 12:24:24,181 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:24:24,183 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:24:24,188 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:24:24,189 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:24:24,193 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:24:24,194 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:24,195 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1b60ba05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24, skipping insertion in model container [2022-11-16 12:24:24,195 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:24,203 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:24:24,287 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:24:24,790 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25842,25855] [2022-11-16 12:24:24,798 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25967,25980] [2022-11-16 12:24:24,800 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[26082,26095] [2022-11-16 12:24:24,802 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:24:24,814 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:24:24,876 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25842,25855] [2022-11-16 12:24:24,878 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25967,25980] [2022-11-16 12:24:24,879 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[26082,26095] [2022-11-16 12:24:24,880 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:24:24,911 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:24:24,911 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24 WrapperNode [2022-11-16 12:24:24,911 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:24:24,912 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:24:24,913 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:24:24,913 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:24:24,921 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:24,936 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:24,982 INFO L138 Inliner]: procedures = 139, calls = 57, calls flagged for inlining = 26, calls inlined = 37, statements flattened = 376 [2022-11-16 12:24:24,985 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:24:24,986 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:24:24,986 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:24:24,986 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:24:24,996 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:24,997 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,004 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,004 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,020 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,027 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,029 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,032 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,048 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:24:25,049 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:24:25,050 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:24:25,062 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:24:25,065 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (1/1) ... [2022-11-16 12:24:25,070 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 12:24:25,081 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:24:25,093 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 12:24:25,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 12:24:25,134 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 12:24:25,134 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 12:24:25,134 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-16 12:24:25,134 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-16 12:24:25,134 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 12:24:25,135 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-16 12:24:25,135 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 12:24:25,135 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:24:25,135 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:24:25,280 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:24:25,282 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:24:26,143 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:24:26,155 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:24:26,162 INFO L300 CfgBuilder]: Removed 8 assume(true) statements. [2022-11-16 12:24:26,165 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:24:26 BoogieIcfgContainer [2022-11-16 12:24:26,165 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:24:26,166 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 12:24:26,167 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 12:24:26,172 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 12:24:26,173 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:24:26,174 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 12:24:24" (1/3) ... [2022-11-16 12:24:26,175 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1fef0580 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 12:24:26, skipping insertion in model container [2022-11-16 12:24:26,175 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:24:26,176 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:24:24" (2/3) ... [2022-11-16 12:24:26,176 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1fef0580 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 12:24:26, skipping insertion in model container [2022-11-16 12:24:26,177 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 12:24:26,177 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:24:26" (3/3) ... [2022-11-16 12:24:26,178 INFO L332 chiAutomizerObserver]: Analyzing ICFG test_mutex_double_lock.i [2022-11-16 12:24:26,256 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 12:24:26,256 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 12:24:26,256 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 12:24:26,257 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 12:24:26,257 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 12:24:26,258 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 12:24:26,258 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 12:24:26,258 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 12:24:26,263 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 85 states, 84 states have (on average 1.4166666666666667) internal successors, (119), 84 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:26,298 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2022-11-16 12:24:26,299 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:24:26,299 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:24:26,306 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:24:26,306 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:24:26,307 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 12:24:26,308 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 85 states, 84 states have (on average 1.4166666666666667) internal successors, (119), 84 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:26,327 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2022-11-16 12:24:26,328 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:24:26,328 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:24:26,329 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:24:26,330 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:24:26,341 INFO L748 eck$LassoCheckResult]: Stem: 68#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 52#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 11#L666true assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 22#L565true assume !(0 == assume_abort_if_not_~cond#1); 14#L564true assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 61#L578true foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 80#L565-2true assume !(0 == assume_abort_if_not_~cond#1); 3#L564-1true assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 63#L578-1true foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 65#L655-3true [2022-11-16 12:24:26,342 INFO L750 eck$LassoCheckResult]: Loop: 65#L655-3true assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 36#L656true assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 47#L655-2true call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 65#L655-3true [2022-11-16 12:24:26,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:26,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1482586390, now seen corresponding path program 1 times [2022-11-16 12:24:26,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:26,362 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610241269] [2022-11-16 12:24:26,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:26,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:26,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:26,578 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:26,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:26,678 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:26,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:26,683 INFO L85 PathProgramCache]: Analyzing trace with hash 59743, now seen corresponding path program 1 times [2022-11-16 12:24:26,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:26,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261674468] [2022-11-16 12:24:26,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:26,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:26,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:26,707 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:26,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:26,741 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:26,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:26,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1712557526, now seen corresponding path program 1 times [2022-11-16 12:24:26,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:26,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418205336] [2022-11-16 12:24:26,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:26,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:26,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:24:27,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:24:27,044 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:24:27,044 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418205336] [2022-11-16 12:24:27,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1418205336] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:24:27,045 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:24:27,045 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:24:27,046 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1913365004] [2022-11-16 12:24:27,046 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:24:27,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:24:27,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:24:27,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:24:27,357 INFO L87 Difference]: Start difference. First operand has 85 states, 84 states have (on average 1.4166666666666667) internal successors, (119), 84 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:27,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:24:27,712 INFO L93 Difference]: Finished difference Result 151 states and 171 transitions. [2022-11-16 12:24:27,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 151 states and 171 transitions. [2022-11-16 12:24:27,717 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 38 [2022-11-16 12:24:27,725 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 151 states to 121 states and 141 transitions. [2022-11-16 12:24:27,731 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 121 [2022-11-16 12:24:27,732 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 121 [2022-11-16 12:24:27,735 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 141 transitions. [2022-11-16 12:24:27,736 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:24:27,737 INFO L218 hiAutomatonCegarLoop]: Abstraction has 121 states and 141 transitions. [2022-11-16 12:24:27,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 141 transitions. [2022-11-16 12:24:27,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 95. [2022-11-16 12:24:27,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.168421052631579) internal successors, (111), 94 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:27,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 111 transitions. [2022-11-16 12:24:27,792 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 111 transitions. [2022-11-16 12:24:27,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:24:27,798 INFO L428 stractBuchiCegarLoop]: Abstraction has 95 states and 111 transitions. [2022-11-16 12:24:27,798 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 12:24:27,799 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 111 transitions. [2022-11-16 12:24:27,800 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 25 [2022-11-16 12:24:27,800 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:24:27,800 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:24:27,801 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:24:27,801 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:24:27,802 INFO L748 eck$LassoCheckResult]: Stem: 322#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 311#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 265#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 266#L565 assume !(0 == assume_abort_if_not_~cond#1); 269#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 270#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 319#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 250#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 251#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 320#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 307#L655-4 ldv_is_in_set_#res#1 := 0; 291#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 292#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 316#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 301#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 288#L655-9 ldv_is_in_set_#res#1 := 0; 289#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 293#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 290#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 271#L564-2 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 272#L578-2 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 275#L592 assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 276#L606 assume { :end_inline_ldv_list_add } true; 277#L635 assume { :end_inline_ldv_set_add } true; 331#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 255#L655-13 [2022-11-16 12:24:27,802 INFO L750 eck$LassoCheckResult]: Loop: 255#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 314#L656-2 assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 254#L655-12 call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 255#L655-13 [2022-11-16 12:24:27,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:27,803 INFO L85 PathProgramCache]: Analyzing trace with hash -1768300753, now seen corresponding path program 1 times [2022-11-16 12:24:27,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:27,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788514874] [2022-11-16 12:24:27,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:27,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:27,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:27,896 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:27,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:27,969 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:27,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:27,979 INFO L85 PathProgramCache]: Analyzing trace with hash 130246, now seen corresponding path program 1 times [2022-11-16 12:24:27,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:27,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306484864] [2022-11-16 12:24:27,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:27,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:27,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:27,988 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:27,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:27,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:27,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:27,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1673746728, now seen corresponding path program 1 times [2022-11-16 12:24:27,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:27,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589378136] [2022-11-16 12:24:27,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:27,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:28,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:24:33,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:24:33,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:24:33,398 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589378136] [2022-11-16 12:24:33,399 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [589378136] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:24:33,400 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:24:33,400 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-16 12:24:33,400 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960446449] [2022-11-16 12:24:33,400 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:24:33,579 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:24:33,580 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-16 12:24:33,580 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:24:33,580 INFO L87 Difference]: Start difference. First operand 95 states and 111 transitions. cyclomatic complexity: 23 Second operand has 11 states, 11 states have (on average 2.5454545454545454) internal successors, (28), 10 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:34,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:24:34,815 INFO L93 Difference]: Finished difference Result 129 states and 151 transitions. [2022-11-16 12:24:34,815 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 151 transitions. [2022-11-16 12:24:34,817 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 34 [2022-11-16 12:24:34,818 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 129 states and 151 transitions. [2022-11-16 12:24:34,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 129 [2022-11-16 12:24:34,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 129 [2022-11-16 12:24:34,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 129 states and 151 transitions. [2022-11-16 12:24:34,823 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:24:34,823 INFO L218 hiAutomatonCegarLoop]: Abstraction has 129 states and 151 transitions. [2022-11-16 12:24:34,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states and 151 transitions. [2022-11-16 12:24:34,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 115. [2022-11-16 12:24:34,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 115 states have (on average 1.173913043478261) internal successors, (135), 114 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:34,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 135 transitions. [2022-11-16 12:24:34,834 INFO L240 hiAutomatonCegarLoop]: Abstraction has 115 states and 135 transitions. [2022-11-16 12:24:34,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 12:24:34,835 INFO L428 stractBuchiCegarLoop]: Abstraction has 115 states and 135 transitions. [2022-11-16 12:24:34,835 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 12:24:34,836 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 115 states and 135 transitions. [2022-11-16 12:24:34,837 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2022-11-16 12:24:34,838 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:24:34,838 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:24:34,839 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:24:34,839 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:24:34,847 INFO L748 eck$LassoCheckResult]: Stem: 573#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 560#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 513#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 514#L565 assume !(0 == assume_abort_if_not_~cond#1); 517#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 518#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 570#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 500#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 501#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 571#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 557#L655-4 ldv_is_in_set_#res#1 := 0; 539#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 540#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 567#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 550#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 536#L655-9 ldv_is_in_set_#res#1 := 0; 537#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 541#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 538#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 519#L564-2 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 520#L578-2 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 523#L592 assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 524#L606 assume { :end_inline_ldv_list_add } true; 525#L635 assume { :end_inline_ldv_set_add } true; 585#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 583#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 584#L655-14 ldv_is_in_set_#res#1 := 0; 566#L660-2 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 589#L669-3 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 588#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 509#L655-18 [2022-11-16 12:24:34,847 INFO L750 eck$LassoCheckResult]: Loop: 509#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 575#L656-3 assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 508#L655-17 call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 509#L655-18 [2022-11-16 12:24:34,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:34,848 INFO L85 PathProgramCache]: Analyzing trace with hash 2140471672, now seen corresponding path program 1 times [2022-11-16 12:24:34,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:34,848 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090266311] [2022-11-16 12:24:34,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:34,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:34,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:24:35,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:24:35,804 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:24:35,804 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090266311] [2022-11-16 12:24:35,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090266311] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:24:35,805 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:24:35,805 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-16 12:24:35,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339188434] [2022-11-16 12:24:35,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:24:35,806 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:24:35,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:35,806 INFO L85 PathProgramCache]: Analyzing trace with hash 158050, now seen corresponding path program 1 times [2022-11-16 12:24:35,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:35,808 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744292572] [2022-11-16 12:24:35,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:35,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:35,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:35,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:35,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:35,820 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:36,014 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:24:36,015 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 12:24:36,016 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:24:36,017 INFO L87 Difference]: Start difference. First operand 115 states and 135 transitions. cyclomatic complexity: 28 Second operand has 10 states, 10 states have (on average 3.0) internal successors, (30), 9 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:37,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:24:37,411 INFO L93 Difference]: Finished difference Result 232 states and 276 transitions. [2022-11-16 12:24:37,411 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 232 states and 276 transitions. [2022-11-16 12:24:37,413 INFO L131 ngComponentsAnalysis]: Automaton has 22 accepting balls. 78 [2022-11-16 12:24:37,417 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 232 states to 232 states and 276 transitions. [2022-11-16 12:24:37,417 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 232 [2022-11-16 12:24:37,418 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 232 [2022-11-16 12:24:37,418 INFO L73 IsDeterministic]: Start isDeterministic. Operand 232 states and 276 transitions. [2022-11-16 12:24:37,426 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:24:37,426 INFO L218 hiAutomatonCegarLoop]: Abstraction has 232 states and 276 transitions. [2022-11-16 12:24:37,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states and 276 transitions. [2022-11-16 12:24:37,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 123. [2022-11-16 12:24:37,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 123 states have (on average 1.1626016260162602) internal successors, (143), 122 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:37,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 143 transitions. [2022-11-16 12:24:37,441 INFO L240 hiAutomatonCegarLoop]: Abstraction has 123 states and 143 transitions. [2022-11-16 12:24:37,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-16 12:24:37,443 INFO L428 stractBuchiCegarLoop]: Abstraction has 123 states and 143 transitions. [2022-11-16 12:24:37,443 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 12:24:37,443 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 123 states and 143 transitions. [2022-11-16 12:24:37,444 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 31 [2022-11-16 12:24:37,445 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:24:37,445 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:24:37,446 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:24:37,446 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:24:37,446 INFO L748 eck$LassoCheckResult]: Stem: 954#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 940#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 893#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 894#L565 assume !(0 == assume_abort_if_not_~cond#1); 897#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 898#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 951#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 880#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 881#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 952#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 937#L655-4 ldv_is_in_set_#res#1 := 0; 918#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 919#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 947#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 931#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 915#L655-9 ldv_is_in_set_#res#1 := 0; 916#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 920#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 917#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 899#L564-2 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 900#L578-2 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 903#L592 assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 904#L606 assume { :end_inline_ldv_list_add } true; 905#L635 assume { :end_inline_ldv_set_add } true; 914#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 884#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 885#L656-2 assume ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset;ldv_is_in_set_#res#1 := 1; 946#L660-2 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 922#L669-3 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 910#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 911#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 938#L656-3 [2022-11-16 12:24:37,447 INFO L750 eck$LassoCheckResult]: Loop: 938#L656-3 assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 888#L655-17 call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 889#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 938#L656-3 [2022-11-16 12:24:37,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:37,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1979982655, now seen corresponding path program 1 times [2022-11-16 12:24:37,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:37,449 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521609100] [2022-11-16 12:24:37,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:37,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:37,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:24:37,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:24:37,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:24:37,558 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521609100] [2022-11-16 12:24:37,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521609100] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:24:37,560 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:24:37,560 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:24:37,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171313581] [2022-11-16 12:24:37,568 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:24:37,569 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:24:37,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:37,570 INFO L85 PathProgramCache]: Analyzing trace with hash 162910, now seen corresponding path program 2 times [2022-11-16 12:24:37,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:37,572 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375696098] [2022-11-16 12:24:37,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:37,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:37,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:37,579 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:37,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:37,588 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:37,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:24:37,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:24:37,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:24:37,780 INFO L87 Difference]: Start difference. First operand 123 states and 143 transitions. cyclomatic complexity: 29 Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 4 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:37,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:24:37,843 INFO L93 Difference]: Finished difference Result 117 states and 134 transitions. [2022-11-16 12:24:37,843 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 134 transitions. [2022-11-16 12:24:37,844 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 35 [2022-11-16 12:24:37,845 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 106 states and 123 transitions. [2022-11-16 12:24:37,845 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 106 [2022-11-16 12:24:37,846 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 106 [2022-11-16 12:24:37,846 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 123 transitions. [2022-11-16 12:24:37,846 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:24:37,846 INFO L218 hiAutomatonCegarLoop]: Abstraction has 106 states and 123 transitions. [2022-11-16 12:24:37,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 123 transitions. [2022-11-16 12:24:37,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 83. [2022-11-16 12:24:37,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.144578313253012) internal successors, (95), 82 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:37,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 95 transitions. [2022-11-16 12:24:37,850 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 95 transitions. [2022-11-16 12:24:37,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:24:37,851 INFO L428 stractBuchiCegarLoop]: Abstraction has 83 states and 95 transitions. [2022-11-16 12:24:37,852 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-16 12:24:37,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 95 transitions. [2022-11-16 12:24:37,852 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 22 [2022-11-16 12:24:37,853 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 12:24:37,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 12:24:37,854 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:24:37,854 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-16 12:24:37,854 INFO L748 eck$LassoCheckResult]: Stem: 1194#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 1181#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 1142#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1143#L565 assume !(0 == assume_abort_if_not_~cond#1); 1144#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1145#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1190#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 1129#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1130#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1191#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1180#L655-4 ldv_is_in_set_#res#1 := 0; 1161#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 1162#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 1189#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1170#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1158#L655-9 ldv_is_in_set_#res#1 := 0; 1159#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 1160#L636 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1156#L635 assume { :end_inline_ldv_set_add } true; 1157#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1133#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1134#L655-14 ldv_is_in_set_#res#1 := 0; 1131#L660-2 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 1132#L669-3 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 1152#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1153#L655-18 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1178#L655-19 ldv_is_in_set_#res#1 := 0; 1140#L660-3 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 1141#L636-2 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1174#L635-1 assume { :end_inline_ldv_set_add } true; 1193#L668-1 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret28#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1187#L655-23 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1188#L655-24 ldv_is_in_set_#res#1 := 0; 1208#L660-4 mutex_unlock_#t~ret28#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 1207#L673 assume !(0 == mutex_unlock_#t~ret28#1);havoc mutex_unlock_#t~ret28#1; 1205#L673-2 assume { :begin_inline_ldv_set_del } true;ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset, ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset, ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset, ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset, ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset, ldv_set_del_#t~mem22#1.base, ldv_set_del_#t~mem22#1.offset, ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset, ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset, ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset, ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset := ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset;ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset := ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset;havoc ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset;havoc ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset := read~$Pointer$(ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, 4);ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset := ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset - 4;call ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset := read~$Pointer$(ldv_set_del_~m~0#1.base, 4 + ldv_set_del_~m~0#1.offset, 4);ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset := ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset;havoc ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset - 4; 1203#L646-3 [2022-11-16 12:24:37,855 INFO L750 eck$LassoCheckResult]: Loop: 1203#L646-3 assume !!(ldv_set_del_~m~0#1.base != ldv_set_del_~s#1.base || 4 + ldv_set_del_~m~0#1.offset != ldv_set_del_~s#1.offset);call ldv_set_del_#t~mem22#1.base, ldv_set_del_#t~mem22#1.offset := read~$Pointer$(ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, 4); 1204#L647 assume !(ldv_set_del_#t~mem22#1.base == ldv_set_del_~e#1.base && ldv_set_del_#t~mem22#1.offset == ldv_set_del_~e#1.offset);havoc ldv_set_del_#t~mem22#1.base, ldv_set_del_#t~mem22#1.offset; 1206#L646-2 ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset := read~$Pointer$(ldv_set_del_~n~0#1.base, 4 + ldv_set_del_~n~0#1.offset, 4);ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset := ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;havoc ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset - 4; 1203#L646-3 [2022-11-16 12:24:37,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:37,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1127351229, now seen corresponding path program 1 times [2022-11-16 12:24:37,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:37,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30542064] [2022-11-16 12:24:37,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:37,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:37,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:24:37,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:24:37,917 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:24:37,917 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30542064] [2022-11-16 12:24:37,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30542064] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:24:37,918 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:24:37,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:24:37,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281947597] [2022-11-16 12:24:37,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:24:37,918 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-16 12:24:37,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:24:37,919 INFO L85 PathProgramCache]: Analyzing trace with hash 228681, now seen corresponding path program 1 times [2022-11-16 12:24:37,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:24:37,920 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2057560988] [2022-11-16 12:24:37,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:24:37,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:24:37,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:37,928 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:24:37,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:24:37,941 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:24:38,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:24:38,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:24:38,103 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:24:38,103 INFO L87 Difference]: Start difference. First operand 83 states and 95 transitions. cyclomatic complexity: 18 Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:24:38,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:24:38,119 INFO L93 Difference]: Finished difference Result 18 states and 17 transitions. [2022-11-16 12:24:38,119 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 17 transitions. [2022-11-16 12:24:38,120 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2022-11-16 12:24:38,120 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 0 states and 0 transitions. [2022-11-16 12:24:38,120 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2022-11-16 12:24:38,120 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2022-11-16 12:24:38,120 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2022-11-16 12:24:38,120 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 12:24:38,120 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-11-16 12:24:38,120 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-11-16 12:24:38,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:24:38,121 INFO L428 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-11-16 12:24:38,121 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-16 12:24:38,121 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2022-11-16 12:24:38,121 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2022-11-16 12:24:38,121 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2022-11-16 12:24:38,131 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 16.11 12:24:38 BoogieIcfgContainer [2022-11-16 12:24:38,132 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-11-16 12:24:38,132 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 12:24:38,133 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 12:24:38,133 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 12:24:38,133 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:24:26" (3/4) ... [2022-11-16 12:24:38,136 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-16 12:24:38,136 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 12:24:38,138 INFO L158 Benchmark]: Toolchain (without parser) took 13953.79ms. Allocated memory was 115.3MB in the beginning and 310.4MB in the end (delta: 195.0MB). Free memory was 69.3MB in the beginning and 152.0MB in the end (delta: -82.7MB). Peak memory consumption was 111.1MB. Max. memory is 16.1GB. [2022-11-16 12:24:38,142 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 115.3MB. Free memory is still 87.2MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:24:38,143 INFO L158 Benchmark]: CACSL2BoogieTranslator took 723.22ms. Allocated memory is still 115.3MB. Free memory was 69.2MB in the beginning and 77.8MB in the end (delta: -8.7MB). Peak memory consumption was 4.7MB. Max. memory is 16.1GB. [2022-11-16 12:24:38,143 INFO L158 Benchmark]: Boogie Procedure Inliner took 72.68ms. Allocated memory is still 115.3MB. Free memory was 77.8MB in the beginning and 74.4MB in the end (delta: 3.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 12:24:38,144 INFO L158 Benchmark]: Boogie Preprocessor took 63.13ms. Allocated memory is still 115.3MB. Free memory was 74.4MB in the beginning and 71.0MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 12:24:38,144 INFO L158 Benchmark]: RCFGBuilder took 1115.93ms. Allocated memory was 115.3MB in the beginning and 153.1MB in the end (delta: 37.7MB). Free memory was 71.0MB in the beginning and 109.8MB in the end (delta: -38.8MB). Peak memory consumption was 31.2MB. Max. memory is 16.1GB. [2022-11-16 12:24:38,151 INFO L158 Benchmark]: BuchiAutomizer took 11965.49ms. Allocated memory was 153.1MB in the beginning and 310.4MB in the end (delta: 157.3MB). Free memory was 109.8MB in the beginning and 152.0MB in the end (delta: -42.2MB). Peak memory consumption was 114.9MB. Max. memory is 16.1GB. [2022-11-16 12:24:38,152 INFO L158 Benchmark]: Witness Printer took 3.68ms. Allocated memory is still 310.4MB. Free memory is still 152.0MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:24:38,154 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 115.3MB. Free memory is still 87.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 723.22ms. Allocated memory is still 115.3MB. Free memory was 69.2MB in the beginning and 77.8MB in the end (delta: -8.7MB). Peak memory consumption was 4.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 72.68ms. Allocated memory is still 115.3MB. Free memory was 77.8MB in the beginning and 74.4MB in the end (delta: 3.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 63.13ms. Allocated memory is still 115.3MB. Free memory was 74.4MB in the beginning and 71.0MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1115.93ms. Allocated memory was 115.3MB in the beginning and 153.1MB in the end (delta: 37.7MB). Free memory was 71.0MB in the beginning and 109.8MB in the end (delta: -38.8MB). Peak memory consumption was 31.2MB. Max. memory is 16.1GB. * BuchiAutomizer took 11965.49ms. Allocated memory was 153.1MB in the beginning and 310.4MB in the end (delta: 157.3MB). Free memory was 109.8MB in the beginning and 152.0MB in the end (delta: -42.2MB). Peak memory consumption was 114.9MB. Max. memory is 16.1GB. * Witness Printer took 3.68ms. Allocated memory is still 310.4MB. Free memory is still 152.0MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 5 terminating modules (5 trivial, 0 deterministic, 0 nondeterministic). 5 modules have a trivial ranking function, the largest among these consists of 11 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 11.8s and 6 iterations. TraceHistogramMax:1. Analysis of lassos took 8.5s. Construction of modules took 1.9s. Büchi inclusion checks took 1.3s. Highest rank in rank-based complementation 0. Minimization of det autom 5. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 4 MinimizatonAttempts, 172 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 943 SdHoareTripleChecker+Valid, 2.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 943 mSDsluCounter, 1178 SdHoareTripleChecker+Invalid, 1.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 850 mSDsCounter, 61 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 729 IncrementalHoareTripleChecker+Invalid, 790 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 61 mSolverCounterUnsat, 328 mSDtfsCounter, 729 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU3 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2022-11-16 12:24:38,184 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_301fe884-4cf0-4847-8886-a7263b702a33/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE