./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 50ec0e1b32f61b9ee697cf2c7598d178ee7b7b08e68108a0f594c4a6a80ab80c --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 11:05:29,433 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 11:05:29,436 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 11:05:29,474 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 11:05:29,475 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 11:05:29,476 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 11:05:29,478 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 11:05:29,480 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 11:05:29,482 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 11:05:29,484 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 11:05:29,485 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 11:05:29,487 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 11:05:29,487 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 11:05:29,489 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 11:05:29,491 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 11:05:29,492 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 11:05:29,494 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 11:05:29,495 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 11:05:29,498 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 11:05:29,500 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 11:05:29,502 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 11:05:29,504 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 11:05:29,506 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 11:05:29,507 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 11:05:29,512 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 11:05:29,513 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 11:05:29,513 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 11:05:29,515 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 11:05:29,516 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 11:05:29,517 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 11:05:29,518 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 11:05:29,519 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 11:05:29,520 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 11:05:29,521 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 11:05:29,523 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 11:05:29,523 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 11:05:29,524 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 11:05:29,525 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 11:05:29,525 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 11:05:29,527 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 11:05:29,528 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 11:05:29,529 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-16 11:05:29,576 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 11:05:29,577 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 11:05:29,578 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 11:05:29,578 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 11:05:29,579 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 11:05:29,580 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 11:05:29,580 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 11:05:29,581 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-16 11:05:29,581 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-16 11:05:29,581 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-16 11:05:29,582 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-16 11:05:29,582 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-16 11:05:29,582 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-16 11:05:29,583 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 11:05:29,583 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 11:05:29,584 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 11:05:29,584 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 11:05:29,584 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 11:05:29,603 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 11:05:29,604 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-16 11:05:29,604 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-16 11:05:29,604 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-16 11:05:29,604 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 11:05:29,607 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 11:05:29,607 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-16 11:05:29,607 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 11:05:29,608 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-16 11:05:29,608 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 11:05:29,609 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 11:05:29,609 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 11:05:29,610 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 11:05:29,611 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-16 11:05:29,611 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 50ec0e1b32f61b9ee697cf2c7598d178ee7b7b08e68108a0f594c4a6a80ab80c [2022-11-16 11:05:29,947 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 11:05:29,987 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 11:05:29,991 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 11:05:29,992 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 11:05:29,993 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 11:05:29,995 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i [2022-11-16 11:05:30,079 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/data/c2bb6d4c4/ae9f3844344647909f7fd45496df7d0b/FLAGa58ce88b4 [2022-11-16 11:05:30,948 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 11:05:30,948 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i [2022-11-16 11:05:30,981 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/data/c2bb6d4c4/ae9f3844344647909f7fd45496df7d0b/FLAGa58ce88b4 [2022-11-16 11:05:31,054 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/data/c2bb6d4c4/ae9f3844344647909f7fd45496df7d0b [2022-11-16 11:05:31,058 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 11:05:31,061 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 11:05:31,063 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 11:05:31,063 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 11:05:31,069 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 11:05:31,070 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:05:31" (1/1) ... [2022-11-16 11:05:31,071 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cfcc928 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:31, skipping insertion in model container [2022-11-16 11:05:31,071 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:05:31" (1/1) ... [2022-11-16 11:05:31,080 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 11:05:31,198 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 11:05:31,893 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i[33021,33034] [2022-11-16 11:05:32,193 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i[84583,84596] [2022-11-16 11:05:32,215 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:05:32,236 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 11:05:32,281 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i[33021,33034] [2022-11-16 11:05:32,447 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test9-2.i[84583,84596] [2022-11-16 11:05:32,456 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:05:32,526 INFO L208 MainTranslator]: Completed translation [2022-11-16 11:05:32,526 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32 WrapperNode [2022-11-16 11:05:32,526 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 11:05:32,530 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 11:05:32,530 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 11:05:32,530 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 11:05:32,543 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,585 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,783 INFO L138 Inliner]: procedures = 177, calls = 781, calls flagged for inlining = 503, calls inlined = 503, statements flattened = 4515 [2022-11-16 11:05:32,784 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 11:05:32,785 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 11:05:32,785 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 11:05:32,785 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 11:05:32,797 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,798 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,816 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,817 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,906 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,964 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:32,977 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:33,012 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:33,044 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 11:05:33,047 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 11:05:33,047 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 11:05:33,047 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 11:05:33,049 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (1/1) ... [2022-11-16 11:05:33,059 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-16 11:05:33,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:05:33,164 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-16 11:05:33,194 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-16 11:05:33,216 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-16 11:05:33,217 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-16 11:05:33,217 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-11-16 11:05:33,217 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-11-16 11:05:33,217 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 11:05:33,218 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 11:05:33,218 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-16 11:05:33,219 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 11:05:33,219 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-11-16 11:05:33,219 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-16 11:05:33,219 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 11:05:33,220 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 11:05:33,220 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 11:05:33,221 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 11:05:33,466 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 11:05:33,470 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 11:05:33,476 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 11:05:38,118 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 11:05:38,170 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 11:05:38,170 INFO L300 CfgBuilder]: Removed 63 assume(true) statements. [2022-11-16 11:05:38,175 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:05:38 BoogieIcfgContainer [2022-11-16 11:05:38,175 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 11:05:38,176 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-16 11:05:38,177 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-16 11:05:38,181 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-16 11:05:38,182 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:05:38,183 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 16.11 11:05:31" (1/3) ... [2022-11-16 11:05:38,184 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1c4faec3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 11:05:38, skipping insertion in model container [2022-11-16 11:05:38,184 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:05:38,185 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:05:32" (2/3) ... [2022-11-16 11:05:38,185 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1c4faec3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 16.11 11:05:38, skipping insertion in model container [2022-11-16 11:05:38,185 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-16 11:05:38,186 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:05:38" (3/3) ... [2022-11-16 11:05:38,187 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_BER_test9-2.i [2022-11-16 11:05:38,295 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-16 11:05:38,296 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-16 11:05:38,296 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-16 11:05:38,296 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-16 11:05:38,296 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-16 11:05:38,296 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-16 11:05:38,297 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-16 11:05:38,297 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-16 11:05:38,310 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1687 states, 1682 states have (on average 1.6682520808561236) internal successors, (2806), 1682 states have internal predecessors, (2806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-16 11:05:38,411 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1673 [2022-11-16 11:05:38,411 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:05:38,411 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:05:38,419 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 11:05:38,420 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-11-16 11:05:38,420 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-16 11:05:38,425 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1687 states, 1682 states have (on average 1.6682520808561236) internal successors, (2806), 1682 states have internal predecessors, (2806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-16 11:05:38,449 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1673 [2022-11-16 11:05:38,449 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:05:38,450 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:05:38,450 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 11:05:38,451 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-11-16 11:05:38,460 INFO L748 eck$LassoCheckResult]: Stem: 419#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1598#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_#t~ite191#1.base, main_#t~ite191#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~short196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem219#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~post223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~post234#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite193#1.base, main_#t~ite193#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1619#L2220-4true [2022-11-16 11:05:38,461 INFO L750 eck$LassoCheckResult]: Loop: 1619#L2220-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 933#L2220-1true assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 619#L2222true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 362#L2222-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 702#L2227-121true assume !true; 1501#L2220-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1619#L2220-4true [2022-11-16 11:05:38,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:38,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-11-16 11:05:38,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:38,481 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187365194] [2022-11-16 11:05:38,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:38,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:38,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:38,618 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:05:38,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:38,672 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:05:38,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:38,676 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134348, now seen corresponding path program 1 times [2022-11-16 11:05:38,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:38,677 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549409342] [2022-11-16 11:05:38,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:38,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:38,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:05:38,722 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:05:38,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549409342] [2022-11-16 11:05:38,723 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-11-16 11:05:38,724 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2005744515] [2022-11-16 11:05:38,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:38,724 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 11:05:38,725 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:05:38,729 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 11:05:38,774 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-16 11:05:38,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:05:38,913 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-16 11:05:38,915 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:05:38,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:05:38,938 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:05:38,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2005744515] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:05:38,940 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:05:38,940 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 11:05:38,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231625073] [2022-11-16 11:05:38,942 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:05:38,946 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:05:38,947 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:05:38,986 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-16 11:05:38,987 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-16 11:05:38,993 INFO L87 Difference]: Start difference. First operand has 1687 states, 1682 states have (on average 1.6682520808561236) internal successors, (2806), 1682 states have internal predecessors, (2806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:05:39,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:05:39,120 INFO L93 Difference]: Finished difference Result 1687 states and 2244 transitions. [2022-11-16 11:05:39,121 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1687 states and 2244 transitions. [2022-11-16 11:05:39,153 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1673 [2022-11-16 11:05:39,178 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1687 states to 1683 states and 2240 transitions. [2022-11-16 11:05:39,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1683 [2022-11-16 11:05:39,182 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1683 [2022-11-16 11:05:39,183 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1683 states and 2240 transitions. [2022-11-16 11:05:39,191 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:05:39,192 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1683 states and 2240 transitions. [2022-11-16 11:05:39,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1683 states and 2240 transitions. [2022-11-16 11:05:39,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1683 to 1683. [2022-11-16 11:05:39,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1683 states, 1679 states have (on average 1.3305539011316259) internal successors, (2234), 1678 states have internal predecessors, (2234), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-16 11:05:39,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1683 states to 1683 states and 2240 transitions. [2022-11-16 11:05:39,298 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1683 states and 2240 transitions. [2022-11-16 11:05:39,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-16 11:05:39,303 INFO L428 stractBuchiCegarLoop]: Abstraction has 1683 states and 2240 transitions. [2022-11-16 11:05:39,304 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-16 11:05:39,304 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1683 states and 2240 transitions. [2022-11-16 11:05:39,316 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1673 [2022-11-16 11:05:39,316 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:05:39,316 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:05:39,317 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 11:05:39,317 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:05:39,318 INFO L748 eck$LassoCheckResult]: Stem: 4152#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 4153#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_#t~ite191#1.base, main_#t~ite191#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~short196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem219#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~post223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~post234#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite193#1.base, main_#t~ite193#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5062#L2220-4 [2022-11-16 11:05:39,319 INFO L750 eck$LassoCheckResult]: Loop: 5062#L2220-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4761#L2220-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 4425#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4062#L2222-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 4063#L2227-121 havoc main_~_ha_hashv~0#1; 4532#L2227-49 goto; 4114#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4115#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4054#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 3817#L2227-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 3818#L2227-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 4108#L2227-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 4145#L2227-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 3556#L2227-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 3557#L2227-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 5057#L2227-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 5067#L2227-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 4486#L2227-22 assume !main_#t~switch24#1; 4487#L2227-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 4991#L2227-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 4141#L2227-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 4142#L2227-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 4350#L2227-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 3581#L2227-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 3582#L2227-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 3853#L2227-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 4124#L2227-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 4125#L2227-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 4224#L2227-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 3415#L2227-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 3416#L2227-42 havoc main_#t~switch24#1; 4812#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 4218#L2227-44 goto; 4219#L2227-46 goto; 3929#L2227-48 goto; 3930#L2227-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3553#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 3554#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 4156#L2227-66 goto; 3704#L2227-117 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 3705#L2227-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem65#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1)));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 4196#L2227-70 goto; 4197#L2227-115 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4186#L2227-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 4187#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 3775#L2227-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 3776#L2227-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 4472#L2227-114 goto; 3945#L2227-116 goto; 3946#L2227-118 goto; 4209#L2227-120 goto; 4210#L2220-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 5062#L2220-4 [2022-11-16 11:05:39,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:39,321 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-11-16 11:05:39,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:39,322 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166774503] [2022-11-16 11:05:39,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:39,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:39,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:39,346 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:05:39,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:39,372 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:05:39,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:39,373 INFO L85 PathProgramCache]: Analyzing trace with hash -1777661299, now seen corresponding path program 1 times [2022-11-16 11:05:39,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:39,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526728685] [2022-11-16 11:05:39,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:39,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:39,590 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 11:05:39,591 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1780130567] [2022-11-16 11:05:39,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:39,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 11:05:39,592 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:05:39,596 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 11:05:39,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-16 11:05:40,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:05:40,619 INFO L263 TraceCheckSpWp]: Trace formula consists of 1850 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 11:05:40,624 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:05:40,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:05:40,680 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:05:40,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:05:40,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526728685] [2022-11-16 11:05:40,681 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-16 11:05:40,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1780130567] [2022-11-16 11:05:40,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1780130567] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:05:40,682 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:05:40,682 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:05:40,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426069135] [2022-11-16 11:05:40,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:05:40,684 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:05:40,684 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:05:40,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:05:40,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:05:40,686 INFO L87 Difference]: Start difference. First operand 1683 states and 2240 transitions. cyclomatic complexity: 561 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:05:40,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:05:40,893 INFO L93 Difference]: Finished difference Result 1704 states and 2261 transitions. [2022-11-16 11:05:40,893 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1704 states and 2261 transitions. [2022-11-16 11:05:40,909 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1694 [2022-11-16 11:05:40,924 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1704 states to 1704 states and 2261 transitions. [2022-11-16 11:05:40,925 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1704 [2022-11-16 11:05:40,927 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1704 [2022-11-16 11:05:40,927 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1704 states and 2261 transitions. [2022-11-16 11:05:40,930 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:05:40,931 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1704 states and 2261 transitions. [2022-11-16 11:05:40,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1704 states and 2261 transitions. [2022-11-16 11:05:40,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1704 to 1703. [2022-11-16 11:05:40,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1703 states, 1699 states have (on average 1.3266627427898765) internal successors, (2254), 1698 states have internal predecessors, (2254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-16 11:05:40,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1703 states to 1703 states and 2260 transitions. [2022-11-16 11:05:40,973 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1703 states and 2260 transitions. [2022-11-16 11:05:40,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:05:40,975 INFO L428 stractBuchiCegarLoop]: Abstraction has 1703 states and 2260 transitions. [2022-11-16 11:05:40,975 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-16 11:05:40,975 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1703 states and 2260 transitions. [2022-11-16 11:05:40,986 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1693 [2022-11-16 11:05:40,986 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:05:40,987 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:05:40,990 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 11:05:40,990 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:05:40,991 INFO L748 eck$LassoCheckResult]: Stem: 7700#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 7701#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_#t~ite191#1.base, main_#t~ite191#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~short196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem219#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~post223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~post234#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite193#1.base, main_#t~ite193#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8613#L2220-4 [2022-11-16 11:05:40,991 INFO L750 eck$LassoCheckResult]: Loop: 8613#L2220-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8311#L2220-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 7974#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7609#L2222-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 7610#L2227-121 havoc main_~_ha_hashv~0#1; 8082#L2227-49 goto; 7661#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7662#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7601#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 7363#L2227-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 7364#L2227-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 7655#L2227-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 7994#L2227-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 7102#L2227-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 7103#L2227-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 8608#L2227-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 8618#L2227-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 8036#L2227-22 assume main_#t~switch24#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 8037#L2227-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 8542#L2227-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 7688#L2227-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 7689#L2227-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 7899#L2227-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 7127#L2227-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 7128#L2227-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 7400#L2227-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 7671#L2227-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 7672#L2227-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 8418#L2227-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 6961#L2227-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 6962#L2227-42 havoc main_#t~switch24#1; 8362#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 7766#L2227-44 goto; 7767#L2227-46 goto; 7476#L2227-48 goto; 7477#L2227-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7099#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 7100#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 7704#L2227-66 goto; 7250#L2227-117 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 7251#L2227-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem65#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1)));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 7744#L2227-70 goto; 7745#L2227-115 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7734#L2227-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 7735#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 7321#L2227-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 7322#L2227-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 8022#L2227-114 goto; 7492#L2227-116 goto; 7493#L2227-118 goto; 7757#L2227-120 goto; 7758#L2220-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 8613#L2220-4 [2022-11-16 11:05:40,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:40,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-11-16 11:05:40,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:40,998 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220223675] [2022-11-16 11:05:40,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:40,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:41,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:41,044 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:05:41,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:41,087 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:05:41,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:41,088 INFO L85 PathProgramCache]: Analyzing trace with hash -933655797, now seen corresponding path program 1 times [2022-11-16 11:05:41,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:41,088 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940691191] [2022-11-16 11:05:41,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:41,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:41,327 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 11:05:41,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [417967133] [2022-11-16 11:05:41,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:41,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 11:05:41,329 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:05:41,362 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 11:05:41,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-16 11:05:42,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:05:42,278 INFO L263 TraceCheckSpWp]: Trace formula consists of 1856 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 11:05:42,281 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:05:42,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:05:42,322 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:05:42,322 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 11:05:42,323 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1940691191] [2022-11-16 11:05:42,323 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-16 11:05:42,324 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [417967133] [2022-11-16 11:05:42,324 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [417967133] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:05:42,324 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:05:42,324 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 11:05:42,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315883381] [2022-11-16 11:05:42,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:05:42,326 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-16 11:05:42,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 11:05:42,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 11:05:42,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 11:05:42,327 INFO L87 Difference]: Start difference. First operand 1703 states and 2260 transitions. cyclomatic complexity: 561 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:05:42,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:05:42,595 INFO L93 Difference]: Finished difference Result 3287 states and 4368 transitions. [2022-11-16 11:05:42,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3287 states and 4368 transitions. [2022-11-16 11:05:42,623 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 3266 [2022-11-16 11:05:42,647 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3287 states to 3287 states and 4368 transitions. [2022-11-16 11:05:42,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3287 [2022-11-16 11:05:42,651 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3287 [2022-11-16 11:05:42,652 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3287 states and 4368 transitions. [2022-11-16 11:05:42,659 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-16 11:05:42,662 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3287 states and 4368 transitions. [2022-11-16 11:05:42,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3287 states and 4368 transitions. [2022-11-16 11:05:42,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3287 to 1689. [2022-11-16 11:05:42,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1689 states, 1685 states have (on average 1.3252225519287835) internal successors, (2233), 1684 states have internal predecessors, (2233), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-16 11:05:42,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1689 states to 1689 states and 2239 transitions. [2022-11-16 11:05:42,712 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1689 states and 2239 transitions. [2022-11-16 11:05:42,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 11:05:42,716 INFO L428 stractBuchiCegarLoop]: Abstraction has 1689 states and 2239 transitions. [2022-11-16 11:05:42,717 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-16 11:05:42,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1689 states and 2239 transitions. [2022-11-16 11:05:42,735 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1679 [2022-11-16 11:05:42,735 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-16 11:05:42,735 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-16 11:05:42,737 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-16 11:05:42,738 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:05:42,738 INFO L748 eck$LassoCheckResult]: Stem: 12851#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 12852#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_#t~ite191#1.base, main_#t~ite191#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~short196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem219#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~post223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~post234#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite193#1.base, main_#t~ite193#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13762#L2220-4 [2022-11-16 11:05:42,738 INFO L750 eck$LassoCheckResult]: Loop: 13762#L2220-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13460#L2220-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 13124#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12761#L2222-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 12762#L2227-121 havoc main_~_ha_hashv~0#1; 13231#L2227-49 goto; 12813#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12814#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12753#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 12516#L2227-10 assume !main_#t~switch24#1; 12517#L2227-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 12807#L2227-13 assume !main_#t~switch24#1; 12844#L2227-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 12254#L2227-16 assume !main_#t~switch24#1; 12255#L2227-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 13757#L2227-19 assume !main_#t~switch24#1; 13767#L2227-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 13185#L2227-22 assume !main_#t~switch24#1; 13186#L2227-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 13691#L2227-25 assume !main_#t~switch24#1; 12840#L2227-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 12841#L2227-28 assume !main_#t~switch24#1; 13049#L2227-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 12279#L2227-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 12280#L2227-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 13770#L2227-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 13771#L2227-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 13567#L2227-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 12923#L2227-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 12113#L2227-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 12114#L2227-42 havoc main_#t~switch24#1; 13511#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 12917#L2227-44 goto; 12918#L2227-46 goto; 12628#L2227-48 goto; 12629#L2227-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12251#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 12252#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 12855#L2227-66 goto; 12403#L2227-117 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 12404#L2227-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem65#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1)));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 12895#L2227-70 goto; 12896#L2227-115 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12885#L2227-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 12886#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 12474#L2227-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 12475#L2227-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 13171#L2227-114 goto; 12644#L2227-116 goto; 12645#L2227-118 goto; 12908#L2227-120 goto; 12909#L2220-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 13762#L2220-4 [2022-11-16 11:05:42,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:42,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-11-16 11:05:42,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:42,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998469395] [2022-11-16 11:05:42,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:42,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:42,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:42,782 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 11:05:42,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 11:05:42,814 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 11:05:42,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:05:42,815 INFO L85 PathProgramCache]: Analyzing trace with hash 1486937113, now seen corresponding path program 1 times [2022-11-16 11:05:42,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 11:05:42,821 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020703064] [2022-11-16 11:05:42,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:42,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 11:05:42,994 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 11:05:42,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [787629028] [2022-11-16 11:05:42,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:05:42,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 11:05:42,996 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:05:43,003 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 11:05:43,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_38b72734-6a21-4584-bea1-887bbad7307b/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process