./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8730d6ec4fcbc5f6df390d4be768126ffa92771ead17d97dfd39e0d222630fca --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:38:42,044 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:38:42,047 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:38:42,073 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:38:42,074 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:38:42,075 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:38:42,077 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:38:42,079 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:38:42,081 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:38:42,082 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:38:42,084 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:38:42,085 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:38:42,086 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:38:42,087 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:38:42,088 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:38:42,090 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:38:42,091 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:38:42,092 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:38:42,094 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:38:42,096 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:38:42,098 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:38:42,100 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:38:42,101 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:38:42,102 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:38:42,106 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:38:42,107 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:38:42,107 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:38:42,108 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:38:42,109 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:38:42,110 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:38:42,110 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:38:42,111 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:38:42,112 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:38:42,113 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:38:42,115 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:38:42,115 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:38:42,115 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:38:42,116 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:38:42,116 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:38:42,117 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:38:42,117 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:38:42,120 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-11-16 12:38:42,159 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:38:42,163 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:38:42,163 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:38:42,164 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:38:42,165 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:38:42,165 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:38:42,166 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:38:42,166 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:38:42,167 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:38:42,167 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:38:42,168 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:38:42,168 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:38:42,168 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 12:38:42,169 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:38:42,169 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 12:38:42,169 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:38:42,169 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:38:42,169 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 12:38:42,170 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:38:42,170 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:38:42,170 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:38:42,170 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:38:42,171 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:38:42,171 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:38:42,171 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 12:38:42,171 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:38:42,173 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 12:38:42,173 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-16 12:38:42,173 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-16 12:38:42,173 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 12:38:42,174 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8730d6ec4fcbc5f6df390d4be768126ffa92771ead17d97dfd39e0d222630fca [2022-11-16 12:38:42,448 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:38:42,472 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:38:42,475 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:38:42,477 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:38:42,478 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:38:42,480 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c [2022-11-16 12:38:42,558 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/d65b80a51/ba9fe9a48a2f4d10af8c83c4a167d5bd/FLAGbcde75efa [2022-11-16 12:38:43,080 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:38:43,081 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c [2022-11-16 12:38:43,107 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/d65b80a51/ba9fe9a48a2f4d10af8c83c4a167d5bd/FLAGbcde75efa [2022-11-16 12:38:43,416 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/d65b80a51/ba9fe9a48a2f4d10af8c83c4a167d5bd [2022-11-16 12:38:43,418 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:38:43,420 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:38:43,422 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:38:43,422 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:38:43,426 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:38:43,426 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:38:43" (1/1) ... [2022-11-16 12:38:43,427 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2647f37f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:43, skipping insertion in model container [2022-11-16 12:38:43,428 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:38:43" (1/1) ... [2022-11-16 12:38:43,435 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:38:43,478 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:38:43,711 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c[1107,1120] [2022-11-16 12:38:43,832 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:38:43,836 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:38:43,847 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c[1107,1120] [2022-11-16 12:38:44,013 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:38:44,031 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:38:44,032 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44 WrapperNode [2022-11-16 12:38:44,032 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:38:44,035 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:38:44,035 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:38:44,035 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:38:44,041 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,059 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,108 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 604 [2022-11-16 12:38:44,108 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:38:44,109 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:38:44,109 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:38:44,109 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:38:44,122 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,126 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,135 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,150 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,178 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,183 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,186 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,190 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,208 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:38:44,209 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:38:44,209 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:38:44,209 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:38:44,210 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (1/1) ... [2022-11-16 12:38:44,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:38:44,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:38:44,255 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:38:44,280 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:38:44,296 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:38:44,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:38:44,544 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:38:44,560 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:38:48,538 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:38:48,551 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:38:48,551 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 12:38:48,553 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:48 BoogieIcfgContainer [2022-11-16 12:38:48,554 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:38:48,557 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:38:48,557 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:38:48,561 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:38:48,562 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:38:43" (1/3) ... [2022-11-16 12:38:48,562 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5930a94c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:38:48, skipping insertion in model container [2022-11-16 12:38:48,563 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:44" (2/3) ... [2022-11-16 12:38:48,563 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5930a94c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:38:48, skipping insertion in model container [2022-11-16 12:38:48,563 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:48" (3/3) ... [2022-11-16 12:38:48,570 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.sw_sym_ex_v.c [2022-11-16 12:38:48,587 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:38:48,587 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-16 12:38:48,635 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:38:48,642 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7b6ee9dc, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:38:48,642 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-16 12:38:48,647 INFO L276 IsEmpty]: Start isEmpty. Operand has 41 states, 39 states have (on average 1.6153846153846154) internal successors, (63), 40 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:48,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-16 12:38:48,654 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:48,654 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:38:48,655 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:48,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:48,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1428179117, now seen corresponding path program 1 times [2022-11-16 12:38:48,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:38:48,669 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973530408] [2022-11-16 12:38:48,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:38:48,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:38:48,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:38:49,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:49,177 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:38:49,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973530408] [2022-11-16 12:38:49,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [973530408] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:38:49,179 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:38:49,179 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:38:49,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285489844] [2022-11-16 12:38:49,181 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:38:49,185 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:38:49,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:38:49,213 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:38:49,214 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:38:49,217 INFO L87 Difference]: Start difference. First operand has 41 states, 39 states have (on average 1.6153846153846154) internal successors, (63), 40 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:49,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:38:49,339 INFO L93 Difference]: Finished difference Result 121 states and 197 transitions. [2022-11-16 12:38:49,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:38:49,342 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-11-16 12:38:49,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:38:49,352 INFO L225 Difference]: With dead ends: 121 [2022-11-16 12:38:49,352 INFO L226 Difference]: Without dead ends: 82 [2022-11-16 12:38:49,355 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:38:49,359 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 147 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 147 SdHoareTripleChecker+Valid, 163 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:38:49,361 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [147 Valid, 163 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:38:49,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-16 12:38:49,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 39. [2022-11-16 12:38:49,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 1.5526315789473684) internal successors, (59), 38 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:49,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 59 transitions. [2022-11-16 12:38:49,403 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 59 transitions. Word has length 13 [2022-11-16 12:38:49,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:38:49,404 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 59 transitions. [2022-11-16 12:38:49,404 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:49,405 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 59 transitions. [2022-11-16 12:38:49,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:38:49,405 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:49,406 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:38:49,406 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 12:38:49,406 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:49,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:49,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1325604663, now seen corresponding path program 1 times [2022-11-16 12:38:49,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:38:49,408 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225592471] [2022-11-16 12:38:49,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:38:49,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:38:49,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:38:49,444 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:38:49,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:38:49,497 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:38:49,497 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-16 12:38:49,499 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-16 12:38:49,502 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-16 12:38:49,506 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-16 12:38:49,510 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-16 12:38:49,537 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:38:49,547 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:38:49 BoogieIcfgContainer [2022-11-16 12:38:49,547 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-16 12:38:49,547 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 12:38:49,548 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 12:38:49,548 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 12:38:49,548 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:48" (3/4) ... [2022-11-16 12:38:49,552 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-16 12:38:49,552 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 12:38:49,553 INFO L158 Benchmark]: Toolchain (without parser) took 6132.67ms. Allocated memory was 119.5MB in the beginning and 222.3MB in the end (delta: 102.8MB). Free memory was 77.3MB in the beginning and 176.4MB in the end (delta: -99.1MB). Peak memory consumption was 5.7MB. Max. memory is 16.1GB. [2022-11-16 12:38:49,553 INFO L158 Benchmark]: CDTParser took 0.35ms. Allocated memory is still 119.5MB. Free memory was 94.3MB in the beginning and 94.2MB in the end (delta: 117.5kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:38:49,554 INFO L158 Benchmark]: CACSL2BoogieTranslator took 612.21ms. Allocated memory is still 119.5MB. Free memory was 77.0MB in the beginning and 82.3MB in the end (delta: -5.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-16 12:38:49,554 INFO L158 Benchmark]: Boogie Procedure Inliner took 73.81ms. Allocated memory is still 119.5MB. Free memory was 82.3MB in the beginning and 75.8MB in the end (delta: 6.5MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-16 12:38:49,555 INFO L158 Benchmark]: Boogie Preprocessor took 99.34ms. Allocated memory is still 119.5MB. Free memory was 75.8MB in the beginning and 72.1MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 12:38:49,556 INFO L158 Benchmark]: RCFGBuilder took 4344.89ms. Allocated memory was 119.5MB in the beginning and 184.5MB in the end (delta: 65.0MB). Free memory was 72.1MB in the beginning and 82.2MB in the end (delta: -10.1MB). Peak memory consumption was 97.8MB. Max. memory is 16.1GB. [2022-11-16 12:38:49,556 INFO L158 Benchmark]: TraceAbstraction took 989.94ms. Allocated memory was 184.5MB in the beginning and 222.3MB in the end (delta: 37.7MB). Free memory was 81.2MB in the beginning and 176.4MB in the end (delta: -95.2MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:38:49,557 INFO L158 Benchmark]: Witness Printer took 4.46ms. Allocated memory is still 222.3MB. Free memory is still 176.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:38:49,560 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35ms. Allocated memory is still 119.5MB. Free memory was 94.3MB in the beginning and 94.2MB in the end (delta: 117.5kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 612.21ms. Allocated memory is still 119.5MB. Free memory was 77.0MB in the beginning and 82.3MB in the end (delta: -5.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 73.81ms. Allocated memory is still 119.5MB. Free memory was 82.3MB in the beginning and 75.8MB in the end (delta: 6.5MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 99.34ms. Allocated memory is still 119.5MB. Free memory was 75.8MB in the beginning and 72.1MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 4344.89ms. Allocated memory was 119.5MB in the beginning and 184.5MB in the end (delta: 65.0MB). Free memory was 72.1MB in the beginning and 82.2MB in the end (delta: -10.1MB). Peak memory consumption was 97.8MB. Max. memory is 16.1GB. * TraceAbstraction took 989.94ms. Allocated memory was 184.5MB in the beginning and 222.3MB in the end (delta: 37.7MB). Free memory was 81.2MB in the beginning and 176.4MB in the end (delta: -95.2MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 4.46ms. Allocated memory is still 222.3MB. Free memory is still 176.4MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 92, overapproximation of bitwiseAnd at line 97. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 8); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (8 - 1); [L28] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 1); [L29] const SORT_5 msb_SORT_5 = (SORT_5)1 << (1 - 1); [L31] const SORT_5 var_7 = 0; [L32] const SORT_5 var_13 = 1; [L33] const SORT_1 var_33 = 0; [L34] const SORT_1 var_42 = 4; [L35] const SORT_1 var_54 = 5; [L36] const SORT_1 var_193 = 3; [L37] const SORT_1 var_199 = 2; [L39] SORT_1 input_2; [L40] SORT_1 input_3; [L41] SORT_1 input_4; [L42] SORT_5 input_6; [L43] SORT_1 input_38; [L45] SORT_5 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L46] SORT_5 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L47] SORT_5 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L48] SORT_5 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L49] SORT_5 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L50] SORT_5 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L51] SORT_5 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L52] SORT_5 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L53] SORT_5 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L54] SORT_1 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L55] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L57] SORT_5 init_9_arg_1 = var_7; [L58] state_8 = init_9_arg_1 [L59] SORT_5 init_18_arg_1 = var_13; [L60] state_17 = init_18_arg_1 [L61] SORT_5 init_20_arg_1 = var_7; [L62] state_19 = init_20_arg_1 [L63] SORT_5 init_22_arg_1 = var_7; [L64] state_21 = init_22_arg_1 [L65] SORT_5 init_24_arg_1 = var_7; [L66] state_23 = init_24_arg_1 [L67] SORT_5 init_26_arg_1 = var_7; [L68] state_25 = init_26_arg_1 [L69] SORT_5 init_28_arg_1 = var_7; [L70] state_27 = init_28_arg_1 [L71] SORT_5 init_30_arg_1 = var_7; [L72] state_29 = init_30_arg_1 [L73] SORT_5 init_32_arg_1 = var_13; [L74] state_31 = init_32_arg_1 [L75] SORT_1 init_35_arg_1 = var_33; [L76] state_34 = init_35_arg_1 [L77] SORT_1 init_37_arg_1 = var_33; [L78] state_36 = init_37_arg_1 VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_13=1, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_13=1, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_13=1, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_4=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_13=1, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=2, input_4=0, input_6=1, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_10=0, var_10_arg_0=0, var_13=1, var_14=255, var_14_arg_0=0, var_15=1, var_15_arg_0=1, var_15_arg_1=255, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L98] var_15 = var_15 & mask_SORT_5 VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=2, input_4=0, input_6=1, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_10=0, var_10_arg_0=0, var_13=1, var_14=255, var_14_arg_0=0, var_15=1, var_15_arg_0=1, var_15_arg_1=255, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 41 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 0.9s, OverallIterations: 2, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 147 SdHoareTripleChecker+Valid, 0.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 147 mSDsluCounter, 163 SdHoareTripleChecker+Invalid, 0.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 88 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 17 IncrementalHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 75 mSDtfsCounter, 17 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=41occurred in iteration=0, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 43 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.4s InterpolantComputationTime, 27 NumberOfCodeBlocks, 27 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 12 ConstructedInterpolants, 0 QuantifiedInterpolants, 17 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-16 12:38:49,590 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8730d6ec4fcbc5f6df390d4be768126ffa92771ead17d97dfd39e0d222630fca --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:38:51,916 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:38:51,918 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:38:51,948 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:38:51,949 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:38:51,951 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:38:51,954 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:38:51,960 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:38:51,964 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:38:51,966 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:38:51,968 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:38:51,970 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:38:51,972 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:38:51,975 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:38:51,977 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:38:51,979 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:38:51,981 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:38:51,988 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:38:51,990 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:38:51,996 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:38:51,998 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:38:52,006 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:38:52,008 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:38:52,008 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:38:52,012 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:38:52,012 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:38:52,012 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:38:52,013 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:38:52,015 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:38:52,016 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:38:52,017 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:38:52,018 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:38:52,018 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:38:52,019 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:38:52,020 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:38:52,020 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:38:52,021 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:38:52,021 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:38:52,022 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:38:52,023 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:38:52,023 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:38:52,026 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2022-11-16 12:38:52,070 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:38:52,070 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:38:52,072 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:38:52,072 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:38:52,073 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:38:52,073 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:38:52,074 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:38:52,074 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:38:52,075 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:38:52,075 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:38:52,076 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:38:52,076 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 12:38:52,076 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:38:52,076 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 12:38:52,077 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 12:38:52,077 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-16 12:38:52,077 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-16 12:38:52,077 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:38:52,077 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:38:52,078 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 12:38:52,078 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:38:52,078 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:38:52,078 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:38:52,078 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:38:52,079 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:38:52,079 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:38:52,079 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 12:38:52,079 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-11-16 12:38:52,079 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-16 12:38:52,079 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-16 12:38:52,080 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-16 12:38:52,080 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 12:38:52,080 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-16 12:38:52,080 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8730d6ec4fcbc5f6df390d4be768126ffa92771ead17d97dfd39e0d222630fca [2022-11-16 12:38:52,484 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:38:52,513 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:38:52,516 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:38:52,517 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:38:52,520 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:38:52,522 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c [2022-11-16 12:38:52,616 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/77d154189/1e39db73f9584f29af0cb13dcc89bf0a/FLAG96da76f4a [2022-11-16 12:38:53,269 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:38:53,269 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c [2022-11-16 12:38:53,287 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/77d154189/1e39db73f9584f29af0cb13dcc89bf0a/FLAG96da76f4a [2022-11-16 12:38:53,604 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/data/77d154189/1e39db73f9584f29af0cb13dcc89bf0a [2022-11-16 12:38:53,607 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:38:53,609 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:38:53,615 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:38:53,615 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:38:53,620 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:38:53,621 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:38:53" (1/1) ... [2022-11-16 12:38:53,622 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@faf7c95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:53, skipping insertion in model container [2022-11-16 12:38:53,622 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:38:53" (1/1) ... [2022-11-16 12:38:53,634 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:38:53,682 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:38:53,808 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c[1107,1120] [2022-11-16 12:38:53,986 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:38:53,989 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:38:54,001 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_sym_ex_v.c[1107,1120] [2022-11-16 12:38:54,082 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:38:54,104 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:38:54,104 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54 WrapperNode [2022-11-16 12:38:54,104 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:38:54,105 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:38:54,106 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:38:54,106 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:38:54,113 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,130 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,171 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 534 [2022-11-16 12:38:54,172 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:38:54,173 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:38:54,173 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:38:54,173 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:38:54,182 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,182 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,191 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,192 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,205 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,210 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,213 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,216 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,221 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:38:54,222 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:38:54,222 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:38:54,222 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:38:54,223 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (1/1) ... [2022-11-16 12:38:54,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:38:54,245 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:38:54,260 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:38:54,324 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:38:54,361 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:38:54,361 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:38:54,638 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:38:54,640 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:38:55,392 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:38:55,398 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:38:55,398 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 12:38:55,400 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:55 BoogieIcfgContainer [2022-11-16 12:38:55,401 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:38:55,408 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:38:55,408 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:38:55,411 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:38:55,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:38:53" (1/3) ... [2022-11-16 12:38:55,412 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26dc6f8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:38:55, skipping insertion in model container [2022-11-16 12:38:55,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:54" (2/3) ... [2022-11-16 12:38:55,413 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26dc6f8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:38:55, skipping insertion in model container [2022-11-16 12:38:55,413 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:55" (3/3) ... [2022-11-16 12:38:55,416 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.sw_sym_ex_v.c [2022-11-16 12:38:55,437 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:38:55,437 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-16 12:38:55,494 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:38:55,502 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5f8020fa, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:38:55,502 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-16 12:38:55,507 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:55,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:38:55,514 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:55,514 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:38:55,515 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:55,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:55,521 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-16 12:38:55,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:38:55,536 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1721723334] [2022-11-16 12:38:55,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:38:55,536 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:38:55,537 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:38:55,542 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:38:55,568 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-16 12:38:55,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:38:55,763 INFO L263 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-16 12:38:55,773 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:38:55,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:55,906 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 12:38:55,907 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 12:38:55,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1721723334] [2022-11-16 12:38:55,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1721723334] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:38:55,908 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:38:55,908 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:38:55,910 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [943331412] [2022-11-16 12:38:55,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:38:55,917 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:38:55,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 12:38:55,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:38:55,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:38:55,957 INFO L87 Difference]: Start difference. First operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:56,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:38:56,074 INFO L93 Difference]: Finished difference Result 20 states and 30 transitions. [2022-11-16 12:38:56,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:38:56,077 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:38:56,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:38:56,086 INFO L225 Difference]: With dead ends: 20 [2022-11-16 12:38:56,087 INFO L226 Difference]: Without dead ends: 11 [2022-11-16 12:38:56,095 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:38:56,099 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 4 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:38:56,102 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 13 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:38:56,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states. [2022-11-16 12:38:56,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 9. [2022-11-16 12:38:56,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:56,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2022-11-16 12:38:56,140 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2022-11-16 12:38:56,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:38:56,140 INFO L495 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2022-11-16 12:38:56,140 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:56,141 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2022-11-16 12:38:56,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2022-11-16 12:38:56,141 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:56,142 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:38:56,155 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-16 12:38:56,354 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:38:56,355 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:56,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:56,356 INFO L85 PathProgramCache]: Analyzing trace with hash 271073635, now seen corresponding path program 1 times [2022-11-16 12:38:56,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:38:56,359 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1933513441] [2022-11-16 12:38:56,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:38:56,360 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:38:56,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:38:56,361 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:38:56,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-16 12:38:56,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:38:56,700 INFO L263 TraceCheckSpWp]: Trace formula consists of 501 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-16 12:38:56,708 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:38:56,846 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:56,846 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:38:57,107 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:57,108 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 12:38:57,108 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1933513441] [2022-11-16 12:38:57,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1933513441] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:38:57,108 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 12:38:57,109 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2022-11-16 12:38:57,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747240356] [2022-11-16 12:38:57,109 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 12:38:57,110 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 12:38:57,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 12:38:57,111 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 12:38:57,112 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:38:57,112 INFO L87 Difference]: Start difference. First operand 9 states and 9 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:57,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:38:57,215 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-11-16 12:38:57,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:38:57,216 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2022-11-16 12:38:57,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:38:57,217 INFO L225 Difference]: With dead ends: 16 [2022-11-16 12:38:57,217 INFO L226 Difference]: Without dead ends: 14 [2022-11-16 12:38:57,218 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:38:57,219 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 13 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 15 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:38:57,220 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 15 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 7 Unchecked, 0.1s Time] [2022-11-16 12:38:57,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-11-16 12:38:57,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2022-11-16 12:38:57,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:57,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2022-11-16 12:38:57,225 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 8 [2022-11-16 12:38:57,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:38:57,225 INFO L495 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2022-11-16 12:38:57,226 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:57,226 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-11-16 12:38:57,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-16 12:38:57,227 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:57,228 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1] [2022-11-16 12:38:57,245 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-16 12:38:57,443 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:38:57,443 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:57,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:57,444 INFO L85 PathProgramCache]: Analyzing trace with hash 1020920393, now seen corresponding path program 2 times [2022-11-16 12:38:57,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:38:57,446 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [421009815] [2022-11-16 12:38:57,446 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:38:57,447 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:38:57,447 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:38:57,448 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:38:57,454 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-16 12:38:57,911 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:38:57,911 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:38:57,934 INFO L263 TraceCheckSpWp]: Trace formula consists of 949 conjuncts, 112 conjunts are in the unsatisfiable core [2022-11-16 12:38:57,946 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:38:58,510 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:58,511 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:38:59,689 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:59,689 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 12:38:59,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [421009815] [2022-11-16 12:38:59,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [421009815] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:38:59,690 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 12:38:59,690 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 12:38:59,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597719003] [2022-11-16 12:38:59,691 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 12:38:59,691 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 12:38:59,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 12:38:59,692 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 12:38:59,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:38:59,693 INFO L87 Difference]: Start difference. First operand 12 states and 12 transitions. Second operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 10 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:59,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:38:59,865 INFO L93 Difference]: Finished difference Result 19 states and 19 transitions. [2022-11-16 12:38:59,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 12:38:59,866 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 10 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-16 12:38:59,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:38:59,867 INFO L225 Difference]: With dead ends: 19 [2022-11-16 12:38:59,867 INFO L226 Difference]: Without dead ends: 17 [2022-11-16 12:38:59,867 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=57, Invalid=99, Unknown=0, NotChecked=0, Total=156 [2022-11-16 12:38:59,868 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 10 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 15 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:38:59,869 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 22 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 9 Invalid, 0 Unknown, 15 Unchecked, 0.1s Time] [2022-11-16 12:38:59,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-11-16 12:38:59,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 15. [2022-11-16 12:38:59,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 14 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:59,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2022-11-16 12:38:59,874 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 11 [2022-11-16 12:38:59,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:38:59,875 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2022-11-16 12:38:59,875 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 10 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:59,875 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2022-11-16 12:38:59,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:38:59,876 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:59,876 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1] [2022-11-16 12:38:59,895 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-16 12:39:00,076 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:39:00,077 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:00,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:00,077 INFO L85 PathProgramCache]: Analyzing trace with hash 1580781475, now seen corresponding path program 3 times [2022-11-16 12:39:00,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:39:00,080 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1793424804] [2022-11-16 12:39:00,080 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 12:39:00,080 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:39:00,080 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:39:00,081 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:39:00,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-16 12:39:00,747 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-16 12:39:00,747 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:39:00,776 INFO L263 TraceCheckSpWp]: Trace formula consists of 1397 conjuncts, 215 conjunts are in the unsatisfiable core [2022-11-16 12:39:00,792 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:39:09,545 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:09,546 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:39:33,135 WARN L233 SmtUtils]: Spent 6.36s on a formula simplification that was a NOOP. DAG size: 397 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:40:47,788 WARN L233 SmtUtils]: Spent 56.27s on a formula simplification. DAG size of input: 634 DAG size of output: 634 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:40:49,192 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:40:49,192 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 12:40:49,193 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1793424804] [2022-11-16 12:40:49,193 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1793424804] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:40:49,193 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 12:40:49,193 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2022-11-16 12:40:49,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979486218] [2022-11-16 12:40:49,194 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 12:40:49,194 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-16 12:40:49,194 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 12:40:49,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-16 12:40:49,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=186, Unknown=13, NotChecked=0, Total=240 [2022-11-16 12:40:49,196 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 16 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:40:50,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:40:50,408 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2022-11-16 12:40:50,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 12:40:50,409 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 16 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-11-16 12:40:50,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:40:50,410 INFO L225 Difference]: With dead ends: 22 [2022-11-16 12:40:50,410 INFO L226 Difference]: Without dead ends: 20 [2022-11-16 12:40:50,410 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 103.4s TimeCoverageRelationStatistics Valid=56, Invalid=273, Unknown=13, NotChecked=0, Total=342 [2022-11-16 12:40:50,411 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 5 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:40:50,411 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 53 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 23 Invalid, 0 Unknown, 52 Unchecked, 0.2s Time] [2022-11-16 12:40:50,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-11-16 12:40:50,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 18. [2022-11-16 12:40:50,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:40:50,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2022-11-16 12:40:50,418 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 14 [2022-11-16 12:40:50,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:40:50,418 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2022-11-16 12:40:50,418 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 16 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:40:50,419 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2022-11-16 12:40:50,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-16 12:40:50,419 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:40:50,419 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1] [2022-11-16 12:40:50,451 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-16 12:40:50,636 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:40:50,636 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:40:50,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:40:50,637 INFO L85 PathProgramCache]: Analyzing trace with hash -1250702327, now seen corresponding path program 4 times [2022-11-16 12:40:50,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:40:50,638 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1125322601] [2022-11-16 12:40:50,638 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 12:40:50,640 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:40:50,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:40:50,642 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:40:50,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-16 12:40:51,264 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 12:40:51,264 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:40:51,292 INFO L263 TraceCheckSpWp]: Trace formula consists of 1845 conjuncts, 382 conjunts are in the unsatisfiable core [2022-11-16 12:40:51,310 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:40:54,821 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:40:54,821 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:41:08,406 WARN L233 SmtUtils]: Spent 11.78s on a formula simplification. DAG size of input: 334 DAG size of output: 260 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:43:24,179 WARN L233 SmtUtils]: Spent 2.09m on a formula simplification. DAG size of input: 744 DAG size of output: 364 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:02,335 WARN L233 SmtUtils]: Spent 2.46m on a formula simplification. DAG size of input: 966 DAG size of output: 432 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:03,051 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:46:03,052 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 12:46:03,052 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1125322601] [2022-11-16 12:46:03,052 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1125322601] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:46:03,052 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 12:46:03,053 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2022-11-16 12:46:03,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831363162] [2022-11-16 12:46:03,053 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 12:46:03,053 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 12:46:03,054 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 12:46:03,054 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 12:46:03,054 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=128, Unknown=2, NotChecked=0, Total=182 [2022-11-16 12:46:03,055 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:46:03,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:46:03,669 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2022-11-16 12:46:03,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-16 12:46:03,670 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-11-16 12:46:03,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:46:03,671 INFO L225 Difference]: With dead ends: 25 [2022-11-16 12:46:03,671 INFO L226 Difference]: Without dead ends: 23 [2022-11-16 12:46:03,671 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 293.8s TimeCoverageRelationStatistics Valid=103, Invalid=237, Unknown=2, NotChecked=0, Total=342 [2022-11-16 12:46:03,672 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 10 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 29 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:46:03,673 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 21 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 29 Unchecked, 0.1s Time] [2022-11-16 12:46:03,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-11-16 12:46:03,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 21. [2022-11-16 12:46:03,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.05) internal successors, (21), 20 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:46:03,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2022-11-16 12:46:03,684 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 17 [2022-11-16 12:46:03,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:46:03,684 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2022-11-16 12:46:03,685 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:46:03,685 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-11-16 12:46:03,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-11-16 12:46:03,685 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:46:03,686 INFO L195 NwaCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1] [2022-11-16 12:46:03,707 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-16 12:46:03,906 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:46:03,906 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:46:03,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:46:03,907 INFO L85 PathProgramCache]: Analyzing trace with hash -826954269, now seen corresponding path program 5 times [2022-11-16 12:46:03,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:46:03,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [476900567] [2022-11-16 12:46:03,909 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-16 12:46:03,909 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:46:03,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:46:03,910 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:46:03,917 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-16 12:46:04,786 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-16 12:46:04,787 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:46:04,829 INFO L263 TraceCheckSpWp]: Trace formula consists of 2293 conjuncts, 339 conjunts are in the unsatisfiable core [2022-11-16 12:46:04,842 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:46:07,888 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:46:07,889 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:46:21,835 WARN L233 SmtUtils]: Spent 6.20s on a formula simplification that was a NOOP. DAG size: 241 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:28,533 WARN L233 SmtUtils]: Spent 6.22s on a formula simplification that was a NOOP. DAG size: 245 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:45,655 WARN L233 SmtUtils]: Spent 6.65s on a formula simplification. DAG size of input: 255 DAG size of output: 251 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:48:06,474 WARN L233 SmtUtils]: Spent 1.14m on a formula simplification. DAG size of input: 517 DAG size of output: 339 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:48:25,418 WARN L233 SmtUtils]: Spent 14.46s on a formula simplification that was a NOOP. DAG size: 342 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:49:01,664 WARN L233 SmtUtils]: Spent 17.68s on a formula simplification. DAG size of input: 350 DAG size of output: 308 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:50:15,019 WARN L233 SmtUtils]: Spent 54.59s on a formula simplification. DAG size of input: 658 DAG size of output: 618 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:50:15,476 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:50:15,477 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 12:50:15,477 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [476900567] [2022-11-16 12:50:15,477 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [476900567] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:50:15,477 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 12:50:15,477 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 28 [2022-11-16 12:50:15,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415021320] [2022-11-16 12:50:15,477 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 12:50:15,478 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-11-16 12:50:15,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 12:50:15,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-11-16 12:50:15,479 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=602, Unknown=30, NotChecked=0, Total=756 [2022-11-16 12:50:15,479 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand has 28 states, 28 states have (on average 1.3571428571428572) internal successors, (38), 28 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:50:17,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:50:17,025 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2022-11-16 12:50:17,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-16 12:50:17,025 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.3571428571428572) internal successors, (38), 28 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-11-16 12:50:17,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:50:17,026 INFO L225 Difference]: With dead ends: 28 [2022-11-16 12:50:17,026 INFO L226 Difference]: Without dead ends: 26 [2022-11-16 12:50:17,027 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 12 SyntacticMatches, 3 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 243.7s TimeCoverageRelationStatistics Valid=228, Invalid=1002, Unknown=30, NotChecked=0, Total=1260 [2022-11-16 12:50:17,028 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 15 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 31 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:50:17,028 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 55 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 6 Invalid, 0 Unknown, 31 Unchecked, 0.0s Time] [2022-11-16 12:50:17,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-11-16 12:50:17,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 24. [2022-11-16 12:50:17,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:50:17,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2022-11-16 12:50:17,039 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 20 [2022-11-16 12:50:17,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:50:17,040 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2022-11-16 12:50:17,040 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.3571428571428572) internal successors, (38), 28 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:50:17,040 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2022-11-16 12:50:17,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-16 12:50:17,041 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:50:17,041 INFO L195 NwaCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1] [2022-11-16 12:50:17,070 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-16 12:50:17,261 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:50:17,261 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:50:17,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:50:17,262 INFO L85 PathProgramCache]: Analyzing trace with hash 142558665, now seen corresponding path program 6 times [2022-11-16 12:50:17,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:50:17,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [900218509] [2022-11-16 12:50:17,263 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-16 12:50:17,263 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:50:17,263 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:50:17,264 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:50:17,265 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-16 12:50:18,457 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-11-16 12:50:18,457 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-16 12:50:18,457 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:50:18,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:50:19,535 INFO L130 FreeRefinementEngine]: Strategy WOLF found a feasible trace [2022-11-16 12:50:19,535 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-16 12:50:19,537 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-16 12:50:19,569 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-16 12:50:19,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:50:19,751 INFO L444 BasicCegarLoop]: Path program histogram: [6, 1] [2022-11-16 12:50:19,757 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-16 12:50:19,926 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:19,927 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:19,927 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:19,927 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:19,927 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:19,928 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:19,929 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,008 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:50:20 BoogieIcfgContainer [2022-11-16 12:50:20,008 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-16 12:50:20,009 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 12:50:20,009 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 12:50:20,009 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 12:50:20,010 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:55" (3/4) ... [2022-11-16 12:50:20,011 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-16 12:50:20,086 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,087 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,087 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,087 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,087 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,088 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,088 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:50:20,358 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/witness.graphml [2022-11-16 12:50:20,358 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 12:50:20,359 INFO L158 Benchmark]: Toolchain (without parser) took 686750.30ms. Allocated memory was 60.8MB in the beginning and 507.5MB in the end (delta: 446.7MB). Free memory was 38.8MB in the beginning and 160.3MB in the end (delta: -121.5MB). Peak memory consumption was 325.2MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,359 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 60.8MB. Free memory was 43.0MB in the beginning and 42.9MB in the end (delta: 47.4kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:50:20,359 INFO L158 Benchmark]: CACSL2BoogieTranslator took 489.78ms. Allocated memory is still 60.8MB. Free memory was 38.6MB in the beginning and 35.1MB in the end (delta: 3.4MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,360 INFO L158 Benchmark]: Boogie Procedure Inliner took 66.66ms. Allocated memory is still 60.8MB. Free memory was 35.1MB in the beginning and 30.6MB in the end (delta: 4.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,360 INFO L158 Benchmark]: Boogie Preprocessor took 48.54ms. Allocated memory is still 60.8MB. Free memory was 30.6MB in the beginning and 27.5MB in the end (delta: 3.0MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,361 INFO L158 Benchmark]: RCFGBuilder took 1178.85ms. Allocated memory was 60.8MB in the beginning and 86.0MB in the end (delta: 25.2MB). Free memory was 27.4MB in the beginning and 55.3MB in the end (delta: -27.9MB). Peak memory consumption was 15.4MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,380 INFO L158 Benchmark]: TraceAbstraction took 684600.28ms. Allocated memory was 86.0MB in the beginning and 507.5MB in the end (delta: 421.5MB). Free memory was 54.6MB in the beginning and 221.6MB in the end (delta: -167.0MB). Peak memory consumption was 253.3MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,381 INFO L158 Benchmark]: Witness Printer took 349.68ms. Allocated memory is still 507.5MB. Free memory was 221.6MB in the beginning and 160.3MB in the end (delta: 61.3MB). Peak memory consumption was 60.8MB. Max. memory is 16.1GB. [2022-11-16 12:50:20,384 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 60.8MB. Free memory was 43.0MB in the beginning and 42.9MB in the end (delta: 47.4kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 489.78ms. Allocated memory is still 60.8MB. Free memory was 38.6MB in the beginning and 35.1MB in the end (delta: 3.4MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 66.66ms. Allocated memory is still 60.8MB. Free memory was 35.1MB in the beginning and 30.6MB in the end (delta: 4.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 48.54ms. Allocated memory is still 60.8MB. Free memory was 30.6MB in the beginning and 27.5MB in the end (delta: 3.0MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1178.85ms. Allocated memory was 60.8MB in the beginning and 86.0MB in the end (delta: 25.2MB). Free memory was 27.4MB in the beginning and 55.3MB in the end (delta: -27.9MB). Peak memory consumption was 15.4MB. Max. memory is 16.1GB. * TraceAbstraction took 684600.28ms. Allocated memory was 86.0MB in the beginning and 507.5MB in the end (delta: 421.5MB). Free memory was 54.6MB in the beginning and 221.6MB in the end (delta: -167.0MB). Peak memory consumption was 253.3MB. Max. memory is 16.1GB. * Witness Printer took 349.68ms. Allocated memory is still 507.5MB. Free memory was 221.6MB in the beginning and 160.3MB in the end (delta: 61.3MB). Peak memory consumption was 60.8MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 20]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 8); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (8 - 1); [L28] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 1); [L29] const SORT_5 msb_SORT_5 = (SORT_5)1 << (1 - 1); [L31] const SORT_5 var_7 = 0; [L32] const SORT_5 var_13 = 1; [L33] const SORT_1 var_33 = 0; [L34] const SORT_1 var_42 = 4; [L35] const SORT_1 var_54 = 5; [L36] const SORT_1 var_193 = 3; [L37] const SORT_1 var_199 = 2; [L39] SORT_1 input_2; [L40] SORT_1 input_3; [L41] SORT_1 input_4; [L42] SORT_5 input_6; [L43] SORT_1 input_38; [L45] SORT_5 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L46] SORT_5 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L47] SORT_5 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L48] SORT_5 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L49] SORT_5 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L50] SORT_5 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L51] SORT_5 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L52] SORT_5 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L53] SORT_5 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L54] SORT_1 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L55] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L57] SORT_5 init_9_arg_1 = var_7; [L58] state_8 = init_9_arg_1 [L59] SORT_5 init_18_arg_1 = var_13; [L60] state_17 = init_18_arg_1 [L61] SORT_5 init_20_arg_1 = var_7; [L62] state_19 = init_20_arg_1 [L63] SORT_5 init_22_arg_1 = var_7; [L64] state_21 = init_22_arg_1 [L65] SORT_5 init_24_arg_1 = var_7; [L66] state_23 = init_24_arg_1 [L67] SORT_5 init_26_arg_1 = var_7; [L68] state_25 = init_26_arg_1 [L69] SORT_5 init_28_arg_1 = var_7; [L70] state_27 = init_28_arg_1 [L71] SORT_5 init_30_arg_1 = var_7; [L72] state_29 = init_30_arg_1 [L73] SORT_5 init_32_arg_1 = var_13; [L74] state_31 = init_32_arg_1 [L75] SORT_1 init_35_arg_1 = var_33; [L76] state_34 = init_35_arg_1 [L77] SORT_1 init_37_arg_1 = var_33; [L78] state_36 = init_37_arg_1 VAL [init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_17=1, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_13=1, var_193=3, var_199=2, var_33=0, var_42=4, var_54=5, var_7=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L100] RET __VERIFIER_assert(!(bad_16_arg_0)) [L102] SORT_1 var_41_arg_0 = state_34; [L103] SORT_1 var_41_arg_1 = state_36; [L104] SORT_1 var_41 = var_41_arg_0 + var_41_arg_1; [L105] var_41 = var_41 & mask_SORT_1 [L106] SORT_1 var_43_arg_0 = var_41; [L107] SORT_1 var_43_arg_1 = var_42; [L108] SORT_5 var_43 = var_43_arg_0 == var_43_arg_1; [L109] SORT_5 var_44_arg_0 = state_27; [L110] SORT_5 var_44_arg_1 = var_43; [L111] SORT_5 var_44 = var_44_arg_0 & var_44_arg_1; [L112] SORT_5 var_45_arg_0 = state_8; [L113] SORT_5 var_45_arg_1 = var_44; [L114] SORT_5 var_45 = var_45_arg_0 | var_45_arg_1; [L115] SORT_5 var_46_arg_0 = state_31; [L116] SORT_5 var_46_arg_1 = var_45; [L117] SORT_5 var_46_arg_2 = state_8; [L118] SORT_5 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L119] SORT_5 next_47_arg_1 = var_46; [L120] SORT_5 var_48_arg_0 = state_31; [L121] SORT_5 var_48_arg_1 = var_7; [L122] SORT_5 var_48_arg_2 = state_17; [L123] SORT_5 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L124] SORT_5 next_49_arg_1 = var_48; [L125] SORT_5 var_50_arg_0 = state_31; [L126] SORT_5 var_50_arg_1 = state_17; [L127] SORT_5 var_50_arg_2 = state_19; [L128] SORT_5 var_50 = var_50_arg_0 ? var_50_arg_1 : var_50_arg_2; [L129] var_50 = var_50 & mask_SORT_5 [L130] SORT_5 next_51_arg_1 = var_50; [L131] SORT_5 var_52_arg_0 = state_31; [L132] SORT_5 var_52_arg_1 = state_19; [L133] SORT_5 var_52_arg_2 = state_21; [L134] SORT_5 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L135] SORT_5 next_53_arg_1 = var_52; [L136] SORT_1 var_55_arg_0 = input_3; [L137] SORT_1 var_55_arg_1 = var_54; [L138] SORT_5 var_55 = var_55_arg_0 < var_55_arg_1; [L139] SORT_5 var_56_arg_0 = state_21; [L140] SORT_5 var_56_arg_1 = var_55; [L141] SORT_5 var_56 = var_56_arg_0 & var_56_arg_1; [L142] SORT_5 var_57_arg_0 = state_31; [L143] SORT_5 var_57_arg_1 = var_56; [L144] SORT_5 var_57_arg_2 = state_23; [L145] SORT_5 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L146] var_57 = var_57 & mask_SORT_5 [L147] SORT_5 next_58_arg_1 = var_57; [L148] SORT_5 var_59_arg_0 = state_31; [L149] SORT_5 var_59_arg_1 = state_23; [L150] SORT_5 var_59_arg_2 = state_25; [L151] SORT_5 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L152] SORT_5 next_60_arg_1 = var_59; [L153] SORT_1 var_61_arg_0 = input_3; [L154] SORT_1 var_61_arg_1 = var_54; [L155] SORT_5 var_61 = var_61_arg_0 < var_61_arg_1; [L156] SORT_5 var_62_arg_0 = var_61; [L157] SORT_5 var_62 = ~var_62_arg_0; [L158] SORT_5 var_63_arg_0 = state_21; [L159] SORT_5 var_63_arg_1 = var_62; [L160] SORT_5 var_63 = var_63_arg_0 & var_63_arg_1; [L161] SORT_5 var_64_arg_0 = state_25; [L162] SORT_5 var_64_arg_1 = var_63; [L163] SORT_5 var_64 = var_64_arg_0 | var_64_arg_1; [L164] SORT_5 var_65_arg_0 = state_31; [L165] SORT_5 var_65_arg_1 = var_64; [L166] SORT_5 var_65_arg_2 = state_27; [L167] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L168] SORT_5 next_66_arg_1 = var_65; [L169] SORT_1 var_67_arg_0 = state_34; [L170] SORT_1 var_67_arg_1 = state_36; [L171] SORT_1 var_67 = var_67_arg_0 + var_67_arg_1; [L172] var_67 = var_67 & mask_SORT_1 [L173] SORT_1 var_68_arg_0 = var_67; [L174] SORT_1 var_68_arg_1 = var_42; [L175] SORT_5 var_68 = var_68_arg_0 != var_68_arg_1; [L176] SORT_5 var_69_arg_0 = state_27; [L177] SORT_5 var_69_arg_1 = var_68; [L178] SORT_5 var_69 = var_69_arg_0 & var_69_arg_1; [L179] SORT_5 var_70_arg_0 = state_29; [L180] SORT_5 var_70_arg_1 = var_69; [L181] SORT_5 var_70 = var_70_arg_0 | var_70_arg_1; [L182] SORT_5 var_71_arg_0 = state_31; [L183] SORT_5 var_71_arg_1 = var_70; [L184] SORT_5 var_71_arg_2 = state_29; [L185] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L186] SORT_5 next_72_arg_1 = var_71; [L187] SORT_5 var_73_arg_0 = state_19; [L188] SORT_5 var_73 = ~var_73_arg_0; [L189] SORT_5 var_74_arg_0 = state_17; [L190] SORT_5 var_74_arg_1 = var_73; [L191] SORT_5 var_74 = var_74_arg_0 & var_74_arg_1; [L192] SORT_5 var_75_arg_0 = state_21; [L193] SORT_5 var_75 = ~var_75_arg_0; [L194] SORT_5 var_76_arg_0 = var_74; [L195] SORT_5 var_76_arg_1 = var_75; [L196] SORT_5 var_76 = var_76_arg_0 & var_76_arg_1; [L197] SORT_5 var_77_arg_0 = state_23; [L198] SORT_5 var_77 = ~var_77_arg_0; [L199] SORT_5 var_78_arg_0 = var_76; [L200] SORT_5 var_78_arg_1 = var_77; [L201] SORT_5 var_78 = var_78_arg_0 & var_78_arg_1; [L202] SORT_5 var_79_arg_0 = state_25; [L203] SORT_5 var_79 = ~var_79_arg_0; [L204] SORT_5 var_80_arg_0 = var_78; [L205] SORT_5 var_80_arg_1 = var_79; [L206] SORT_5 var_80 = var_80_arg_0 & var_80_arg_1; [L207] SORT_5 var_81_arg_0 = state_27; [L208] SORT_5 var_81 = ~var_81_arg_0; [L209] SORT_5 var_82_arg_0 = var_80; [L210] SORT_5 var_82_arg_1 = var_81; [L211] SORT_5 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_5 var_83_arg_0 = state_29; [L213] SORT_5 var_83 = ~var_83_arg_0; [L214] SORT_5 var_84_arg_0 = var_82; [L215] SORT_5 var_84_arg_1 = var_83; [L216] SORT_5 var_84 = var_84_arg_0 & var_84_arg_1; [L217] SORT_5 var_85_arg_0 = state_8; [L218] SORT_5 var_85 = ~var_85_arg_0; [L219] SORT_5 var_86_arg_0 = var_84; [L220] SORT_5 var_86_arg_1 = var_85; [L221] SORT_5 var_86 = var_86_arg_0 & var_86_arg_1; [L222] SORT_5 var_87_arg_0 = state_17; [L223] SORT_5 var_87 = ~var_87_arg_0; [L224] SORT_5 var_88_arg_0 = var_87; [L225] SORT_5 var_88_arg_1 = state_19; [L226] SORT_5 var_88 = var_88_arg_0 & var_88_arg_1; [L227] SORT_5 var_89_arg_0 = state_21; [L228] SORT_5 var_89 = ~var_89_arg_0; [L229] SORT_5 var_90_arg_0 = var_88; [L230] SORT_5 var_90_arg_1 = var_89; [L231] SORT_5 var_90 = var_90_arg_0 & var_90_arg_1; [L232] SORT_5 var_91_arg_0 = state_23; [L233] SORT_5 var_91 = ~var_91_arg_0; [L234] SORT_5 var_92_arg_0 = var_90; [L235] SORT_5 var_92_arg_1 = var_91; [L236] SORT_5 var_92 = var_92_arg_0 & var_92_arg_1; [L237] SORT_5 var_93_arg_0 = state_25; [L238] SORT_5 var_93 = ~var_93_arg_0; [L239] SORT_5 var_94_arg_0 = var_92; [L240] SORT_5 var_94_arg_1 = var_93; [L241] SORT_5 var_94 = var_94_arg_0 & var_94_arg_1; [L242] SORT_5 var_95_arg_0 = state_27; [L243] SORT_5 var_95 = ~var_95_arg_0; [L244] SORT_5 var_96_arg_0 = var_94; [L245] SORT_5 var_96_arg_1 = var_95; [L246] SORT_5 var_96 = var_96_arg_0 & var_96_arg_1; [L247] SORT_5 var_97_arg_0 = state_29; [L248] SORT_5 var_97 = ~var_97_arg_0; [L249] SORT_5 var_98_arg_0 = var_96; [L250] SORT_5 var_98_arg_1 = var_97; [L251] SORT_5 var_98 = var_98_arg_0 & var_98_arg_1; [L252] SORT_5 var_99_arg_0 = state_8; [L253] SORT_5 var_99 = ~var_99_arg_0; [L254] SORT_5 var_100_arg_0 = var_98; [L255] SORT_5 var_100_arg_1 = var_99; [L256] SORT_5 var_100 = var_100_arg_0 & var_100_arg_1; [L257] SORT_5 var_101_arg_0 = var_86; [L258] SORT_5 var_101_arg_1 = var_100; [L259] SORT_5 var_101 = var_101_arg_0 | var_101_arg_1; [L260] SORT_5 var_102_arg_0 = state_17; [L261] SORT_5 var_102 = ~var_102_arg_0; [L262] SORT_5 var_103_arg_0 = state_19; [L263] SORT_5 var_103 = ~var_103_arg_0; [L264] SORT_5 var_104_arg_0 = var_102; [L265] SORT_5 var_104_arg_1 = var_103; [L266] SORT_5 var_104 = var_104_arg_0 & var_104_arg_1; [L267] SORT_5 var_105_arg_0 = var_104; [L268] SORT_5 var_105_arg_1 = state_21; [L269] SORT_5 var_105 = var_105_arg_0 & var_105_arg_1; [L270] SORT_5 var_106_arg_0 = state_23; [L271] SORT_5 var_106 = ~var_106_arg_0; [L272] SORT_5 var_107_arg_0 = var_105; [L273] SORT_5 var_107_arg_1 = var_106; [L274] SORT_5 var_107 = var_107_arg_0 & var_107_arg_1; [L275] SORT_5 var_108_arg_0 = state_25; [L276] SORT_5 var_108 = ~var_108_arg_0; [L277] SORT_5 var_109_arg_0 = var_107; [L278] SORT_5 var_109_arg_1 = var_108; [L279] SORT_5 var_109 = var_109_arg_0 & var_109_arg_1; [L280] SORT_5 var_110_arg_0 = state_27; [L281] SORT_5 var_110 = ~var_110_arg_0; [L282] SORT_5 var_111_arg_0 = var_109; [L283] SORT_5 var_111_arg_1 = var_110; [L284] SORT_5 var_111 = var_111_arg_0 & var_111_arg_1; [L285] SORT_5 var_112_arg_0 = state_29; [L286] SORT_5 var_112 = ~var_112_arg_0; [L287] SORT_5 var_113_arg_0 = var_111; [L288] SORT_5 var_113_arg_1 = var_112; [L289] SORT_5 var_113 = var_113_arg_0 & var_113_arg_1; [L290] SORT_5 var_114_arg_0 = state_8; [L291] SORT_5 var_114 = ~var_114_arg_0; [L292] SORT_5 var_115_arg_0 = var_113; [L293] SORT_5 var_115_arg_1 = var_114; [L294] SORT_5 var_115 = var_115_arg_0 & var_115_arg_1; [L295] SORT_5 var_116_arg_0 = var_101; [L296] SORT_5 var_116_arg_1 = var_115; [L297] SORT_5 var_116 = var_116_arg_0 | var_116_arg_1; [L298] SORT_5 var_117_arg_0 = state_17; [L299] SORT_5 var_117 = ~var_117_arg_0; [L300] SORT_5 var_118_arg_0 = state_19; [L301] SORT_5 var_118 = ~var_118_arg_0; [L302] SORT_5 var_119_arg_0 = var_117; [L303] SORT_5 var_119_arg_1 = var_118; [L304] SORT_5 var_119 = var_119_arg_0 & var_119_arg_1; [L305] SORT_5 var_120_arg_0 = state_21; [L306] SORT_5 var_120 = ~var_120_arg_0; [L307] SORT_5 var_121_arg_0 = var_119; [L308] SORT_5 var_121_arg_1 = var_120; [L309] SORT_5 var_121 = var_121_arg_0 & var_121_arg_1; [L310] SORT_5 var_122_arg_0 = var_121; [L311] SORT_5 var_122_arg_1 = state_23; [L312] SORT_5 var_122 = var_122_arg_0 & var_122_arg_1; [L313] SORT_5 var_123_arg_0 = state_25; [L314] SORT_5 var_123 = ~var_123_arg_0; [L315] SORT_5 var_124_arg_0 = var_122; [L316] SORT_5 var_124_arg_1 = var_123; [L317] SORT_5 var_124 = var_124_arg_0 & var_124_arg_1; [L318] SORT_5 var_125_arg_0 = state_27; [L319] SORT_5 var_125 = ~var_125_arg_0; [L320] SORT_5 var_126_arg_0 = var_124; [L321] SORT_5 var_126_arg_1 = var_125; [L322] SORT_5 var_126 = var_126_arg_0 & var_126_arg_1; [L323] SORT_5 var_127_arg_0 = state_29; [L324] SORT_5 var_127 = ~var_127_arg_0; [L325] SORT_5 var_128_arg_0 = var_126; [L326] SORT_5 var_128_arg_1 = var_127; [L327] SORT_5 var_128 = var_128_arg_0 & var_128_arg_1; [L328] SORT_5 var_129_arg_0 = state_8; [L329] SORT_5 var_129 = ~var_129_arg_0; [L330] SORT_5 var_130_arg_0 = var_128; [L331] SORT_5 var_130_arg_1 = var_129; [L332] SORT_5 var_130 = var_130_arg_0 & var_130_arg_1; [L333] SORT_5 var_131_arg_0 = var_116; [L334] SORT_5 var_131_arg_1 = var_130; [L335] SORT_5 var_131 = var_131_arg_0 | var_131_arg_1; [L336] SORT_5 var_132_arg_0 = state_17; [L337] SORT_5 var_132 = ~var_132_arg_0; [L338] SORT_5 var_133_arg_0 = state_19; [L339] SORT_5 var_133 = ~var_133_arg_0; [L340] SORT_5 var_134_arg_0 = var_132; [L341] SORT_5 var_134_arg_1 = var_133; [L342] SORT_5 var_134 = var_134_arg_0 & var_134_arg_1; [L343] SORT_5 var_135_arg_0 = state_21; [L344] SORT_5 var_135 = ~var_135_arg_0; [L345] SORT_5 var_136_arg_0 = var_134; [L346] SORT_5 var_136_arg_1 = var_135; [L347] SORT_5 var_136 = var_136_arg_0 & var_136_arg_1; [L348] SORT_5 var_137_arg_0 = state_23; [L349] SORT_5 var_137 = ~var_137_arg_0; [L350] SORT_5 var_138_arg_0 = var_136; [L351] SORT_5 var_138_arg_1 = var_137; [L352] SORT_5 var_138 = var_138_arg_0 & var_138_arg_1; [L353] SORT_5 var_139_arg_0 = var_138; [L354] SORT_5 var_139_arg_1 = state_25; [L355] SORT_5 var_139 = var_139_arg_0 & var_139_arg_1; [L356] SORT_5 var_140_arg_0 = state_27; [L357] SORT_5 var_140 = ~var_140_arg_0; [L358] SORT_5 var_141_arg_0 = var_139; [L359] SORT_5 var_141_arg_1 = var_140; [L360] SORT_5 var_141 = var_141_arg_0 & var_141_arg_1; [L361] SORT_5 var_142_arg_0 = state_29; [L362] SORT_5 var_142 = ~var_142_arg_0; [L363] SORT_5 var_143_arg_0 = var_141; [L364] SORT_5 var_143_arg_1 = var_142; [L365] SORT_5 var_143 = var_143_arg_0 & var_143_arg_1; [L366] SORT_5 var_144_arg_0 = state_8; [L367] SORT_5 var_144 = ~var_144_arg_0; [L368] SORT_5 var_145_arg_0 = var_143; [L369] SORT_5 var_145_arg_1 = var_144; [L370] SORT_5 var_145 = var_145_arg_0 & var_145_arg_1; [L371] SORT_5 var_146_arg_0 = var_131; [L372] SORT_5 var_146_arg_1 = var_145; [L373] SORT_5 var_146 = var_146_arg_0 | var_146_arg_1; [L374] SORT_5 var_147_arg_0 = state_17; [L375] SORT_5 var_147 = ~var_147_arg_0; [L376] SORT_5 var_148_arg_0 = state_19; [L377] SORT_5 var_148 = ~var_148_arg_0; [L378] SORT_5 var_149_arg_0 = var_147; [L379] SORT_5 var_149_arg_1 = var_148; [L380] SORT_5 var_149 = var_149_arg_0 & var_149_arg_1; [L381] SORT_5 var_150_arg_0 = state_21; [L382] SORT_5 var_150 = ~var_150_arg_0; [L383] SORT_5 var_151_arg_0 = var_149; [L384] SORT_5 var_151_arg_1 = var_150; [L385] SORT_5 var_151 = var_151_arg_0 & var_151_arg_1; [L386] SORT_5 var_152_arg_0 = state_23; [L387] SORT_5 var_152 = ~var_152_arg_0; [L388] SORT_5 var_153_arg_0 = var_151; [L389] SORT_5 var_153_arg_1 = var_152; [L390] SORT_5 var_153 = var_153_arg_0 & var_153_arg_1; [L391] SORT_5 var_154_arg_0 = state_25; [L392] SORT_5 var_154 = ~var_154_arg_0; [L393] SORT_5 var_155_arg_0 = var_153; [L394] SORT_5 var_155_arg_1 = var_154; [L395] SORT_5 var_155 = var_155_arg_0 & var_155_arg_1; [L396] SORT_5 var_156_arg_0 = var_155; [L397] SORT_5 var_156_arg_1 = state_27; [L398] SORT_5 var_156 = var_156_arg_0 & var_156_arg_1; [L399] SORT_5 var_157_arg_0 = state_29; [L400] SORT_5 var_157 = ~var_157_arg_0; [L401] SORT_5 var_158_arg_0 = var_156; [L402] SORT_5 var_158_arg_1 = var_157; [L403] SORT_5 var_158 = var_158_arg_0 & var_158_arg_1; [L404] SORT_5 var_159_arg_0 = state_8; [L405] SORT_5 var_159 = ~var_159_arg_0; [L406] SORT_5 var_160_arg_0 = var_158; [L407] SORT_5 var_160_arg_1 = var_159; [L408] SORT_5 var_160 = var_160_arg_0 & var_160_arg_1; [L409] SORT_5 var_161_arg_0 = var_146; [L410] SORT_5 var_161_arg_1 = var_160; [L411] SORT_5 var_161 = var_161_arg_0 | var_161_arg_1; [L412] SORT_5 var_162_arg_0 = state_17; [L413] SORT_5 var_162 = ~var_162_arg_0; [L414] SORT_5 var_163_arg_0 = state_19; [L415] SORT_5 var_163 = ~var_163_arg_0; [L416] SORT_5 var_164_arg_0 = var_162; [L417] SORT_5 var_164_arg_1 = var_163; [L418] SORT_5 var_164 = var_164_arg_0 & var_164_arg_1; [L419] SORT_5 var_165_arg_0 = state_21; [L420] SORT_5 var_165 = ~var_165_arg_0; [L421] SORT_5 var_166_arg_0 = var_164; [L422] SORT_5 var_166_arg_1 = var_165; [L423] SORT_5 var_166 = var_166_arg_0 & var_166_arg_1; [L424] SORT_5 var_167_arg_0 = state_23; [L425] SORT_5 var_167 = ~var_167_arg_0; [L426] SORT_5 var_168_arg_0 = var_166; [L427] SORT_5 var_168_arg_1 = var_167; [L428] SORT_5 var_168 = var_168_arg_0 & var_168_arg_1; [L429] SORT_5 var_169_arg_0 = state_25; [L430] SORT_5 var_169 = ~var_169_arg_0; [L431] SORT_5 var_170_arg_0 = var_168; [L432] SORT_5 var_170_arg_1 = var_169; [L433] SORT_5 var_170 = var_170_arg_0 & var_170_arg_1; [L434] SORT_5 var_171_arg_0 = state_27; [L435] SORT_5 var_171 = ~var_171_arg_0; [L436] SORT_5 var_172_arg_0 = var_170; [L437] SORT_5 var_172_arg_1 = var_171; [L438] SORT_5 var_172 = var_172_arg_0 & var_172_arg_1; [L439] SORT_5 var_173_arg_0 = var_172; [L440] SORT_5 var_173_arg_1 = state_29; [L441] SORT_5 var_173 = var_173_arg_0 & var_173_arg_1; [L442] SORT_5 var_174_arg_0 = state_8; [L443] SORT_5 var_174 = ~var_174_arg_0; [L444] SORT_5 var_175_arg_0 = var_173; [L445] SORT_5 var_175_arg_1 = var_174; [L446] SORT_5 var_175 = var_175_arg_0 & var_175_arg_1; [L447] SORT_5 var_176_arg_0 = var_161; [L448] SORT_5 var_176_arg_1 = var_175; [L449] SORT_5 var_176 = var_176_arg_0 | var_176_arg_1; [L450] SORT_5 var_177_arg_0 = state_17; [L451] SORT_5 var_177 = ~var_177_arg_0; [L452] SORT_5 var_178_arg_0 = state_19; [L453] SORT_5 var_178 = ~var_178_arg_0; [L454] SORT_5 var_179_arg_0 = var_177; [L455] SORT_5 var_179_arg_1 = var_178; [L456] SORT_5 var_179 = var_179_arg_0 & var_179_arg_1; [L457] SORT_5 var_180_arg_0 = state_21; [L458] SORT_5 var_180 = ~var_180_arg_0; [L459] SORT_5 var_181_arg_0 = var_179; [L460] SORT_5 var_181_arg_1 = var_180; [L461] SORT_5 var_181 = var_181_arg_0 & var_181_arg_1; [L462] SORT_5 var_182_arg_0 = state_23; [L463] SORT_5 var_182 = ~var_182_arg_0; [L464] SORT_5 var_183_arg_0 = var_181; [L465] SORT_5 var_183_arg_1 = var_182; [L466] SORT_5 var_183 = var_183_arg_0 & var_183_arg_1; [L467] SORT_5 var_184_arg_0 = state_25; [L468] SORT_5 var_184 = ~var_184_arg_0; [L469] SORT_5 var_185_arg_0 = var_183; [L470] SORT_5 var_185_arg_1 = var_184; [L471] SORT_5 var_185 = var_185_arg_0 & var_185_arg_1; [L472] SORT_5 var_186_arg_0 = state_27; [L473] SORT_5 var_186 = ~var_186_arg_0; [L474] SORT_5 var_187_arg_0 = var_185; [L475] SORT_5 var_187_arg_1 = var_186; [L476] SORT_5 var_187 = var_187_arg_0 & var_187_arg_1; [L477] SORT_5 var_188_arg_0 = state_29; [L478] SORT_5 var_188 = ~var_188_arg_0; [L479] SORT_5 var_189_arg_0 = var_187; [L480] SORT_5 var_189_arg_1 = var_188; [L481] SORT_5 var_189 = var_189_arg_0 & var_189_arg_1; [L482] SORT_5 var_190_arg_0 = var_189; [L483] SORT_5 var_190_arg_1 = state_8; [L484] SORT_5 var_190 = var_190_arg_0 & var_190_arg_1; [L485] SORT_5 var_191_arg_0 = var_176; [L486] SORT_5 var_191_arg_1 = var_190; [L487] SORT_5 var_191 = var_191_arg_0 | var_191_arg_1; [L488] var_191 = var_191 & mask_SORT_5 [L489] SORT_5 next_192_arg_1 = var_191; [L490] SORT_1 var_194_arg_0 = input_2; [L491] SORT_1 var_194_arg_1 = var_33; [L492] SORT_5 var_194 = var_194_arg_0 != var_194_arg_1; [L493] SORT_5 var_195_arg_0 = var_194; [L494] SORT_1 var_195_arg_1 = var_193; [L495] SORT_1 var_195_arg_2 = state_34; [L496] SORT_1 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L497] SORT_5 var_196_arg_0 = state_19; [L498] SORT_1 var_196_arg_1 = var_195; [L499] SORT_1 var_196_arg_2 = state_34; [L500] SORT_1 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L501] SORT_5 var_197_arg_0 = state_31; [L502] SORT_1 var_197_arg_1 = var_196; [L503] SORT_1 var_197_arg_2 = state_34; [L504] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L505] SORT_1 next_198_arg_1 = var_197; [L506] SORT_1 var_200_arg_0 = input_2; [L507] SORT_1 var_200_arg_1 = var_33; [L508] SORT_5 var_200 = var_200_arg_0 == var_200_arg_1; [L509] SORT_1 var_201_arg_0 = input_4; [L510] SORT_1 var_201_arg_1 = var_33; [L511] SORT_5 var_201 = var_201_arg_0 != var_201_arg_1; [L512] SORT_5 var_202_arg_0 = var_200; [L513] SORT_5 var_202_arg_1 = var_201; [L514] SORT_5 var_202 = var_202_arg_0 & var_202_arg_1; [L515] var_202 = var_202 & mask_SORT_5 [L516] SORT_5 var_203_arg_0 = var_202; [L517] SORT_1 var_203_arg_1 = var_199; [L518] SORT_1 var_203_arg_2 = input_4; [L519] SORT_1 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L520] SORT_5 var_204_arg_0 = state_23; [L521] SORT_1 var_204_arg_1 = var_203; [L522] SORT_1 var_204_arg_2 = state_36; [L523] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L524] SORT_5 var_205_arg_0 = state_31; [L525] SORT_1 var_205_arg_1 = var_204; [L526] SORT_1 var_205_arg_2 = state_36; [L527] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L528] SORT_1 next_206_arg_1 = var_205; [L530] state_8 = next_47_arg_1 [L531] state_17 = next_49_arg_1 [L532] state_19 = next_51_arg_1 [L533] state_21 = next_53_arg_1 [L534] state_23 = next_58_arg_1 [L535] state_25 = next_60_arg_1 [L536] state_27 = next_66_arg_1 [L537] state_29 = next_72_arg_1 [L538] state_31 = next_192_arg_1 [L539] state_34 = next_198_arg_1 [L540] state_36 = next_206_arg_1 VAL [bad_16_arg_0=0, init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=0, input_4=0, input_6=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_192_arg_1=1, next_198_arg_1=0, next_206_arg_1=0, next_47_arg_1=0, next_49_arg_1=0, next_51_arg_1=1, next_53_arg_1=0, next_58_arg_1=0, next_60_arg_1=0, next_66_arg_1=0, next_72_arg_1=0, state_17=0, state_19=1, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_10=255, var_100=0, var_100_arg_0=0, var_100_arg_1=255, var_101=1, var_101_arg_0=1, var_101_arg_1=0, var_102=254, var_102_arg_0=1, var_103=255, var_103_arg_0=0, var_104=254, var_104_arg_0=254, var_104_arg_1=255, var_105=0, var_105_arg_0=254, var_105_arg_1=0, var_106=255, var_106_arg_0=0, var_107=0, var_107_arg_0=0, var_107_arg_1=255, var_108=255, var_108_arg_0=0, var_109=0, var_109_arg_0=0, var_109_arg_1=255, var_10_arg_0=0, var_110=255, var_110_arg_0=0, var_111=0, var_111_arg_0=0, var_111_arg_1=255, var_112=255, var_112_arg_0=0, var_113=0, var_113_arg_0=0, var_113_arg_1=255, var_114=255, var_114_arg_0=0, var_115=0, var_115_arg_0=0, var_115_arg_1=255, var_116=1, var_116_arg_0=1, var_116_arg_1=0, var_117=254, var_117_arg_0=1, var_118=255, var_118_arg_0=0, var_119=254, var_119_arg_0=254, var_119_arg_1=255, var_120=255, var_120_arg_0=0, var_121=254, var_121_arg_0=254, var_121_arg_1=255, var_122=0, var_122_arg_0=254, var_122_arg_1=0, var_123=255, var_123_arg_0=0, var_124=0, var_124_arg_0=0, var_124_arg_1=255, var_125=255, var_125_arg_0=0, var_126=0, var_126_arg_0=0, var_126_arg_1=255, var_127=255, var_127_arg_0=0, var_128=0, var_128_arg_0=0, var_128_arg_1=255, var_129=255, var_129_arg_0=0, var_13=1, var_130=0, var_130_arg_0=0, var_130_arg_1=255, var_131=1, var_131_arg_0=1, var_131_arg_1=0, var_132=254, var_132_arg_0=1, var_133=255, var_133_arg_0=0, var_134=254, var_134_arg_0=254, var_134_arg_1=255, var_135=255, var_135_arg_0=0, var_136=254, var_136_arg_0=254, var_136_arg_1=255, var_137=255, var_137_arg_0=0, var_138=254, var_138_arg_0=254, var_138_arg_1=255, var_139=0, var_139_arg_0=254, var_139_arg_1=0, var_14=0, var_140=255, var_140_arg_0=0, var_141=0, var_141_arg_0=0, var_141_arg_1=255, var_142=255, var_142_arg_0=0, var_143=0, var_143_arg_0=0, var_143_arg_1=255, var_144=255, var_144_arg_0=0, var_145=0, var_145_arg_0=0, var_145_arg_1=255, var_146=1, var_146_arg_0=1, var_146_arg_1=0, var_147=254, var_147_arg_0=1, var_148=255, var_148_arg_0=0, var_149=254, var_149_arg_0=254, var_149_arg_1=255, var_14_arg_0=255, var_15=0, var_150=255, var_150_arg_0=0, var_151=254, var_151_arg_0=254, var_151_arg_1=255, var_152=255, var_152_arg_0=0, var_153=254, var_153_arg_0=254, var_153_arg_1=255, var_154=255, var_154_arg_0=0, var_155=254, var_155_arg_0=254, var_155_arg_1=255, var_156=0, var_156_arg_0=254, var_156_arg_1=0, var_157=255, var_157_arg_0=0, var_158=0, var_158_arg_0=0, var_158_arg_1=255, var_159=255, var_159_arg_0=0, var_15_arg_0=1, var_15_arg_1=0, var_160=0, var_160_arg_0=0, var_160_arg_1=255, var_161=1, var_161_arg_0=1, var_161_arg_1=0, var_162=254, var_162_arg_0=1, var_163=255, var_163_arg_0=0, var_164=254, var_164_arg_0=254, var_164_arg_1=255, var_165=255, var_165_arg_0=0, var_166=254, var_166_arg_0=254, var_166_arg_1=255, var_167=255, var_167_arg_0=0, var_168=254, var_168_arg_0=254, var_168_arg_1=255, var_169=255, var_169_arg_0=0, var_170=254, var_170_arg_0=254, var_170_arg_1=255, var_171=255, var_171_arg_0=0, var_172=254, var_172_arg_0=254, var_172_arg_1=255, var_173=0, var_173_arg_0=254, var_173_arg_1=0, var_174=255, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=0, var_177=254, var_177_arg_0=1, var_178=255, var_178_arg_0=0, var_179=254, var_179_arg_0=254, var_179_arg_1=255, var_180=255, var_180_arg_0=0, var_181=254, var_181_arg_0=254, var_181_arg_1=255, var_182=255, var_182_arg_0=0, var_183=254, var_183_arg_0=254, var_183_arg_1=255, var_184=255, var_184_arg_0=0, var_185=254, var_185_arg_0=254, var_185_arg_1=255, var_186=255, var_186_arg_0=0, var_187=254, var_187_arg_0=254, var_187_arg_1=255, var_188=255, var_188_arg_0=0, var_189=254, var_189_arg_0=254, var_189_arg_1=255, var_190=0, var_190_arg_0=254, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=0, var_193=3, var_194=0, var_194_arg_0=0, var_194_arg_1=0, var_195=0, var_195_arg_0=0, var_195_arg_1=3, var_195_arg_2=0, var_196=0, var_196_arg_0=0, var_196_arg_1=0, var_196_arg_2=0, var_197=0, var_197_arg_0=1, var_197_arg_1=0, var_197_arg_2=0, var_199=2, var_200=1, var_200_arg_0=0, var_200_arg_1=0, var_201=0, var_201_arg_0=0, var_201_arg_1=0, var_202=0, var_202_arg_0=1, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=2, var_203_arg_2=0, var_204=0, var_204_arg_0=0, var_204_arg_1=0, var_204_arg_2=0, var_205=0, var_205_arg_0=1, var_205_arg_1=0, var_205_arg_2=0, var_33=0, var_41=0, var_41_arg_0=0, var_41_arg_1=0, var_42=4, var_43=0, var_43_arg_0=0, var_43_arg_1=4, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_48=0, var_48_arg_0=1, var_48_arg_1=0, var_48_arg_2=1, var_50=1, var_50_arg_0=1, var_50_arg_1=1, var_50_arg_2=0, var_52=0, var_52_arg_0=1, var_52_arg_1=0, var_52_arg_2=0, var_54=5, var_55=1, var_55_arg_0=0, var_55_arg_1=5, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=1, var_57_arg_1=0, var_57_arg_2=0, var_59=0, var_59_arg_0=1, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=5, var_62=254, var_62_arg_0=1, var_63=0, var_63_arg_0=0, var_63_arg_1=254, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_65_arg_2=0, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_68=1, var_68_arg_0=0, var_68_arg_1=4, var_69=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=0, var_73=255, var_73_arg_0=0, var_74=1, var_74_arg_0=1, var_74_arg_1=255, var_75=255, var_75_arg_0=0, var_76=1, var_76_arg_0=1, var_76_arg_1=255, var_77=255, var_77_arg_0=0, var_78=1, var_78_arg_0=1, var_78_arg_1=255, var_79=255, var_79_arg_0=0, var_80=1, var_80_arg_0=1, var_80_arg_1=255, var_81=255, var_81_arg_0=0, var_82=1, var_82_arg_0=1, var_82_arg_1=255, var_83=255, var_83_arg_0=0, var_84=1, var_84_arg_0=1, var_84_arg_1=255, var_85=255, var_85_arg_0=0, var_86=1, var_86_arg_0=1, var_86_arg_1=255, var_87=254, var_87_arg_0=1, var_88=0, var_88_arg_0=254, var_88_arg_1=0, var_89=255, var_89_arg_0=0, var_90=0, var_90_arg_0=0, var_90_arg_1=255, var_91=255, var_91_arg_0=0, var_92=0, var_92_arg_0=0, var_92_arg_1=255, var_93=255, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=255, var_95=255, var_95_arg_0=0, var_96=0, var_96_arg_0=0, var_96_arg_1=255, var_97=255, var_97_arg_0=0, var_98=0, var_98_arg_0=0, var_98_arg_1=255, var_99=255, var_99_arg_0=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L100] RET __VERIFIER_assert(!(bad_16_arg_0)) [L102] SORT_1 var_41_arg_0 = state_34; [L103] SORT_1 var_41_arg_1 = state_36; [L104] SORT_1 var_41 = var_41_arg_0 + var_41_arg_1; [L105] var_41 = var_41 & mask_SORT_1 [L106] SORT_1 var_43_arg_0 = var_41; [L107] SORT_1 var_43_arg_1 = var_42; [L108] SORT_5 var_43 = var_43_arg_0 == var_43_arg_1; [L109] SORT_5 var_44_arg_0 = state_27; [L110] SORT_5 var_44_arg_1 = var_43; [L111] SORT_5 var_44 = var_44_arg_0 & var_44_arg_1; [L112] SORT_5 var_45_arg_0 = state_8; [L113] SORT_5 var_45_arg_1 = var_44; [L114] SORT_5 var_45 = var_45_arg_0 | var_45_arg_1; [L115] SORT_5 var_46_arg_0 = state_31; [L116] SORT_5 var_46_arg_1 = var_45; [L117] SORT_5 var_46_arg_2 = state_8; [L118] SORT_5 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L119] SORT_5 next_47_arg_1 = var_46; [L120] SORT_5 var_48_arg_0 = state_31; [L121] SORT_5 var_48_arg_1 = var_7; [L122] SORT_5 var_48_arg_2 = state_17; [L123] SORT_5 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L124] SORT_5 next_49_arg_1 = var_48; [L125] SORT_5 var_50_arg_0 = state_31; [L126] SORT_5 var_50_arg_1 = state_17; [L127] SORT_5 var_50_arg_2 = state_19; [L128] SORT_5 var_50 = var_50_arg_0 ? var_50_arg_1 : var_50_arg_2; [L129] var_50 = var_50 & mask_SORT_5 [L130] SORT_5 next_51_arg_1 = var_50; [L131] SORT_5 var_52_arg_0 = state_31; [L132] SORT_5 var_52_arg_1 = state_19; [L133] SORT_5 var_52_arg_2 = state_21; [L134] SORT_5 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L135] SORT_5 next_53_arg_1 = var_52; [L136] SORT_1 var_55_arg_0 = input_3; [L137] SORT_1 var_55_arg_1 = var_54; [L138] SORT_5 var_55 = var_55_arg_0 < var_55_arg_1; [L139] SORT_5 var_56_arg_0 = state_21; [L140] SORT_5 var_56_arg_1 = var_55; [L141] SORT_5 var_56 = var_56_arg_0 & var_56_arg_1; [L142] SORT_5 var_57_arg_0 = state_31; [L143] SORT_5 var_57_arg_1 = var_56; [L144] SORT_5 var_57_arg_2 = state_23; [L145] SORT_5 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L146] var_57 = var_57 & mask_SORT_5 [L147] SORT_5 next_58_arg_1 = var_57; [L148] SORT_5 var_59_arg_0 = state_31; [L149] SORT_5 var_59_arg_1 = state_23; [L150] SORT_5 var_59_arg_2 = state_25; [L151] SORT_5 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L152] SORT_5 next_60_arg_1 = var_59; [L153] SORT_1 var_61_arg_0 = input_3; [L154] SORT_1 var_61_arg_1 = var_54; [L155] SORT_5 var_61 = var_61_arg_0 < var_61_arg_1; [L156] SORT_5 var_62_arg_0 = var_61; [L157] SORT_5 var_62 = ~var_62_arg_0; [L158] SORT_5 var_63_arg_0 = state_21; [L159] SORT_5 var_63_arg_1 = var_62; [L160] SORT_5 var_63 = var_63_arg_0 & var_63_arg_1; [L161] SORT_5 var_64_arg_0 = state_25; [L162] SORT_5 var_64_arg_1 = var_63; [L163] SORT_5 var_64 = var_64_arg_0 | var_64_arg_1; [L164] SORT_5 var_65_arg_0 = state_31; [L165] SORT_5 var_65_arg_1 = var_64; [L166] SORT_5 var_65_arg_2 = state_27; [L167] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L168] SORT_5 next_66_arg_1 = var_65; [L169] SORT_1 var_67_arg_0 = state_34; [L170] SORT_1 var_67_arg_1 = state_36; [L171] SORT_1 var_67 = var_67_arg_0 + var_67_arg_1; [L172] var_67 = var_67 & mask_SORT_1 [L173] SORT_1 var_68_arg_0 = var_67; [L174] SORT_1 var_68_arg_1 = var_42; [L175] SORT_5 var_68 = var_68_arg_0 != var_68_arg_1; [L176] SORT_5 var_69_arg_0 = state_27; [L177] SORT_5 var_69_arg_1 = var_68; [L178] SORT_5 var_69 = var_69_arg_0 & var_69_arg_1; [L179] SORT_5 var_70_arg_0 = state_29; [L180] SORT_5 var_70_arg_1 = var_69; [L181] SORT_5 var_70 = var_70_arg_0 | var_70_arg_1; [L182] SORT_5 var_71_arg_0 = state_31; [L183] SORT_5 var_71_arg_1 = var_70; [L184] SORT_5 var_71_arg_2 = state_29; [L185] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L186] SORT_5 next_72_arg_1 = var_71; [L187] SORT_5 var_73_arg_0 = state_19; [L188] SORT_5 var_73 = ~var_73_arg_0; [L189] SORT_5 var_74_arg_0 = state_17; [L190] SORT_5 var_74_arg_1 = var_73; [L191] SORT_5 var_74 = var_74_arg_0 & var_74_arg_1; [L192] SORT_5 var_75_arg_0 = state_21; [L193] SORT_5 var_75 = ~var_75_arg_0; [L194] SORT_5 var_76_arg_0 = var_74; [L195] SORT_5 var_76_arg_1 = var_75; [L196] SORT_5 var_76 = var_76_arg_0 & var_76_arg_1; [L197] SORT_5 var_77_arg_0 = state_23; [L198] SORT_5 var_77 = ~var_77_arg_0; [L199] SORT_5 var_78_arg_0 = var_76; [L200] SORT_5 var_78_arg_1 = var_77; [L201] SORT_5 var_78 = var_78_arg_0 & var_78_arg_1; [L202] SORT_5 var_79_arg_0 = state_25; [L203] SORT_5 var_79 = ~var_79_arg_0; [L204] SORT_5 var_80_arg_0 = var_78; [L205] SORT_5 var_80_arg_1 = var_79; [L206] SORT_5 var_80 = var_80_arg_0 & var_80_arg_1; [L207] SORT_5 var_81_arg_0 = state_27; [L208] SORT_5 var_81 = ~var_81_arg_0; [L209] SORT_5 var_82_arg_0 = var_80; [L210] SORT_5 var_82_arg_1 = var_81; [L211] SORT_5 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_5 var_83_arg_0 = state_29; [L213] SORT_5 var_83 = ~var_83_arg_0; [L214] SORT_5 var_84_arg_0 = var_82; [L215] SORT_5 var_84_arg_1 = var_83; [L216] SORT_5 var_84 = var_84_arg_0 & var_84_arg_1; [L217] SORT_5 var_85_arg_0 = state_8; [L218] SORT_5 var_85 = ~var_85_arg_0; [L219] SORT_5 var_86_arg_0 = var_84; [L220] SORT_5 var_86_arg_1 = var_85; [L221] SORT_5 var_86 = var_86_arg_0 & var_86_arg_1; [L222] SORT_5 var_87_arg_0 = state_17; [L223] SORT_5 var_87 = ~var_87_arg_0; [L224] SORT_5 var_88_arg_0 = var_87; [L225] SORT_5 var_88_arg_1 = state_19; [L226] SORT_5 var_88 = var_88_arg_0 & var_88_arg_1; [L227] SORT_5 var_89_arg_0 = state_21; [L228] SORT_5 var_89 = ~var_89_arg_0; [L229] SORT_5 var_90_arg_0 = var_88; [L230] SORT_5 var_90_arg_1 = var_89; [L231] SORT_5 var_90 = var_90_arg_0 & var_90_arg_1; [L232] SORT_5 var_91_arg_0 = state_23; [L233] SORT_5 var_91 = ~var_91_arg_0; [L234] SORT_5 var_92_arg_0 = var_90; [L235] SORT_5 var_92_arg_1 = var_91; [L236] SORT_5 var_92 = var_92_arg_0 & var_92_arg_1; [L237] SORT_5 var_93_arg_0 = state_25; [L238] SORT_5 var_93 = ~var_93_arg_0; [L239] SORT_5 var_94_arg_0 = var_92; [L240] SORT_5 var_94_arg_1 = var_93; [L241] SORT_5 var_94 = var_94_arg_0 & var_94_arg_1; [L242] SORT_5 var_95_arg_0 = state_27; [L243] SORT_5 var_95 = ~var_95_arg_0; [L244] SORT_5 var_96_arg_0 = var_94; [L245] SORT_5 var_96_arg_1 = var_95; [L246] SORT_5 var_96 = var_96_arg_0 & var_96_arg_1; [L247] SORT_5 var_97_arg_0 = state_29; [L248] SORT_5 var_97 = ~var_97_arg_0; [L249] SORT_5 var_98_arg_0 = var_96; [L250] SORT_5 var_98_arg_1 = var_97; [L251] SORT_5 var_98 = var_98_arg_0 & var_98_arg_1; [L252] SORT_5 var_99_arg_0 = state_8; [L253] SORT_5 var_99 = ~var_99_arg_0; [L254] SORT_5 var_100_arg_0 = var_98; [L255] SORT_5 var_100_arg_1 = var_99; [L256] SORT_5 var_100 = var_100_arg_0 & var_100_arg_1; [L257] SORT_5 var_101_arg_0 = var_86; [L258] SORT_5 var_101_arg_1 = var_100; [L259] SORT_5 var_101 = var_101_arg_0 | var_101_arg_1; [L260] SORT_5 var_102_arg_0 = state_17; [L261] SORT_5 var_102 = ~var_102_arg_0; [L262] SORT_5 var_103_arg_0 = state_19; [L263] SORT_5 var_103 = ~var_103_arg_0; [L264] SORT_5 var_104_arg_0 = var_102; [L265] SORT_5 var_104_arg_1 = var_103; [L266] SORT_5 var_104 = var_104_arg_0 & var_104_arg_1; [L267] SORT_5 var_105_arg_0 = var_104; [L268] SORT_5 var_105_arg_1 = state_21; [L269] SORT_5 var_105 = var_105_arg_0 & var_105_arg_1; [L270] SORT_5 var_106_arg_0 = state_23; [L271] SORT_5 var_106 = ~var_106_arg_0; [L272] SORT_5 var_107_arg_0 = var_105; [L273] SORT_5 var_107_arg_1 = var_106; [L274] SORT_5 var_107 = var_107_arg_0 & var_107_arg_1; [L275] SORT_5 var_108_arg_0 = state_25; [L276] SORT_5 var_108 = ~var_108_arg_0; [L277] SORT_5 var_109_arg_0 = var_107; [L278] SORT_5 var_109_arg_1 = var_108; [L279] SORT_5 var_109 = var_109_arg_0 & var_109_arg_1; [L280] SORT_5 var_110_arg_0 = state_27; [L281] SORT_5 var_110 = ~var_110_arg_0; [L282] SORT_5 var_111_arg_0 = var_109; [L283] SORT_5 var_111_arg_1 = var_110; [L284] SORT_5 var_111 = var_111_arg_0 & var_111_arg_1; [L285] SORT_5 var_112_arg_0 = state_29; [L286] SORT_5 var_112 = ~var_112_arg_0; [L287] SORT_5 var_113_arg_0 = var_111; [L288] SORT_5 var_113_arg_1 = var_112; [L289] SORT_5 var_113 = var_113_arg_0 & var_113_arg_1; [L290] SORT_5 var_114_arg_0 = state_8; [L291] SORT_5 var_114 = ~var_114_arg_0; [L292] SORT_5 var_115_arg_0 = var_113; [L293] SORT_5 var_115_arg_1 = var_114; [L294] SORT_5 var_115 = var_115_arg_0 & var_115_arg_1; [L295] SORT_5 var_116_arg_0 = var_101; [L296] SORT_5 var_116_arg_1 = var_115; [L297] SORT_5 var_116 = var_116_arg_0 | var_116_arg_1; [L298] SORT_5 var_117_arg_0 = state_17; [L299] SORT_5 var_117 = ~var_117_arg_0; [L300] SORT_5 var_118_arg_0 = state_19; [L301] SORT_5 var_118 = ~var_118_arg_0; [L302] SORT_5 var_119_arg_0 = var_117; [L303] SORT_5 var_119_arg_1 = var_118; [L304] SORT_5 var_119 = var_119_arg_0 & var_119_arg_1; [L305] SORT_5 var_120_arg_0 = state_21; [L306] SORT_5 var_120 = ~var_120_arg_0; [L307] SORT_5 var_121_arg_0 = var_119; [L308] SORT_5 var_121_arg_1 = var_120; [L309] SORT_5 var_121 = var_121_arg_0 & var_121_arg_1; [L310] SORT_5 var_122_arg_0 = var_121; [L311] SORT_5 var_122_arg_1 = state_23; [L312] SORT_5 var_122 = var_122_arg_0 & var_122_arg_1; [L313] SORT_5 var_123_arg_0 = state_25; [L314] SORT_5 var_123 = ~var_123_arg_0; [L315] SORT_5 var_124_arg_0 = var_122; [L316] SORT_5 var_124_arg_1 = var_123; [L317] SORT_5 var_124 = var_124_arg_0 & var_124_arg_1; [L318] SORT_5 var_125_arg_0 = state_27; [L319] SORT_5 var_125 = ~var_125_arg_0; [L320] SORT_5 var_126_arg_0 = var_124; [L321] SORT_5 var_126_arg_1 = var_125; [L322] SORT_5 var_126 = var_126_arg_0 & var_126_arg_1; [L323] SORT_5 var_127_arg_0 = state_29; [L324] SORT_5 var_127 = ~var_127_arg_0; [L325] SORT_5 var_128_arg_0 = var_126; [L326] SORT_5 var_128_arg_1 = var_127; [L327] SORT_5 var_128 = var_128_arg_0 & var_128_arg_1; [L328] SORT_5 var_129_arg_0 = state_8; [L329] SORT_5 var_129 = ~var_129_arg_0; [L330] SORT_5 var_130_arg_0 = var_128; [L331] SORT_5 var_130_arg_1 = var_129; [L332] SORT_5 var_130 = var_130_arg_0 & var_130_arg_1; [L333] SORT_5 var_131_arg_0 = var_116; [L334] SORT_5 var_131_arg_1 = var_130; [L335] SORT_5 var_131 = var_131_arg_0 | var_131_arg_1; [L336] SORT_5 var_132_arg_0 = state_17; [L337] SORT_5 var_132 = ~var_132_arg_0; [L338] SORT_5 var_133_arg_0 = state_19; [L339] SORT_5 var_133 = ~var_133_arg_0; [L340] SORT_5 var_134_arg_0 = var_132; [L341] SORT_5 var_134_arg_1 = var_133; [L342] SORT_5 var_134 = var_134_arg_0 & var_134_arg_1; [L343] SORT_5 var_135_arg_0 = state_21; [L344] SORT_5 var_135 = ~var_135_arg_0; [L345] SORT_5 var_136_arg_0 = var_134; [L346] SORT_5 var_136_arg_1 = var_135; [L347] SORT_5 var_136 = var_136_arg_0 & var_136_arg_1; [L348] SORT_5 var_137_arg_0 = state_23; [L349] SORT_5 var_137 = ~var_137_arg_0; [L350] SORT_5 var_138_arg_0 = var_136; [L351] SORT_5 var_138_arg_1 = var_137; [L352] SORT_5 var_138 = var_138_arg_0 & var_138_arg_1; [L353] SORT_5 var_139_arg_0 = var_138; [L354] SORT_5 var_139_arg_1 = state_25; [L355] SORT_5 var_139 = var_139_arg_0 & var_139_arg_1; [L356] SORT_5 var_140_arg_0 = state_27; [L357] SORT_5 var_140 = ~var_140_arg_0; [L358] SORT_5 var_141_arg_0 = var_139; [L359] SORT_5 var_141_arg_1 = var_140; [L360] SORT_5 var_141 = var_141_arg_0 & var_141_arg_1; [L361] SORT_5 var_142_arg_0 = state_29; [L362] SORT_5 var_142 = ~var_142_arg_0; [L363] SORT_5 var_143_arg_0 = var_141; [L364] SORT_5 var_143_arg_1 = var_142; [L365] SORT_5 var_143 = var_143_arg_0 & var_143_arg_1; [L366] SORT_5 var_144_arg_0 = state_8; [L367] SORT_5 var_144 = ~var_144_arg_0; [L368] SORT_5 var_145_arg_0 = var_143; [L369] SORT_5 var_145_arg_1 = var_144; [L370] SORT_5 var_145 = var_145_arg_0 & var_145_arg_1; [L371] SORT_5 var_146_arg_0 = var_131; [L372] SORT_5 var_146_arg_1 = var_145; [L373] SORT_5 var_146 = var_146_arg_0 | var_146_arg_1; [L374] SORT_5 var_147_arg_0 = state_17; [L375] SORT_5 var_147 = ~var_147_arg_0; [L376] SORT_5 var_148_arg_0 = state_19; [L377] SORT_5 var_148 = ~var_148_arg_0; [L378] SORT_5 var_149_arg_0 = var_147; [L379] SORT_5 var_149_arg_1 = var_148; [L380] SORT_5 var_149 = var_149_arg_0 & var_149_arg_1; [L381] SORT_5 var_150_arg_0 = state_21; [L382] SORT_5 var_150 = ~var_150_arg_0; [L383] SORT_5 var_151_arg_0 = var_149; [L384] SORT_5 var_151_arg_1 = var_150; [L385] SORT_5 var_151 = var_151_arg_0 & var_151_arg_1; [L386] SORT_5 var_152_arg_0 = state_23; [L387] SORT_5 var_152 = ~var_152_arg_0; [L388] SORT_5 var_153_arg_0 = var_151; [L389] SORT_5 var_153_arg_1 = var_152; [L390] SORT_5 var_153 = var_153_arg_0 & var_153_arg_1; [L391] SORT_5 var_154_arg_0 = state_25; [L392] SORT_5 var_154 = ~var_154_arg_0; [L393] SORT_5 var_155_arg_0 = var_153; [L394] SORT_5 var_155_arg_1 = var_154; [L395] SORT_5 var_155 = var_155_arg_0 & var_155_arg_1; [L396] SORT_5 var_156_arg_0 = var_155; [L397] SORT_5 var_156_arg_1 = state_27; [L398] SORT_5 var_156 = var_156_arg_0 & var_156_arg_1; [L399] SORT_5 var_157_arg_0 = state_29; [L400] SORT_5 var_157 = ~var_157_arg_0; [L401] SORT_5 var_158_arg_0 = var_156; [L402] SORT_5 var_158_arg_1 = var_157; [L403] SORT_5 var_158 = var_158_arg_0 & var_158_arg_1; [L404] SORT_5 var_159_arg_0 = state_8; [L405] SORT_5 var_159 = ~var_159_arg_0; [L406] SORT_5 var_160_arg_0 = var_158; [L407] SORT_5 var_160_arg_1 = var_159; [L408] SORT_5 var_160 = var_160_arg_0 & var_160_arg_1; [L409] SORT_5 var_161_arg_0 = var_146; [L410] SORT_5 var_161_arg_1 = var_160; [L411] SORT_5 var_161 = var_161_arg_0 | var_161_arg_1; [L412] SORT_5 var_162_arg_0 = state_17; [L413] SORT_5 var_162 = ~var_162_arg_0; [L414] SORT_5 var_163_arg_0 = state_19; [L415] SORT_5 var_163 = ~var_163_arg_0; [L416] SORT_5 var_164_arg_0 = var_162; [L417] SORT_5 var_164_arg_1 = var_163; [L418] SORT_5 var_164 = var_164_arg_0 & var_164_arg_1; [L419] SORT_5 var_165_arg_0 = state_21; [L420] SORT_5 var_165 = ~var_165_arg_0; [L421] SORT_5 var_166_arg_0 = var_164; [L422] SORT_5 var_166_arg_1 = var_165; [L423] SORT_5 var_166 = var_166_arg_0 & var_166_arg_1; [L424] SORT_5 var_167_arg_0 = state_23; [L425] SORT_5 var_167 = ~var_167_arg_0; [L426] SORT_5 var_168_arg_0 = var_166; [L427] SORT_5 var_168_arg_1 = var_167; [L428] SORT_5 var_168 = var_168_arg_0 & var_168_arg_1; [L429] SORT_5 var_169_arg_0 = state_25; [L430] SORT_5 var_169 = ~var_169_arg_0; [L431] SORT_5 var_170_arg_0 = var_168; [L432] SORT_5 var_170_arg_1 = var_169; [L433] SORT_5 var_170 = var_170_arg_0 & var_170_arg_1; [L434] SORT_5 var_171_arg_0 = state_27; [L435] SORT_5 var_171 = ~var_171_arg_0; [L436] SORT_5 var_172_arg_0 = var_170; [L437] SORT_5 var_172_arg_1 = var_171; [L438] SORT_5 var_172 = var_172_arg_0 & var_172_arg_1; [L439] SORT_5 var_173_arg_0 = var_172; [L440] SORT_5 var_173_arg_1 = state_29; [L441] SORT_5 var_173 = var_173_arg_0 & var_173_arg_1; [L442] SORT_5 var_174_arg_0 = state_8; [L443] SORT_5 var_174 = ~var_174_arg_0; [L444] SORT_5 var_175_arg_0 = var_173; [L445] SORT_5 var_175_arg_1 = var_174; [L446] SORT_5 var_175 = var_175_arg_0 & var_175_arg_1; [L447] SORT_5 var_176_arg_0 = var_161; [L448] SORT_5 var_176_arg_1 = var_175; [L449] SORT_5 var_176 = var_176_arg_0 | var_176_arg_1; [L450] SORT_5 var_177_arg_0 = state_17; [L451] SORT_5 var_177 = ~var_177_arg_0; [L452] SORT_5 var_178_arg_0 = state_19; [L453] SORT_5 var_178 = ~var_178_arg_0; [L454] SORT_5 var_179_arg_0 = var_177; [L455] SORT_5 var_179_arg_1 = var_178; [L456] SORT_5 var_179 = var_179_arg_0 & var_179_arg_1; [L457] SORT_5 var_180_arg_0 = state_21; [L458] SORT_5 var_180 = ~var_180_arg_0; [L459] SORT_5 var_181_arg_0 = var_179; [L460] SORT_5 var_181_arg_1 = var_180; [L461] SORT_5 var_181 = var_181_arg_0 & var_181_arg_1; [L462] SORT_5 var_182_arg_0 = state_23; [L463] SORT_5 var_182 = ~var_182_arg_0; [L464] SORT_5 var_183_arg_0 = var_181; [L465] SORT_5 var_183_arg_1 = var_182; [L466] SORT_5 var_183 = var_183_arg_0 & var_183_arg_1; [L467] SORT_5 var_184_arg_0 = state_25; [L468] SORT_5 var_184 = ~var_184_arg_0; [L469] SORT_5 var_185_arg_0 = var_183; [L470] SORT_5 var_185_arg_1 = var_184; [L471] SORT_5 var_185 = var_185_arg_0 & var_185_arg_1; [L472] SORT_5 var_186_arg_0 = state_27; [L473] SORT_5 var_186 = ~var_186_arg_0; [L474] SORT_5 var_187_arg_0 = var_185; [L475] SORT_5 var_187_arg_1 = var_186; [L476] SORT_5 var_187 = var_187_arg_0 & var_187_arg_1; [L477] SORT_5 var_188_arg_0 = state_29; [L478] SORT_5 var_188 = ~var_188_arg_0; [L479] SORT_5 var_189_arg_0 = var_187; [L480] SORT_5 var_189_arg_1 = var_188; [L481] SORT_5 var_189 = var_189_arg_0 & var_189_arg_1; [L482] SORT_5 var_190_arg_0 = var_189; [L483] SORT_5 var_190_arg_1 = state_8; [L484] SORT_5 var_190 = var_190_arg_0 & var_190_arg_1; [L485] SORT_5 var_191_arg_0 = var_176; [L486] SORT_5 var_191_arg_1 = var_190; [L487] SORT_5 var_191 = var_191_arg_0 | var_191_arg_1; [L488] var_191 = var_191 & mask_SORT_5 [L489] SORT_5 next_192_arg_1 = var_191; [L490] SORT_1 var_194_arg_0 = input_2; [L491] SORT_1 var_194_arg_1 = var_33; [L492] SORT_5 var_194 = var_194_arg_0 != var_194_arg_1; [L493] SORT_5 var_195_arg_0 = var_194; [L494] SORT_1 var_195_arg_1 = var_193; [L495] SORT_1 var_195_arg_2 = state_34; [L496] SORT_1 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L497] SORT_5 var_196_arg_0 = state_19; [L498] SORT_1 var_196_arg_1 = var_195; [L499] SORT_1 var_196_arg_2 = state_34; [L500] SORT_1 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L501] SORT_5 var_197_arg_0 = state_31; [L502] SORT_1 var_197_arg_1 = var_196; [L503] SORT_1 var_197_arg_2 = state_34; [L504] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L505] SORT_1 next_198_arg_1 = var_197; [L506] SORT_1 var_200_arg_0 = input_2; [L507] SORT_1 var_200_arg_1 = var_33; [L508] SORT_5 var_200 = var_200_arg_0 == var_200_arg_1; [L509] SORT_1 var_201_arg_0 = input_4; [L510] SORT_1 var_201_arg_1 = var_33; [L511] SORT_5 var_201 = var_201_arg_0 != var_201_arg_1; [L512] SORT_5 var_202_arg_0 = var_200; [L513] SORT_5 var_202_arg_1 = var_201; [L514] SORT_5 var_202 = var_202_arg_0 & var_202_arg_1; [L515] var_202 = var_202 & mask_SORT_5 [L516] SORT_5 var_203_arg_0 = var_202; [L517] SORT_1 var_203_arg_1 = var_199; [L518] SORT_1 var_203_arg_2 = input_4; [L519] SORT_1 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L520] SORT_5 var_204_arg_0 = state_23; [L521] SORT_1 var_204_arg_1 = var_203; [L522] SORT_1 var_204_arg_2 = state_36; [L523] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L524] SORT_5 var_205_arg_0 = state_31; [L525] SORT_1 var_205_arg_1 = var_204; [L526] SORT_1 var_205_arg_2 = state_36; [L527] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L528] SORT_1 next_206_arg_1 = var_205; [L530] state_8 = next_47_arg_1 [L531] state_17 = next_49_arg_1 [L532] state_19 = next_51_arg_1 [L533] state_21 = next_53_arg_1 [L534] state_23 = next_58_arg_1 [L535] state_25 = next_60_arg_1 [L536] state_27 = next_66_arg_1 [L537] state_29 = next_72_arg_1 [L538] state_31 = next_192_arg_1 [L539] state_34 = next_198_arg_1 [L540] state_36 = next_206_arg_1 VAL [bad_16_arg_0=0, init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=0, input_4=0, input_6=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_192_arg_1=1, next_198_arg_1=0, next_206_arg_1=0, next_47_arg_1=0, next_49_arg_1=0, next_51_arg_1=0, next_53_arg_1=1, next_58_arg_1=0, next_60_arg_1=0, next_66_arg_1=0, next_72_arg_1=0, state_17=0, state_19=0, state_21=1, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_10=255, var_100=1, var_100_arg_0=1, var_100_arg_1=255, var_101=1, var_101_arg_0=0, var_101_arg_1=1, var_102=255, var_102_arg_0=0, var_103=254, var_103_arg_0=1, var_104=254, var_104_arg_0=255, var_104_arg_1=254, var_105=0, var_105_arg_0=254, var_105_arg_1=0, var_106=255, var_106_arg_0=0, var_107=0, var_107_arg_0=0, var_107_arg_1=255, var_108=255, var_108_arg_0=0, var_109=0, var_109_arg_0=0, var_109_arg_1=255, var_10_arg_0=0, var_110=255, var_110_arg_0=0, var_111=0, var_111_arg_0=0, var_111_arg_1=255, var_112=255, var_112_arg_0=0, var_113=0, var_113_arg_0=0, var_113_arg_1=255, var_114=255, var_114_arg_0=0, var_115=0, var_115_arg_0=0, var_115_arg_1=255, var_116=1, var_116_arg_0=1, var_116_arg_1=0, var_117=255, var_117_arg_0=0, var_118=254, var_118_arg_0=1, var_119=254, var_119_arg_0=255, var_119_arg_1=254, var_120=255, var_120_arg_0=0, var_121=254, var_121_arg_0=254, var_121_arg_1=255, var_122=0, var_122_arg_0=254, var_122_arg_1=0, var_123=255, var_123_arg_0=0, var_124=0, var_124_arg_0=0, var_124_arg_1=255, var_125=255, var_125_arg_0=0, var_126=0, var_126_arg_0=0, var_126_arg_1=255, var_127=255, var_127_arg_0=0, var_128=0, var_128_arg_0=0, var_128_arg_1=255, var_129=255, var_129_arg_0=0, var_13=1, var_130=0, var_130_arg_0=0, var_130_arg_1=255, var_131=1, var_131_arg_0=1, var_131_arg_1=0, var_132=255, var_132_arg_0=0, var_133=254, var_133_arg_0=1, var_134=254, var_134_arg_0=255, var_134_arg_1=254, var_135=255, var_135_arg_0=0, var_136=254, var_136_arg_0=254, var_136_arg_1=255, var_137=255, var_137_arg_0=0, var_138=254, var_138_arg_0=254, var_138_arg_1=255, var_139=0, var_139_arg_0=254, var_139_arg_1=0, var_14=0, var_140=255, var_140_arg_0=0, var_141=0, var_141_arg_0=0, var_141_arg_1=255, var_142=255, var_142_arg_0=0, var_143=0, var_143_arg_0=0, var_143_arg_1=255, var_144=255, var_144_arg_0=0, var_145=0, var_145_arg_0=0, var_145_arg_1=255, var_146=1, var_146_arg_0=1, var_146_arg_1=0, var_147=255, var_147_arg_0=0, var_148=254, var_148_arg_0=1, var_149=254, var_149_arg_0=255, var_149_arg_1=254, var_14_arg_0=255, var_15=0, var_150=255, var_150_arg_0=0, var_151=254, var_151_arg_0=254, var_151_arg_1=255, var_152=255, var_152_arg_0=0, var_153=254, var_153_arg_0=254, var_153_arg_1=255, var_154=255, var_154_arg_0=0, var_155=254, var_155_arg_0=254, var_155_arg_1=255, var_156=0, var_156_arg_0=254, var_156_arg_1=0, var_157=255, var_157_arg_0=0, var_158=0, var_158_arg_0=0, var_158_arg_1=255, var_159=255, var_159_arg_0=0, var_15_arg_0=1, var_15_arg_1=0, var_160=0, var_160_arg_0=0, var_160_arg_1=255, var_161=1, var_161_arg_0=1, var_161_arg_1=0, var_162=255, var_162_arg_0=0, var_163=254, var_163_arg_0=1, var_164=254, var_164_arg_0=255, var_164_arg_1=254, var_165=255, var_165_arg_0=0, var_166=254, var_166_arg_0=254, var_166_arg_1=255, var_167=255, var_167_arg_0=0, var_168=254, var_168_arg_0=254, var_168_arg_1=255, var_169=255, var_169_arg_0=0, var_170=254, var_170_arg_0=254, var_170_arg_1=255, var_171=255, var_171_arg_0=0, var_172=254, var_172_arg_0=254, var_172_arg_1=255, var_173=0, var_173_arg_0=254, var_173_arg_1=0, var_174=255, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=0, var_177=255, var_177_arg_0=0, var_178=254, var_178_arg_0=1, var_179=254, var_179_arg_0=255, var_179_arg_1=254, var_180=255, var_180_arg_0=0, var_181=254, var_181_arg_0=254, var_181_arg_1=255, var_182=255, var_182_arg_0=0, var_183=254, var_183_arg_0=254, var_183_arg_1=255, var_184=255, var_184_arg_0=0, var_185=254, var_185_arg_0=254, var_185_arg_1=255, var_186=255, var_186_arg_0=0, var_187=254, var_187_arg_0=254, var_187_arg_1=255, var_188=255, var_188_arg_0=0, var_189=254, var_189_arg_0=254, var_189_arg_1=255, var_190=0, var_190_arg_0=254, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=0, var_193=3, var_194=0, var_194_arg_0=0, var_194_arg_1=0, var_195=0, var_195_arg_0=0, var_195_arg_1=3, var_195_arg_2=0, var_196=0, var_196_arg_0=1, var_196_arg_1=0, var_196_arg_2=0, var_197=0, var_197_arg_0=1, var_197_arg_1=0, var_197_arg_2=0, var_199=2, var_200=1, var_200_arg_0=0, var_200_arg_1=0, var_201=0, var_201_arg_0=0, var_201_arg_1=0, var_202=0, var_202_arg_0=1, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=2, var_203_arg_2=0, var_204=0, var_204_arg_0=0, var_204_arg_1=0, var_204_arg_2=0, var_205=0, var_205_arg_0=1, var_205_arg_1=0, var_205_arg_2=0, var_33=0, var_41=0, var_41_arg_0=0, var_41_arg_1=0, var_42=4, var_43=0, var_43_arg_0=0, var_43_arg_1=4, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_48=0, var_48_arg_0=1, var_48_arg_1=0, var_48_arg_2=0, var_50=0, var_50_arg_0=1, var_50_arg_1=0, var_50_arg_2=1, var_52=1, var_52_arg_0=1, var_52_arg_1=1, var_52_arg_2=0, var_54=5, var_55=1, var_55_arg_0=0, var_55_arg_1=5, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=1, var_57_arg_1=0, var_57_arg_2=0, var_59=0, var_59_arg_0=1, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=5, var_62=254, var_62_arg_0=1, var_63=0, var_63_arg_0=0, var_63_arg_1=254, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_65_arg_2=0, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_68=1, var_68_arg_0=0, var_68_arg_1=4, var_69=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=0, var_73=254, var_73_arg_0=1, var_74=0, var_74_arg_0=0, var_74_arg_1=254, var_75=255, var_75_arg_0=0, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=255, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=255, var_79=255, var_79_arg_0=0, var_80=0, var_80_arg_0=0, var_80_arg_1=255, var_81=255, var_81_arg_0=0, var_82=0, var_82_arg_0=0, var_82_arg_1=255, var_83=255, var_83_arg_0=0, var_84=0, var_84_arg_0=0, var_84_arg_1=255, var_85=255, var_85_arg_0=0, var_86=0, var_86_arg_0=0, var_86_arg_1=255, var_87=255, var_87_arg_0=0, var_88=1, var_88_arg_0=255, var_88_arg_1=1, var_89=255, var_89_arg_0=0, var_90=1, var_90_arg_0=1, var_90_arg_1=255, var_91=255, var_91_arg_0=0, var_92=1, var_92_arg_0=1, var_92_arg_1=255, var_93=255, var_93_arg_0=0, var_94=1, var_94_arg_0=1, var_94_arg_1=255, var_95=255, var_95_arg_0=0, var_96=1, var_96_arg_0=1, var_96_arg_1=255, var_97=255, var_97_arg_0=0, var_98=1, var_98_arg_0=1, var_98_arg_1=255, var_99=255, var_99_arg_0=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L100] RET __VERIFIER_assert(!(bad_16_arg_0)) [L102] SORT_1 var_41_arg_0 = state_34; [L103] SORT_1 var_41_arg_1 = state_36; [L104] SORT_1 var_41 = var_41_arg_0 + var_41_arg_1; [L105] var_41 = var_41 & mask_SORT_1 [L106] SORT_1 var_43_arg_0 = var_41; [L107] SORT_1 var_43_arg_1 = var_42; [L108] SORT_5 var_43 = var_43_arg_0 == var_43_arg_1; [L109] SORT_5 var_44_arg_0 = state_27; [L110] SORT_5 var_44_arg_1 = var_43; [L111] SORT_5 var_44 = var_44_arg_0 & var_44_arg_1; [L112] SORT_5 var_45_arg_0 = state_8; [L113] SORT_5 var_45_arg_1 = var_44; [L114] SORT_5 var_45 = var_45_arg_0 | var_45_arg_1; [L115] SORT_5 var_46_arg_0 = state_31; [L116] SORT_5 var_46_arg_1 = var_45; [L117] SORT_5 var_46_arg_2 = state_8; [L118] SORT_5 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L119] SORT_5 next_47_arg_1 = var_46; [L120] SORT_5 var_48_arg_0 = state_31; [L121] SORT_5 var_48_arg_1 = var_7; [L122] SORT_5 var_48_arg_2 = state_17; [L123] SORT_5 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L124] SORT_5 next_49_arg_1 = var_48; [L125] SORT_5 var_50_arg_0 = state_31; [L126] SORT_5 var_50_arg_1 = state_17; [L127] SORT_5 var_50_arg_2 = state_19; [L128] SORT_5 var_50 = var_50_arg_0 ? var_50_arg_1 : var_50_arg_2; [L129] var_50 = var_50 & mask_SORT_5 [L130] SORT_5 next_51_arg_1 = var_50; [L131] SORT_5 var_52_arg_0 = state_31; [L132] SORT_5 var_52_arg_1 = state_19; [L133] SORT_5 var_52_arg_2 = state_21; [L134] SORT_5 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L135] SORT_5 next_53_arg_1 = var_52; [L136] SORT_1 var_55_arg_0 = input_3; [L137] SORT_1 var_55_arg_1 = var_54; [L138] SORT_5 var_55 = var_55_arg_0 < var_55_arg_1; [L139] SORT_5 var_56_arg_0 = state_21; [L140] SORT_5 var_56_arg_1 = var_55; [L141] SORT_5 var_56 = var_56_arg_0 & var_56_arg_1; [L142] SORT_5 var_57_arg_0 = state_31; [L143] SORT_5 var_57_arg_1 = var_56; [L144] SORT_5 var_57_arg_2 = state_23; [L145] SORT_5 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L146] var_57 = var_57 & mask_SORT_5 [L147] SORT_5 next_58_arg_1 = var_57; [L148] SORT_5 var_59_arg_0 = state_31; [L149] SORT_5 var_59_arg_1 = state_23; [L150] SORT_5 var_59_arg_2 = state_25; [L151] SORT_5 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L152] SORT_5 next_60_arg_1 = var_59; [L153] SORT_1 var_61_arg_0 = input_3; [L154] SORT_1 var_61_arg_1 = var_54; [L155] SORT_5 var_61 = var_61_arg_0 < var_61_arg_1; [L156] SORT_5 var_62_arg_0 = var_61; [L157] SORT_5 var_62 = ~var_62_arg_0; [L158] SORT_5 var_63_arg_0 = state_21; [L159] SORT_5 var_63_arg_1 = var_62; [L160] SORT_5 var_63 = var_63_arg_0 & var_63_arg_1; [L161] SORT_5 var_64_arg_0 = state_25; [L162] SORT_5 var_64_arg_1 = var_63; [L163] SORT_5 var_64 = var_64_arg_0 | var_64_arg_1; [L164] SORT_5 var_65_arg_0 = state_31; [L165] SORT_5 var_65_arg_1 = var_64; [L166] SORT_5 var_65_arg_2 = state_27; [L167] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L168] SORT_5 next_66_arg_1 = var_65; [L169] SORT_1 var_67_arg_0 = state_34; [L170] SORT_1 var_67_arg_1 = state_36; [L171] SORT_1 var_67 = var_67_arg_0 + var_67_arg_1; [L172] var_67 = var_67 & mask_SORT_1 [L173] SORT_1 var_68_arg_0 = var_67; [L174] SORT_1 var_68_arg_1 = var_42; [L175] SORT_5 var_68 = var_68_arg_0 != var_68_arg_1; [L176] SORT_5 var_69_arg_0 = state_27; [L177] SORT_5 var_69_arg_1 = var_68; [L178] SORT_5 var_69 = var_69_arg_0 & var_69_arg_1; [L179] SORT_5 var_70_arg_0 = state_29; [L180] SORT_5 var_70_arg_1 = var_69; [L181] SORT_5 var_70 = var_70_arg_0 | var_70_arg_1; [L182] SORT_5 var_71_arg_0 = state_31; [L183] SORT_5 var_71_arg_1 = var_70; [L184] SORT_5 var_71_arg_2 = state_29; [L185] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L186] SORT_5 next_72_arg_1 = var_71; [L187] SORT_5 var_73_arg_0 = state_19; [L188] SORT_5 var_73 = ~var_73_arg_0; [L189] SORT_5 var_74_arg_0 = state_17; [L190] SORT_5 var_74_arg_1 = var_73; [L191] SORT_5 var_74 = var_74_arg_0 & var_74_arg_1; [L192] SORT_5 var_75_arg_0 = state_21; [L193] SORT_5 var_75 = ~var_75_arg_0; [L194] SORT_5 var_76_arg_0 = var_74; [L195] SORT_5 var_76_arg_1 = var_75; [L196] SORT_5 var_76 = var_76_arg_0 & var_76_arg_1; [L197] SORT_5 var_77_arg_0 = state_23; [L198] SORT_5 var_77 = ~var_77_arg_0; [L199] SORT_5 var_78_arg_0 = var_76; [L200] SORT_5 var_78_arg_1 = var_77; [L201] SORT_5 var_78 = var_78_arg_0 & var_78_arg_1; [L202] SORT_5 var_79_arg_0 = state_25; [L203] SORT_5 var_79 = ~var_79_arg_0; [L204] SORT_5 var_80_arg_0 = var_78; [L205] SORT_5 var_80_arg_1 = var_79; [L206] SORT_5 var_80 = var_80_arg_0 & var_80_arg_1; [L207] SORT_5 var_81_arg_0 = state_27; [L208] SORT_5 var_81 = ~var_81_arg_0; [L209] SORT_5 var_82_arg_0 = var_80; [L210] SORT_5 var_82_arg_1 = var_81; [L211] SORT_5 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_5 var_83_arg_0 = state_29; [L213] SORT_5 var_83 = ~var_83_arg_0; [L214] SORT_5 var_84_arg_0 = var_82; [L215] SORT_5 var_84_arg_1 = var_83; [L216] SORT_5 var_84 = var_84_arg_0 & var_84_arg_1; [L217] SORT_5 var_85_arg_0 = state_8; [L218] SORT_5 var_85 = ~var_85_arg_0; [L219] SORT_5 var_86_arg_0 = var_84; [L220] SORT_5 var_86_arg_1 = var_85; [L221] SORT_5 var_86 = var_86_arg_0 & var_86_arg_1; [L222] SORT_5 var_87_arg_0 = state_17; [L223] SORT_5 var_87 = ~var_87_arg_0; [L224] SORT_5 var_88_arg_0 = var_87; [L225] SORT_5 var_88_arg_1 = state_19; [L226] SORT_5 var_88 = var_88_arg_0 & var_88_arg_1; [L227] SORT_5 var_89_arg_0 = state_21; [L228] SORT_5 var_89 = ~var_89_arg_0; [L229] SORT_5 var_90_arg_0 = var_88; [L230] SORT_5 var_90_arg_1 = var_89; [L231] SORT_5 var_90 = var_90_arg_0 & var_90_arg_1; [L232] SORT_5 var_91_arg_0 = state_23; [L233] SORT_5 var_91 = ~var_91_arg_0; [L234] SORT_5 var_92_arg_0 = var_90; [L235] SORT_5 var_92_arg_1 = var_91; [L236] SORT_5 var_92 = var_92_arg_0 & var_92_arg_1; [L237] SORT_5 var_93_arg_0 = state_25; [L238] SORT_5 var_93 = ~var_93_arg_0; [L239] SORT_5 var_94_arg_0 = var_92; [L240] SORT_5 var_94_arg_1 = var_93; [L241] SORT_5 var_94 = var_94_arg_0 & var_94_arg_1; [L242] SORT_5 var_95_arg_0 = state_27; [L243] SORT_5 var_95 = ~var_95_arg_0; [L244] SORT_5 var_96_arg_0 = var_94; [L245] SORT_5 var_96_arg_1 = var_95; [L246] SORT_5 var_96 = var_96_arg_0 & var_96_arg_1; [L247] SORT_5 var_97_arg_0 = state_29; [L248] SORT_5 var_97 = ~var_97_arg_0; [L249] SORT_5 var_98_arg_0 = var_96; [L250] SORT_5 var_98_arg_1 = var_97; [L251] SORT_5 var_98 = var_98_arg_0 & var_98_arg_1; [L252] SORT_5 var_99_arg_0 = state_8; [L253] SORT_5 var_99 = ~var_99_arg_0; [L254] SORT_5 var_100_arg_0 = var_98; [L255] SORT_5 var_100_arg_1 = var_99; [L256] SORT_5 var_100 = var_100_arg_0 & var_100_arg_1; [L257] SORT_5 var_101_arg_0 = var_86; [L258] SORT_5 var_101_arg_1 = var_100; [L259] SORT_5 var_101 = var_101_arg_0 | var_101_arg_1; [L260] SORT_5 var_102_arg_0 = state_17; [L261] SORT_5 var_102 = ~var_102_arg_0; [L262] SORT_5 var_103_arg_0 = state_19; [L263] SORT_5 var_103 = ~var_103_arg_0; [L264] SORT_5 var_104_arg_0 = var_102; [L265] SORT_5 var_104_arg_1 = var_103; [L266] SORT_5 var_104 = var_104_arg_0 & var_104_arg_1; [L267] SORT_5 var_105_arg_0 = var_104; [L268] SORT_5 var_105_arg_1 = state_21; [L269] SORT_5 var_105 = var_105_arg_0 & var_105_arg_1; [L270] SORT_5 var_106_arg_0 = state_23; [L271] SORT_5 var_106 = ~var_106_arg_0; [L272] SORT_5 var_107_arg_0 = var_105; [L273] SORT_5 var_107_arg_1 = var_106; [L274] SORT_5 var_107 = var_107_arg_0 & var_107_arg_1; [L275] SORT_5 var_108_arg_0 = state_25; [L276] SORT_5 var_108 = ~var_108_arg_0; [L277] SORT_5 var_109_arg_0 = var_107; [L278] SORT_5 var_109_arg_1 = var_108; [L279] SORT_5 var_109 = var_109_arg_0 & var_109_arg_1; [L280] SORT_5 var_110_arg_0 = state_27; [L281] SORT_5 var_110 = ~var_110_arg_0; [L282] SORT_5 var_111_arg_0 = var_109; [L283] SORT_5 var_111_arg_1 = var_110; [L284] SORT_5 var_111 = var_111_arg_0 & var_111_arg_1; [L285] SORT_5 var_112_arg_0 = state_29; [L286] SORT_5 var_112 = ~var_112_arg_0; [L287] SORT_5 var_113_arg_0 = var_111; [L288] SORT_5 var_113_arg_1 = var_112; [L289] SORT_5 var_113 = var_113_arg_0 & var_113_arg_1; [L290] SORT_5 var_114_arg_0 = state_8; [L291] SORT_5 var_114 = ~var_114_arg_0; [L292] SORT_5 var_115_arg_0 = var_113; [L293] SORT_5 var_115_arg_1 = var_114; [L294] SORT_5 var_115 = var_115_arg_0 & var_115_arg_1; [L295] SORT_5 var_116_arg_0 = var_101; [L296] SORT_5 var_116_arg_1 = var_115; [L297] SORT_5 var_116 = var_116_arg_0 | var_116_arg_1; [L298] SORT_5 var_117_arg_0 = state_17; [L299] SORT_5 var_117 = ~var_117_arg_0; [L300] SORT_5 var_118_arg_0 = state_19; [L301] SORT_5 var_118 = ~var_118_arg_0; [L302] SORT_5 var_119_arg_0 = var_117; [L303] SORT_5 var_119_arg_1 = var_118; [L304] SORT_5 var_119 = var_119_arg_0 & var_119_arg_1; [L305] SORT_5 var_120_arg_0 = state_21; [L306] SORT_5 var_120 = ~var_120_arg_0; [L307] SORT_5 var_121_arg_0 = var_119; [L308] SORT_5 var_121_arg_1 = var_120; [L309] SORT_5 var_121 = var_121_arg_0 & var_121_arg_1; [L310] SORT_5 var_122_arg_0 = var_121; [L311] SORT_5 var_122_arg_1 = state_23; [L312] SORT_5 var_122 = var_122_arg_0 & var_122_arg_1; [L313] SORT_5 var_123_arg_0 = state_25; [L314] SORT_5 var_123 = ~var_123_arg_0; [L315] SORT_5 var_124_arg_0 = var_122; [L316] SORT_5 var_124_arg_1 = var_123; [L317] SORT_5 var_124 = var_124_arg_0 & var_124_arg_1; [L318] SORT_5 var_125_arg_0 = state_27; [L319] SORT_5 var_125 = ~var_125_arg_0; [L320] SORT_5 var_126_arg_0 = var_124; [L321] SORT_5 var_126_arg_1 = var_125; [L322] SORT_5 var_126 = var_126_arg_0 & var_126_arg_1; [L323] SORT_5 var_127_arg_0 = state_29; [L324] SORT_5 var_127 = ~var_127_arg_0; [L325] SORT_5 var_128_arg_0 = var_126; [L326] SORT_5 var_128_arg_1 = var_127; [L327] SORT_5 var_128 = var_128_arg_0 & var_128_arg_1; [L328] SORT_5 var_129_arg_0 = state_8; [L329] SORT_5 var_129 = ~var_129_arg_0; [L330] SORT_5 var_130_arg_0 = var_128; [L331] SORT_5 var_130_arg_1 = var_129; [L332] SORT_5 var_130 = var_130_arg_0 & var_130_arg_1; [L333] SORT_5 var_131_arg_0 = var_116; [L334] SORT_5 var_131_arg_1 = var_130; [L335] SORT_5 var_131 = var_131_arg_0 | var_131_arg_1; [L336] SORT_5 var_132_arg_0 = state_17; [L337] SORT_5 var_132 = ~var_132_arg_0; [L338] SORT_5 var_133_arg_0 = state_19; [L339] SORT_5 var_133 = ~var_133_arg_0; [L340] SORT_5 var_134_arg_0 = var_132; [L341] SORT_5 var_134_arg_1 = var_133; [L342] SORT_5 var_134 = var_134_arg_0 & var_134_arg_1; [L343] SORT_5 var_135_arg_0 = state_21; [L344] SORT_5 var_135 = ~var_135_arg_0; [L345] SORT_5 var_136_arg_0 = var_134; [L346] SORT_5 var_136_arg_1 = var_135; [L347] SORT_5 var_136 = var_136_arg_0 & var_136_arg_1; [L348] SORT_5 var_137_arg_0 = state_23; [L349] SORT_5 var_137 = ~var_137_arg_0; [L350] SORT_5 var_138_arg_0 = var_136; [L351] SORT_5 var_138_arg_1 = var_137; [L352] SORT_5 var_138 = var_138_arg_0 & var_138_arg_1; [L353] SORT_5 var_139_arg_0 = var_138; [L354] SORT_5 var_139_arg_1 = state_25; [L355] SORT_5 var_139 = var_139_arg_0 & var_139_arg_1; [L356] SORT_5 var_140_arg_0 = state_27; [L357] SORT_5 var_140 = ~var_140_arg_0; [L358] SORT_5 var_141_arg_0 = var_139; [L359] SORT_5 var_141_arg_1 = var_140; [L360] SORT_5 var_141 = var_141_arg_0 & var_141_arg_1; [L361] SORT_5 var_142_arg_0 = state_29; [L362] SORT_5 var_142 = ~var_142_arg_0; [L363] SORT_5 var_143_arg_0 = var_141; [L364] SORT_5 var_143_arg_1 = var_142; [L365] SORT_5 var_143 = var_143_arg_0 & var_143_arg_1; [L366] SORT_5 var_144_arg_0 = state_8; [L367] SORT_5 var_144 = ~var_144_arg_0; [L368] SORT_5 var_145_arg_0 = var_143; [L369] SORT_5 var_145_arg_1 = var_144; [L370] SORT_5 var_145 = var_145_arg_0 & var_145_arg_1; [L371] SORT_5 var_146_arg_0 = var_131; [L372] SORT_5 var_146_arg_1 = var_145; [L373] SORT_5 var_146 = var_146_arg_0 | var_146_arg_1; [L374] SORT_5 var_147_arg_0 = state_17; [L375] SORT_5 var_147 = ~var_147_arg_0; [L376] SORT_5 var_148_arg_0 = state_19; [L377] SORT_5 var_148 = ~var_148_arg_0; [L378] SORT_5 var_149_arg_0 = var_147; [L379] SORT_5 var_149_arg_1 = var_148; [L380] SORT_5 var_149 = var_149_arg_0 & var_149_arg_1; [L381] SORT_5 var_150_arg_0 = state_21; [L382] SORT_5 var_150 = ~var_150_arg_0; [L383] SORT_5 var_151_arg_0 = var_149; [L384] SORT_5 var_151_arg_1 = var_150; [L385] SORT_5 var_151 = var_151_arg_0 & var_151_arg_1; [L386] SORT_5 var_152_arg_0 = state_23; [L387] SORT_5 var_152 = ~var_152_arg_0; [L388] SORT_5 var_153_arg_0 = var_151; [L389] SORT_5 var_153_arg_1 = var_152; [L390] SORT_5 var_153 = var_153_arg_0 & var_153_arg_1; [L391] SORT_5 var_154_arg_0 = state_25; [L392] SORT_5 var_154 = ~var_154_arg_0; [L393] SORT_5 var_155_arg_0 = var_153; [L394] SORT_5 var_155_arg_1 = var_154; [L395] SORT_5 var_155 = var_155_arg_0 & var_155_arg_1; [L396] SORT_5 var_156_arg_0 = var_155; [L397] SORT_5 var_156_arg_1 = state_27; [L398] SORT_5 var_156 = var_156_arg_0 & var_156_arg_1; [L399] SORT_5 var_157_arg_0 = state_29; [L400] SORT_5 var_157 = ~var_157_arg_0; [L401] SORT_5 var_158_arg_0 = var_156; [L402] SORT_5 var_158_arg_1 = var_157; [L403] SORT_5 var_158 = var_158_arg_0 & var_158_arg_1; [L404] SORT_5 var_159_arg_0 = state_8; [L405] SORT_5 var_159 = ~var_159_arg_0; [L406] SORT_5 var_160_arg_0 = var_158; [L407] SORT_5 var_160_arg_1 = var_159; [L408] SORT_5 var_160 = var_160_arg_0 & var_160_arg_1; [L409] SORT_5 var_161_arg_0 = var_146; [L410] SORT_5 var_161_arg_1 = var_160; [L411] SORT_5 var_161 = var_161_arg_0 | var_161_arg_1; [L412] SORT_5 var_162_arg_0 = state_17; [L413] SORT_5 var_162 = ~var_162_arg_0; [L414] SORT_5 var_163_arg_0 = state_19; [L415] SORT_5 var_163 = ~var_163_arg_0; [L416] SORT_5 var_164_arg_0 = var_162; [L417] SORT_5 var_164_arg_1 = var_163; [L418] SORT_5 var_164 = var_164_arg_0 & var_164_arg_1; [L419] SORT_5 var_165_arg_0 = state_21; [L420] SORT_5 var_165 = ~var_165_arg_0; [L421] SORT_5 var_166_arg_0 = var_164; [L422] SORT_5 var_166_arg_1 = var_165; [L423] SORT_5 var_166 = var_166_arg_0 & var_166_arg_1; [L424] SORT_5 var_167_arg_0 = state_23; [L425] SORT_5 var_167 = ~var_167_arg_0; [L426] SORT_5 var_168_arg_0 = var_166; [L427] SORT_5 var_168_arg_1 = var_167; [L428] SORT_5 var_168 = var_168_arg_0 & var_168_arg_1; [L429] SORT_5 var_169_arg_0 = state_25; [L430] SORT_5 var_169 = ~var_169_arg_0; [L431] SORT_5 var_170_arg_0 = var_168; [L432] SORT_5 var_170_arg_1 = var_169; [L433] SORT_5 var_170 = var_170_arg_0 & var_170_arg_1; [L434] SORT_5 var_171_arg_0 = state_27; [L435] SORT_5 var_171 = ~var_171_arg_0; [L436] SORT_5 var_172_arg_0 = var_170; [L437] SORT_5 var_172_arg_1 = var_171; [L438] SORT_5 var_172 = var_172_arg_0 & var_172_arg_1; [L439] SORT_5 var_173_arg_0 = var_172; [L440] SORT_5 var_173_arg_1 = state_29; [L441] SORT_5 var_173 = var_173_arg_0 & var_173_arg_1; [L442] SORT_5 var_174_arg_0 = state_8; [L443] SORT_5 var_174 = ~var_174_arg_0; [L444] SORT_5 var_175_arg_0 = var_173; [L445] SORT_5 var_175_arg_1 = var_174; [L446] SORT_5 var_175 = var_175_arg_0 & var_175_arg_1; [L447] SORT_5 var_176_arg_0 = var_161; [L448] SORT_5 var_176_arg_1 = var_175; [L449] SORT_5 var_176 = var_176_arg_0 | var_176_arg_1; [L450] SORT_5 var_177_arg_0 = state_17; [L451] SORT_5 var_177 = ~var_177_arg_0; [L452] SORT_5 var_178_arg_0 = state_19; [L453] SORT_5 var_178 = ~var_178_arg_0; [L454] SORT_5 var_179_arg_0 = var_177; [L455] SORT_5 var_179_arg_1 = var_178; [L456] SORT_5 var_179 = var_179_arg_0 & var_179_arg_1; [L457] SORT_5 var_180_arg_0 = state_21; [L458] SORT_5 var_180 = ~var_180_arg_0; [L459] SORT_5 var_181_arg_0 = var_179; [L460] SORT_5 var_181_arg_1 = var_180; [L461] SORT_5 var_181 = var_181_arg_0 & var_181_arg_1; [L462] SORT_5 var_182_arg_0 = state_23; [L463] SORT_5 var_182 = ~var_182_arg_0; [L464] SORT_5 var_183_arg_0 = var_181; [L465] SORT_5 var_183_arg_1 = var_182; [L466] SORT_5 var_183 = var_183_arg_0 & var_183_arg_1; [L467] SORT_5 var_184_arg_0 = state_25; [L468] SORT_5 var_184 = ~var_184_arg_0; [L469] SORT_5 var_185_arg_0 = var_183; [L470] SORT_5 var_185_arg_1 = var_184; [L471] SORT_5 var_185 = var_185_arg_0 & var_185_arg_1; [L472] SORT_5 var_186_arg_0 = state_27; [L473] SORT_5 var_186 = ~var_186_arg_0; [L474] SORT_5 var_187_arg_0 = var_185; [L475] SORT_5 var_187_arg_1 = var_186; [L476] SORT_5 var_187 = var_187_arg_0 & var_187_arg_1; [L477] SORT_5 var_188_arg_0 = state_29; [L478] SORT_5 var_188 = ~var_188_arg_0; [L479] SORT_5 var_189_arg_0 = var_187; [L480] SORT_5 var_189_arg_1 = var_188; [L481] SORT_5 var_189 = var_189_arg_0 & var_189_arg_1; [L482] SORT_5 var_190_arg_0 = var_189; [L483] SORT_5 var_190_arg_1 = state_8; [L484] SORT_5 var_190 = var_190_arg_0 & var_190_arg_1; [L485] SORT_5 var_191_arg_0 = var_176; [L486] SORT_5 var_191_arg_1 = var_190; [L487] SORT_5 var_191 = var_191_arg_0 | var_191_arg_1; [L488] var_191 = var_191 & mask_SORT_5 [L489] SORT_5 next_192_arg_1 = var_191; [L490] SORT_1 var_194_arg_0 = input_2; [L491] SORT_1 var_194_arg_1 = var_33; [L492] SORT_5 var_194 = var_194_arg_0 != var_194_arg_1; [L493] SORT_5 var_195_arg_0 = var_194; [L494] SORT_1 var_195_arg_1 = var_193; [L495] SORT_1 var_195_arg_2 = state_34; [L496] SORT_1 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L497] SORT_5 var_196_arg_0 = state_19; [L498] SORT_1 var_196_arg_1 = var_195; [L499] SORT_1 var_196_arg_2 = state_34; [L500] SORT_1 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L501] SORT_5 var_197_arg_0 = state_31; [L502] SORT_1 var_197_arg_1 = var_196; [L503] SORT_1 var_197_arg_2 = state_34; [L504] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L505] SORT_1 next_198_arg_1 = var_197; [L506] SORT_1 var_200_arg_0 = input_2; [L507] SORT_1 var_200_arg_1 = var_33; [L508] SORT_5 var_200 = var_200_arg_0 == var_200_arg_1; [L509] SORT_1 var_201_arg_0 = input_4; [L510] SORT_1 var_201_arg_1 = var_33; [L511] SORT_5 var_201 = var_201_arg_0 != var_201_arg_1; [L512] SORT_5 var_202_arg_0 = var_200; [L513] SORT_5 var_202_arg_1 = var_201; [L514] SORT_5 var_202 = var_202_arg_0 & var_202_arg_1; [L515] var_202 = var_202 & mask_SORT_5 [L516] SORT_5 var_203_arg_0 = var_202; [L517] SORT_1 var_203_arg_1 = var_199; [L518] SORT_1 var_203_arg_2 = input_4; [L519] SORT_1 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L520] SORT_5 var_204_arg_0 = state_23; [L521] SORT_1 var_204_arg_1 = var_203; [L522] SORT_1 var_204_arg_2 = state_36; [L523] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L524] SORT_5 var_205_arg_0 = state_31; [L525] SORT_1 var_205_arg_1 = var_204; [L526] SORT_1 var_205_arg_2 = state_36; [L527] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L528] SORT_1 next_206_arg_1 = var_205; [L530] state_8 = next_47_arg_1 [L531] state_17 = next_49_arg_1 [L532] state_19 = next_51_arg_1 [L533] state_21 = next_53_arg_1 [L534] state_23 = next_58_arg_1 [L535] state_25 = next_60_arg_1 [L536] state_27 = next_66_arg_1 [L537] state_29 = next_72_arg_1 [L538] state_31 = next_192_arg_1 [L539] state_34 = next_198_arg_1 [L540] state_36 = next_206_arg_1 VAL [bad_16_arg_0=0, init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=0, input_4=0, input_6=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_192_arg_1=1, next_198_arg_1=0, next_206_arg_1=0, next_47_arg_1=0, next_49_arg_1=0, next_51_arg_1=0, next_53_arg_1=0, next_58_arg_1=1, next_60_arg_1=0, next_66_arg_1=0, next_72_arg_1=0, state_17=0, state_19=0, state_21=0, state_23=1, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=0, state_8=0, var_10=255, var_100=0, var_100_arg_0=0, var_100_arg_1=255, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_102=255, var_102_arg_0=0, var_103=255, var_103_arg_0=0, var_104=255, var_104_arg_0=255, var_104_arg_1=255, var_105=1, var_105_arg_0=255, var_105_arg_1=1, var_106=255, var_106_arg_0=0, var_107=1, var_107_arg_0=1, var_107_arg_1=255, var_108=255, var_108_arg_0=0, var_109=1, var_109_arg_0=1, var_109_arg_1=255, var_10_arg_0=0, var_110=255, var_110_arg_0=0, var_111=1, var_111_arg_0=1, var_111_arg_1=255, var_112=255, var_112_arg_0=0, var_113=1, var_113_arg_0=1, var_113_arg_1=255, var_114=255, var_114_arg_0=0, var_115=1, var_115_arg_0=1, var_115_arg_1=255, var_116=1, var_116_arg_0=0, var_116_arg_1=1, var_117=255, var_117_arg_0=0, var_118=255, var_118_arg_0=0, var_119=255, var_119_arg_0=255, var_119_arg_1=255, var_120=254, var_120_arg_0=1, var_121=254, var_121_arg_0=255, var_121_arg_1=254, var_122=0, var_122_arg_0=254, var_122_arg_1=0, var_123=255, var_123_arg_0=0, var_124=0, var_124_arg_0=0, var_124_arg_1=255, var_125=255, var_125_arg_0=0, var_126=0, var_126_arg_0=0, var_126_arg_1=255, var_127=255, var_127_arg_0=0, var_128=0, var_128_arg_0=0, var_128_arg_1=255, var_129=255, var_129_arg_0=0, var_13=1, var_130=0, var_130_arg_0=0, var_130_arg_1=255, var_131=1, var_131_arg_0=1, var_131_arg_1=0, var_132=255, var_132_arg_0=0, var_133=255, var_133_arg_0=0, var_134=255, var_134_arg_0=255, var_134_arg_1=255, var_135=254, var_135_arg_0=1, var_136=254, var_136_arg_0=255, var_136_arg_1=254, var_137=255, var_137_arg_0=0, var_138=254, var_138_arg_0=254, var_138_arg_1=255, var_139=0, var_139_arg_0=254, var_139_arg_1=0, var_14=0, var_140=255, var_140_arg_0=0, var_141=0, var_141_arg_0=0, var_141_arg_1=255, var_142=255, var_142_arg_0=0, var_143=0, var_143_arg_0=0, var_143_arg_1=255, var_144=255, var_144_arg_0=0, var_145=0, var_145_arg_0=0, var_145_arg_1=255, var_146=1, var_146_arg_0=1, var_146_arg_1=0, var_147=255, var_147_arg_0=0, var_148=255, var_148_arg_0=0, var_149=255, var_149_arg_0=255, var_149_arg_1=255, var_14_arg_0=255, var_15=0, var_150=254, var_150_arg_0=1, var_151=254, var_151_arg_0=255, var_151_arg_1=254, var_152=255, var_152_arg_0=0, var_153=254, var_153_arg_0=254, var_153_arg_1=255, var_154=255, var_154_arg_0=0, var_155=254, var_155_arg_0=254, var_155_arg_1=255, var_156=0, var_156_arg_0=254, var_156_arg_1=0, var_157=255, var_157_arg_0=0, var_158=0, var_158_arg_0=0, var_158_arg_1=255, var_159=255, var_159_arg_0=0, var_15_arg_0=1, var_15_arg_1=0, var_160=0, var_160_arg_0=0, var_160_arg_1=255, var_161=1, var_161_arg_0=1, var_161_arg_1=0, var_162=255, var_162_arg_0=0, var_163=255, var_163_arg_0=0, var_164=255, var_164_arg_0=255, var_164_arg_1=255, var_165=254, var_165_arg_0=1, var_166=254, var_166_arg_0=255, var_166_arg_1=254, var_167=255, var_167_arg_0=0, var_168=254, var_168_arg_0=254, var_168_arg_1=255, var_169=255, var_169_arg_0=0, var_170=254, var_170_arg_0=254, var_170_arg_1=255, var_171=255, var_171_arg_0=0, var_172=254, var_172_arg_0=254, var_172_arg_1=255, var_173=0, var_173_arg_0=254, var_173_arg_1=0, var_174=255, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=0, var_177=255, var_177_arg_0=0, var_178=255, var_178_arg_0=0, var_179=255, var_179_arg_0=255, var_179_arg_1=255, var_180=254, var_180_arg_0=1, var_181=254, var_181_arg_0=255, var_181_arg_1=254, var_182=255, var_182_arg_0=0, var_183=254, var_183_arg_0=254, var_183_arg_1=255, var_184=255, var_184_arg_0=0, var_185=254, var_185_arg_0=254, var_185_arg_1=255, var_186=255, var_186_arg_0=0, var_187=254, var_187_arg_0=254, var_187_arg_1=255, var_188=255, var_188_arg_0=0, var_189=254, var_189_arg_0=254, var_189_arg_1=255, var_190=0, var_190_arg_0=254, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=0, var_193=3, var_194=0, var_194_arg_0=0, var_194_arg_1=0, var_195=0, var_195_arg_0=0, var_195_arg_1=3, var_195_arg_2=0, var_196=0, var_196_arg_0=0, var_196_arg_1=0, var_196_arg_2=0, var_197=0, var_197_arg_0=1, var_197_arg_1=0, var_197_arg_2=0, var_199=2, var_200=1, var_200_arg_0=0, var_200_arg_1=0, var_201=0, var_201_arg_0=0, var_201_arg_1=0, var_202=0, var_202_arg_0=1, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=2, var_203_arg_2=0, var_204=0, var_204_arg_0=0, var_204_arg_1=0, var_204_arg_2=0, var_205=0, var_205_arg_0=1, var_205_arg_1=0, var_205_arg_2=0, var_33=0, var_41=0, var_41_arg_0=0, var_41_arg_1=0, var_42=4, var_43=0, var_43_arg_0=0, var_43_arg_1=4, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_48=0, var_48_arg_0=1, var_48_arg_1=0, var_48_arg_2=0, var_50=0, var_50_arg_0=1, var_50_arg_1=0, var_50_arg_2=0, var_52=0, var_52_arg_0=1, var_52_arg_1=0, var_52_arg_2=1, var_54=5, var_55=1, var_55_arg_0=0, var_55_arg_1=5, var_56=1, var_56_arg_0=1, var_56_arg_1=1, var_57=1, var_57_arg_0=1, var_57_arg_1=1, var_57_arg_2=0, var_59=0, var_59_arg_0=1, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=5, var_62=254, var_62_arg_0=1, var_63=0, var_63_arg_0=1, var_63_arg_1=254, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_65_arg_2=0, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_68=1, var_68_arg_0=0, var_68_arg_1=4, var_69=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=0, var_73=255, var_73_arg_0=0, var_74=0, var_74_arg_0=0, var_74_arg_1=255, var_75=254, var_75_arg_0=1, var_76=0, var_76_arg_0=0, var_76_arg_1=254, var_77=255, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=255, var_79=255, var_79_arg_0=0, var_80=0, var_80_arg_0=0, var_80_arg_1=255, var_81=255, var_81_arg_0=0, var_82=0, var_82_arg_0=0, var_82_arg_1=255, var_83=255, var_83_arg_0=0, var_84=0, var_84_arg_0=0, var_84_arg_1=255, var_85=255, var_85_arg_0=0, var_86=0, var_86_arg_0=0, var_86_arg_1=255, var_87=255, var_87_arg_0=0, var_88=0, var_88_arg_0=255, var_88_arg_1=0, var_89=254, var_89_arg_0=1, var_90=0, var_90_arg_0=0, var_90_arg_1=254, var_91=255, var_91_arg_0=0, var_92=0, var_92_arg_0=0, var_92_arg_1=255, var_93=255, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=255, var_95=255, var_95_arg_0=0, var_96=0, var_96_arg_0=0, var_96_arg_1=255, var_97=255, var_97_arg_0=0, var_98=0, var_98_arg_0=0, var_98_arg_1=255, var_99=255, var_99_arg_0=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L100] RET __VERIFIER_assert(!(bad_16_arg_0)) [L102] SORT_1 var_41_arg_0 = state_34; [L103] SORT_1 var_41_arg_1 = state_36; [L104] SORT_1 var_41 = var_41_arg_0 + var_41_arg_1; [L105] var_41 = var_41 & mask_SORT_1 [L106] SORT_1 var_43_arg_0 = var_41; [L107] SORT_1 var_43_arg_1 = var_42; [L108] SORT_5 var_43 = var_43_arg_0 == var_43_arg_1; [L109] SORT_5 var_44_arg_0 = state_27; [L110] SORT_5 var_44_arg_1 = var_43; [L111] SORT_5 var_44 = var_44_arg_0 & var_44_arg_1; [L112] SORT_5 var_45_arg_0 = state_8; [L113] SORT_5 var_45_arg_1 = var_44; [L114] SORT_5 var_45 = var_45_arg_0 | var_45_arg_1; [L115] SORT_5 var_46_arg_0 = state_31; [L116] SORT_5 var_46_arg_1 = var_45; [L117] SORT_5 var_46_arg_2 = state_8; [L118] SORT_5 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L119] SORT_5 next_47_arg_1 = var_46; [L120] SORT_5 var_48_arg_0 = state_31; [L121] SORT_5 var_48_arg_1 = var_7; [L122] SORT_5 var_48_arg_2 = state_17; [L123] SORT_5 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L124] SORT_5 next_49_arg_1 = var_48; [L125] SORT_5 var_50_arg_0 = state_31; [L126] SORT_5 var_50_arg_1 = state_17; [L127] SORT_5 var_50_arg_2 = state_19; [L128] SORT_5 var_50 = var_50_arg_0 ? var_50_arg_1 : var_50_arg_2; [L129] var_50 = var_50 & mask_SORT_5 [L130] SORT_5 next_51_arg_1 = var_50; [L131] SORT_5 var_52_arg_0 = state_31; [L132] SORT_5 var_52_arg_1 = state_19; [L133] SORT_5 var_52_arg_2 = state_21; [L134] SORT_5 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L135] SORT_5 next_53_arg_1 = var_52; [L136] SORT_1 var_55_arg_0 = input_3; [L137] SORT_1 var_55_arg_1 = var_54; [L138] SORT_5 var_55 = var_55_arg_0 < var_55_arg_1; [L139] SORT_5 var_56_arg_0 = state_21; [L140] SORT_5 var_56_arg_1 = var_55; [L141] SORT_5 var_56 = var_56_arg_0 & var_56_arg_1; [L142] SORT_5 var_57_arg_0 = state_31; [L143] SORT_5 var_57_arg_1 = var_56; [L144] SORT_5 var_57_arg_2 = state_23; [L145] SORT_5 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L146] var_57 = var_57 & mask_SORT_5 [L147] SORT_5 next_58_arg_1 = var_57; [L148] SORT_5 var_59_arg_0 = state_31; [L149] SORT_5 var_59_arg_1 = state_23; [L150] SORT_5 var_59_arg_2 = state_25; [L151] SORT_5 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L152] SORT_5 next_60_arg_1 = var_59; [L153] SORT_1 var_61_arg_0 = input_3; [L154] SORT_1 var_61_arg_1 = var_54; [L155] SORT_5 var_61 = var_61_arg_0 < var_61_arg_1; [L156] SORT_5 var_62_arg_0 = var_61; [L157] SORT_5 var_62 = ~var_62_arg_0; [L158] SORT_5 var_63_arg_0 = state_21; [L159] SORT_5 var_63_arg_1 = var_62; [L160] SORT_5 var_63 = var_63_arg_0 & var_63_arg_1; [L161] SORT_5 var_64_arg_0 = state_25; [L162] SORT_5 var_64_arg_1 = var_63; [L163] SORT_5 var_64 = var_64_arg_0 | var_64_arg_1; [L164] SORT_5 var_65_arg_0 = state_31; [L165] SORT_5 var_65_arg_1 = var_64; [L166] SORT_5 var_65_arg_2 = state_27; [L167] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L168] SORT_5 next_66_arg_1 = var_65; [L169] SORT_1 var_67_arg_0 = state_34; [L170] SORT_1 var_67_arg_1 = state_36; [L171] SORT_1 var_67 = var_67_arg_0 + var_67_arg_1; [L172] var_67 = var_67 & mask_SORT_1 [L173] SORT_1 var_68_arg_0 = var_67; [L174] SORT_1 var_68_arg_1 = var_42; [L175] SORT_5 var_68 = var_68_arg_0 != var_68_arg_1; [L176] SORT_5 var_69_arg_0 = state_27; [L177] SORT_5 var_69_arg_1 = var_68; [L178] SORT_5 var_69 = var_69_arg_0 & var_69_arg_1; [L179] SORT_5 var_70_arg_0 = state_29; [L180] SORT_5 var_70_arg_1 = var_69; [L181] SORT_5 var_70 = var_70_arg_0 | var_70_arg_1; [L182] SORT_5 var_71_arg_0 = state_31; [L183] SORT_5 var_71_arg_1 = var_70; [L184] SORT_5 var_71_arg_2 = state_29; [L185] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L186] SORT_5 next_72_arg_1 = var_71; [L187] SORT_5 var_73_arg_0 = state_19; [L188] SORT_5 var_73 = ~var_73_arg_0; [L189] SORT_5 var_74_arg_0 = state_17; [L190] SORT_5 var_74_arg_1 = var_73; [L191] SORT_5 var_74 = var_74_arg_0 & var_74_arg_1; [L192] SORT_5 var_75_arg_0 = state_21; [L193] SORT_5 var_75 = ~var_75_arg_0; [L194] SORT_5 var_76_arg_0 = var_74; [L195] SORT_5 var_76_arg_1 = var_75; [L196] SORT_5 var_76 = var_76_arg_0 & var_76_arg_1; [L197] SORT_5 var_77_arg_0 = state_23; [L198] SORT_5 var_77 = ~var_77_arg_0; [L199] SORT_5 var_78_arg_0 = var_76; [L200] SORT_5 var_78_arg_1 = var_77; [L201] SORT_5 var_78 = var_78_arg_0 & var_78_arg_1; [L202] SORT_5 var_79_arg_0 = state_25; [L203] SORT_5 var_79 = ~var_79_arg_0; [L204] SORT_5 var_80_arg_0 = var_78; [L205] SORT_5 var_80_arg_1 = var_79; [L206] SORT_5 var_80 = var_80_arg_0 & var_80_arg_1; [L207] SORT_5 var_81_arg_0 = state_27; [L208] SORT_5 var_81 = ~var_81_arg_0; [L209] SORT_5 var_82_arg_0 = var_80; [L210] SORT_5 var_82_arg_1 = var_81; [L211] SORT_5 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_5 var_83_arg_0 = state_29; [L213] SORT_5 var_83 = ~var_83_arg_0; [L214] SORT_5 var_84_arg_0 = var_82; [L215] SORT_5 var_84_arg_1 = var_83; [L216] SORT_5 var_84 = var_84_arg_0 & var_84_arg_1; [L217] SORT_5 var_85_arg_0 = state_8; [L218] SORT_5 var_85 = ~var_85_arg_0; [L219] SORT_5 var_86_arg_0 = var_84; [L220] SORT_5 var_86_arg_1 = var_85; [L221] SORT_5 var_86 = var_86_arg_0 & var_86_arg_1; [L222] SORT_5 var_87_arg_0 = state_17; [L223] SORT_5 var_87 = ~var_87_arg_0; [L224] SORT_5 var_88_arg_0 = var_87; [L225] SORT_5 var_88_arg_1 = state_19; [L226] SORT_5 var_88 = var_88_arg_0 & var_88_arg_1; [L227] SORT_5 var_89_arg_0 = state_21; [L228] SORT_5 var_89 = ~var_89_arg_0; [L229] SORT_5 var_90_arg_0 = var_88; [L230] SORT_5 var_90_arg_1 = var_89; [L231] SORT_5 var_90 = var_90_arg_0 & var_90_arg_1; [L232] SORT_5 var_91_arg_0 = state_23; [L233] SORT_5 var_91 = ~var_91_arg_0; [L234] SORT_5 var_92_arg_0 = var_90; [L235] SORT_5 var_92_arg_1 = var_91; [L236] SORT_5 var_92 = var_92_arg_0 & var_92_arg_1; [L237] SORT_5 var_93_arg_0 = state_25; [L238] SORT_5 var_93 = ~var_93_arg_0; [L239] SORT_5 var_94_arg_0 = var_92; [L240] SORT_5 var_94_arg_1 = var_93; [L241] SORT_5 var_94 = var_94_arg_0 & var_94_arg_1; [L242] SORT_5 var_95_arg_0 = state_27; [L243] SORT_5 var_95 = ~var_95_arg_0; [L244] SORT_5 var_96_arg_0 = var_94; [L245] SORT_5 var_96_arg_1 = var_95; [L246] SORT_5 var_96 = var_96_arg_0 & var_96_arg_1; [L247] SORT_5 var_97_arg_0 = state_29; [L248] SORT_5 var_97 = ~var_97_arg_0; [L249] SORT_5 var_98_arg_0 = var_96; [L250] SORT_5 var_98_arg_1 = var_97; [L251] SORT_5 var_98 = var_98_arg_0 & var_98_arg_1; [L252] SORT_5 var_99_arg_0 = state_8; [L253] SORT_5 var_99 = ~var_99_arg_0; [L254] SORT_5 var_100_arg_0 = var_98; [L255] SORT_5 var_100_arg_1 = var_99; [L256] SORT_5 var_100 = var_100_arg_0 & var_100_arg_1; [L257] SORT_5 var_101_arg_0 = var_86; [L258] SORT_5 var_101_arg_1 = var_100; [L259] SORT_5 var_101 = var_101_arg_0 | var_101_arg_1; [L260] SORT_5 var_102_arg_0 = state_17; [L261] SORT_5 var_102 = ~var_102_arg_0; [L262] SORT_5 var_103_arg_0 = state_19; [L263] SORT_5 var_103 = ~var_103_arg_0; [L264] SORT_5 var_104_arg_0 = var_102; [L265] SORT_5 var_104_arg_1 = var_103; [L266] SORT_5 var_104 = var_104_arg_0 & var_104_arg_1; [L267] SORT_5 var_105_arg_0 = var_104; [L268] SORT_5 var_105_arg_1 = state_21; [L269] SORT_5 var_105 = var_105_arg_0 & var_105_arg_1; [L270] SORT_5 var_106_arg_0 = state_23; [L271] SORT_5 var_106 = ~var_106_arg_0; [L272] SORT_5 var_107_arg_0 = var_105; [L273] SORT_5 var_107_arg_1 = var_106; [L274] SORT_5 var_107 = var_107_arg_0 & var_107_arg_1; [L275] SORT_5 var_108_arg_0 = state_25; [L276] SORT_5 var_108 = ~var_108_arg_0; [L277] SORT_5 var_109_arg_0 = var_107; [L278] SORT_5 var_109_arg_1 = var_108; [L279] SORT_5 var_109 = var_109_arg_0 & var_109_arg_1; [L280] SORT_5 var_110_arg_0 = state_27; [L281] SORT_5 var_110 = ~var_110_arg_0; [L282] SORT_5 var_111_arg_0 = var_109; [L283] SORT_5 var_111_arg_1 = var_110; [L284] SORT_5 var_111 = var_111_arg_0 & var_111_arg_1; [L285] SORT_5 var_112_arg_0 = state_29; [L286] SORT_5 var_112 = ~var_112_arg_0; [L287] SORT_5 var_113_arg_0 = var_111; [L288] SORT_5 var_113_arg_1 = var_112; [L289] SORT_5 var_113 = var_113_arg_0 & var_113_arg_1; [L290] SORT_5 var_114_arg_0 = state_8; [L291] SORT_5 var_114 = ~var_114_arg_0; [L292] SORT_5 var_115_arg_0 = var_113; [L293] SORT_5 var_115_arg_1 = var_114; [L294] SORT_5 var_115 = var_115_arg_0 & var_115_arg_1; [L295] SORT_5 var_116_arg_0 = var_101; [L296] SORT_5 var_116_arg_1 = var_115; [L297] SORT_5 var_116 = var_116_arg_0 | var_116_arg_1; [L298] SORT_5 var_117_arg_0 = state_17; [L299] SORT_5 var_117 = ~var_117_arg_0; [L300] SORT_5 var_118_arg_0 = state_19; [L301] SORT_5 var_118 = ~var_118_arg_0; [L302] SORT_5 var_119_arg_0 = var_117; [L303] SORT_5 var_119_arg_1 = var_118; [L304] SORT_5 var_119 = var_119_arg_0 & var_119_arg_1; [L305] SORT_5 var_120_arg_0 = state_21; [L306] SORT_5 var_120 = ~var_120_arg_0; [L307] SORT_5 var_121_arg_0 = var_119; [L308] SORT_5 var_121_arg_1 = var_120; [L309] SORT_5 var_121 = var_121_arg_0 & var_121_arg_1; [L310] SORT_5 var_122_arg_0 = var_121; [L311] SORT_5 var_122_arg_1 = state_23; [L312] SORT_5 var_122 = var_122_arg_0 & var_122_arg_1; [L313] SORT_5 var_123_arg_0 = state_25; [L314] SORT_5 var_123 = ~var_123_arg_0; [L315] SORT_5 var_124_arg_0 = var_122; [L316] SORT_5 var_124_arg_1 = var_123; [L317] SORT_5 var_124 = var_124_arg_0 & var_124_arg_1; [L318] SORT_5 var_125_arg_0 = state_27; [L319] SORT_5 var_125 = ~var_125_arg_0; [L320] SORT_5 var_126_arg_0 = var_124; [L321] SORT_5 var_126_arg_1 = var_125; [L322] SORT_5 var_126 = var_126_arg_0 & var_126_arg_1; [L323] SORT_5 var_127_arg_0 = state_29; [L324] SORT_5 var_127 = ~var_127_arg_0; [L325] SORT_5 var_128_arg_0 = var_126; [L326] SORT_5 var_128_arg_1 = var_127; [L327] SORT_5 var_128 = var_128_arg_0 & var_128_arg_1; [L328] SORT_5 var_129_arg_0 = state_8; [L329] SORT_5 var_129 = ~var_129_arg_0; [L330] SORT_5 var_130_arg_0 = var_128; [L331] SORT_5 var_130_arg_1 = var_129; [L332] SORT_5 var_130 = var_130_arg_0 & var_130_arg_1; [L333] SORT_5 var_131_arg_0 = var_116; [L334] SORT_5 var_131_arg_1 = var_130; [L335] SORT_5 var_131 = var_131_arg_0 | var_131_arg_1; [L336] SORT_5 var_132_arg_0 = state_17; [L337] SORT_5 var_132 = ~var_132_arg_0; [L338] SORT_5 var_133_arg_0 = state_19; [L339] SORT_5 var_133 = ~var_133_arg_0; [L340] SORT_5 var_134_arg_0 = var_132; [L341] SORT_5 var_134_arg_1 = var_133; [L342] SORT_5 var_134 = var_134_arg_0 & var_134_arg_1; [L343] SORT_5 var_135_arg_0 = state_21; [L344] SORT_5 var_135 = ~var_135_arg_0; [L345] SORT_5 var_136_arg_0 = var_134; [L346] SORT_5 var_136_arg_1 = var_135; [L347] SORT_5 var_136 = var_136_arg_0 & var_136_arg_1; [L348] SORT_5 var_137_arg_0 = state_23; [L349] SORT_5 var_137 = ~var_137_arg_0; [L350] SORT_5 var_138_arg_0 = var_136; [L351] SORT_5 var_138_arg_1 = var_137; [L352] SORT_5 var_138 = var_138_arg_0 & var_138_arg_1; [L353] SORT_5 var_139_arg_0 = var_138; [L354] SORT_5 var_139_arg_1 = state_25; [L355] SORT_5 var_139 = var_139_arg_0 & var_139_arg_1; [L356] SORT_5 var_140_arg_0 = state_27; [L357] SORT_5 var_140 = ~var_140_arg_0; [L358] SORT_5 var_141_arg_0 = var_139; [L359] SORT_5 var_141_arg_1 = var_140; [L360] SORT_5 var_141 = var_141_arg_0 & var_141_arg_1; [L361] SORT_5 var_142_arg_0 = state_29; [L362] SORT_5 var_142 = ~var_142_arg_0; [L363] SORT_5 var_143_arg_0 = var_141; [L364] SORT_5 var_143_arg_1 = var_142; [L365] SORT_5 var_143 = var_143_arg_0 & var_143_arg_1; [L366] SORT_5 var_144_arg_0 = state_8; [L367] SORT_5 var_144 = ~var_144_arg_0; [L368] SORT_5 var_145_arg_0 = var_143; [L369] SORT_5 var_145_arg_1 = var_144; [L370] SORT_5 var_145 = var_145_arg_0 & var_145_arg_1; [L371] SORT_5 var_146_arg_0 = var_131; [L372] SORT_5 var_146_arg_1 = var_145; [L373] SORT_5 var_146 = var_146_arg_0 | var_146_arg_1; [L374] SORT_5 var_147_arg_0 = state_17; [L375] SORT_5 var_147 = ~var_147_arg_0; [L376] SORT_5 var_148_arg_0 = state_19; [L377] SORT_5 var_148 = ~var_148_arg_0; [L378] SORT_5 var_149_arg_0 = var_147; [L379] SORT_5 var_149_arg_1 = var_148; [L380] SORT_5 var_149 = var_149_arg_0 & var_149_arg_1; [L381] SORT_5 var_150_arg_0 = state_21; [L382] SORT_5 var_150 = ~var_150_arg_0; [L383] SORT_5 var_151_arg_0 = var_149; [L384] SORT_5 var_151_arg_1 = var_150; [L385] SORT_5 var_151 = var_151_arg_0 & var_151_arg_1; [L386] SORT_5 var_152_arg_0 = state_23; [L387] SORT_5 var_152 = ~var_152_arg_0; [L388] SORT_5 var_153_arg_0 = var_151; [L389] SORT_5 var_153_arg_1 = var_152; [L390] SORT_5 var_153 = var_153_arg_0 & var_153_arg_1; [L391] SORT_5 var_154_arg_0 = state_25; [L392] SORT_5 var_154 = ~var_154_arg_0; [L393] SORT_5 var_155_arg_0 = var_153; [L394] SORT_5 var_155_arg_1 = var_154; [L395] SORT_5 var_155 = var_155_arg_0 & var_155_arg_1; [L396] SORT_5 var_156_arg_0 = var_155; [L397] SORT_5 var_156_arg_1 = state_27; [L398] SORT_5 var_156 = var_156_arg_0 & var_156_arg_1; [L399] SORT_5 var_157_arg_0 = state_29; [L400] SORT_5 var_157 = ~var_157_arg_0; [L401] SORT_5 var_158_arg_0 = var_156; [L402] SORT_5 var_158_arg_1 = var_157; [L403] SORT_5 var_158 = var_158_arg_0 & var_158_arg_1; [L404] SORT_5 var_159_arg_0 = state_8; [L405] SORT_5 var_159 = ~var_159_arg_0; [L406] SORT_5 var_160_arg_0 = var_158; [L407] SORT_5 var_160_arg_1 = var_159; [L408] SORT_5 var_160 = var_160_arg_0 & var_160_arg_1; [L409] SORT_5 var_161_arg_0 = var_146; [L410] SORT_5 var_161_arg_1 = var_160; [L411] SORT_5 var_161 = var_161_arg_0 | var_161_arg_1; [L412] SORT_5 var_162_arg_0 = state_17; [L413] SORT_5 var_162 = ~var_162_arg_0; [L414] SORT_5 var_163_arg_0 = state_19; [L415] SORT_5 var_163 = ~var_163_arg_0; [L416] SORT_5 var_164_arg_0 = var_162; [L417] SORT_5 var_164_arg_1 = var_163; [L418] SORT_5 var_164 = var_164_arg_0 & var_164_arg_1; [L419] SORT_5 var_165_arg_0 = state_21; [L420] SORT_5 var_165 = ~var_165_arg_0; [L421] SORT_5 var_166_arg_0 = var_164; [L422] SORT_5 var_166_arg_1 = var_165; [L423] SORT_5 var_166 = var_166_arg_0 & var_166_arg_1; [L424] SORT_5 var_167_arg_0 = state_23; [L425] SORT_5 var_167 = ~var_167_arg_0; [L426] SORT_5 var_168_arg_0 = var_166; [L427] SORT_5 var_168_arg_1 = var_167; [L428] SORT_5 var_168 = var_168_arg_0 & var_168_arg_1; [L429] SORT_5 var_169_arg_0 = state_25; [L430] SORT_5 var_169 = ~var_169_arg_0; [L431] SORT_5 var_170_arg_0 = var_168; [L432] SORT_5 var_170_arg_1 = var_169; [L433] SORT_5 var_170 = var_170_arg_0 & var_170_arg_1; [L434] SORT_5 var_171_arg_0 = state_27; [L435] SORT_5 var_171 = ~var_171_arg_0; [L436] SORT_5 var_172_arg_0 = var_170; [L437] SORT_5 var_172_arg_1 = var_171; [L438] SORT_5 var_172 = var_172_arg_0 & var_172_arg_1; [L439] SORT_5 var_173_arg_0 = var_172; [L440] SORT_5 var_173_arg_1 = state_29; [L441] SORT_5 var_173 = var_173_arg_0 & var_173_arg_1; [L442] SORT_5 var_174_arg_0 = state_8; [L443] SORT_5 var_174 = ~var_174_arg_0; [L444] SORT_5 var_175_arg_0 = var_173; [L445] SORT_5 var_175_arg_1 = var_174; [L446] SORT_5 var_175 = var_175_arg_0 & var_175_arg_1; [L447] SORT_5 var_176_arg_0 = var_161; [L448] SORT_5 var_176_arg_1 = var_175; [L449] SORT_5 var_176 = var_176_arg_0 | var_176_arg_1; [L450] SORT_5 var_177_arg_0 = state_17; [L451] SORT_5 var_177 = ~var_177_arg_0; [L452] SORT_5 var_178_arg_0 = state_19; [L453] SORT_5 var_178 = ~var_178_arg_0; [L454] SORT_5 var_179_arg_0 = var_177; [L455] SORT_5 var_179_arg_1 = var_178; [L456] SORT_5 var_179 = var_179_arg_0 & var_179_arg_1; [L457] SORT_5 var_180_arg_0 = state_21; [L458] SORT_5 var_180 = ~var_180_arg_0; [L459] SORT_5 var_181_arg_0 = var_179; [L460] SORT_5 var_181_arg_1 = var_180; [L461] SORT_5 var_181 = var_181_arg_0 & var_181_arg_1; [L462] SORT_5 var_182_arg_0 = state_23; [L463] SORT_5 var_182 = ~var_182_arg_0; [L464] SORT_5 var_183_arg_0 = var_181; [L465] SORT_5 var_183_arg_1 = var_182; [L466] SORT_5 var_183 = var_183_arg_0 & var_183_arg_1; [L467] SORT_5 var_184_arg_0 = state_25; [L468] SORT_5 var_184 = ~var_184_arg_0; [L469] SORT_5 var_185_arg_0 = var_183; [L470] SORT_5 var_185_arg_1 = var_184; [L471] SORT_5 var_185 = var_185_arg_0 & var_185_arg_1; [L472] SORT_5 var_186_arg_0 = state_27; [L473] SORT_5 var_186 = ~var_186_arg_0; [L474] SORT_5 var_187_arg_0 = var_185; [L475] SORT_5 var_187_arg_1 = var_186; [L476] SORT_5 var_187 = var_187_arg_0 & var_187_arg_1; [L477] SORT_5 var_188_arg_0 = state_29; [L478] SORT_5 var_188 = ~var_188_arg_0; [L479] SORT_5 var_189_arg_0 = var_187; [L480] SORT_5 var_189_arg_1 = var_188; [L481] SORT_5 var_189 = var_189_arg_0 & var_189_arg_1; [L482] SORT_5 var_190_arg_0 = var_189; [L483] SORT_5 var_190_arg_1 = state_8; [L484] SORT_5 var_190 = var_190_arg_0 & var_190_arg_1; [L485] SORT_5 var_191_arg_0 = var_176; [L486] SORT_5 var_191_arg_1 = var_190; [L487] SORT_5 var_191 = var_191_arg_0 | var_191_arg_1; [L488] var_191 = var_191 & mask_SORT_5 [L489] SORT_5 next_192_arg_1 = var_191; [L490] SORT_1 var_194_arg_0 = input_2; [L491] SORT_1 var_194_arg_1 = var_33; [L492] SORT_5 var_194 = var_194_arg_0 != var_194_arg_1; [L493] SORT_5 var_195_arg_0 = var_194; [L494] SORT_1 var_195_arg_1 = var_193; [L495] SORT_1 var_195_arg_2 = state_34; [L496] SORT_1 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L497] SORT_5 var_196_arg_0 = state_19; [L498] SORT_1 var_196_arg_1 = var_195; [L499] SORT_1 var_196_arg_2 = state_34; [L500] SORT_1 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L501] SORT_5 var_197_arg_0 = state_31; [L502] SORT_1 var_197_arg_1 = var_196; [L503] SORT_1 var_197_arg_2 = state_34; [L504] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L505] SORT_1 next_198_arg_1 = var_197; [L506] SORT_1 var_200_arg_0 = input_2; [L507] SORT_1 var_200_arg_1 = var_33; [L508] SORT_5 var_200 = var_200_arg_0 == var_200_arg_1; [L509] SORT_1 var_201_arg_0 = input_4; [L510] SORT_1 var_201_arg_1 = var_33; [L511] SORT_5 var_201 = var_201_arg_0 != var_201_arg_1; [L512] SORT_5 var_202_arg_0 = var_200; [L513] SORT_5 var_202_arg_1 = var_201; [L514] SORT_5 var_202 = var_202_arg_0 & var_202_arg_1; [L515] var_202 = var_202 & mask_SORT_5 [L516] SORT_5 var_203_arg_0 = var_202; [L517] SORT_1 var_203_arg_1 = var_199; [L518] SORT_1 var_203_arg_2 = input_4; [L519] SORT_1 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L520] SORT_5 var_204_arg_0 = state_23; [L521] SORT_1 var_204_arg_1 = var_203; [L522] SORT_1 var_204_arg_2 = state_36; [L523] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L524] SORT_5 var_205_arg_0 = state_31; [L525] SORT_1 var_205_arg_1 = var_204; [L526] SORT_1 var_205_arg_2 = state_36; [L527] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L528] SORT_1 next_206_arg_1 = var_205; [L530] state_8 = next_47_arg_1 [L531] state_17 = next_49_arg_1 [L532] state_19 = next_51_arg_1 [L533] state_21 = next_53_arg_1 [L534] state_23 = next_58_arg_1 [L535] state_25 = next_60_arg_1 [L536] state_27 = next_66_arg_1 [L537] state_29 = next_72_arg_1 [L538] state_31 = next_192_arg_1 [L539] state_34 = next_198_arg_1 [L540] state_36 = next_206_arg_1 VAL [bad_16_arg_0=0, init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=128, input_3=0, input_38=0, input_4=4, input_6=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_192_arg_1=1, next_198_arg_1=0, next_206_arg_1=4, next_47_arg_1=0, next_49_arg_1=0, next_51_arg_1=0, next_53_arg_1=0, next_58_arg_1=0, next_60_arg_1=1, next_66_arg_1=0, next_72_arg_1=0, state_17=0, state_19=0, state_21=0, state_23=0, state_25=1, state_27=0, state_29=0, state_31=1, state_34=0, state_36=4, state_8=0, var_10=255, var_100=0, var_100_arg_0=0, var_100_arg_1=255, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_102=255, var_102_arg_0=0, var_103=255, var_103_arg_0=0, var_104=255, var_104_arg_0=255, var_104_arg_1=255, var_105=0, var_105_arg_0=255, var_105_arg_1=0, var_106=254, var_106_arg_0=1, var_107=0, var_107_arg_0=0, var_107_arg_1=254, var_108=255, var_108_arg_0=0, var_109=0, var_109_arg_0=0, var_109_arg_1=255, var_10_arg_0=0, var_110=255, var_110_arg_0=0, var_111=0, var_111_arg_0=0, var_111_arg_1=255, var_112=255, var_112_arg_0=0, var_113=0, var_113_arg_0=0, var_113_arg_1=255, var_114=255, var_114_arg_0=0, var_115=0, var_115_arg_0=0, var_115_arg_1=255, var_116=0, var_116_arg_0=0, var_116_arg_1=0, var_117=255, var_117_arg_0=0, var_118=255, var_118_arg_0=0, var_119=255, var_119_arg_0=255, var_119_arg_1=255, var_120=255, var_120_arg_0=0, var_121=255, var_121_arg_0=255, var_121_arg_1=255, var_122=1, var_122_arg_0=255, var_122_arg_1=1, var_123=255, var_123_arg_0=0, var_124=1, var_124_arg_0=1, var_124_arg_1=255, var_125=255, var_125_arg_0=0, var_126=1, var_126_arg_0=1, var_126_arg_1=255, var_127=255, var_127_arg_0=0, var_128=1, var_128_arg_0=1, var_128_arg_1=255, var_129=255, var_129_arg_0=0, var_13=1, var_130=1, var_130_arg_0=1, var_130_arg_1=255, var_131=1, var_131_arg_0=0, var_131_arg_1=1, var_132=255, var_132_arg_0=0, var_133=255, var_133_arg_0=0, var_134=255, var_134_arg_0=255, var_134_arg_1=255, var_135=255, var_135_arg_0=0, var_136=255, var_136_arg_0=255, var_136_arg_1=255, var_137=254, var_137_arg_0=1, var_138=254, var_138_arg_0=255, var_138_arg_1=254, var_139=0, var_139_arg_0=254, var_139_arg_1=0, var_14=0, var_140=255, var_140_arg_0=0, var_141=0, var_141_arg_0=0, var_141_arg_1=255, var_142=255, var_142_arg_0=0, var_143=0, var_143_arg_0=0, var_143_arg_1=255, var_144=255, var_144_arg_0=0, var_145=0, var_145_arg_0=0, var_145_arg_1=255, var_146=1, var_146_arg_0=1, var_146_arg_1=0, var_147=255, var_147_arg_0=0, var_148=255, var_148_arg_0=0, var_149=255, var_149_arg_0=255, var_149_arg_1=255, var_14_arg_0=255, var_15=0, var_150=255, var_150_arg_0=0, var_151=255, var_151_arg_0=255, var_151_arg_1=255, var_152=254, var_152_arg_0=1, var_153=254, var_153_arg_0=255, var_153_arg_1=254, var_154=255, var_154_arg_0=0, var_155=254, var_155_arg_0=254, var_155_arg_1=255, var_156=0, var_156_arg_0=254, var_156_arg_1=0, var_157=255, var_157_arg_0=0, var_158=0, var_158_arg_0=0, var_158_arg_1=255, var_159=255, var_159_arg_0=0, var_15_arg_0=1, var_15_arg_1=0, var_160=0, var_160_arg_0=0, var_160_arg_1=255, var_161=1, var_161_arg_0=1, var_161_arg_1=0, var_162=255, var_162_arg_0=0, var_163=255, var_163_arg_0=0, var_164=255, var_164_arg_0=255, var_164_arg_1=255, var_165=255, var_165_arg_0=0, var_166=255, var_166_arg_0=255, var_166_arg_1=255, var_167=254, var_167_arg_0=1, var_168=254, var_168_arg_0=255, var_168_arg_1=254, var_169=255, var_169_arg_0=0, var_170=254, var_170_arg_0=254, var_170_arg_1=255, var_171=255, var_171_arg_0=0, var_172=254, var_172_arg_0=254, var_172_arg_1=255, var_173=0, var_173_arg_0=254, var_173_arg_1=0, var_174=255, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=0, var_177=255, var_177_arg_0=0, var_178=255, var_178_arg_0=0, var_179=255, var_179_arg_0=255, var_179_arg_1=255, var_180=255, var_180_arg_0=0, var_181=255, var_181_arg_0=255, var_181_arg_1=255, var_182=254, var_182_arg_0=1, var_183=254, var_183_arg_0=255, var_183_arg_1=254, var_184=255, var_184_arg_0=0, var_185=254, var_185_arg_0=254, var_185_arg_1=255, var_186=255, var_186_arg_0=0, var_187=254, var_187_arg_0=254, var_187_arg_1=255, var_188=255, var_188_arg_0=0, var_189=254, var_189_arg_0=254, var_189_arg_1=255, var_190=0, var_190_arg_0=254, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=0, var_193=3, var_194=1, var_194_arg_0=128, var_194_arg_1=0, var_195=3, var_195_arg_0=1, var_195_arg_1=3, var_195_arg_2=0, var_196=0, var_196_arg_0=0, var_196_arg_1=3, var_196_arg_2=0, var_197=0, var_197_arg_0=1, var_197_arg_1=0, var_197_arg_2=0, var_199=2, var_200=0, var_200_arg_0=128, var_200_arg_1=0, var_201=1, var_201_arg_0=4, var_201_arg_1=0, var_202=0, var_202_arg_0=0, var_202_arg_1=1, var_203=4, var_203_arg_0=0, var_203_arg_1=2, var_203_arg_2=4, var_204=4, var_204_arg_0=1, var_204_arg_1=4, var_204_arg_2=0, var_205=4, var_205_arg_0=1, var_205_arg_1=4, var_205_arg_2=0, var_33=0, var_41=0, var_41_arg_0=0, var_41_arg_1=0, var_42=4, var_43=0, var_43_arg_0=0, var_43_arg_1=4, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_48=0, var_48_arg_0=1, var_48_arg_1=0, var_48_arg_2=0, var_50=0, var_50_arg_0=1, var_50_arg_1=0, var_50_arg_2=0, var_52=0, var_52_arg_0=1, var_52_arg_1=0, var_52_arg_2=0, var_54=5, var_55=1, var_55_arg_0=0, var_55_arg_1=5, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=1, var_57_arg_1=0, var_57_arg_2=1, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=5, var_62=254, var_62_arg_0=1, var_63=0, var_63_arg_0=0, var_63_arg_1=254, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_65_arg_2=0, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_68=1, var_68_arg_0=0, var_68_arg_1=4, var_69=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=0, var_73=255, var_73_arg_0=0, var_74=0, var_74_arg_0=0, var_74_arg_1=255, var_75=255, var_75_arg_0=0, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=254, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=254, var_79=255, var_79_arg_0=0, var_80=0, var_80_arg_0=0, var_80_arg_1=255, var_81=255, var_81_arg_0=0, var_82=0, var_82_arg_0=0, var_82_arg_1=255, var_83=255, var_83_arg_0=0, var_84=0, var_84_arg_0=0, var_84_arg_1=255, var_85=255, var_85_arg_0=0, var_86=0, var_86_arg_0=0, var_86_arg_1=255, var_87=255, var_87_arg_0=0, var_88=0, var_88_arg_0=255, var_88_arg_1=0, var_89=255, var_89_arg_0=0, var_90=0, var_90_arg_0=0, var_90_arg_1=255, var_91=254, var_91_arg_0=1, var_92=0, var_92_arg_0=0, var_92_arg_1=254, var_93=255, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=255, var_95=255, var_95_arg_0=0, var_96=0, var_96_arg_0=0, var_96_arg_1=255, var_97=255, var_97_arg_0=0, var_98=0, var_98_arg_0=0, var_98_arg_1=255, var_99=255, var_99_arg_0=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L100] RET __VERIFIER_assert(!(bad_16_arg_0)) [L102] SORT_1 var_41_arg_0 = state_34; [L103] SORT_1 var_41_arg_1 = state_36; [L104] SORT_1 var_41 = var_41_arg_0 + var_41_arg_1; [L105] var_41 = var_41 & mask_SORT_1 [L106] SORT_1 var_43_arg_0 = var_41; [L107] SORT_1 var_43_arg_1 = var_42; [L108] SORT_5 var_43 = var_43_arg_0 == var_43_arg_1; [L109] SORT_5 var_44_arg_0 = state_27; [L110] SORT_5 var_44_arg_1 = var_43; [L111] SORT_5 var_44 = var_44_arg_0 & var_44_arg_1; [L112] SORT_5 var_45_arg_0 = state_8; [L113] SORT_5 var_45_arg_1 = var_44; [L114] SORT_5 var_45 = var_45_arg_0 | var_45_arg_1; [L115] SORT_5 var_46_arg_0 = state_31; [L116] SORT_5 var_46_arg_1 = var_45; [L117] SORT_5 var_46_arg_2 = state_8; [L118] SORT_5 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L119] SORT_5 next_47_arg_1 = var_46; [L120] SORT_5 var_48_arg_0 = state_31; [L121] SORT_5 var_48_arg_1 = var_7; [L122] SORT_5 var_48_arg_2 = state_17; [L123] SORT_5 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L124] SORT_5 next_49_arg_1 = var_48; [L125] SORT_5 var_50_arg_0 = state_31; [L126] SORT_5 var_50_arg_1 = state_17; [L127] SORT_5 var_50_arg_2 = state_19; [L128] SORT_5 var_50 = var_50_arg_0 ? var_50_arg_1 : var_50_arg_2; [L129] var_50 = var_50 & mask_SORT_5 [L130] SORT_5 next_51_arg_1 = var_50; [L131] SORT_5 var_52_arg_0 = state_31; [L132] SORT_5 var_52_arg_1 = state_19; [L133] SORT_5 var_52_arg_2 = state_21; [L134] SORT_5 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L135] SORT_5 next_53_arg_1 = var_52; [L136] SORT_1 var_55_arg_0 = input_3; [L137] SORT_1 var_55_arg_1 = var_54; [L138] SORT_5 var_55 = var_55_arg_0 < var_55_arg_1; [L139] SORT_5 var_56_arg_0 = state_21; [L140] SORT_5 var_56_arg_1 = var_55; [L141] SORT_5 var_56 = var_56_arg_0 & var_56_arg_1; [L142] SORT_5 var_57_arg_0 = state_31; [L143] SORT_5 var_57_arg_1 = var_56; [L144] SORT_5 var_57_arg_2 = state_23; [L145] SORT_5 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L146] var_57 = var_57 & mask_SORT_5 [L147] SORT_5 next_58_arg_1 = var_57; [L148] SORT_5 var_59_arg_0 = state_31; [L149] SORT_5 var_59_arg_1 = state_23; [L150] SORT_5 var_59_arg_2 = state_25; [L151] SORT_5 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L152] SORT_5 next_60_arg_1 = var_59; [L153] SORT_1 var_61_arg_0 = input_3; [L154] SORT_1 var_61_arg_1 = var_54; [L155] SORT_5 var_61 = var_61_arg_0 < var_61_arg_1; [L156] SORT_5 var_62_arg_0 = var_61; [L157] SORT_5 var_62 = ~var_62_arg_0; [L158] SORT_5 var_63_arg_0 = state_21; [L159] SORT_5 var_63_arg_1 = var_62; [L160] SORT_5 var_63 = var_63_arg_0 & var_63_arg_1; [L161] SORT_5 var_64_arg_0 = state_25; [L162] SORT_5 var_64_arg_1 = var_63; [L163] SORT_5 var_64 = var_64_arg_0 | var_64_arg_1; [L164] SORT_5 var_65_arg_0 = state_31; [L165] SORT_5 var_65_arg_1 = var_64; [L166] SORT_5 var_65_arg_2 = state_27; [L167] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L168] SORT_5 next_66_arg_1 = var_65; [L169] SORT_1 var_67_arg_0 = state_34; [L170] SORT_1 var_67_arg_1 = state_36; [L171] SORT_1 var_67 = var_67_arg_0 + var_67_arg_1; [L172] var_67 = var_67 & mask_SORT_1 [L173] SORT_1 var_68_arg_0 = var_67; [L174] SORT_1 var_68_arg_1 = var_42; [L175] SORT_5 var_68 = var_68_arg_0 != var_68_arg_1; [L176] SORT_5 var_69_arg_0 = state_27; [L177] SORT_5 var_69_arg_1 = var_68; [L178] SORT_5 var_69 = var_69_arg_0 & var_69_arg_1; [L179] SORT_5 var_70_arg_0 = state_29; [L180] SORT_5 var_70_arg_1 = var_69; [L181] SORT_5 var_70 = var_70_arg_0 | var_70_arg_1; [L182] SORT_5 var_71_arg_0 = state_31; [L183] SORT_5 var_71_arg_1 = var_70; [L184] SORT_5 var_71_arg_2 = state_29; [L185] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L186] SORT_5 next_72_arg_1 = var_71; [L187] SORT_5 var_73_arg_0 = state_19; [L188] SORT_5 var_73 = ~var_73_arg_0; [L189] SORT_5 var_74_arg_0 = state_17; [L190] SORT_5 var_74_arg_1 = var_73; [L191] SORT_5 var_74 = var_74_arg_0 & var_74_arg_1; [L192] SORT_5 var_75_arg_0 = state_21; [L193] SORT_5 var_75 = ~var_75_arg_0; [L194] SORT_5 var_76_arg_0 = var_74; [L195] SORT_5 var_76_arg_1 = var_75; [L196] SORT_5 var_76 = var_76_arg_0 & var_76_arg_1; [L197] SORT_5 var_77_arg_0 = state_23; [L198] SORT_5 var_77 = ~var_77_arg_0; [L199] SORT_5 var_78_arg_0 = var_76; [L200] SORT_5 var_78_arg_1 = var_77; [L201] SORT_5 var_78 = var_78_arg_0 & var_78_arg_1; [L202] SORT_5 var_79_arg_0 = state_25; [L203] SORT_5 var_79 = ~var_79_arg_0; [L204] SORT_5 var_80_arg_0 = var_78; [L205] SORT_5 var_80_arg_1 = var_79; [L206] SORT_5 var_80 = var_80_arg_0 & var_80_arg_1; [L207] SORT_5 var_81_arg_0 = state_27; [L208] SORT_5 var_81 = ~var_81_arg_0; [L209] SORT_5 var_82_arg_0 = var_80; [L210] SORT_5 var_82_arg_1 = var_81; [L211] SORT_5 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_5 var_83_arg_0 = state_29; [L213] SORT_5 var_83 = ~var_83_arg_0; [L214] SORT_5 var_84_arg_0 = var_82; [L215] SORT_5 var_84_arg_1 = var_83; [L216] SORT_5 var_84 = var_84_arg_0 & var_84_arg_1; [L217] SORT_5 var_85_arg_0 = state_8; [L218] SORT_5 var_85 = ~var_85_arg_0; [L219] SORT_5 var_86_arg_0 = var_84; [L220] SORT_5 var_86_arg_1 = var_85; [L221] SORT_5 var_86 = var_86_arg_0 & var_86_arg_1; [L222] SORT_5 var_87_arg_0 = state_17; [L223] SORT_5 var_87 = ~var_87_arg_0; [L224] SORT_5 var_88_arg_0 = var_87; [L225] SORT_5 var_88_arg_1 = state_19; [L226] SORT_5 var_88 = var_88_arg_0 & var_88_arg_1; [L227] SORT_5 var_89_arg_0 = state_21; [L228] SORT_5 var_89 = ~var_89_arg_0; [L229] SORT_5 var_90_arg_0 = var_88; [L230] SORT_5 var_90_arg_1 = var_89; [L231] SORT_5 var_90 = var_90_arg_0 & var_90_arg_1; [L232] SORT_5 var_91_arg_0 = state_23; [L233] SORT_5 var_91 = ~var_91_arg_0; [L234] SORT_5 var_92_arg_0 = var_90; [L235] SORT_5 var_92_arg_1 = var_91; [L236] SORT_5 var_92 = var_92_arg_0 & var_92_arg_1; [L237] SORT_5 var_93_arg_0 = state_25; [L238] SORT_5 var_93 = ~var_93_arg_0; [L239] SORT_5 var_94_arg_0 = var_92; [L240] SORT_5 var_94_arg_1 = var_93; [L241] SORT_5 var_94 = var_94_arg_0 & var_94_arg_1; [L242] SORT_5 var_95_arg_0 = state_27; [L243] SORT_5 var_95 = ~var_95_arg_0; [L244] SORT_5 var_96_arg_0 = var_94; [L245] SORT_5 var_96_arg_1 = var_95; [L246] SORT_5 var_96 = var_96_arg_0 & var_96_arg_1; [L247] SORT_5 var_97_arg_0 = state_29; [L248] SORT_5 var_97 = ~var_97_arg_0; [L249] SORT_5 var_98_arg_0 = var_96; [L250] SORT_5 var_98_arg_1 = var_97; [L251] SORT_5 var_98 = var_98_arg_0 & var_98_arg_1; [L252] SORT_5 var_99_arg_0 = state_8; [L253] SORT_5 var_99 = ~var_99_arg_0; [L254] SORT_5 var_100_arg_0 = var_98; [L255] SORT_5 var_100_arg_1 = var_99; [L256] SORT_5 var_100 = var_100_arg_0 & var_100_arg_1; [L257] SORT_5 var_101_arg_0 = var_86; [L258] SORT_5 var_101_arg_1 = var_100; [L259] SORT_5 var_101 = var_101_arg_0 | var_101_arg_1; [L260] SORT_5 var_102_arg_0 = state_17; [L261] SORT_5 var_102 = ~var_102_arg_0; [L262] SORT_5 var_103_arg_0 = state_19; [L263] SORT_5 var_103 = ~var_103_arg_0; [L264] SORT_5 var_104_arg_0 = var_102; [L265] SORT_5 var_104_arg_1 = var_103; [L266] SORT_5 var_104 = var_104_arg_0 & var_104_arg_1; [L267] SORT_5 var_105_arg_0 = var_104; [L268] SORT_5 var_105_arg_1 = state_21; [L269] SORT_5 var_105 = var_105_arg_0 & var_105_arg_1; [L270] SORT_5 var_106_arg_0 = state_23; [L271] SORT_5 var_106 = ~var_106_arg_0; [L272] SORT_5 var_107_arg_0 = var_105; [L273] SORT_5 var_107_arg_1 = var_106; [L274] SORT_5 var_107 = var_107_arg_0 & var_107_arg_1; [L275] SORT_5 var_108_arg_0 = state_25; [L276] SORT_5 var_108 = ~var_108_arg_0; [L277] SORT_5 var_109_arg_0 = var_107; [L278] SORT_5 var_109_arg_1 = var_108; [L279] SORT_5 var_109 = var_109_arg_0 & var_109_arg_1; [L280] SORT_5 var_110_arg_0 = state_27; [L281] SORT_5 var_110 = ~var_110_arg_0; [L282] SORT_5 var_111_arg_0 = var_109; [L283] SORT_5 var_111_arg_1 = var_110; [L284] SORT_5 var_111 = var_111_arg_0 & var_111_arg_1; [L285] SORT_5 var_112_arg_0 = state_29; [L286] SORT_5 var_112 = ~var_112_arg_0; [L287] SORT_5 var_113_arg_0 = var_111; [L288] SORT_5 var_113_arg_1 = var_112; [L289] SORT_5 var_113 = var_113_arg_0 & var_113_arg_1; [L290] SORT_5 var_114_arg_0 = state_8; [L291] SORT_5 var_114 = ~var_114_arg_0; [L292] SORT_5 var_115_arg_0 = var_113; [L293] SORT_5 var_115_arg_1 = var_114; [L294] SORT_5 var_115 = var_115_arg_0 & var_115_arg_1; [L295] SORT_5 var_116_arg_0 = var_101; [L296] SORT_5 var_116_arg_1 = var_115; [L297] SORT_5 var_116 = var_116_arg_0 | var_116_arg_1; [L298] SORT_5 var_117_arg_0 = state_17; [L299] SORT_5 var_117 = ~var_117_arg_0; [L300] SORT_5 var_118_arg_0 = state_19; [L301] SORT_5 var_118 = ~var_118_arg_0; [L302] SORT_5 var_119_arg_0 = var_117; [L303] SORT_5 var_119_arg_1 = var_118; [L304] SORT_5 var_119 = var_119_arg_0 & var_119_arg_1; [L305] SORT_5 var_120_arg_0 = state_21; [L306] SORT_5 var_120 = ~var_120_arg_0; [L307] SORT_5 var_121_arg_0 = var_119; [L308] SORT_5 var_121_arg_1 = var_120; [L309] SORT_5 var_121 = var_121_arg_0 & var_121_arg_1; [L310] SORT_5 var_122_arg_0 = var_121; [L311] SORT_5 var_122_arg_1 = state_23; [L312] SORT_5 var_122 = var_122_arg_0 & var_122_arg_1; [L313] SORT_5 var_123_arg_0 = state_25; [L314] SORT_5 var_123 = ~var_123_arg_0; [L315] SORT_5 var_124_arg_0 = var_122; [L316] SORT_5 var_124_arg_1 = var_123; [L317] SORT_5 var_124 = var_124_arg_0 & var_124_arg_1; [L318] SORT_5 var_125_arg_0 = state_27; [L319] SORT_5 var_125 = ~var_125_arg_0; [L320] SORT_5 var_126_arg_0 = var_124; [L321] SORT_5 var_126_arg_1 = var_125; [L322] SORT_5 var_126 = var_126_arg_0 & var_126_arg_1; [L323] SORT_5 var_127_arg_0 = state_29; [L324] SORT_5 var_127 = ~var_127_arg_0; [L325] SORT_5 var_128_arg_0 = var_126; [L326] SORT_5 var_128_arg_1 = var_127; [L327] SORT_5 var_128 = var_128_arg_0 & var_128_arg_1; [L328] SORT_5 var_129_arg_0 = state_8; [L329] SORT_5 var_129 = ~var_129_arg_0; [L330] SORT_5 var_130_arg_0 = var_128; [L331] SORT_5 var_130_arg_1 = var_129; [L332] SORT_5 var_130 = var_130_arg_0 & var_130_arg_1; [L333] SORT_5 var_131_arg_0 = var_116; [L334] SORT_5 var_131_arg_1 = var_130; [L335] SORT_5 var_131 = var_131_arg_0 | var_131_arg_1; [L336] SORT_5 var_132_arg_0 = state_17; [L337] SORT_5 var_132 = ~var_132_arg_0; [L338] SORT_5 var_133_arg_0 = state_19; [L339] SORT_5 var_133 = ~var_133_arg_0; [L340] SORT_5 var_134_arg_0 = var_132; [L341] SORT_5 var_134_arg_1 = var_133; [L342] SORT_5 var_134 = var_134_arg_0 & var_134_arg_1; [L343] SORT_5 var_135_arg_0 = state_21; [L344] SORT_5 var_135 = ~var_135_arg_0; [L345] SORT_5 var_136_arg_0 = var_134; [L346] SORT_5 var_136_arg_1 = var_135; [L347] SORT_5 var_136 = var_136_arg_0 & var_136_arg_1; [L348] SORT_5 var_137_arg_0 = state_23; [L349] SORT_5 var_137 = ~var_137_arg_0; [L350] SORT_5 var_138_arg_0 = var_136; [L351] SORT_5 var_138_arg_1 = var_137; [L352] SORT_5 var_138 = var_138_arg_0 & var_138_arg_1; [L353] SORT_5 var_139_arg_0 = var_138; [L354] SORT_5 var_139_arg_1 = state_25; [L355] SORT_5 var_139 = var_139_arg_0 & var_139_arg_1; [L356] SORT_5 var_140_arg_0 = state_27; [L357] SORT_5 var_140 = ~var_140_arg_0; [L358] SORT_5 var_141_arg_0 = var_139; [L359] SORT_5 var_141_arg_1 = var_140; [L360] SORT_5 var_141 = var_141_arg_0 & var_141_arg_1; [L361] SORT_5 var_142_arg_0 = state_29; [L362] SORT_5 var_142 = ~var_142_arg_0; [L363] SORT_5 var_143_arg_0 = var_141; [L364] SORT_5 var_143_arg_1 = var_142; [L365] SORT_5 var_143 = var_143_arg_0 & var_143_arg_1; [L366] SORT_5 var_144_arg_0 = state_8; [L367] SORT_5 var_144 = ~var_144_arg_0; [L368] SORT_5 var_145_arg_0 = var_143; [L369] SORT_5 var_145_arg_1 = var_144; [L370] SORT_5 var_145 = var_145_arg_0 & var_145_arg_1; [L371] SORT_5 var_146_arg_0 = var_131; [L372] SORT_5 var_146_arg_1 = var_145; [L373] SORT_5 var_146 = var_146_arg_0 | var_146_arg_1; [L374] SORT_5 var_147_arg_0 = state_17; [L375] SORT_5 var_147 = ~var_147_arg_0; [L376] SORT_5 var_148_arg_0 = state_19; [L377] SORT_5 var_148 = ~var_148_arg_0; [L378] SORT_5 var_149_arg_0 = var_147; [L379] SORT_5 var_149_arg_1 = var_148; [L380] SORT_5 var_149 = var_149_arg_0 & var_149_arg_1; [L381] SORT_5 var_150_arg_0 = state_21; [L382] SORT_5 var_150 = ~var_150_arg_0; [L383] SORT_5 var_151_arg_0 = var_149; [L384] SORT_5 var_151_arg_1 = var_150; [L385] SORT_5 var_151 = var_151_arg_0 & var_151_arg_1; [L386] SORT_5 var_152_arg_0 = state_23; [L387] SORT_5 var_152 = ~var_152_arg_0; [L388] SORT_5 var_153_arg_0 = var_151; [L389] SORT_5 var_153_arg_1 = var_152; [L390] SORT_5 var_153 = var_153_arg_0 & var_153_arg_1; [L391] SORT_5 var_154_arg_0 = state_25; [L392] SORT_5 var_154 = ~var_154_arg_0; [L393] SORT_5 var_155_arg_0 = var_153; [L394] SORT_5 var_155_arg_1 = var_154; [L395] SORT_5 var_155 = var_155_arg_0 & var_155_arg_1; [L396] SORT_5 var_156_arg_0 = var_155; [L397] SORT_5 var_156_arg_1 = state_27; [L398] SORT_5 var_156 = var_156_arg_0 & var_156_arg_1; [L399] SORT_5 var_157_arg_0 = state_29; [L400] SORT_5 var_157 = ~var_157_arg_0; [L401] SORT_5 var_158_arg_0 = var_156; [L402] SORT_5 var_158_arg_1 = var_157; [L403] SORT_5 var_158 = var_158_arg_0 & var_158_arg_1; [L404] SORT_5 var_159_arg_0 = state_8; [L405] SORT_5 var_159 = ~var_159_arg_0; [L406] SORT_5 var_160_arg_0 = var_158; [L407] SORT_5 var_160_arg_1 = var_159; [L408] SORT_5 var_160 = var_160_arg_0 & var_160_arg_1; [L409] SORT_5 var_161_arg_0 = var_146; [L410] SORT_5 var_161_arg_1 = var_160; [L411] SORT_5 var_161 = var_161_arg_0 | var_161_arg_1; [L412] SORT_5 var_162_arg_0 = state_17; [L413] SORT_5 var_162 = ~var_162_arg_0; [L414] SORT_5 var_163_arg_0 = state_19; [L415] SORT_5 var_163 = ~var_163_arg_0; [L416] SORT_5 var_164_arg_0 = var_162; [L417] SORT_5 var_164_arg_1 = var_163; [L418] SORT_5 var_164 = var_164_arg_0 & var_164_arg_1; [L419] SORT_5 var_165_arg_0 = state_21; [L420] SORT_5 var_165 = ~var_165_arg_0; [L421] SORT_5 var_166_arg_0 = var_164; [L422] SORT_5 var_166_arg_1 = var_165; [L423] SORT_5 var_166 = var_166_arg_0 & var_166_arg_1; [L424] SORT_5 var_167_arg_0 = state_23; [L425] SORT_5 var_167 = ~var_167_arg_0; [L426] SORT_5 var_168_arg_0 = var_166; [L427] SORT_5 var_168_arg_1 = var_167; [L428] SORT_5 var_168 = var_168_arg_0 & var_168_arg_1; [L429] SORT_5 var_169_arg_0 = state_25; [L430] SORT_5 var_169 = ~var_169_arg_0; [L431] SORT_5 var_170_arg_0 = var_168; [L432] SORT_5 var_170_arg_1 = var_169; [L433] SORT_5 var_170 = var_170_arg_0 & var_170_arg_1; [L434] SORT_5 var_171_arg_0 = state_27; [L435] SORT_5 var_171 = ~var_171_arg_0; [L436] SORT_5 var_172_arg_0 = var_170; [L437] SORT_5 var_172_arg_1 = var_171; [L438] SORT_5 var_172 = var_172_arg_0 & var_172_arg_1; [L439] SORT_5 var_173_arg_0 = var_172; [L440] SORT_5 var_173_arg_1 = state_29; [L441] SORT_5 var_173 = var_173_arg_0 & var_173_arg_1; [L442] SORT_5 var_174_arg_0 = state_8; [L443] SORT_5 var_174 = ~var_174_arg_0; [L444] SORT_5 var_175_arg_0 = var_173; [L445] SORT_5 var_175_arg_1 = var_174; [L446] SORT_5 var_175 = var_175_arg_0 & var_175_arg_1; [L447] SORT_5 var_176_arg_0 = var_161; [L448] SORT_5 var_176_arg_1 = var_175; [L449] SORT_5 var_176 = var_176_arg_0 | var_176_arg_1; [L450] SORT_5 var_177_arg_0 = state_17; [L451] SORT_5 var_177 = ~var_177_arg_0; [L452] SORT_5 var_178_arg_0 = state_19; [L453] SORT_5 var_178 = ~var_178_arg_0; [L454] SORT_5 var_179_arg_0 = var_177; [L455] SORT_5 var_179_arg_1 = var_178; [L456] SORT_5 var_179 = var_179_arg_0 & var_179_arg_1; [L457] SORT_5 var_180_arg_0 = state_21; [L458] SORT_5 var_180 = ~var_180_arg_0; [L459] SORT_5 var_181_arg_0 = var_179; [L460] SORT_5 var_181_arg_1 = var_180; [L461] SORT_5 var_181 = var_181_arg_0 & var_181_arg_1; [L462] SORT_5 var_182_arg_0 = state_23; [L463] SORT_5 var_182 = ~var_182_arg_0; [L464] SORT_5 var_183_arg_0 = var_181; [L465] SORT_5 var_183_arg_1 = var_182; [L466] SORT_5 var_183 = var_183_arg_0 & var_183_arg_1; [L467] SORT_5 var_184_arg_0 = state_25; [L468] SORT_5 var_184 = ~var_184_arg_0; [L469] SORT_5 var_185_arg_0 = var_183; [L470] SORT_5 var_185_arg_1 = var_184; [L471] SORT_5 var_185 = var_185_arg_0 & var_185_arg_1; [L472] SORT_5 var_186_arg_0 = state_27; [L473] SORT_5 var_186 = ~var_186_arg_0; [L474] SORT_5 var_187_arg_0 = var_185; [L475] SORT_5 var_187_arg_1 = var_186; [L476] SORT_5 var_187 = var_187_arg_0 & var_187_arg_1; [L477] SORT_5 var_188_arg_0 = state_29; [L478] SORT_5 var_188 = ~var_188_arg_0; [L479] SORT_5 var_189_arg_0 = var_187; [L480] SORT_5 var_189_arg_1 = var_188; [L481] SORT_5 var_189 = var_189_arg_0 & var_189_arg_1; [L482] SORT_5 var_190_arg_0 = var_189; [L483] SORT_5 var_190_arg_1 = state_8; [L484] SORT_5 var_190 = var_190_arg_0 & var_190_arg_1; [L485] SORT_5 var_191_arg_0 = var_176; [L486] SORT_5 var_191_arg_1 = var_190; [L487] SORT_5 var_191 = var_191_arg_0 | var_191_arg_1; [L488] var_191 = var_191 & mask_SORT_5 [L489] SORT_5 next_192_arg_1 = var_191; [L490] SORT_1 var_194_arg_0 = input_2; [L491] SORT_1 var_194_arg_1 = var_33; [L492] SORT_5 var_194 = var_194_arg_0 != var_194_arg_1; [L493] SORT_5 var_195_arg_0 = var_194; [L494] SORT_1 var_195_arg_1 = var_193; [L495] SORT_1 var_195_arg_2 = state_34; [L496] SORT_1 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L497] SORT_5 var_196_arg_0 = state_19; [L498] SORT_1 var_196_arg_1 = var_195; [L499] SORT_1 var_196_arg_2 = state_34; [L500] SORT_1 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L501] SORT_5 var_197_arg_0 = state_31; [L502] SORT_1 var_197_arg_1 = var_196; [L503] SORT_1 var_197_arg_2 = state_34; [L504] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L505] SORT_1 next_198_arg_1 = var_197; [L506] SORT_1 var_200_arg_0 = input_2; [L507] SORT_1 var_200_arg_1 = var_33; [L508] SORT_5 var_200 = var_200_arg_0 == var_200_arg_1; [L509] SORT_1 var_201_arg_0 = input_4; [L510] SORT_1 var_201_arg_1 = var_33; [L511] SORT_5 var_201 = var_201_arg_0 != var_201_arg_1; [L512] SORT_5 var_202_arg_0 = var_200; [L513] SORT_5 var_202_arg_1 = var_201; [L514] SORT_5 var_202 = var_202_arg_0 & var_202_arg_1; [L515] var_202 = var_202 & mask_SORT_5 [L516] SORT_5 var_203_arg_0 = var_202; [L517] SORT_1 var_203_arg_1 = var_199; [L518] SORT_1 var_203_arg_2 = input_4; [L519] SORT_1 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L520] SORT_5 var_204_arg_0 = state_23; [L521] SORT_1 var_204_arg_1 = var_203; [L522] SORT_1 var_204_arg_2 = state_36; [L523] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L524] SORT_5 var_205_arg_0 = state_31; [L525] SORT_1 var_205_arg_1 = var_204; [L526] SORT_1 var_205_arg_2 = state_36; [L527] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L528] SORT_1 next_206_arg_1 = var_205; [L530] state_8 = next_47_arg_1 [L531] state_17 = next_49_arg_1 [L532] state_19 = next_51_arg_1 [L533] state_21 = next_53_arg_1 [L534] state_23 = next_58_arg_1 [L535] state_25 = next_60_arg_1 [L536] state_27 = next_66_arg_1 [L537] state_29 = next_72_arg_1 [L538] state_31 = next_192_arg_1 [L539] state_34 = next_198_arg_1 [L540] state_36 = next_206_arg_1 VAL [bad_16_arg_0=0, init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=0, input_4=0, input_6=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_192_arg_1=1, next_198_arg_1=0, next_206_arg_1=4, next_47_arg_1=0, next_49_arg_1=0, next_51_arg_1=0, next_53_arg_1=0, next_58_arg_1=0, next_60_arg_1=0, next_66_arg_1=1, next_72_arg_1=0, state_17=0, state_19=0, state_21=0, state_23=0, state_25=0, state_27=1, state_29=0, state_31=1, state_34=0, state_36=4, state_8=0, var_10=255, var_100=0, var_100_arg_0=0, var_100_arg_1=255, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_102=255, var_102_arg_0=0, var_103=255, var_103_arg_0=0, var_104=255, var_104_arg_0=255, var_104_arg_1=255, var_105=0, var_105_arg_0=255, var_105_arg_1=0, var_106=255, var_106_arg_0=0, var_107=0, var_107_arg_0=0, var_107_arg_1=255, var_108=254, var_108_arg_0=1, var_109=0, var_109_arg_0=0, var_109_arg_1=254, var_10_arg_0=0, var_110=255, var_110_arg_0=0, var_111=0, var_111_arg_0=0, var_111_arg_1=255, var_112=255, var_112_arg_0=0, var_113=0, var_113_arg_0=0, var_113_arg_1=255, var_114=255, var_114_arg_0=0, var_115=0, var_115_arg_0=0, var_115_arg_1=255, var_116=0, var_116_arg_0=0, var_116_arg_1=0, var_117=255, var_117_arg_0=0, var_118=255, var_118_arg_0=0, var_119=255, var_119_arg_0=255, var_119_arg_1=255, var_120=255, var_120_arg_0=0, var_121=255, var_121_arg_0=255, var_121_arg_1=255, var_122=0, var_122_arg_0=255, var_122_arg_1=0, var_123=254, var_123_arg_0=1, var_124=0, var_124_arg_0=0, var_124_arg_1=254, var_125=255, var_125_arg_0=0, var_126=0, var_126_arg_0=0, var_126_arg_1=255, var_127=255, var_127_arg_0=0, var_128=0, var_128_arg_0=0, var_128_arg_1=255, var_129=255, var_129_arg_0=0, var_13=1, var_130=0, var_130_arg_0=0, var_130_arg_1=255, var_131=0, var_131_arg_0=0, var_131_arg_1=0, var_132=255, var_132_arg_0=0, var_133=255, var_133_arg_0=0, var_134=255, var_134_arg_0=255, var_134_arg_1=255, var_135=255, var_135_arg_0=0, var_136=255, var_136_arg_0=255, var_136_arg_1=255, var_137=255, var_137_arg_0=0, var_138=255, var_138_arg_0=255, var_138_arg_1=255, var_139=1, var_139_arg_0=255, var_139_arg_1=1, var_14=0, var_140=255, var_140_arg_0=0, var_141=1, var_141_arg_0=1, var_141_arg_1=255, var_142=255, var_142_arg_0=0, var_143=1, var_143_arg_0=1, var_143_arg_1=255, var_144=255, var_144_arg_0=0, var_145=1, var_145_arg_0=1, var_145_arg_1=255, var_146=1, var_146_arg_0=0, var_146_arg_1=1, var_147=255, var_147_arg_0=0, var_148=255, var_148_arg_0=0, var_149=255, var_149_arg_0=255, var_149_arg_1=255, var_14_arg_0=255, var_15=0, var_150=255, var_150_arg_0=0, var_151=255, var_151_arg_0=255, var_151_arg_1=255, var_152=255, var_152_arg_0=0, var_153=255, var_153_arg_0=255, var_153_arg_1=255, var_154=254, var_154_arg_0=1, var_155=254, var_155_arg_0=255, var_155_arg_1=254, var_156=0, var_156_arg_0=254, var_156_arg_1=0, var_157=255, var_157_arg_0=0, var_158=0, var_158_arg_0=0, var_158_arg_1=255, var_159=255, var_159_arg_0=0, var_15_arg_0=1, var_15_arg_1=0, var_160=0, var_160_arg_0=0, var_160_arg_1=255, var_161=1, var_161_arg_0=1, var_161_arg_1=0, var_162=255, var_162_arg_0=0, var_163=255, var_163_arg_0=0, var_164=255, var_164_arg_0=255, var_164_arg_1=255, var_165=255, var_165_arg_0=0, var_166=255, var_166_arg_0=255, var_166_arg_1=255, var_167=255, var_167_arg_0=0, var_168=255, var_168_arg_0=255, var_168_arg_1=255, var_169=254, var_169_arg_0=1, var_170=254, var_170_arg_0=255, var_170_arg_1=254, var_171=255, var_171_arg_0=0, var_172=254, var_172_arg_0=254, var_172_arg_1=255, var_173=0, var_173_arg_0=254, var_173_arg_1=0, var_174=255, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=0, var_177=255, var_177_arg_0=0, var_178=255, var_178_arg_0=0, var_179=255, var_179_arg_0=255, var_179_arg_1=255, var_180=255, var_180_arg_0=0, var_181=255, var_181_arg_0=255, var_181_arg_1=255, var_182=255, var_182_arg_0=0, var_183=255, var_183_arg_0=255, var_183_arg_1=255, var_184=254, var_184_arg_0=1, var_185=254, var_185_arg_0=255, var_185_arg_1=254, var_186=255, var_186_arg_0=0, var_187=254, var_187_arg_0=254, var_187_arg_1=255, var_188=255, var_188_arg_0=0, var_189=254, var_189_arg_0=254, var_189_arg_1=255, var_190=0, var_190_arg_0=254, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=0, var_193=3, var_194=0, var_194_arg_0=0, var_194_arg_1=0, var_195=0, var_195_arg_0=0, var_195_arg_1=3, var_195_arg_2=0, var_196=0, var_196_arg_0=0, var_196_arg_1=0, var_196_arg_2=0, var_197=0, var_197_arg_0=1, var_197_arg_1=0, var_197_arg_2=0, var_199=2, var_200=1, var_200_arg_0=0, var_200_arg_1=0, var_201=0, var_201_arg_0=0, var_201_arg_1=0, var_202=0, var_202_arg_0=1, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=2, var_203_arg_2=0, var_204=4, var_204_arg_0=0, var_204_arg_1=0, var_204_arg_2=4, var_205=4, var_205_arg_0=1, var_205_arg_1=4, var_205_arg_2=4, var_33=0, var_41=4, var_41_arg_0=0, var_41_arg_1=4, var_42=4, var_43=1, var_43_arg_0=4, var_43_arg_1=4, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_48=0, var_48_arg_0=1, var_48_arg_1=0, var_48_arg_2=0, var_50=0, var_50_arg_0=1, var_50_arg_1=0, var_50_arg_2=0, var_52=0, var_52_arg_0=1, var_52_arg_1=0, var_52_arg_2=0, var_54=5, var_55=1, var_55_arg_0=0, var_55_arg_1=5, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=1, var_57_arg_1=0, var_57_arg_2=0, var_59=0, var_59_arg_0=1, var_59_arg_1=0, var_59_arg_2=1, var_61=1, var_61_arg_0=0, var_61_arg_1=5, var_62=254, var_62_arg_0=1, var_63=0, var_63_arg_0=0, var_63_arg_1=254, var_64=1, var_64_arg_0=1, var_64_arg_1=0, var_65=1, var_65_arg_0=1, var_65_arg_1=1, var_65_arg_2=0, var_67=4, var_67_arg_0=0, var_67_arg_1=4, var_68=0, var_68_arg_0=4, var_68_arg_1=4, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_7=0, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=0, var_73=255, var_73_arg_0=0, var_74=0, var_74_arg_0=0, var_74_arg_1=255, var_75=255, var_75_arg_0=0, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=255, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=255, var_79=254, var_79_arg_0=1, var_80=0, var_80_arg_0=0, var_80_arg_1=254, var_81=255, var_81_arg_0=0, var_82=0, var_82_arg_0=0, var_82_arg_1=255, var_83=255, var_83_arg_0=0, var_84=0, var_84_arg_0=0, var_84_arg_1=255, var_85=255, var_85_arg_0=0, var_86=0, var_86_arg_0=0, var_86_arg_1=255, var_87=255, var_87_arg_0=0, var_88=0, var_88_arg_0=255, var_88_arg_1=0, var_89=255, var_89_arg_0=0, var_90=0, var_90_arg_0=0, var_90_arg_1=255, var_91=255, var_91_arg_0=0, var_92=0, var_92_arg_0=0, var_92_arg_1=255, var_93=254, var_93_arg_0=1, var_94=0, var_94_arg_0=0, var_94_arg_1=254, var_95=255, var_95_arg_0=0, var_96=0, var_96_arg_0=0, var_96_arg_1=255, var_97=255, var_97_arg_0=0, var_98=0, var_98_arg_0=0, var_98_arg_1=255, var_99=255, var_99_arg_0=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L100] RET __VERIFIER_assert(!(bad_16_arg_0)) [L102] SORT_1 var_41_arg_0 = state_34; [L103] SORT_1 var_41_arg_1 = state_36; [L104] SORT_1 var_41 = var_41_arg_0 + var_41_arg_1; [L105] var_41 = var_41 & mask_SORT_1 [L106] SORT_1 var_43_arg_0 = var_41; [L107] SORT_1 var_43_arg_1 = var_42; [L108] SORT_5 var_43 = var_43_arg_0 == var_43_arg_1; [L109] SORT_5 var_44_arg_0 = state_27; [L110] SORT_5 var_44_arg_1 = var_43; [L111] SORT_5 var_44 = var_44_arg_0 & var_44_arg_1; [L112] SORT_5 var_45_arg_0 = state_8; [L113] SORT_5 var_45_arg_1 = var_44; [L114] SORT_5 var_45 = var_45_arg_0 | var_45_arg_1; [L115] SORT_5 var_46_arg_0 = state_31; [L116] SORT_5 var_46_arg_1 = var_45; [L117] SORT_5 var_46_arg_2 = state_8; [L118] SORT_5 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L119] SORT_5 next_47_arg_1 = var_46; [L120] SORT_5 var_48_arg_0 = state_31; [L121] SORT_5 var_48_arg_1 = var_7; [L122] SORT_5 var_48_arg_2 = state_17; [L123] SORT_5 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L124] SORT_5 next_49_arg_1 = var_48; [L125] SORT_5 var_50_arg_0 = state_31; [L126] SORT_5 var_50_arg_1 = state_17; [L127] SORT_5 var_50_arg_2 = state_19; [L128] SORT_5 var_50 = var_50_arg_0 ? var_50_arg_1 : var_50_arg_2; [L129] var_50 = var_50 & mask_SORT_5 [L130] SORT_5 next_51_arg_1 = var_50; [L131] SORT_5 var_52_arg_0 = state_31; [L132] SORT_5 var_52_arg_1 = state_19; [L133] SORT_5 var_52_arg_2 = state_21; [L134] SORT_5 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L135] SORT_5 next_53_arg_1 = var_52; [L136] SORT_1 var_55_arg_0 = input_3; [L137] SORT_1 var_55_arg_1 = var_54; [L138] SORT_5 var_55 = var_55_arg_0 < var_55_arg_1; [L139] SORT_5 var_56_arg_0 = state_21; [L140] SORT_5 var_56_arg_1 = var_55; [L141] SORT_5 var_56 = var_56_arg_0 & var_56_arg_1; [L142] SORT_5 var_57_arg_0 = state_31; [L143] SORT_5 var_57_arg_1 = var_56; [L144] SORT_5 var_57_arg_2 = state_23; [L145] SORT_5 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L146] var_57 = var_57 & mask_SORT_5 [L147] SORT_5 next_58_arg_1 = var_57; [L148] SORT_5 var_59_arg_0 = state_31; [L149] SORT_5 var_59_arg_1 = state_23; [L150] SORT_5 var_59_arg_2 = state_25; [L151] SORT_5 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L152] SORT_5 next_60_arg_1 = var_59; [L153] SORT_1 var_61_arg_0 = input_3; [L154] SORT_1 var_61_arg_1 = var_54; [L155] SORT_5 var_61 = var_61_arg_0 < var_61_arg_1; [L156] SORT_5 var_62_arg_0 = var_61; [L157] SORT_5 var_62 = ~var_62_arg_0; [L158] SORT_5 var_63_arg_0 = state_21; [L159] SORT_5 var_63_arg_1 = var_62; [L160] SORT_5 var_63 = var_63_arg_0 & var_63_arg_1; [L161] SORT_5 var_64_arg_0 = state_25; [L162] SORT_5 var_64_arg_1 = var_63; [L163] SORT_5 var_64 = var_64_arg_0 | var_64_arg_1; [L164] SORT_5 var_65_arg_0 = state_31; [L165] SORT_5 var_65_arg_1 = var_64; [L166] SORT_5 var_65_arg_2 = state_27; [L167] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L168] SORT_5 next_66_arg_1 = var_65; [L169] SORT_1 var_67_arg_0 = state_34; [L170] SORT_1 var_67_arg_1 = state_36; [L171] SORT_1 var_67 = var_67_arg_0 + var_67_arg_1; [L172] var_67 = var_67 & mask_SORT_1 [L173] SORT_1 var_68_arg_0 = var_67; [L174] SORT_1 var_68_arg_1 = var_42; [L175] SORT_5 var_68 = var_68_arg_0 != var_68_arg_1; [L176] SORT_5 var_69_arg_0 = state_27; [L177] SORT_5 var_69_arg_1 = var_68; [L178] SORT_5 var_69 = var_69_arg_0 & var_69_arg_1; [L179] SORT_5 var_70_arg_0 = state_29; [L180] SORT_5 var_70_arg_1 = var_69; [L181] SORT_5 var_70 = var_70_arg_0 | var_70_arg_1; [L182] SORT_5 var_71_arg_0 = state_31; [L183] SORT_5 var_71_arg_1 = var_70; [L184] SORT_5 var_71_arg_2 = state_29; [L185] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L186] SORT_5 next_72_arg_1 = var_71; [L187] SORT_5 var_73_arg_0 = state_19; [L188] SORT_5 var_73 = ~var_73_arg_0; [L189] SORT_5 var_74_arg_0 = state_17; [L190] SORT_5 var_74_arg_1 = var_73; [L191] SORT_5 var_74 = var_74_arg_0 & var_74_arg_1; [L192] SORT_5 var_75_arg_0 = state_21; [L193] SORT_5 var_75 = ~var_75_arg_0; [L194] SORT_5 var_76_arg_0 = var_74; [L195] SORT_5 var_76_arg_1 = var_75; [L196] SORT_5 var_76 = var_76_arg_0 & var_76_arg_1; [L197] SORT_5 var_77_arg_0 = state_23; [L198] SORT_5 var_77 = ~var_77_arg_0; [L199] SORT_5 var_78_arg_0 = var_76; [L200] SORT_5 var_78_arg_1 = var_77; [L201] SORT_5 var_78 = var_78_arg_0 & var_78_arg_1; [L202] SORT_5 var_79_arg_0 = state_25; [L203] SORT_5 var_79 = ~var_79_arg_0; [L204] SORT_5 var_80_arg_0 = var_78; [L205] SORT_5 var_80_arg_1 = var_79; [L206] SORT_5 var_80 = var_80_arg_0 & var_80_arg_1; [L207] SORT_5 var_81_arg_0 = state_27; [L208] SORT_5 var_81 = ~var_81_arg_0; [L209] SORT_5 var_82_arg_0 = var_80; [L210] SORT_5 var_82_arg_1 = var_81; [L211] SORT_5 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_5 var_83_arg_0 = state_29; [L213] SORT_5 var_83 = ~var_83_arg_0; [L214] SORT_5 var_84_arg_0 = var_82; [L215] SORT_5 var_84_arg_1 = var_83; [L216] SORT_5 var_84 = var_84_arg_0 & var_84_arg_1; [L217] SORT_5 var_85_arg_0 = state_8; [L218] SORT_5 var_85 = ~var_85_arg_0; [L219] SORT_5 var_86_arg_0 = var_84; [L220] SORT_5 var_86_arg_1 = var_85; [L221] SORT_5 var_86 = var_86_arg_0 & var_86_arg_1; [L222] SORT_5 var_87_arg_0 = state_17; [L223] SORT_5 var_87 = ~var_87_arg_0; [L224] SORT_5 var_88_arg_0 = var_87; [L225] SORT_5 var_88_arg_1 = state_19; [L226] SORT_5 var_88 = var_88_arg_0 & var_88_arg_1; [L227] SORT_5 var_89_arg_0 = state_21; [L228] SORT_5 var_89 = ~var_89_arg_0; [L229] SORT_5 var_90_arg_0 = var_88; [L230] SORT_5 var_90_arg_1 = var_89; [L231] SORT_5 var_90 = var_90_arg_0 & var_90_arg_1; [L232] SORT_5 var_91_arg_0 = state_23; [L233] SORT_5 var_91 = ~var_91_arg_0; [L234] SORT_5 var_92_arg_0 = var_90; [L235] SORT_5 var_92_arg_1 = var_91; [L236] SORT_5 var_92 = var_92_arg_0 & var_92_arg_1; [L237] SORT_5 var_93_arg_0 = state_25; [L238] SORT_5 var_93 = ~var_93_arg_0; [L239] SORT_5 var_94_arg_0 = var_92; [L240] SORT_5 var_94_arg_1 = var_93; [L241] SORT_5 var_94 = var_94_arg_0 & var_94_arg_1; [L242] SORT_5 var_95_arg_0 = state_27; [L243] SORT_5 var_95 = ~var_95_arg_0; [L244] SORT_5 var_96_arg_0 = var_94; [L245] SORT_5 var_96_arg_1 = var_95; [L246] SORT_5 var_96 = var_96_arg_0 & var_96_arg_1; [L247] SORT_5 var_97_arg_0 = state_29; [L248] SORT_5 var_97 = ~var_97_arg_0; [L249] SORT_5 var_98_arg_0 = var_96; [L250] SORT_5 var_98_arg_1 = var_97; [L251] SORT_5 var_98 = var_98_arg_0 & var_98_arg_1; [L252] SORT_5 var_99_arg_0 = state_8; [L253] SORT_5 var_99 = ~var_99_arg_0; [L254] SORT_5 var_100_arg_0 = var_98; [L255] SORT_5 var_100_arg_1 = var_99; [L256] SORT_5 var_100 = var_100_arg_0 & var_100_arg_1; [L257] SORT_5 var_101_arg_0 = var_86; [L258] SORT_5 var_101_arg_1 = var_100; [L259] SORT_5 var_101 = var_101_arg_0 | var_101_arg_1; [L260] SORT_5 var_102_arg_0 = state_17; [L261] SORT_5 var_102 = ~var_102_arg_0; [L262] SORT_5 var_103_arg_0 = state_19; [L263] SORT_5 var_103 = ~var_103_arg_0; [L264] SORT_5 var_104_arg_0 = var_102; [L265] SORT_5 var_104_arg_1 = var_103; [L266] SORT_5 var_104 = var_104_arg_0 & var_104_arg_1; [L267] SORT_5 var_105_arg_0 = var_104; [L268] SORT_5 var_105_arg_1 = state_21; [L269] SORT_5 var_105 = var_105_arg_0 & var_105_arg_1; [L270] SORT_5 var_106_arg_0 = state_23; [L271] SORT_5 var_106 = ~var_106_arg_0; [L272] SORT_5 var_107_arg_0 = var_105; [L273] SORT_5 var_107_arg_1 = var_106; [L274] SORT_5 var_107 = var_107_arg_0 & var_107_arg_1; [L275] SORT_5 var_108_arg_0 = state_25; [L276] SORT_5 var_108 = ~var_108_arg_0; [L277] SORT_5 var_109_arg_0 = var_107; [L278] SORT_5 var_109_arg_1 = var_108; [L279] SORT_5 var_109 = var_109_arg_0 & var_109_arg_1; [L280] SORT_5 var_110_arg_0 = state_27; [L281] SORT_5 var_110 = ~var_110_arg_0; [L282] SORT_5 var_111_arg_0 = var_109; [L283] SORT_5 var_111_arg_1 = var_110; [L284] SORT_5 var_111 = var_111_arg_0 & var_111_arg_1; [L285] SORT_5 var_112_arg_0 = state_29; [L286] SORT_5 var_112 = ~var_112_arg_0; [L287] SORT_5 var_113_arg_0 = var_111; [L288] SORT_5 var_113_arg_1 = var_112; [L289] SORT_5 var_113 = var_113_arg_0 & var_113_arg_1; [L290] SORT_5 var_114_arg_0 = state_8; [L291] SORT_5 var_114 = ~var_114_arg_0; [L292] SORT_5 var_115_arg_0 = var_113; [L293] SORT_5 var_115_arg_1 = var_114; [L294] SORT_5 var_115 = var_115_arg_0 & var_115_arg_1; [L295] SORT_5 var_116_arg_0 = var_101; [L296] SORT_5 var_116_arg_1 = var_115; [L297] SORT_5 var_116 = var_116_arg_0 | var_116_arg_1; [L298] SORT_5 var_117_arg_0 = state_17; [L299] SORT_5 var_117 = ~var_117_arg_0; [L300] SORT_5 var_118_arg_0 = state_19; [L301] SORT_5 var_118 = ~var_118_arg_0; [L302] SORT_5 var_119_arg_0 = var_117; [L303] SORT_5 var_119_arg_1 = var_118; [L304] SORT_5 var_119 = var_119_arg_0 & var_119_arg_1; [L305] SORT_5 var_120_arg_0 = state_21; [L306] SORT_5 var_120 = ~var_120_arg_0; [L307] SORT_5 var_121_arg_0 = var_119; [L308] SORT_5 var_121_arg_1 = var_120; [L309] SORT_5 var_121 = var_121_arg_0 & var_121_arg_1; [L310] SORT_5 var_122_arg_0 = var_121; [L311] SORT_5 var_122_arg_1 = state_23; [L312] SORT_5 var_122 = var_122_arg_0 & var_122_arg_1; [L313] SORT_5 var_123_arg_0 = state_25; [L314] SORT_5 var_123 = ~var_123_arg_0; [L315] SORT_5 var_124_arg_0 = var_122; [L316] SORT_5 var_124_arg_1 = var_123; [L317] SORT_5 var_124 = var_124_arg_0 & var_124_arg_1; [L318] SORT_5 var_125_arg_0 = state_27; [L319] SORT_5 var_125 = ~var_125_arg_0; [L320] SORT_5 var_126_arg_0 = var_124; [L321] SORT_5 var_126_arg_1 = var_125; [L322] SORT_5 var_126 = var_126_arg_0 & var_126_arg_1; [L323] SORT_5 var_127_arg_0 = state_29; [L324] SORT_5 var_127 = ~var_127_arg_0; [L325] SORT_5 var_128_arg_0 = var_126; [L326] SORT_5 var_128_arg_1 = var_127; [L327] SORT_5 var_128 = var_128_arg_0 & var_128_arg_1; [L328] SORT_5 var_129_arg_0 = state_8; [L329] SORT_5 var_129 = ~var_129_arg_0; [L330] SORT_5 var_130_arg_0 = var_128; [L331] SORT_5 var_130_arg_1 = var_129; [L332] SORT_5 var_130 = var_130_arg_0 & var_130_arg_1; [L333] SORT_5 var_131_arg_0 = var_116; [L334] SORT_5 var_131_arg_1 = var_130; [L335] SORT_5 var_131 = var_131_arg_0 | var_131_arg_1; [L336] SORT_5 var_132_arg_0 = state_17; [L337] SORT_5 var_132 = ~var_132_arg_0; [L338] SORT_5 var_133_arg_0 = state_19; [L339] SORT_5 var_133 = ~var_133_arg_0; [L340] SORT_5 var_134_arg_0 = var_132; [L341] SORT_5 var_134_arg_1 = var_133; [L342] SORT_5 var_134 = var_134_arg_0 & var_134_arg_1; [L343] SORT_5 var_135_arg_0 = state_21; [L344] SORT_5 var_135 = ~var_135_arg_0; [L345] SORT_5 var_136_arg_0 = var_134; [L346] SORT_5 var_136_arg_1 = var_135; [L347] SORT_5 var_136 = var_136_arg_0 & var_136_arg_1; [L348] SORT_5 var_137_arg_0 = state_23; [L349] SORT_5 var_137 = ~var_137_arg_0; [L350] SORT_5 var_138_arg_0 = var_136; [L351] SORT_5 var_138_arg_1 = var_137; [L352] SORT_5 var_138 = var_138_arg_0 & var_138_arg_1; [L353] SORT_5 var_139_arg_0 = var_138; [L354] SORT_5 var_139_arg_1 = state_25; [L355] SORT_5 var_139 = var_139_arg_0 & var_139_arg_1; [L356] SORT_5 var_140_arg_0 = state_27; [L357] SORT_5 var_140 = ~var_140_arg_0; [L358] SORT_5 var_141_arg_0 = var_139; [L359] SORT_5 var_141_arg_1 = var_140; [L360] SORT_5 var_141 = var_141_arg_0 & var_141_arg_1; [L361] SORT_5 var_142_arg_0 = state_29; [L362] SORT_5 var_142 = ~var_142_arg_0; [L363] SORT_5 var_143_arg_0 = var_141; [L364] SORT_5 var_143_arg_1 = var_142; [L365] SORT_5 var_143 = var_143_arg_0 & var_143_arg_1; [L366] SORT_5 var_144_arg_0 = state_8; [L367] SORT_5 var_144 = ~var_144_arg_0; [L368] SORT_5 var_145_arg_0 = var_143; [L369] SORT_5 var_145_arg_1 = var_144; [L370] SORT_5 var_145 = var_145_arg_0 & var_145_arg_1; [L371] SORT_5 var_146_arg_0 = var_131; [L372] SORT_5 var_146_arg_1 = var_145; [L373] SORT_5 var_146 = var_146_arg_0 | var_146_arg_1; [L374] SORT_5 var_147_arg_0 = state_17; [L375] SORT_5 var_147 = ~var_147_arg_0; [L376] SORT_5 var_148_arg_0 = state_19; [L377] SORT_5 var_148 = ~var_148_arg_0; [L378] SORT_5 var_149_arg_0 = var_147; [L379] SORT_5 var_149_arg_1 = var_148; [L380] SORT_5 var_149 = var_149_arg_0 & var_149_arg_1; [L381] SORT_5 var_150_arg_0 = state_21; [L382] SORT_5 var_150 = ~var_150_arg_0; [L383] SORT_5 var_151_arg_0 = var_149; [L384] SORT_5 var_151_arg_1 = var_150; [L385] SORT_5 var_151 = var_151_arg_0 & var_151_arg_1; [L386] SORT_5 var_152_arg_0 = state_23; [L387] SORT_5 var_152 = ~var_152_arg_0; [L388] SORT_5 var_153_arg_0 = var_151; [L389] SORT_5 var_153_arg_1 = var_152; [L390] SORT_5 var_153 = var_153_arg_0 & var_153_arg_1; [L391] SORT_5 var_154_arg_0 = state_25; [L392] SORT_5 var_154 = ~var_154_arg_0; [L393] SORT_5 var_155_arg_0 = var_153; [L394] SORT_5 var_155_arg_1 = var_154; [L395] SORT_5 var_155 = var_155_arg_0 & var_155_arg_1; [L396] SORT_5 var_156_arg_0 = var_155; [L397] SORT_5 var_156_arg_1 = state_27; [L398] SORT_5 var_156 = var_156_arg_0 & var_156_arg_1; [L399] SORT_5 var_157_arg_0 = state_29; [L400] SORT_5 var_157 = ~var_157_arg_0; [L401] SORT_5 var_158_arg_0 = var_156; [L402] SORT_5 var_158_arg_1 = var_157; [L403] SORT_5 var_158 = var_158_arg_0 & var_158_arg_1; [L404] SORT_5 var_159_arg_0 = state_8; [L405] SORT_5 var_159 = ~var_159_arg_0; [L406] SORT_5 var_160_arg_0 = var_158; [L407] SORT_5 var_160_arg_1 = var_159; [L408] SORT_5 var_160 = var_160_arg_0 & var_160_arg_1; [L409] SORT_5 var_161_arg_0 = var_146; [L410] SORT_5 var_161_arg_1 = var_160; [L411] SORT_5 var_161 = var_161_arg_0 | var_161_arg_1; [L412] SORT_5 var_162_arg_0 = state_17; [L413] SORT_5 var_162 = ~var_162_arg_0; [L414] SORT_5 var_163_arg_0 = state_19; [L415] SORT_5 var_163 = ~var_163_arg_0; [L416] SORT_5 var_164_arg_0 = var_162; [L417] SORT_5 var_164_arg_1 = var_163; [L418] SORT_5 var_164 = var_164_arg_0 & var_164_arg_1; [L419] SORT_5 var_165_arg_0 = state_21; [L420] SORT_5 var_165 = ~var_165_arg_0; [L421] SORT_5 var_166_arg_0 = var_164; [L422] SORT_5 var_166_arg_1 = var_165; [L423] SORT_5 var_166 = var_166_arg_0 & var_166_arg_1; [L424] SORT_5 var_167_arg_0 = state_23; [L425] SORT_5 var_167 = ~var_167_arg_0; [L426] SORT_5 var_168_arg_0 = var_166; [L427] SORT_5 var_168_arg_1 = var_167; [L428] SORT_5 var_168 = var_168_arg_0 & var_168_arg_1; [L429] SORT_5 var_169_arg_0 = state_25; [L430] SORT_5 var_169 = ~var_169_arg_0; [L431] SORT_5 var_170_arg_0 = var_168; [L432] SORT_5 var_170_arg_1 = var_169; [L433] SORT_5 var_170 = var_170_arg_0 & var_170_arg_1; [L434] SORT_5 var_171_arg_0 = state_27; [L435] SORT_5 var_171 = ~var_171_arg_0; [L436] SORT_5 var_172_arg_0 = var_170; [L437] SORT_5 var_172_arg_1 = var_171; [L438] SORT_5 var_172 = var_172_arg_0 & var_172_arg_1; [L439] SORT_5 var_173_arg_0 = var_172; [L440] SORT_5 var_173_arg_1 = state_29; [L441] SORT_5 var_173 = var_173_arg_0 & var_173_arg_1; [L442] SORT_5 var_174_arg_0 = state_8; [L443] SORT_5 var_174 = ~var_174_arg_0; [L444] SORT_5 var_175_arg_0 = var_173; [L445] SORT_5 var_175_arg_1 = var_174; [L446] SORT_5 var_175 = var_175_arg_0 & var_175_arg_1; [L447] SORT_5 var_176_arg_0 = var_161; [L448] SORT_5 var_176_arg_1 = var_175; [L449] SORT_5 var_176 = var_176_arg_0 | var_176_arg_1; [L450] SORT_5 var_177_arg_0 = state_17; [L451] SORT_5 var_177 = ~var_177_arg_0; [L452] SORT_5 var_178_arg_0 = state_19; [L453] SORT_5 var_178 = ~var_178_arg_0; [L454] SORT_5 var_179_arg_0 = var_177; [L455] SORT_5 var_179_arg_1 = var_178; [L456] SORT_5 var_179 = var_179_arg_0 & var_179_arg_1; [L457] SORT_5 var_180_arg_0 = state_21; [L458] SORT_5 var_180 = ~var_180_arg_0; [L459] SORT_5 var_181_arg_0 = var_179; [L460] SORT_5 var_181_arg_1 = var_180; [L461] SORT_5 var_181 = var_181_arg_0 & var_181_arg_1; [L462] SORT_5 var_182_arg_0 = state_23; [L463] SORT_5 var_182 = ~var_182_arg_0; [L464] SORT_5 var_183_arg_0 = var_181; [L465] SORT_5 var_183_arg_1 = var_182; [L466] SORT_5 var_183 = var_183_arg_0 & var_183_arg_1; [L467] SORT_5 var_184_arg_0 = state_25; [L468] SORT_5 var_184 = ~var_184_arg_0; [L469] SORT_5 var_185_arg_0 = var_183; [L470] SORT_5 var_185_arg_1 = var_184; [L471] SORT_5 var_185 = var_185_arg_0 & var_185_arg_1; [L472] SORT_5 var_186_arg_0 = state_27; [L473] SORT_5 var_186 = ~var_186_arg_0; [L474] SORT_5 var_187_arg_0 = var_185; [L475] SORT_5 var_187_arg_1 = var_186; [L476] SORT_5 var_187 = var_187_arg_0 & var_187_arg_1; [L477] SORT_5 var_188_arg_0 = state_29; [L478] SORT_5 var_188 = ~var_188_arg_0; [L479] SORT_5 var_189_arg_0 = var_187; [L480] SORT_5 var_189_arg_1 = var_188; [L481] SORT_5 var_189 = var_189_arg_0 & var_189_arg_1; [L482] SORT_5 var_190_arg_0 = var_189; [L483] SORT_5 var_190_arg_1 = state_8; [L484] SORT_5 var_190 = var_190_arg_0 & var_190_arg_1; [L485] SORT_5 var_191_arg_0 = var_176; [L486] SORT_5 var_191_arg_1 = var_190; [L487] SORT_5 var_191 = var_191_arg_0 | var_191_arg_1; [L488] var_191 = var_191 & mask_SORT_5 [L489] SORT_5 next_192_arg_1 = var_191; [L490] SORT_1 var_194_arg_0 = input_2; [L491] SORT_1 var_194_arg_1 = var_33; [L492] SORT_5 var_194 = var_194_arg_0 != var_194_arg_1; [L493] SORT_5 var_195_arg_0 = var_194; [L494] SORT_1 var_195_arg_1 = var_193; [L495] SORT_1 var_195_arg_2 = state_34; [L496] SORT_1 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L497] SORT_5 var_196_arg_0 = state_19; [L498] SORT_1 var_196_arg_1 = var_195; [L499] SORT_1 var_196_arg_2 = state_34; [L500] SORT_1 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L501] SORT_5 var_197_arg_0 = state_31; [L502] SORT_1 var_197_arg_1 = var_196; [L503] SORT_1 var_197_arg_2 = state_34; [L504] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L505] SORT_1 next_198_arg_1 = var_197; [L506] SORT_1 var_200_arg_0 = input_2; [L507] SORT_1 var_200_arg_1 = var_33; [L508] SORT_5 var_200 = var_200_arg_0 == var_200_arg_1; [L509] SORT_1 var_201_arg_0 = input_4; [L510] SORT_1 var_201_arg_1 = var_33; [L511] SORT_5 var_201 = var_201_arg_0 != var_201_arg_1; [L512] SORT_5 var_202_arg_0 = var_200; [L513] SORT_5 var_202_arg_1 = var_201; [L514] SORT_5 var_202 = var_202_arg_0 & var_202_arg_1; [L515] var_202 = var_202 & mask_SORT_5 [L516] SORT_5 var_203_arg_0 = var_202; [L517] SORT_1 var_203_arg_1 = var_199; [L518] SORT_1 var_203_arg_2 = input_4; [L519] SORT_1 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L520] SORT_5 var_204_arg_0 = state_23; [L521] SORT_1 var_204_arg_1 = var_203; [L522] SORT_1 var_204_arg_2 = state_36; [L523] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L524] SORT_5 var_205_arg_0 = state_31; [L525] SORT_1 var_205_arg_1 = var_204; [L526] SORT_1 var_205_arg_2 = state_36; [L527] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L528] SORT_1 next_206_arg_1 = var_205; [L530] state_8 = next_47_arg_1 [L531] state_17 = next_49_arg_1 [L532] state_19 = next_51_arg_1 [L533] state_21 = next_53_arg_1 [L534] state_23 = next_58_arg_1 [L535] state_25 = next_60_arg_1 [L536] state_27 = next_66_arg_1 [L537] state_29 = next_72_arg_1 [L538] state_31 = next_192_arg_1 [L539] state_34 = next_198_arg_1 [L540] state_36 = next_206_arg_1 VAL [bad_16_arg_0=0, init_18_arg_1=1, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=1, init_35_arg_1=0, init_37_arg_1=0, init_9_arg_1=0, input_2=0, input_3=0, input_38=0, input_4=0, input_6=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_192_arg_1=1, next_198_arg_1=0, next_206_arg_1=4, next_47_arg_1=1, next_49_arg_1=0, next_51_arg_1=0, next_53_arg_1=0, next_58_arg_1=0, next_60_arg_1=0, next_66_arg_1=0, next_72_arg_1=0, state_17=0, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=1, state_34=0, state_36=4, state_8=1, var_10=255, var_100=0, var_100_arg_0=0, var_100_arg_1=255, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_102=255, var_102_arg_0=0, var_103=255, var_103_arg_0=0, var_104=255, var_104_arg_0=255, var_104_arg_1=255, var_105=0, var_105_arg_0=255, var_105_arg_1=0, var_106=255, var_106_arg_0=0, var_107=0, var_107_arg_0=0, var_107_arg_1=255, var_108=255, var_108_arg_0=0, var_109=0, var_109_arg_0=0, var_109_arg_1=255, var_10_arg_0=0, var_110=254, var_110_arg_0=1, var_111=0, var_111_arg_0=0, var_111_arg_1=254, var_112=255, var_112_arg_0=0, var_113=0, var_113_arg_0=0, var_113_arg_1=255, var_114=255, var_114_arg_0=0, var_115=0, var_115_arg_0=0, var_115_arg_1=255, var_116=0, var_116_arg_0=0, var_116_arg_1=0, var_117=255, var_117_arg_0=0, var_118=255, var_118_arg_0=0, var_119=255, var_119_arg_0=255, var_119_arg_1=255, var_120=255, var_120_arg_0=0, var_121=255, var_121_arg_0=255, var_121_arg_1=255, var_122=0, var_122_arg_0=255, var_122_arg_1=0, var_123=255, var_123_arg_0=0, var_124=0, var_124_arg_0=0, var_124_arg_1=255, var_125=254, var_125_arg_0=1, var_126=0, var_126_arg_0=0, var_126_arg_1=254, var_127=255, var_127_arg_0=0, var_128=0, var_128_arg_0=0, var_128_arg_1=255, var_129=255, var_129_arg_0=0, var_13=1, var_130=0, var_130_arg_0=0, var_130_arg_1=255, var_131=0, var_131_arg_0=0, var_131_arg_1=0, var_132=255, var_132_arg_0=0, var_133=255, var_133_arg_0=0, var_134=255, var_134_arg_0=255, var_134_arg_1=255, var_135=255, var_135_arg_0=0, var_136=255, var_136_arg_0=255, var_136_arg_1=255, var_137=255, var_137_arg_0=0, var_138=255, var_138_arg_0=255, var_138_arg_1=255, var_139=0, var_139_arg_0=255, var_139_arg_1=0, var_14=0, var_140=254, var_140_arg_0=1, var_141=0, var_141_arg_0=0, var_141_arg_1=254, var_142=255, var_142_arg_0=0, var_143=0, var_143_arg_0=0, var_143_arg_1=255, var_144=255, var_144_arg_0=0, var_145=0, var_145_arg_0=0, var_145_arg_1=255, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_147=255, var_147_arg_0=0, var_148=255, var_148_arg_0=0, var_149=255, var_149_arg_0=255, var_149_arg_1=255, var_14_arg_0=255, var_15=0, var_150=255, var_150_arg_0=0, var_151=255, var_151_arg_0=255, var_151_arg_1=255, var_152=255, var_152_arg_0=0, var_153=255, var_153_arg_0=255, var_153_arg_1=255, var_154=255, var_154_arg_0=0, var_155=255, var_155_arg_0=255, var_155_arg_1=255, var_156=1, var_156_arg_0=255, var_156_arg_1=1, var_157=255, var_157_arg_0=0, var_158=1, var_158_arg_0=1, var_158_arg_1=255, var_159=255, var_159_arg_0=0, var_15_arg_0=1, var_15_arg_1=0, var_160=1, var_160_arg_0=1, var_160_arg_1=255, var_161=1, var_161_arg_0=0, var_161_arg_1=1, var_162=255, var_162_arg_0=0, var_163=255, var_163_arg_0=0, var_164=255, var_164_arg_0=255, var_164_arg_1=255, var_165=255, var_165_arg_0=0, var_166=255, var_166_arg_0=255, var_166_arg_1=255, var_167=255, var_167_arg_0=0, var_168=255, var_168_arg_0=255, var_168_arg_1=255, var_169=255, var_169_arg_0=0, var_170=255, var_170_arg_0=255, var_170_arg_1=255, var_171=254, var_171_arg_0=1, var_172=254, var_172_arg_0=255, var_172_arg_1=254, var_173=0, var_173_arg_0=254, var_173_arg_1=0, var_174=255, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=0, var_177=255, var_177_arg_0=0, var_178=255, var_178_arg_0=0, var_179=255, var_179_arg_0=255, var_179_arg_1=255, var_180=255, var_180_arg_0=0, var_181=255, var_181_arg_0=255, var_181_arg_1=255, var_182=255, var_182_arg_0=0, var_183=255, var_183_arg_0=255, var_183_arg_1=255, var_184=255, var_184_arg_0=0, var_185=255, var_185_arg_0=255, var_185_arg_1=255, var_186=254, var_186_arg_0=1, var_187=254, var_187_arg_0=255, var_187_arg_1=254, var_188=255, var_188_arg_0=0, var_189=254, var_189_arg_0=254, var_189_arg_1=255, var_190=0, var_190_arg_0=254, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=0, var_193=3, var_194=0, var_194_arg_0=0, var_194_arg_1=0, var_195=0, var_195_arg_0=0, var_195_arg_1=3, var_195_arg_2=0, var_196=0, var_196_arg_0=0, var_196_arg_1=0, var_196_arg_2=0, var_197=0, var_197_arg_0=1, var_197_arg_1=0, var_197_arg_2=0, var_199=2, var_200=1, var_200_arg_0=0, var_200_arg_1=0, var_201=0, var_201_arg_0=0, var_201_arg_1=0, var_202=0, var_202_arg_0=1, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=2, var_203_arg_2=0, var_204=4, var_204_arg_0=0, var_204_arg_1=0, var_204_arg_2=4, var_205=4, var_205_arg_0=1, var_205_arg_1=4, var_205_arg_2=4, var_33=0, var_41=4, var_41_arg_0=0, var_41_arg_1=4, var_42=4, var_43=1, var_43_arg_0=4, var_43_arg_1=4, var_44=1, var_44_arg_0=1, var_44_arg_1=1, var_45=1, var_45_arg_0=0, var_45_arg_1=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=0, var_48=0, var_48_arg_0=1, var_48_arg_1=0, var_48_arg_2=0, var_50=0, var_50_arg_0=1, var_50_arg_1=0, var_50_arg_2=0, var_52=0, var_52_arg_0=1, var_52_arg_1=0, var_52_arg_2=0, var_54=5, var_55=1, var_55_arg_0=0, var_55_arg_1=5, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=1, var_57_arg_1=0, var_57_arg_2=0, var_59=0, var_59_arg_0=1, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=5, var_62=254, var_62_arg_0=1, var_63=0, var_63_arg_0=0, var_63_arg_1=254, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_65_arg_2=1, var_67=4, var_67_arg_0=0, var_67_arg_1=4, var_68=0, var_68_arg_0=4, var_68_arg_1=4, var_69=0, var_69_arg_0=1, var_69_arg_1=0, var_7=0, var_70=0, var_70_arg_0=0, var_70_arg_1=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=0, var_73=255, var_73_arg_0=0, var_74=0, var_74_arg_0=0, var_74_arg_1=255, var_75=255, var_75_arg_0=0, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=255, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=255, var_79=255, var_79_arg_0=0, var_80=0, var_80_arg_0=0, var_80_arg_1=255, var_81=254, var_81_arg_0=1, var_82=0, var_82_arg_0=0, var_82_arg_1=254, var_83=255, var_83_arg_0=0, var_84=0, var_84_arg_0=0, var_84_arg_1=255, var_85=255, var_85_arg_0=0, var_86=0, var_86_arg_0=0, var_86_arg_1=255, var_87=255, var_87_arg_0=0, var_88=0, var_88_arg_0=255, var_88_arg_1=0, var_89=255, var_89_arg_0=0, var_90=0, var_90_arg_0=0, var_90_arg_1=255, var_91=255, var_91_arg_0=0, var_92=0, var_92_arg_0=0, var_92_arg_1=255, var_93=255, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=255, var_95=254, var_95_arg_0=1, var_96=0, var_96_arg_0=0, var_96_arg_1=254, var_97=255, var_97_arg_0=0, var_98=0, var_98_arg_0=0, var_98_arg_1=255, var_99=255, var_99_arg_0=0] [L81] input_2 = __VERIFIER_nondet_uchar() [L82] input_2 = input_2 & mask_SORT_1 [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_3 = input_3 & mask_SORT_1 [L85] input_4 = __VERIFIER_nondet_uchar() [L86] input_4 = input_4 & mask_SORT_1 [L87] input_6 = __VERIFIER_nondet_uchar() [L88] input_38 = __VERIFIER_nondet_uchar() [L91] SORT_5 var_10_arg_0 = state_8; [L92] SORT_5 var_10 = ~var_10_arg_0; [L93] SORT_5 var_14_arg_0 = var_10; [L94] SORT_5 var_14 = ~var_14_arg_0; [L95] SORT_5 var_15_arg_0 = var_13; [L96] SORT_5 var_15_arg_1 = var_14; [L97] SORT_5 var_15 = var_15_arg_0 & var_15_arg_1; [L98] var_15 = var_15 & mask_SORT_5 [L99] SORT_5 bad_16_arg_0 = var_15; [L100] CALL __VERIFIER_assert(!(bad_16_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 11 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 684.3s, OverallIterations: 7, TraceHistogramMax: 7, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 3.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 57 SdHoareTripleChecker+Valid, 0.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 57 mSDsluCounter, 179 SdHoareTripleChecker+Invalid, 0.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 134 IncrementalHoareTripleChecker+Unchecked, 150 mSDsCounter, 10 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 66 IncrementalHoareTripleChecker+Invalid, 210 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 10 mSolverCounterUnsat, 29 mSDtfsCounter, 66 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 162 GetRequests, 69 SyntacticMatches, 3 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 431 ImplicationChecksByTransitivity, 641.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24occurred in iteration=6, InterpolantAutomatonStates: 61, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 6 MinimizatonAttempts, 12 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.9s SsaConstructionTime, 2.7s SatisfiabilityAnalysisTime, 673.3s InterpolantComputationTime, 98 NumberOfCodeBlocks, 98 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 134 ConstructedInterpolants, 76 QuantifiedInterpolants, 32657 SizeOfPredicates, 1168 NumberOfNonLiveVariables, 7038 ConjunctsInSsa, 1091 ConjunctsInUnsatCore, 11 InterpolantComputations, 1 PerfectInterpolantSequences, 0/180 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-16 12:50:20,607 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63bcdf18-5327-4b6c-b964-b7d5d5830e4e/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE