./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 95941aa9b94eb68c259a2121738b5016c7e27e1ecdfd93242f944609798a4a7e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:38:46,079 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:38:46,082 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:38:46,129 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:38:46,130 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:38:46,135 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:38:46,137 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:38:46,138 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:38:46,140 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:38:46,141 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:38:46,142 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:38:46,143 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:38:46,144 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:38:46,145 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:38:46,146 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:38:46,147 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:38:46,155 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:38:46,162 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:38:46,165 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:38:46,171 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:38:46,172 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:38:46,176 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:38:46,180 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:38:46,181 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:38:46,188 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:38:46,188 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:38:46,189 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:38:46,190 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:38:46,191 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:38:46,192 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:38:46,192 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:38:46,193 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:38:46,194 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:38:46,195 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:38:46,202 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:38:46,204 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:38:46,205 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:38:46,205 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:38:46,205 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:38:46,207 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:38:46,207 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:38:46,209 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-11-16 12:38:46,253 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:38:46,254 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:38:46,254 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:38:46,254 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:38:46,255 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:38:46,255 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:38:46,256 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:38:46,256 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:38:46,256 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:38:46,257 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:38:46,258 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:38:46,258 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:38:46,258 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 12:38:46,258 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:38:46,258 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 12:38:46,259 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:38:46,259 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:38:46,259 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 12:38:46,259 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:38:46,259 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:38:46,260 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:38:46,260 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:38:46,260 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:38:46,260 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:38:46,260 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 12:38:46,260 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:38:46,261 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 12:38:46,261 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-16 12:38:46,261 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-16 12:38:46,261 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 12:38:46,263 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 95941aa9b94eb68c259a2121738b5016c7e27e1ecdfd93242f944609798a4a7e [2022-11-16 12:38:46,579 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:38:46,619 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:38:46,622 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:38:46,626 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:38:46,627 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:38:46,629 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c [2022-11-16 12:38:46,708 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/b70423127/86fbd332b704474da8aa8ea2698b888c/FLAG97250d96d [2022-11-16 12:38:47,328 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:38:47,333 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c [2022-11-16 12:38:47,343 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/b70423127/86fbd332b704474da8aa8ea2698b888c/FLAG97250d96d [2022-11-16 12:38:47,631 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/b70423127/86fbd332b704474da8aa8ea2698b888c [2022-11-16 12:38:47,633 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:38:47,635 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:38:47,636 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:38:47,637 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:38:47,642 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:38:47,643 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:38:47" (1/1) ... [2022-11-16 12:38:47,644 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@a58961e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:47, skipping insertion in model container [2022-11-16 12:38:47,644 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:38:47" (1/1) ... [2022-11-16 12:38:47,651 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:38:47,686 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:38:47,876 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c[1107,1120] [2022-11-16 12:38:48,039 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:38:48,045 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:38:48,058 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c[1107,1120] [2022-11-16 12:38:48,166 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:38:48,180 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:38:48,180 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48 WrapperNode [2022-11-16 12:38:48,180 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:38:48,192 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:38:48,193 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:38:48,193 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:38:48,201 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,233 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,335 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 917 [2022-11-16 12:38:48,335 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:38:48,336 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:38:48,336 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:38:48,336 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:38:48,346 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,357 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,366 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,381 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,401 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,408 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,412 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,417 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,425 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:38:48,426 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:38:48,426 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:38:48,426 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:38:48,427 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (1/1) ... [2022-11-16 12:38:48,434 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:38:48,460 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:38:48,476 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:38:48,490 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:38:48,536 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:38:48,537 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:38:48,773 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:38:48,775 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:38:49,713 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:38:49,729 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:38:49,729 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 12:38:49,733 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:49 BoogieIcfgContainer [2022-11-16 12:38:49,733 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:38:49,736 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:38:49,736 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:38:49,743 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:38:49,744 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:38:47" (1/3) ... [2022-11-16 12:38:49,744 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@67ba18f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:38:49, skipping insertion in model container [2022-11-16 12:38:49,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:38:48" (2/3) ... [2022-11-16 12:38:49,745 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@67ba18f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:38:49, skipping insertion in model container [2022-11-16 12:38:49,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:49" (3/3) ... [2022-11-16 12:38:49,747 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.v_non-pipelined-microprocessor.c [2022-11-16 12:38:49,768 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:38:49,769 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-16 12:38:49,831 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:38:49,839 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@121a06e0, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:38:49,839 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-16 12:38:49,845 INFO L276 IsEmpty]: Start isEmpty. Operand has 152 states, 150 states have (on average 1.6533333333333333) internal successors, (248), 151 states have internal predecessors, (248), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:49,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-11-16 12:38:49,861 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:49,862 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:38:49,863 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:49,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:49,880 INFO L85 PathProgramCache]: Analyzing trace with hash 1961960074, now seen corresponding path program 1 times [2022-11-16 12:38:49,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:38:49,897 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461966325] [2022-11-16 12:38:49,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:38:49,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:38:50,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:38:51,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:51,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:38:51,281 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461966325] [2022-11-16 12:38:51,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [461966325] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:38:51,282 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:38:51,282 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:38:51,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281930014] [2022-11-16 12:38:51,285 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:38:51,293 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:38:51,294 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:38:51,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:38:51,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:38:51,338 INFO L87 Difference]: Start difference. First operand has 152 states, 150 states have (on average 1.6533333333333333) internal successors, (248), 151 states have internal predecessors, (248), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:51,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:38:51,502 INFO L93 Difference]: Finished difference Result 517 states and 857 transitions. [2022-11-16 12:38:51,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:38:51,505 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2022-11-16 12:38:51,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:38:51,517 INFO L225 Difference]: With dead ends: 517 [2022-11-16 12:38:51,518 INFO L226 Difference]: Without dead ends: 367 [2022-11-16 12:38:51,521 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:38:51,525 INFO L413 NwaCegarLoop]: 365 mSDtfsCounter, 702 mSDsluCounter, 483 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 702 SdHoareTripleChecker+Valid, 848 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:38:51,526 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [702 Valid, 848 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:38:51,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2022-11-16 12:38:51,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 150. [2022-11-16 12:38:51,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 149 states have (on average 1.6375838926174497) internal successors, (244), 149 states have internal predecessors, (244), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:51,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 244 transitions. [2022-11-16 12:38:51,590 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 244 transitions. Word has length 55 [2022-11-16 12:38:51,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:38:51,590 INFO L495 AbstractCegarLoop]: Abstraction has 150 states and 244 transitions. [2022-11-16 12:38:51,591 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:38:51,591 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 244 transitions. [2022-11-16 12:38:51,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-11-16 12:38:51,593 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:38:51,593 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:38:51,593 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 12:38:51,593 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:38:51,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:38:51,594 INFO L85 PathProgramCache]: Analyzing trace with hash 692945398, now seen corresponding path program 1 times [2022-11-16 12:38:51,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:38:51,594 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740819068] [2022-11-16 12:38:51,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:38:51,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:38:52,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:38:58,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:38:58,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:38:58,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740819068] [2022-11-16 12:38:58,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1740819068] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:38:58,682 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:38:58,683 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-11-16 12:38:58,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539902748] [2022-11-16 12:38:58,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:38:58,686 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-16 12:38:58,686 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:38:58,687 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-16 12:38:58,687 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:38:58,688 INFO L87 Difference]: Start difference. First operand 150 states and 244 transitions. Second operand has 11 states, 11 states have (on average 5.090909090909091) internal successors, (56), 11 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:04,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:04,945 INFO L93 Difference]: Finished difference Result 1366 states and 2216 transitions. [2022-11-16 12:39:04,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-11-16 12:39:04,946 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 5.090909090909091) internal successors, (56), 11 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2022-11-16 12:39:04,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:04,960 INFO L225 Difference]: With dead ends: 1366 [2022-11-16 12:39:04,962 INFO L226 Difference]: Without dead ends: 1218 [2022-11-16 12:39:04,964 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 411 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=455, Invalid=1105, Unknown=0, NotChecked=0, Total=1560 [2022-11-16 12:39:04,968 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 7047 mSDsluCounter, 748 mSDsCounter, 0 mSdLazyCounter, 2089 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7047 SdHoareTripleChecker+Valid, 826 SdHoareTripleChecker+Invalid, 2118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 2089 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.8s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:04,969 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7047 Valid, 826 Invalid, 2118 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [29 Valid, 2089 Invalid, 0 Unknown, 0 Unchecked, 3.8s Time] [2022-11-16 12:39:04,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1218 states. [2022-11-16 12:39:05,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1218 to 166. [2022-11-16 12:39:05,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 165 states have (on average 1.6303030303030304) internal successors, (269), 165 states have internal predecessors, (269), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:05,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 269 transitions. [2022-11-16 12:39:05,021 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 269 transitions. Word has length 56 [2022-11-16 12:39:05,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:05,022 INFO L495 AbstractCegarLoop]: Abstraction has 166 states and 269 transitions. [2022-11-16 12:39:05,024 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 5.090909090909091) internal successors, (56), 11 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:05,024 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 269 transitions. [2022-11-16 12:39:05,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-11-16 12:39:05,027 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:05,027 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:05,028 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-16 12:39:05,028 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:05,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:05,030 INFO L85 PathProgramCache]: Analyzing trace with hash 1217419716, now seen corresponding path program 1 times [2022-11-16 12:39:05,031 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:05,032 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745427865] [2022-11-16 12:39:05,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:05,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:05,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:07,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:07,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:07,550 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745427865] [2022-11-16 12:39:07,550 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [745427865] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:07,552 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:07,557 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:39:07,557 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495126793] [2022-11-16 12:39:07,557 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:07,558 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:39:07,558 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:07,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:39:07,559 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:39:07,559 INFO L87 Difference]: Start difference. First operand 166 states and 269 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:07,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:07,908 INFO L93 Difference]: Finished difference Result 330 states and 536 transitions. [2022-11-16 12:39:07,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:39:07,909 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2022-11-16 12:39:07,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:07,910 INFO L225 Difference]: With dead ends: 330 [2022-11-16 12:39:07,910 INFO L226 Difference]: Without dead ends: 166 [2022-11-16 12:39:07,911 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:07,912 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 224 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 294 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 224 SdHoareTripleChecker+Valid, 185 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 294 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:07,912 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [224 Valid, 185 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 294 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-16 12:39:07,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2022-11-16 12:39:07,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 150. [2022-11-16 12:39:07,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 149 states have (on average 1.6241610738255035) internal successors, (242), 149 states have internal predecessors, (242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:07,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 242 transitions. [2022-11-16 12:39:07,920 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 242 transitions. Word has length 57 [2022-11-16 12:39:07,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:07,921 INFO L495 AbstractCegarLoop]: Abstraction has 150 states and 242 transitions. [2022-11-16 12:39:07,921 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:07,921 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 242 transitions. [2022-11-16 12:39:07,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-11-16 12:39:07,922 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:07,922 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:07,923 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-16 12:39:07,923 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:07,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:07,923 INFO L85 PathProgramCache]: Analyzing trace with hash -627947450, now seen corresponding path program 1 times [2022-11-16 12:39:07,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:07,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39910428] [2022-11-16 12:39:07,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:07,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:08,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:12,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:12,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:12,621 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39910428] [2022-11-16 12:39:12,621 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [39910428] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:12,621 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:12,622 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2022-11-16 12:39:12,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058665608] [2022-11-16 12:39:12,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:12,622 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-16 12:39:12,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:12,623 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-16 12:39:12,623 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2022-11-16 12:39:12,624 INFO L87 Difference]: Start difference. First operand 150 states and 242 transitions. Second operand has 13 states, 13 states have (on average 4.384615384615385) internal successors, (57), 13 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:20,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:20,555 INFO L93 Difference]: Finished difference Result 1410 states and 2274 transitions. [2022-11-16 12:39:20,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-11-16 12:39:20,556 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 4.384615384615385) internal successors, (57), 13 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2022-11-16 12:39:20,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:20,561 INFO L225 Difference]: With dead ends: 1410 [2022-11-16 12:39:20,561 INFO L226 Difference]: Without dead ends: 1262 [2022-11-16 12:39:20,563 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 571 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=577, Invalid=1585, Unknown=0, NotChecked=0, Total=2162 [2022-11-16 12:39:20,564 INFO L413 NwaCegarLoop]: 80 mSDtfsCounter, 5558 mSDsluCounter, 1233 mSDsCounter, 0 mSdLazyCounter, 2949 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5558 SdHoareTripleChecker+Valid, 1313 SdHoareTripleChecker+Invalid, 2965 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 2949 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:20,564 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5558 Valid, 1313 Invalid, 2965 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 2949 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-11-16 12:39:20,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1262 states. [2022-11-16 12:39:20,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1262 to 165. [2022-11-16 12:39:20,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 164 states have (on average 1.603658536585366) internal successors, (263), 164 states have internal predecessors, (263), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:20,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 263 transitions. [2022-11-16 12:39:20,579 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 263 transitions. Word has length 57 [2022-11-16 12:39:20,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:20,580 INFO L495 AbstractCegarLoop]: Abstraction has 165 states and 263 transitions. [2022-11-16 12:39:20,580 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 4.384615384615385) internal successors, (57), 13 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:20,580 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 263 transitions. [2022-11-16 12:39:20,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-16 12:39:20,584 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:20,584 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:20,584 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-16 12:39:20,585 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:20,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:20,585 INFO L85 PathProgramCache]: Analyzing trace with hash 2123401562, now seen corresponding path program 1 times [2022-11-16 12:39:20,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:20,586 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924679125] [2022-11-16 12:39:20,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:20,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:20,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:20,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:20,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:20,824 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924679125] [2022-11-16 12:39:20,825 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [924679125] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:20,825 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:20,825 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:39:20,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937408399] [2022-11-16 12:39:20,827 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:20,828 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:39:20,828 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:20,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:39:20,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:20,830 INFO L87 Difference]: Start difference. First operand 165 states and 263 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:22,355 INFO L93 Difference]: Finished difference Result 1164 states and 1856 transitions. [2022-11-16 12:39:22,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:39:22,356 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-11-16 12:39:22,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:22,360 INFO L225 Difference]: With dead ends: 1164 [2022-11-16 12:39:22,360 INFO L226 Difference]: Without dead ends: 1001 [2022-11-16 12:39:22,361 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:22,362 INFO L413 NwaCegarLoop]: 269 mSDtfsCounter, 1824 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 1451 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1824 SdHoareTripleChecker+Valid, 808 SdHoareTripleChecker+Invalid, 1458 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1451 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:22,363 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1824 Valid, 808 Invalid, 1458 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1451 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-11-16 12:39:22,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1001 states. [2022-11-16 12:39:22,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1001 to 167. [2022-11-16 12:39:22,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167 states, 166 states have (on average 1.5963855421686748) internal successors, (265), 166 states have internal predecessors, (265), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 265 transitions. [2022-11-16 12:39:22,379 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 265 transitions. Word has length 58 [2022-11-16 12:39:22,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:22,380 INFO L495 AbstractCegarLoop]: Abstraction has 167 states and 265 transitions. [2022-11-16 12:39:22,380 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,380 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 265 transitions. [2022-11-16 12:39:22,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-16 12:39:22,381 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:22,382 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:22,382 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-16 12:39:22,382 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:22,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:22,383 INFO L85 PathProgramCache]: Analyzing trace with hash -1719349590, now seen corresponding path program 1 times [2022-11-16 12:39:22,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:22,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130076112] [2022-11-16 12:39:22,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:22,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:22,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:22,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:22,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:22,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130076112] [2022-11-16 12:39:22,540 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [130076112] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:22,540 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:22,540 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:39:22,541 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251093285] [2022-11-16 12:39:22,541 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:22,541 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:39:22,541 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:22,542 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:39:22,542 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:39:22,542 INFO L87 Difference]: Start difference. First operand 167 states and 265 transitions. Second operand has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:22,630 INFO L93 Difference]: Finished difference Result 647 states and 1031 transitions. [2022-11-16 12:39:22,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:22,636 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-11-16 12:39:22,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:22,639 INFO L225 Difference]: With dead ends: 647 [2022-11-16 12:39:22,639 INFO L226 Difference]: Without dead ends: 482 [2022-11-16 12:39:22,640 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:22,641 INFO L413 NwaCegarLoop]: 251 mSDtfsCounter, 672 mSDsluCounter, 647 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 672 SdHoareTripleChecker+Valid, 898 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:22,645 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [672 Valid, 898 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:39:22,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states. [2022-11-16 12:39:22,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 185. [2022-11-16 12:39:22,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 184 states have (on average 1.5869565217391304) internal successors, (292), 184 states have internal predecessors, (292), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 292 transitions. [2022-11-16 12:39:22,660 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 292 transitions. Word has length 58 [2022-11-16 12:39:22,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:22,661 INFO L495 AbstractCegarLoop]: Abstraction has 185 states and 292 transitions. [2022-11-16 12:39:22,661 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,661 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 292 transitions. [2022-11-16 12:39:22,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-16 12:39:22,663 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:22,664 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:22,664 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-16 12:39:22,664 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:22,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:22,665 INFO L85 PathProgramCache]: Analyzing trace with hash -961218608, now seen corresponding path program 1 times [2022-11-16 12:39:22,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:22,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959327620] [2022-11-16 12:39:22,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:22,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:22,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:22,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:22,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:22,855 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959327620] [2022-11-16 12:39:22,855 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959327620] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:22,856 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:22,856 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:39:22,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926497190] [2022-11-16 12:39:22,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:22,857 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:39:22,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:22,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:39:22,858 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:39:22,859 INFO L87 Difference]: Start difference. First operand 185 states and 292 transitions. Second operand has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:22,930 INFO L93 Difference]: Finished difference Result 647 states and 1028 transitions. [2022-11-16 12:39:22,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:22,930 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-11-16 12:39:22,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:22,932 INFO L225 Difference]: With dead ends: 647 [2022-11-16 12:39:22,933 INFO L226 Difference]: Without dead ends: 479 [2022-11-16 12:39:22,933 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:22,938 INFO L413 NwaCegarLoop]: 246 mSDtfsCounter, 673 mSDsluCounter, 459 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 673 SdHoareTripleChecker+Valid, 705 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:22,938 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [673 Valid, 705 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:39:22,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2022-11-16 12:39:22,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 184. [2022-11-16 12:39:22,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 184 states, 183 states have (on average 1.5737704918032787) internal successors, (288), 183 states have internal predecessors, (288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 288 transitions. [2022-11-16 12:39:22,954 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 288 transitions. Word has length 58 [2022-11-16 12:39:22,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:22,957 INFO L495 AbstractCegarLoop]: Abstraction has 184 states and 288 transitions. [2022-11-16 12:39:22,957 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:22,957 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 288 transitions. [2022-11-16 12:39:22,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-16 12:39:22,958 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:22,958 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:22,959 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-16 12:39:22,960 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:22,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:22,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1753182070, now seen corresponding path program 1 times [2022-11-16 12:39:22,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:22,961 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808090834] [2022-11-16 12:39:22,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:22,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:22,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:23,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:23,139 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:23,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808090834] [2022-11-16 12:39:23,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808090834] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:23,140 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:23,140 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:39:23,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816782326] [2022-11-16 12:39:23,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:23,141 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:39:23,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:23,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:39:23,142 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:39:23,142 INFO L87 Difference]: Start difference. First operand 184 states and 288 transitions. Second operand has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:23,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:23,229 INFO L93 Difference]: Finished difference Result 628 states and 999 transitions. [2022-11-16 12:39:23,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:23,229 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-11-16 12:39:23,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:23,231 INFO L225 Difference]: With dead ends: 628 [2022-11-16 12:39:23,232 INFO L226 Difference]: Without dead ends: 458 [2022-11-16 12:39:23,232 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:23,233 INFO L413 NwaCegarLoop]: 241 mSDtfsCounter, 670 mSDsluCounter, 460 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 670 SdHoareTripleChecker+Valid, 701 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:23,234 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [670 Valid, 701 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:39:23,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2022-11-16 12:39:23,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 179. [2022-11-16 12:39:23,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 178 states have (on average 1.5786516853932584) internal successors, (281), 178 states have internal predecessors, (281), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:23,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 281 transitions. [2022-11-16 12:39:23,245 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 281 transitions. Word has length 58 [2022-11-16 12:39:23,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:23,245 INFO L495 AbstractCegarLoop]: Abstraction has 179 states and 281 transitions. [2022-11-16 12:39:23,245 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:23,246 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 281 transitions. [2022-11-16 12:39:23,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-16 12:39:23,249 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:23,249 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:23,250 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-11-16 12:39:23,250 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:23,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:23,251 INFO L85 PathProgramCache]: Analyzing trace with hash -75638866, now seen corresponding path program 1 times [2022-11-16 12:39:23,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:23,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307325705] [2022-11-16 12:39:23,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:23,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:23,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:23,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:23,423 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:23,423 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307325705] [2022-11-16 12:39:23,423 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307325705] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:23,423 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:23,424 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:39:23,424 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972736418] [2022-11-16 12:39:23,424 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:23,425 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:39:23,425 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:23,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:39:23,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:23,426 INFO L87 Difference]: Start difference. First operand 179 states and 281 transitions. Second operand has 5 states, 5 states have (on average 11.8) internal successors, (59), 5 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:24,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:24,204 INFO L93 Difference]: Finished difference Result 667 states and 1058 transitions. [2022-11-16 12:39:24,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:39:24,204 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.8) internal successors, (59), 5 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 59 [2022-11-16 12:39:24,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:24,206 INFO L225 Difference]: With dead ends: 667 [2022-11-16 12:39:24,207 INFO L226 Difference]: Without dead ends: 502 [2022-11-16 12:39:24,207 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:39:24,208 INFO L413 NwaCegarLoop]: 120 mSDtfsCounter, 924 mSDsluCounter, 575 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 924 SdHoareTripleChecker+Valid, 695 SdHoareTripleChecker+Invalid, 760 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:24,208 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [924 Valid, 695 Invalid, 760 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-16 12:39:24,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states. [2022-11-16 12:39:24,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 182. [2022-11-16 12:39:24,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 181 states have (on average 1.569060773480663) internal successors, (284), 181 states have internal predecessors, (284), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:24,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 284 transitions. [2022-11-16 12:39:24,219 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 284 transitions. Word has length 59 [2022-11-16 12:39:24,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:24,220 INFO L495 AbstractCegarLoop]: Abstraction has 182 states and 284 transitions. [2022-11-16 12:39:24,220 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.8) internal successors, (59), 5 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:24,220 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 284 transitions. [2022-11-16 12:39:24,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-16 12:39:24,221 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:24,221 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:24,221 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-16 12:39:24,221 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:24,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:24,222 INFO L85 PathProgramCache]: Analyzing trace with hash 768366636, now seen corresponding path program 1 times [2022-11-16 12:39:24,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:24,222 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260709996] [2022-11-16 12:39:24,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:24,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:24,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:24,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:24,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:24,397 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260709996] [2022-11-16 12:39:24,397 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1260709996] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:24,397 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:24,397 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:39:24,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940968278] [2022-11-16 12:39:24,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:24,398 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:39:24,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:24,398 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:39:24,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:24,399 INFO L87 Difference]: Start difference. First operand 182 states and 284 transitions. Second operand has 6 states, 6 states have (on average 9.833333333333334) internal successors, (59), 6 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:25,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:25,576 INFO L93 Difference]: Finished difference Result 1152 states and 1826 transitions. [2022-11-16 12:39:25,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:39:25,577 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.833333333333334) internal successors, (59), 6 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 59 [2022-11-16 12:39:25,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:25,582 INFO L225 Difference]: With dead ends: 1152 [2022-11-16 12:39:25,582 INFO L226 Difference]: Without dead ends: 984 [2022-11-16 12:39:25,583 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:25,583 INFO L413 NwaCegarLoop]: 97 mSDtfsCounter, 2316 mSDsluCounter, 369 mSDsCounter, 0 mSdLazyCounter, 842 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2316 SdHoareTripleChecker+Valid, 466 SdHoareTripleChecker+Invalid, 850 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 842 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:25,584 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2316 Valid, 466 Invalid, 850 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 842 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-11-16 12:39:25,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 984 states. [2022-11-16 12:39:25,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 984 to 185. [2022-11-16 12:39:25,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 184 states have (on average 1.565217391304348) internal successors, (288), 184 states have internal predecessors, (288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:25,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 288 transitions. [2022-11-16 12:39:25,601 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 288 transitions. Word has length 59 [2022-11-16 12:39:25,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:25,601 INFO L495 AbstractCegarLoop]: Abstraction has 185 states and 288 transitions. [2022-11-16 12:39:25,601 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.833333333333334) internal successors, (59), 6 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:25,602 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 288 transitions. [2022-11-16 12:39:25,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-11-16 12:39:25,609 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:25,609 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:25,609 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-11-16 12:39:25,610 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:25,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:25,610 INFO L85 PathProgramCache]: Analyzing trace with hash -1077644672, now seen corresponding path program 1 times [2022-11-16 12:39:25,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:25,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965274927] [2022-11-16 12:39:25,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:25,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:25,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:25,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:25,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:25,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [965274927] [2022-11-16 12:39:25,820 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [965274927] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:25,820 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:25,820 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:39:25,821 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649433907] [2022-11-16 12:39:25,821 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:25,821 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:39:25,822 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:25,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:39:25,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:25,823 INFO L87 Difference]: Start difference. First operand 185 states and 288 transitions. Second operand has 6 states, 6 states have (on average 10.0) internal successors, (60), 6 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:26,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:26,995 INFO L93 Difference]: Finished difference Result 1155 states and 1826 transitions. [2022-11-16 12:39:26,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:39:26,995 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.0) internal successors, (60), 6 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2022-11-16 12:39:26,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:27,000 INFO L225 Difference]: With dead ends: 1155 [2022-11-16 12:39:27,000 INFO L226 Difference]: Without dead ends: 984 [2022-11-16 12:39:27,001 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:27,001 INFO L413 NwaCegarLoop]: 97 mSDtfsCounter, 2679 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 848 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2679 SdHoareTripleChecker+Valid, 465 SdHoareTripleChecker+Invalid, 856 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 848 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:27,002 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2679 Valid, 465 Invalid, 856 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 848 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-11-16 12:39:27,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 984 states. [2022-11-16 12:39:27,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 984 to 188. [2022-11-16 12:39:27,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 188 states, 187 states have (on average 1.5614973262032086) internal successors, (292), 187 states have internal predecessors, (292), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:27,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 292 transitions. [2022-11-16 12:39:27,019 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 292 transitions. Word has length 60 [2022-11-16 12:39:27,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:27,019 INFO L495 AbstractCegarLoop]: Abstraction has 188 states and 292 transitions. [2022-11-16 12:39:27,019 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.0) internal successors, (60), 6 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:27,020 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 292 transitions. [2022-11-16 12:39:27,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-16 12:39:27,020 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:27,021 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:27,021 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-16 12:39:27,021 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:27,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:27,022 INFO L85 PathProgramCache]: Analyzing trace with hash -76795118, now seen corresponding path program 1 times [2022-11-16 12:39:27,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:27,022 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179653243] [2022-11-16 12:39:27,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:27,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:27,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:27,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:27,221 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:27,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179653243] [2022-11-16 12:39:27,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1179653243] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:27,222 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:27,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:39:27,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1386384861] [2022-11-16 12:39:27,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:27,223 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:39:27,223 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:27,223 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:39:27,223 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:27,224 INFO L87 Difference]: Start difference. First operand 188 states and 292 transitions. Second operand has 6 states, 6 states have (on average 10.166666666666666) internal successors, (61), 6 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:28,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:28,371 INFO L93 Difference]: Finished difference Result 1158 states and 1826 transitions. [2022-11-16 12:39:28,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:39:28,372 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.166666666666666) internal successors, (61), 6 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-11-16 12:39:28,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:28,376 INFO L225 Difference]: With dead ends: 1158 [2022-11-16 12:39:28,376 INFO L226 Difference]: Without dead ends: 984 [2022-11-16 12:39:28,377 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:28,377 INFO L413 NwaCegarLoop]: 97 mSDtfsCounter, 2648 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 854 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2648 SdHoareTripleChecker+Valid, 465 SdHoareTripleChecker+Invalid, 862 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 854 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:28,378 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2648 Valid, 465 Invalid, 862 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 854 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-11-16 12:39:28,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 984 states. [2022-11-16 12:39:28,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 984 to 191. [2022-11-16 12:39:28,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 190 states have (on average 1.5578947368421052) internal successors, (296), 190 states have internal predecessors, (296), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:28,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 296 transitions. [2022-11-16 12:39:28,398 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 296 transitions. Word has length 61 [2022-11-16 12:39:28,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:28,399 INFO L495 AbstractCegarLoop]: Abstraction has 191 states and 296 transitions. [2022-11-16 12:39:28,400 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.166666666666666) internal successors, (61), 6 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:28,400 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 296 transitions. [2022-11-16 12:39:28,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-11-16 12:39:28,401 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:28,401 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:28,401 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-16 12:39:28,402 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:28,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:28,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1240331942, now seen corresponding path program 1 times [2022-11-16 12:39:28,403 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:28,403 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808389516] [2022-11-16 12:39:28,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:28,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:28,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:28,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:28,608 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:28,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808389516] [2022-11-16 12:39:28,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808389516] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:28,608 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:28,609 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:39:28,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920230476] [2022-11-16 12:39:28,609 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:28,610 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:39:28,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:28,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:39:28,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:28,611 INFO L87 Difference]: Start difference. First operand 191 states and 296 transitions. Second operand has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:29,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:29,970 INFO L93 Difference]: Finished difference Result 1161 states and 1826 transitions. [2022-11-16 12:39:29,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:39:29,971 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2022-11-16 12:39:29,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:29,975 INFO L225 Difference]: With dead ends: 1161 [2022-11-16 12:39:29,975 INFO L226 Difference]: Without dead ends: 984 [2022-11-16 12:39:29,976 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:29,976 INFO L413 NwaCegarLoop]: 183 mSDtfsCounter, 2192 mSDsluCounter, 453 mSDsCounter, 0 mSdLazyCounter, 1136 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2192 SdHoareTripleChecker+Valid, 636 SdHoareTripleChecker+Invalid, 1143 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:29,977 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2192 Valid, 636 Invalid, 1143 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1136 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-16 12:39:29,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 984 states. [2022-11-16 12:39:29,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 984 to 194. [2022-11-16 12:39:29,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 194 states, 193 states have (on average 1.5544041450777202) internal successors, (300), 193 states have internal predecessors, (300), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:29,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 300 transitions. [2022-11-16 12:39:29,992 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 300 transitions. Word has length 62 [2022-11-16 12:39:29,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:29,993 INFO L495 AbstractCegarLoop]: Abstraction has 194 states and 300 transitions. [2022-11-16 12:39:29,993 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:29,993 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 300 transitions. [2022-11-16 12:39:29,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-11-16 12:39:29,994 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:29,994 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:29,994 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-16 12:39:29,995 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:29,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:29,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1260946822, now seen corresponding path program 1 times [2022-11-16 12:39:29,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:29,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286075725] [2022-11-16 12:39:29,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:29,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:30,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:30,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:30,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:30,166 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286075725] [2022-11-16 12:39:30,166 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [286075725] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:30,166 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:30,166 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:39:30,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185458529] [2022-11-16 12:39:30,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:30,167 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:39:30,168 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:30,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:39:30,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:30,168 INFO L87 Difference]: Start difference. First operand 194 states and 300 transitions. Second operand has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:30,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:30,952 INFO L93 Difference]: Finished difference Result 718 states and 1119 transitions. [2022-11-16 12:39:30,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:39:30,952 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2022-11-16 12:39:30,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:30,955 INFO L225 Difference]: With dead ends: 718 [2022-11-16 12:39:30,955 INFO L226 Difference]: Without dead ends: 538 [2022-11-16 12:39:30,956 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:39:30,956 INFO L413 NwaCegarLoop]: 125 mSDtfsCounter, 885 mSDsluCounter, 567 mSDsCounter, 0 mSdLazyCounter, 781 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 885 SdHoareTripleChecker+Valid, 692 SdHoareTripleChecker+Invalid, 784 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 781 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:30,957 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [885 Valid, 692 Invalid, 784 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 781 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-16 12:39:30,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 538 states. [2022-11-16 12:39:30,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 538 to 206. [2022-11-16 12:39:30,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 205 states have (on average 1.5365853658536586) internal successors, (315), 205 states have internal predecessors, (315), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:30,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 315 transitions. [2022-11-16 12:39:30,969 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 315 transitions. Word has length 63 [2022-11-16 12:39:30,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:30,970 INFO L495 AbstractCegarLoop]: Abstraction has 206 states and 315 transitions. [2022-11-16 12:39:30,970 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:30,970 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 315 transitions. [2022-11-16 12:39:30,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-11-16 12:39:30,971 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:30,971 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:30,971 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-11-16 12:39:30,971 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:30,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:30,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1110792440, now seen corresponding path program 1 times [2022-11-16 12:39:30,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:30,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653131490] [2022-11-16 12:39:30,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:30,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:31,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:31,175 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:31,176 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:31,176 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1653131490] [2022-11-16 12:39:31,176 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1653131490] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:31,177 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:31,177 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 12:39:31,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1455439950] [2022-11-16 12:39:31,177 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:31,178 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:39:31,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:31,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:39:31,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:31,179 INFO L87 Difference]: Start difference. First operand 206 states and 315 transitions. Second operand has 6 states, 6 states have (on average 10.5) internal successors, (63), 6 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:32,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:32,307 INFO L93 Difference]: Finished difference Result 1176 states and 1839 transitions. [2022-11-16 12:39:32,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:39:32,308 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.5) internal successors, (63), 6 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2022-11-16 12:39:32,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:32,312 INFO L225 Difference]: With dead ends: 1176 [2022-11-16 12:39:32,312 INFO L226 Difference]: Without dead ends: 984 [2022-11-16 12:39:32,313 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:32,313 INFO L413 NwaCegarLoop]: 96 mSDtfsCounter, 3188 mSDsluCounter, 364 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3188 SdHoareTripleChecker+Valid, 460 SdHoareTripleChecker+Invalid, 879 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:32,314 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3188 Valid, 460 Invalid, 879 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-11-16 12:39:32,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 984 states. [2022-11-16 12:39:32,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 984 to 209. [2022-11-16 12:39:32,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209 states, 208 states have (on average 1.5336538461538463) internal successors, (319), 208 states have internal predecessors, (319), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:32,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 319 transitions. [2022-11-16 12:39:32,342 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 319 transitions. Word has length 63 [2022-11-16 12:39:32,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:32,343 INFO L495 AbstractCegarLoop]: Abstraction has 209 states and 319 transitions. [2022-11-16 12:39:32,343 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.5) internal successors, (63), 6 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:32,343 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 319 transitions. [2022-11-16 12:39:32,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 12:39:32,344 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:32,344 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:32,344 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-11-16 12:39:32,345 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:32,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:32,345 INFO L85 PathProgramCache]: Analyzing trace with hash -190016052, now seen corresponding path program 1 times [2022-11-16 12:39:32,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:32,346 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652061602] [2022-11-16 12:39:32,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:32,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:33,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:36,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:36,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:36,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652061602] [2022-11-16 12:39:36,873 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652061602] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:36,873 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:36,873 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-16 12:39:36,873 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323227934] [2022-11-16 12:39:36,873 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:36,874 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 12:39:36,874 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:36,874 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 12:39:36,874 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:39:36,875 INFO L87 Difference]: Start difference. First operand 209 states and 319 transitions. Second operand has 10 states, 10 states have (on average 6.4) internal successors, (64), 10 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:44,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:44,596 INFO L93 Difference]: Finished difference Result 1565 states and 2446 transitions. [2022-11-16 12:39:44,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-16 12:39:44,596 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 6.4) internal successors, (64), 10 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-16 12:39:44,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:44,602 INFO L225 Difference]: With dead ends: 1565 [2022-11-16 12:39:44,602 INFO L226 Difference]: Without dead ends: 1370 [2022-11-16 12:39:44,603 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=425, Invalid=1135, Unknown=0, NotChecked=0, Total=1560 [2022-11-16 12:39:44,604 INFO L413 NwaCegarLoop]: 234 mSDtfsCounter, 3719 mSDsluCounter, 942 mSDsCounter, 0 mSdLazyCounter, 2609 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3719 SdHoareTripleChecker+Valid, 1176 SdHoareTripleChecker+Invalid, 2614 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2609 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.8s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:44,604 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3719 Valid, 1176 Invalid, 2614 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2609 Invalid, 0 Unknown, 0 Unchecked, 4.8s Time] [2022-11-16 12:39:44,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1370 states. [2022-11-16 12:39:44,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1370 to 221. [2022-11-16 12:39:44,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 220 states have (on average 1.5272727272727273) internal successors, (336), 220 states have internal predecessors, (336), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:44,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 336 transitions. [2022-11-16 12:39:44,633 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 336 transitions. Word has length 64 [2022-11-16 12:39:44,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:44,633 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 336 transitions. [2022-11-16 12:39:44,634 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 6.4) internal successors, (64), 10 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:44,634 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 336 transitions. [2022-11-16 12:39:44,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 12:39:44,635 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:44,635 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:44,635 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-11-16 12:39:44,635 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:44,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:44,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1326277578, now seen corresponding path program 1 times [2022-11-16 12:39:44,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:44,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018942930] [2022-11-16 12:39:44,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:44,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:44,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:44,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:44,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:44,774 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018942930] [2022-11-16 12:39:44,774 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1018942930] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:44,774 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:44,774 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:39:44,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222135068] [2022-11-16 12:39:44,775 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:44,775 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:39:44,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:44,776 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:39:44,776 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:44,776 INFO L87 Difference]: Start difference. First operand 221 states and 336 transitions. Second operand has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:45,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:45,429 INFO L93 Difference]: Finished difference Result 736 states and 1140 transitions. [2022-11-16 12:39:45,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:45,430 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-16 12:39:45,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:45,432 INFO L225 Difference]: With dead ends: 736 [2022-11-16 12:39:45,432 INFO L226 Difference]: Without dead ends: 529 [2022-11-16 12:39:45,433 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:45,434 INFO L413 NwaCegarLoop]: 345 mSDtfsCounter, 448 mSDsluCounter, 475 mSDsCounter, 0 mSdLazyCounter, 904 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 448 SdHoareTripleChecker+Valid, 820 SdHoareTripleChecker+Invalid, 905 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 904 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:45,434 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [448 Valid, 820 Invalid, 905 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 904 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-16 12:39:45,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2022-11-16 12:39:45,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 221. [2022-11-16 12:39:45,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 220 states have (on average 1.5227272727272727) internal successors, (335), 220 states have internal predecessors, (335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:45,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 335 transitions. [2022-11-16 12:39:45,447 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 335 transitions. Word has length 64 [2022-11-16 12:39:45,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:45,448 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 335 transitions. [2022-11-16 12:39:45,448 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:45,448 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 335 transitions. [2022-11-16 12:39:45,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 12:39:45,449 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:45,449 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:45,449 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-11-16 12:39:45,449 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:45,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:45,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1985809100, now seen corresponding path program 1 times [2022-11-16 12:39:45,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:45,450 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094831696] [2022-11-16 12:39:45,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:45,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:45,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:45,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:45,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:45,593 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094831696] [2022-11-16 12:39:45,594 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1094831696] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:45,594 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:45,594 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:39:45,594 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038295972] [2022-11-16 12:39:45,594 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:45,595 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:39:45,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:45,595 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:39:45,595 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:45,596 INFO L87 Difference]: Start difference. First operand 221 states and 335 transitions. Second operand has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:46,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:46,349 INFO L93 Difference]: Finished difference Result 736 states and 1138 transitions. [2022-11-16 12:39:46,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:46,349 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-16 12:39:46,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:46,352 INFO L225 Difference]: With dead ends: 736 [2022-11-16 12:39:46,352 INFO L226 Difference]: Without dead ends: 529 [2022-11-16 12:39:46,352 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:46,353 INFO L413 NwaCegarLoop]: 346 mSDtfsCounter, 444 mSDsluCounter, 476 mSDsCounter, 0 mSdLazyCounter, 902 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 444 SdHoareTripleChecker+Valid, 822 SdHoareTripleChecker+Invalid, 903 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 902 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:46,353 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [444 Valid, 822 Invalid, 903 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 902 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-16 12:39:46,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2022-11-16 12:39:46,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 221. [2022-11-16 12:39:46,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 220 states have (on average 1.518181818181818) internal successors, (334), 220 states have internal predecessors, (334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:46,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 334 transitions. [2022-11-16 12:39:46,369 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 334 transitions. Word has length 64 [2022-11-16 12:39:46,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:46,369 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 334 transitions. [2022-11-16 12:39:46,370 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:46,370 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 334 transitions. [2022-11-16 12:39:46,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 12:39:46,370 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:46,371 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:46,371 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-11-16 12:39:46,371 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:46,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:46,372 INFO L85 PathProgramCache]: Analyzing trace with hash -258174198, now seen corresponding path program 1 times [2022-11-16 12:39:46,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:46,372 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836954435] [2022-11-16 12:39:46,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:46,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:46,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:46,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:46,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:46,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836954435] [2022-11-16 12:39:46,524 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [836954435] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:46,525 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:46,525 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:39:46,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297371189] [2022-11-16 12:39:46,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:46,527 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:39:46,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:46,528 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:39:46,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:46,528 INFO L87 Difference]: Start difference. First operand 221 states and 334 transitions. Second operand has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:47,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:47,256 INFO L93 Difference]: Finished difference Result 736 states and 1136 transitions. [2022-11-16 12:39:47,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:47,256 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-16 12:39:47,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:47,258 INFO L225 Difference]: With dead ends: 736 [2022-11-16 12:39:47,258 INFO L226 Difference]: Without dead ends: 529 [2022-11-16 12:39:47,259 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:47,259 INFO L413 NwaCegarLoop]: 347 mSDtfsCounter, 440 mSDsluCounter, 477 mSDsCounter, 0 mSdLazyCounter, 900 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 440 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 901 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 900 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:47,260 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [440 Valid, 824 Invalid, 901 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 900 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-16 12:39:47,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2022-11-16 12:39:47,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 221. [2022-11-16 12:39:47,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 220 states have (on average 1.5136363636363637) internal successors, (333), 220 states have internal predecessors, (333), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:47,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 333 transitions. [2022-11-16 12:39:47,274 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 333 transitions. Word has length 64 [2022-11-16 12:39:47,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:47,274 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 333 transitions. [2022-11-16 12:39:47,274 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:47,275 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 333 transitions. [2022-11-16 12:39:47,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 12:39:47,275 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:47,276 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:47,276 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-11-16 12:39:47,276 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:47,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:47,277 INFO L85 PathProgramCache]: Analyzing trace with hash 443425676, now seen corresponding path program 1 times [2022-11-16 12:39:47,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:47,277 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544850003] [2022-11-16 12:39:47,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:47,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:47,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:47,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:47,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:47,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544850003] [2022-11-16 12:39:47,458 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [544850003] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:47,458 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:47,458 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:39:47,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200532645] [2022-11-16 12:39:47,458 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:47,459 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:39:47,459 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:47,459 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:39:47,459 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:39:47,460 INFO L87 Difference]: Start difference. First operand 221 states and 333 transitions. Second operand has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:48,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:48,177 INFO L93 Difference]: Finished difference Result 736 states and 1134 transitions. [2022-11-16 12:39:48,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:39:48,178 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-16 12:39:48,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:48,181 INFO L225 Difference]: With dead ends: 736 [2022-11-16 12:39:48,181 INFO L226 Difference]: Without dead ends: 529 [2022-11-16 12:39:48,181 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:39:48,182 INFO L413 NwaCegarLoop]: 348 mSDtfsCounter, 433 mSDsluCounter, 476 mSDsCounter, 0 mSdLazyCounter, 900 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 433 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 901 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 900 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:48,183 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [433 Valid, 824 Invalid, 901 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 900 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-16 12:39:48,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2022-11-16 12:39:48,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 224. [2022-11-16 12:39:48,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 224 states, 223 states have (on average 1.506726457399103) internal successors, (336), 223 states have internal predecessors, (336), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:48,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 336 transitions. [2022-11-16 12:39:48,197 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 336 transitions. Word has length 64 [2022-11-16 12:39:48,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:48,197 INFO L495 AbstractCegarLoop]: Abstraction has 224 states and 336 transitions. [2022-11-16 12:39:48,198 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.8) internal successors, (64), 5 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:48,198 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 336 transitions. [2022-11-16 12:39:48,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 12:39:48,198 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:48,199 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:48,199 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-11-16 12:39:48,199 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:48,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:48,200 INFO L85 PathProgramCache]: Analyzing trace with hash 583974286, now seen corresponding path program 1 times [2022-11-16 12:39:48,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:48,200 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131612484] [2022-11-16 12:39:48,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:48,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:48,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:49,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:49,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:49,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131612484] [2022-11-16 12:39:49,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [131612484] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:49,784 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:49,784 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-16 12:39:49,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623220324] [2022-11-16 12:39:49,785 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:49,786 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-16 12:39:49,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:49,787 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-16 12:39:49,787 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:39:49,788 INFO L87 Difference]: Start difference. First operand 224 states and 336 transitions. Second operand has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:50,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:50,831 INFO L93 Difference]: Finished difference Result 872 states and 1328 transitions. [2022-11-16 12:39:50,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:39:50,832 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-16 12:39:50,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:50,834 INFO L225 Difference]: With dead ends: 872 [2022-11-16 12:39:50,835 INFO L226 Difference]: Without dead ends: 662 [2022-11-16 12:39:50,835 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:39:50,836 INFO L413 NwaCegarLoop]: 110 mSDtfsCounter, 982 mSDsluCounter, 520 mSDsCounter, 0 mSdLazyCounter, 1087 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 982 SdHoareTripleChecker+Valid, 630 SdHoareTripleChecker+Invalid, 1089 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1087 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:50,836 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [982 Valid, 630 Invalid, 1089 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1087 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-11-16 12:39:50,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states. [2022-11-16 12:39:50,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 279. [2022-11-16 12:39:50,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 279 states, 278 states have (on average 1.4820143884892085) internal successors, (412), 278 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:50,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 412 transitions. [2022-11-16 12:39:50,851 INFO L78 Accepts]: Start accepts. Automaton has 279 states and 412 transitions. Word has length 64 [2022-11-16 12:39:50,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:50,852 INFO L495 AbstractCegarLoop]: Abstraction has 279 states and 412 transitions. [2022-11-16 12:39:50,852 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:50,852 INFO L276 IsEmpty]: Start isEmpty. Operand 279 states and 412 transitions. [2022-11-16 12:39:50,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-11-16 12:39:50,853 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:50,853 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:50,853 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-11-16 12:39:50,854 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:50,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:50,854 INFO L85 PathProgramCache]: Analyzing trace with hash 712901516, now seen corresponding path program 1 times [2022-11-16 12:39:50,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:50,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889094886] [2022-11-16 12:39:50,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:50,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:51,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:39:54,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:39:54,092 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:39:54,092 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889094886] [2022-11-16 12:39:54,092 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1889094886] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:39:54,093 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:39:54,093 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-16 12:39:54,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766142751] [2022-11-16 12:39:54,093 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:39:54,093 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 12:39:54,093 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:39:54,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 12:39:54,094 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:39:54,094 INFO L87 Difference]: Start difference. First operand 279 states and 412 transitions. Second operand has 8 states, 8 states have (on average 8.125) internal successors, (65), 8 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:56,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:39:56,482 INFO L93 Difference]: Finished difference Result 1151 states and 1775 transitions. [2022-11-16 12:39:56,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 12:39:56,484 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.125) internal successors, (65), 8 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2022-11-16 12:39:56,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:39:56,488 INFO L225 Difference]: With dead ends: 1151 [2022-11-16 12:39:56,488 INFO L226 Difference]: Without dead ends: 941 [2022-11-16 12:39:56,489 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2022-11-16 12:39:56,489 INFO L413 NwaCegarLoop]: 181 mSDtfsCounter, 1621 mSDsluCounter, 762 mSDsCounter, 0 mSdLazyCounter, 1883 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1621 SdHoareTripleChecker+Valid, 943 SdHoareTripleChecker+Invalid, 1886 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1883 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:39:56,490 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1621 Valid, 943 Invalid, 1886 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1883 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-11-16 12:39:56,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 941 states. [2022-11-16 12:39:56,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 941 to 312. [2022-11-16 12:39:56,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 312 states, 311 states have (on average 1.4919614147909968) internal successors, (464), 311 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:56,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 464 transitions. [2022-11-16 12:39:56,509 INFO L78 Accepts]: Start accepts. Automaton has 312 states and 464 transitions. Word has length 65 [2022-11-16 12:39:56,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:39:56,509 INFO L495 AbstractCegarLoop]: Abstraction has 312 states and 464 transitions. [2022-11-16 12:39:56,509 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.125) internal successors, (65), 8 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:39:56,510 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 464 transitions. [2022-11-16 12:39:56,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-11-16 12:39:56,510 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:39:56,511 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:56,511 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-11-16 12:39:56,511 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:39:56,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:39:56,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1807058418, now seen corresponding path program 1 times [2022-11-16 12:39:56,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:39:56,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040843137] [2022-11-16 12:39:56,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:39:56,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:39:57,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:39:57,068 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:39:57,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:39:57,700 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-16 12:39:57,700 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-16 12:39:57,701 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-16 12:39:57,703 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-11-16 12:39:57,710 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:39:57,718 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-16 12:39:57,864 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:39:57,917 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:39:57 BoogieIcfgContainer [2022-11-16 12:39:57,917 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-16 12:39:57,918 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 12:39:57,918 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 12:39:57,918 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 12:39:57,919 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:38:49" (3/4) ... [2022-11-16 12:39:57,922 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-16 12:39:57,922 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 12:39:57,923 INFO L158 Benchmark]: Toolchain (without parser) took 70287.91ms. Allocated memory was 121.6MB in the beginning and 524.3MB in the end (delta: 402.7MB). Free memory was 77.0MB in the beginning and 195.1MB in the end (delta: -118.1MB). Peak memory consumption was 284.8MB. Max. memory is 16.1GB. [2022-11-16 12:39:57,923 INFO L158 Benchmark]: CDTParser took 0.38ms. Allocated memory is still 121.6MB. Free memory is still 94.9MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:39:57,928 INFO L158 Benchmark]: CACSL2BoogieTranslator took 554.46ms. Allocated memory is still 121.6MB. Free memory was 76.8MB in the beginning and 80.3MB in the end (delta: -3.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-16 12:39:57,929 INFO L158 Benchmark]: Boogie Procedure Inliner took 143.78ms. Allocated memory is still 121.6MB. Free memory was 79.9MB in the beginning and 72.7MB in the end (delta: 7.2MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-16 12:39:57,930 INFO L158 Benchmark]: Boogie Preprocessor took 89.36ms. Allocated memory is still 121.6MB. Free memory was 72.7MB in the beginning and 68.1MB in the end (delta: 4.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 12:39:57,930 INFO L158 Benchmark]: RCFGBuilder took 1306.93ms. Allocated memory was 121.6MB in the beginning and 159.4MB in the end (delta: 37.7MB). Free memory was 68.1MB in the beginning and 92.7MB in the end (delta: -24.7MB). Peak memory consumption was 34.0MB. Max. memory is 16.1GB. [2022-11-16 12:39:57,930 INFO L158 Benchmark]: TraceAbstraction took 68181.45ms. Allocated memory was 159.4MB in the beginning and 524.3MB in the end (delta: 364.9MB). Free memory was 91.6MB in the beginning and 195.1MB in the end (delta: -103.5MB). Peak memory consumption was 261.3MB. Max. memory is 16.1GB. [2022-11-16 12:39:57,930 INFO L158 Benchmark]: Witness Printer took 4.47ms. Allocated memory is still 524.3MB. Free memory is still 195.1MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:39:57,939 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.38ms. Allocated memory is still 121.6MB. Free memory is still 94.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 554.46ms. Allocated memory is still 121.6MB. Free memory was 76.8MB in the beginning and 80.3MB in the end (delta: -3.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 143.78ms. Allocated memory is still 121.6MB. Free memory was 79.9MB in the beginning and 72.7MB in the end (delta: 7.2MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 89.36ms. Allocated memory is still 121.6MB. Free memory was 72.7MB in the beginning and 68.1MB in the end (delta: 4.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1306.93ms. Allocated memory was 121.6MB in the beginning and 159.4MB in the end (delta: 37.7MB). Free memory was 68.1MB in the beginning and 92.7MB in the end (delta: -24.7MB). Peak memory consumption was 34.0MB. Max. memory is 16.1GB. * TraceAbstraction took 68181.45ms. Allocated memory was 159.4MB in the beginning and 524.3MB in the end (delta: 364.9MB). Free memory was 91.6MB in the beginning and 195.1MB in the end (delta: -103.5MB). Peak memory consumption was 261.3MB. Max. memory is 16.1GB. * Witness Printer took 4.47ms. Allocated memory is still 524.3MB. Free memory is still 195.1MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 350, overapproximation of bitwiseAnd at line 348. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 12); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (12 - 1); [L31] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 3); [L32] const SORT_5 msb_SORT_5 = (SORT_5)1 << (3 - 1); [L34] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 32); [L35] const SORT_9 msb_SORT_9 = (SORT_9)1 << (32 - 1); [L37] const SORT_46 mask_SORT_46 = (SORT_46)-1 >> (sizeof(SORT_46) * 8 - 5); [L38] const SORT_46 msb_SORT_46 = (SORT_46)1 << (5 - 1); [L40] const SORT_3 var_4 = 576; [L41] const SORT_5 var_6 = 0; [L42] const SORT_9 var_11 = 6; [L43] const SORT_3 var_14 = 36; [L44] const SORT_9 var_16 = 5; [L45] const SORT_3 var_19 = 2544; [L46] const SORT_9 var_21 = 4; [L47] const SORT_3 var_24 = 9; [L48] const SORT_9 var_26 = 3; [L49] const SORT_3 var_29 = 54; [L50] const SORT_9 var_31 = 2; [L51] const SORT_3 var_34 = 18; [L52] const SORT_9 var_36 = 1; [L53] const SORT_9 var_40 = 0; [L54] const SORT_46 var_47 = 0; [L55] const SORT_46 var_79 = 1; [L56] const SORT_1 var_116 = 1; [L57] const SORT_9 var_159 = 7; [L59] SORT_1 input_2; [L60] SORT_46 input_143; [L61] SORT_46 input_156; [L62] SORT_46 input_167; [L63] SORT_46 input_174; [L64] SORT_46 input_181; [L65] SORT_46 input_188; [L66] SORT_46 input_195; [L67] SORT_46 input_202; [L69] SORT_5 state_7 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L70] SORT_46 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L71] SORT_46 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L72] SORT_46 state_56 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L73] SORT_46 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L74] SORT_46 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L75] SORT_46 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L76] SORT_46 state_80 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L78] SORT_5 init_8_arg_1 = var_6; [L79] state_7 = init_8_arg_1 [L80] SORT_46 init_49_arg_1 = var_47; [L81] state_48 = init_49_arg_1 [L82] SORT_46 init_51_arg_1 = var_47; [L83] state_50 = init_51_arg_1 [L84] SORT_46 init_57_arg_1 = var_47; [L85] state_56 = init_57_arg_1 [L86] SORT_46 init_65_arg_1 = var_47; [L87] state_64 = init_65_arg_1 [L88] SORT_46 init_70_arg_1 = var_47; [L89] state_69 = init_70_arg_1 [L90] SORT_46 init_75_arg_1 = var_47; [L91] state_74 = init_75_arg_1 [L92] SORT_46 init_81_arg_1 = var_79; [L93] state_80 = init_81_arg_1 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_31=2, var_34=18, var_36=1, var_4=576, var_40=0, var_47=0, var_6=0, var_79=1] [L96] input_2 = __VERIFIER_nondet_uchar() [L97] input_143 = __VERIFIER_nondet_uchar() [L98] input_156 = __VERIFIER_nondet_uchar() [L99] input_167 = __VERIFIER_nondet_uchar() [L100] input_174 = __VERIFIER_nondet_uchar() [L101] input_181 = __VERIFIER_nondet_uchar() [L102] input_188 = __VERIFIER_nondet_uchar() [L103] input_195 = __VERIFIER_nondet_uchar() [L104] input_202 = __VERIFIER_nondet_uchar() [L107] SORT_5 var_39_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_31=2, var_34=18, var_36=1, var_39_arg_0=0, var_4=576, var_40=0, var_47=0, var_6=0, var_79=1] [L108] var_39_arg_0 = var_39_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_31=2, var_34=18, var_36=1, var_39_arg_0=0, var_4=576, var_40=0, var_47=0, var_6=0, var_79=1] [L109] SORT_9 var_39 = var_39_arg_0; [L110] SORT_9 var_41_arg_0 = var_39; [L111] SORT_9 var_41_arg_1 = var_40; [L112] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L113] SORT_5 var_35_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_31=2, var_34=18, var_35_arg_0=0, var_36=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L114] var_35_arg_0 = var_35_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_31=2, var_34=18, var_35_arg_0=0, var_36=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L115] SORT_9 var_35 = var_35_arg_0; [L116] SORT_9 var_37_arg_0 = var_35; [L117] SORT_9 var_37_arg_1 = var_36; [L118] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L119] SORT_5 var_30_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_30_arg_0=0, var_31=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L120] var_30_arg_0 = var_30_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_30_arg_0=0, var_31=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L121] SORT_9 var_30 = var_30_arg_0; [L122] SORT_9 var_32_arg_0 = var_30; [L123] SORT_9 var_32_arg_1 = var_31; [L124] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L125] SORT_5 var_25_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_25_arg_0=0, var_26=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L126] var_25_arg_0 = var_25_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_25_arg_0=0, var_26=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L127] SORT_9 var_25 = var_25_arg_0; [L128] SORT_9 var_27_arg_0 = var_25; [L129] SORT_9 var_27_arg_1 = var_26; [L130] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L131] SORT_5 var_20_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_20_arg_0=0, var_21=4, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L132] var_20_arg_0 = var_20_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_20_arg_0=0, var_21=4, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L133] SORT_9 var_20 = var_20_arg_0; [L134] SORT_9 var_22_arg_0 = var_20; [L135] SORT_9 var_22_arg_1 = var_21; [L136] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L137] SORT_5 var_15_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_15_arg_0=0, var_16=5, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L138] var_15_arg_0 = var_15_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_15_arg_0=0, var_16=5, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L139] SORT_9 var_15 = var_15_arg_0; [L140] SORT_9 var_17_arg_0 = var_15; [L141] SORT_9 var_17_arg_1 = var_16; [L142] SORT_1 var_17 = var_17_arg_0 == var_17_arg_1; [L143] SORT_5 var_10_arg_0 = state_7; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10_arg_0=0, var_11=6, var_116=1, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L144] var_10_arg_0 = var_10_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10_arg_0=0, var_11=6, var_116=1, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_47=0, var_6=0, var_79=1] [L145] SORT_9 var_10 = var_10_arg_0; [L146] SORT_9 var_12_arg_0 = var_10; [L147] SORT_9 var_12_arg_1 = var_11; [L148] SORT_1 var_12 = var_12_arg_0 == var_12_arg_1; [L149] SORT_1 var_13_arg_0 = var_12; [L150] SORT_3 var_13_arg_1 = var_4; [L151] SORT_3 var_13_arg_2 = var_4; [L152] SORT_3 var_13 = var_13_arg_0 ? var_13_arg_1 : var_13_arg_2; [L153] SORT_1 var_18_arg_0 = var_17; [L154] SORT_3 var_18_arg_1 = var_14; [L155] SORT_3 var_18_arg_2 = var_13; [L156] SORT_3 var_18 = var_18_arg_0 ? var_18_arg_1 : var_18_arg_2; [L157] SORT_1 var_23_arg_0 = var_22; [L158] SORT_3 var_23_arg_1 = var_19; [L159] SORT_3 var_23_arg_2 = var_18; [L160] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L161] SORT_1 var_28_arg_0 = var_27; [L162] SORT_3 var_28_arg_1 = var_24; [L163] SORT_3 var_28_arg_2 = var_23; [L164] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L165] SORT_1 var_33_arg_0 = var_32; [L166] SORT_3 var_33_arg_1 = var_29; [L167] SORT_3 var_33_arg_2 = var_28; [L168] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L169] SORT_1 var_38_arg_0 = var_37; [L170] SORT_3 var_38_arg_1 = var_34; [L171] SORT_3 var_38_arg_2 = var_33; [L172] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L173] SORT_1 var_42_arg_0 = var_41; [L174] SORT_3 var_42_arg_1 = var_14; [L175] SORT_3 var_42_arg_2 = var_38; [L176] SORT_3 var_42 = var_42_arg_0 ? var_42_arg_1 : var_42_arg_2; [L177] SORT_3 var_43_arg_0 = var_42; [L178] SORT_5 var_43 = var_43_arg_0 >> 0; [L179] SORT_5 var_44_arg_0 = var_43; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44_arg_0=36, var_47=0, var_6=0, var_79=1] [L180] var_44_arg_0 = var_44_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44_arg_0=4, var_47=0, var_6=0, var_79=1] [L181] SORT_9 var_44 = var_44_arg_0; [L182] SORT_9 var_45_arg_0 = var_44; [L183] SORT_9 var_45_arg_1 = var_21; [L184] SORT_1 var_45 = var_45_arg_0 == var_45_arg_1; [L185] SORT_3 var_52_arg_0 = var_42; [L186] SORT_5 var_52 = var_52_arg_0 >> 3; [L187] SORT_5 var_82_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_79=1, var_82_arg_0=4] [L188] var_82_arg_0 = var_82_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_79=1, var_82_arg_0=1] [L189] SORT_9 var_82 = var_82_arg_0; [L190] SORT_9 var_83_arg_0 = var_82; [L191] SORT_9 var_83_arg_1 = var_40; [L192] SORT_1 var_83 = var_83_arg_0 == var_83_arg_1; [L193] SORT_5 var_76_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_76_arg_0=4, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L194] var_76_arg_0 = var_76_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_76_arg_0=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L195] SORT_9 var_76 = var_76_arg_0; [L196] SORT_9 var_77_arg_0 = var_76; [L197] SORT_9 var_77_arg_1 = var_36; [L198] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L199] SORT_5 var_71_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_71_arg_0=4, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L200] var_71_arg_0 = var_71_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_71_arg_0=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L201] SORT_9 var_71 = var_71_arg_0; [L202] SORT_9 var_72_arg_0 = var_71; [L203] SORT_9 var_72_arg_1 = var_31; [L204] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L205] SORT_5 var_66_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_66_arg_0=4, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L206] var_66_arg_0 = var_66_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_66_arg_0=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L207] SORT_9 var_66 = var_66_arg_0; [L208] SORT_9 var_67_arg_0 = var_66; [L209] SORT_9 var_67_arg_1 = var_26; [L210] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L211] SORT_5 var_61_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_61_arg_0=4, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L212] var_61_arg_0 = var_61_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_6=0, var_61_arg_0=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L213] SORT_9 var_61 = var_61_arg_0; [L214] SORT_9 var_62_arg_0 = var_61; [L215] SORT_9 var_62_arg_1 = var_21; [L216] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L217] SORT_5 var_58_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_58_arg_0=4, var_6=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L218] var_58_arg_0 = var_58_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_58_arg_0=5, var_6=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L219] SORT_9 var_58 = var_58_arg_0; [L220] SORT_9 var_59_arg_0 = var_58; [L221] SORT_9 var_59_arg_1 = var_16; [L222] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L223] SORT_5 var_53_arg_0 = var_52; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53_arg_0=4, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L224] var_53_arg_0 = var_53_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53_arg_0=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0] [L225] SORT_9 var_53 = var_53_arg_0; [L226] SORT_9 var_54_arg_0 = var_53; [L227] SORT_9 var_54_arg_1 = var_11; [L228] SORT_1 var_54 = var_54_arg_0 == var_54_arg_1; [L229] SORT_1 var_55_arg_0 = var_54; [L230] SORT_46 var_55_arg_1 = state_50; [L231] SORT_46 var_55_arg_2 = state_48; [L232] SORT_46 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L233] SORT_1 var_60_arg_0 = var_59; [L234] SORT_46 var_60_arg_1 = state_56; [L235] SORT_46 var_60_arg_2 = var_55; [L236] SORT_46 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L237] SORT_1 var_63_arg_0 = var_62; [L238] SORT_46 var_63_arg_1 = state_56; [L239] SORT_46 var_63_arg_2 = var_60; [L240] SORT_46 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L241] SORT_1 var_68_arg_0 = var_67; [L242] SORT_46 var_68_arg_1 = state_64; [L243] SORT_46 var_68_arg_2 = var_63; [L244] SORT_46 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L245] SORT_1 var_73_arg_0 = var_72; [L246] SORT_46 var_73_arg_1 = state_69; [L247] SORT_46 var_73_arg_2 = var_68; [L248] SORT_46 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L249] SORT_1 var_78_arg_0 = var_77; [L250] SORT_46 var_78_arg_1 = state_74; [L251] SORT_46 var_78_arg_2 = var_73; [L252] SORT_46 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L253] SORT_1 var_84_arg_0 = var_83; [L254] SORT_46 var_84_arg_1 = state_80; [L255] SORT_46 var_84_arg_2 = var_78; [L256] SORT_46 var_84 = var_84_arg_0 ? var_84_arg_1 : var_84_arg_2; [L257] SORT_46 var_85_arg_0 = var_84; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85_arg_0=0] [L258] var_85_arg_0 = var_85_arg_0 & mask_SORT_46 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85_arg_0=0] [L259] SORT_9 var_85 = var_85_arg_0; [L260] SORT_9 var_86_arg_0 = var_85; [L261] SORT_9 var_86_arg_1 = var_40; [L262] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L263] SORT_1 var_87_arg_0 = var_45; [L264] SORT_1 var_87_arg_1 = var_86; [L265] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L266] SORT_1 var_88_arg_0 = var_87; [L267] SORT_1 var_88 = ~var_88_arg_0; [L268] SORT_3 var_89_arg_0 = var_42; [L269] SORT_5 var_89 = var_89_arg_0 >> 6; [L270] SORT_5 var_108_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_108_arg_0=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36] [L271] var_108_arg_0 = var_108_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_108_arg_0=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36] [L272] SORT_9 var_108 = var_108_arg_0; [L273] SORT_9 var_109_arg_0 = var_108; [L274] SORT_9 var_109_arg_1 = var_40; [L275] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L276] SORT_5 var_105_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_105_arg_0=0, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36] [L277] var_105_arg_0 = var_105_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_105_arg_0=0, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36] [L278] SORT_9 var_105 = var_105_arg_0; [L279] SORT_9 var_106_arg_0 = var_105; [L280] SORT_9 var_106_arg_1 = var_36; [L281] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L282] SORT_5 var_102_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_102_arg_0=0, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36] [L283] var_102_arg_0 = var_102_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_102_arg_0=0, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36] [L284] SORT_9 var_102 = var_102_arg_0; [L285] SORT_9 var_103_arg_0 = var_102; [L286] SORT_9 var_103_arg_1 = var_31; [L287] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L288] SORT_5 var_99_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_99_arg_0=0] [L289] var_99_arg_0 = var_99_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_99_arg_0=0] [L290] SORT_9 var_99 = var_99_arg_0; [L291] SORT_9 var_100_arg_0 = var_99; [L292] SORT_9 var_100_arg_1 = var_26; [L293] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L294] SORT_5 var_96_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_96_arg_0=0, var_99=0, var_99_arg_0=0] [L295] var_96_arg_0 = var_96_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_96_arg_0=0, var_99=0, var_99_arg_0=0] [L296] SORT_9 var_96 = var_96_arg_0; [L297] SORT_9 var_97_arg_0 = var_96; [L298] SORT_9 var_97_arg_1 = var_21; [L299] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L300] SORT_5 var_93_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_93_arg_0=0, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_99=0, var_99_arg_0=0] [L301] var_93_arg_0 = var_93_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_93_arg_0=0, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_99=0, var_99_arg_0=0] [L302] SORT_9 var_93 = var_93_arg_0; [L303] SORT_9 var_94_arg_0 = var_93; [L304] SORT_9 var_94_arg_1 = var_16; [L305] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L306] SORT_5 var_90_arg_0 = var_89; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_90_arg_0=0, var_93=0, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=5, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_99=0, var_99_arg_0=0] [L307] var_90_arg_0 = var_90_arg_0 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_90_arg_0=0, var_93=0, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=5, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_99=0, var_99_arg_0=0] [L308] SORT_9 var_90 = var_90_arg_0; [L309] SORT_9 var_91_arg_0 = var_90; [L310] SORT_9 var_91_arg_1 = var_11; [L311] SORT_1 var_91 = var_91_arg_0 == var_91_arg_1; [L312] SORT_1 var_92_arg_0 = var_91; [L313] SORT_46 var_92_arg_1 = state_50; [L314] SORT_46 var_92_arg_2 = state_48; [L315] SORT_46 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L316] SORT_1 var_95_arg_0 = var_94; [L317] SORT_46 var_95_arg_1 = state_56; [L318] SORT_46 var_95_arg_2 = var_92; [L319] SORT_46 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L320] SORT_1 var_98_arg_0 = var_97; [L321] SORT_46 var_98_arg_1 = state_56; [L322] SORT_46 var_98_arg_2 = var_95; [L323] SORT_46 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L324] SORT_1 var_101_arg_0 = var_100; [L325] SORT_46 var_101_arg_1 = state_64; [L326] SORT_46 var_101_arg_2 = var_98; [L327] SORT_46 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L328] SORT_1 var_104_arg_0 = var_103; [L329] SORT_46 var_104_arg_1 = state_69; [L330] SORT_46 var_104_arg_2 = var_101; [L331] SORT_46 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L332] SORT_1 var_107_arg_0 = var_106; [L333] SORT_46 var_107_arg_1 = state_74; [L334] SORT_46 var_107_arg_2 = var_104; [L335] SORT_46 var_107 = var_107_arg_0 ? var_107_arg_1 : var_107_arg_2; [L336] SORT_1 var_110_arg_0 = var_109; [L337] SORT_46 var_110_arg_1 = state_80; [L338] SORT_46 var_110_arg_2 = var_107; [L339] SORT_46 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L340] SORT_46 var_111_arg_0 = var_110; [L341] SORT_5 var_111 = var_111_arg_0 >> 0; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=0, var_107_arg_0=0, var_107_arg_1=0, var_107_arg_2=0, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=0, var_111=1, var_111_arg_0=1, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_90=0, var_90_arg_0=0, var_91=0, var_91_arg_0=0, var_91_arg_1=6, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=5, var_95=0, var_95_arg_0=0, var_95_arg_1=0, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_98=0, var_98_arg_0=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0] [L342] var_111 = var_111 & mask_SORT_5 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=0, var_107_arg_0=0, var_107_arg_1=0, var_107_arg_2=0, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=0, var_111=1, var_111_arg_0=1, var_116=1, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_90=0, var_90_arg_0=0, var_91=0, var_91_arg_0=0, var_91_arg_1=6, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=5, var_95=0, var_95_arg_0=0, var_95_arg_1=0, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_98=0, var_98_arg_0=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0] [L343] SORT_5 var_112_arg_0 = state_7; [L344] SORT_5 var_112_arg_1 = var_111; [L345] SORT_1 var_112 = var_112_arg_0 == var_112_arg_1; [L346] SORT_1 var_113_arg_0 = var_88; [L347] SORT_1 var_113_arg_1 = var_112; [L348] SORT_1 var_113 = var_113_arg_0 & var_113_arg_1; [L349] SORT_1 var_117_arg_0 = var_113; [L350] SORT_1 var_117 = ~var_117_arg_0; [L351] SORT_1 var_118_arg_0 = var_116; [L352] SORT_1 var_118_arg_1 = var_117; [L353] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=0, var_107_arg_0=0, var_107_arg_1=0, var_107_arg_2=0, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=0, var_111=1, var_111_arg_0=1, var_112=0, var_112_arg_0=0, var_112_arg_1=1, var_113=0, var_113_arg_0=255, var_113_arg_1=0, var_116=1, var_117=2, var_117_arg_0=0, var_118=1, var_118_arg_0=1, var_118_arg_1=2, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=255, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_90=0, var_90_arg_0=0, var_91=0, var_91_arg_0=0, var_91_arg_1=6, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=5, var_95=0, var_95_arg_0=0, var_95_arg_1=0, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_98=0, var_98_arg_0=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0] [L354] var_118 = var_118 & mask_SORT_1 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, input_143=2, input_156=6, input_167=5, input_174=4, input_181=7, input_188=3, input_195=1, input_2=9, input_202=8, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_10=0, var_100=0, var_100_arg_0=0, var_100_arg_1=3, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_103=0, var_103_arg_0=0, var_103_arg_1=2, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_106=0, var_106_arg_0=0, var_106_arg_1=1, var_107=0, var_107_arg_0=0, var_107_arg_1=0, var_107_arg_2=0, var_108=0, var_108_arg_0=0, var_109=1, var_109_arg_0=0, var_109_arg_1=0, var_10_arg_0=0, var_11=6, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=0, var_111=1, var_111_arg_0=1, var_112=0, var_112_arg_0=0, var_112_arg_1=1, var_113=0, var_113_arg_0=255, var_113_arg_1=0, var_116=1, var_117=2, var_117_arg_0=0, var_118=1, var_118_arg_0=1, var_118_arg_1=2, var_12=0, var_12_arg_0=0, var_12_arg_1=6, var_13=576, var_13_arg_0=0, var_13_arg_1=576, var_13_arg_2=576, var_14=36, var_15=0, var_159=7, var_15_arg_0=0, var_16=5, var_17=0, var_17_arg_0=0, var_17_arg_1=5, var_18=576, var_18_arg_0=0, var_18_arg_1=36, var_18_arg_2=576, var_19=2544, var_20=0, var_20_arg_0=0, var_21=4, var_22=0, var_22_arg_0=0, var_22_arg_1=4, var_23=576, var_23_arg_0=0, var_23_arg_1=2544, var_23_arg_2=576, var_24=9, var_25=0, var_25_arg_0=0, var_26=3, var_27=0, var_27_arg_0=0, var_27_arg_1=3, var_28=576, var_28_arg_0=0, var_28_arg_1=9, var_28_arg_2=576, var_29=54, var_30=0, var_30_arg_0=0, var_31=2, var_32=0, var_32_arg_0=0, var_32_arg_1=2, var_33=576, var_33_arg_0=0, var_33_arg_1=54, var_33_arg_2=576, var_34=18, var_35=0, var_35_arg_0=0, var_36=1, var_37=0, var_37_arg_0=0, var_37_arg_1=1, var_38=576, var_38_arg_0=0, var_38_arg_1=18, var_38_arg_2=576, var_39=0, var_39_arg_0=0, var_4=576, var_40=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=36, var_42_arg_0=1, var_42_arg_1=36, var_42_arg_2=576, var_43=36, var_43_arg_0=36, var_44=4, var_44_arg_0=4, var_45=1, var_45_arg_0=4, var_45_arg_1=4, var_47=0, var_52=4, var_52_arg_0=36, var_53=0, var_53_arg_0=0, var_54=0, var_54_arg_0=0, var_54_arg_1=6, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_55_arg_2=0, var_58=5, var_58_arg_0=5, var_59=1, var_59_arg_0=5, var_59_arg_1=5, var_6=0, var_60=0, var_60_arg_0=1, var_60_arg_1=0, var_60_arg_2=0, var_61=0, var_61_arg_0=0, var_62=0, var_62_arg_0=0, var_62_arg_1=4, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_66=0, var_66_arg_0=0, var_67=0, var_67_arg_0=0, var_67_arg_1=3, var_68=0, var_68_arg_0=0, var_68_arg_1=0, var_68_arg_2=0, var_71=0, var_71_arg_0=0, var_72=0, var_72_arg_0=0, var_72_arg_1=2, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_76=0, var_76_arg_0=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=1, var_82=1, var_82_arg_0=1, var_83=0, var_83_arg_0=1, var_83_arg_1=0, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=0, var_85=0, var_85_arg_0=0, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=255, var_88_arg_0=1, var_89=0, var_89_arg_0=36, var_90=0, var_90_arg_0=0, var_91=0, var_91_arg_0=0, var_91_arg_1=6, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_92_arg_2=0, var_93=0, var_93_arg_0=0, var_94=0, var_94_arg_0=0, var_94_arg_1=5, var_95=0, var_95_arg_0=0, var_95_arg_1=0, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_97=0, var_97_arg_0=0, var_97_arg_1=4, var_98=0, var_98_arg_0=0, var_98_arg_1=0, var_98_arg_2=0, var_99=0, var_99_arg_0=0] [L355] SORT_1 bad_119_arg_0 = var_118; [L356] CALL __VERIFIER_assert(!(bad_119_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 152 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 67.9s, OverallIterations: 23, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 38.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 40289 SdHoareTripleChecker+Valid, 27.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 40289 mSDsluCounter, 16202 SdHoareTripleChecker+Invalid, 23.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 11853 mSDsCounter, 119 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 22163 IncrementalHoareTripleChecker+Invalid, 22282 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 119 mSolverCounterUnsat, 4349 mSDtfsCounter, 22163 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 302 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 231 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1437 ImplicationChecksByTransitivity, 10.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=312occurred in iteration=22, InterpolantAutomatonStates: 235, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 22 MinimizatonAttempts, 12082 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 4.3s SatisfiabilityAnalysisTime, 23.3s InterpolantComputationTime, 1398 NumberOfCodeBlocks, 1398 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 1311 ConstructedInterpolants, 0 QuantifiedInterpolants, 8371 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-16 12:39:57,981 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 95941aa9b94eb68c259a2121738b5016c7e27e1ecdfd93242f944609798a4a7e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:40:00,356 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:40:00,360 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:40:00,406 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:40:00,406 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:40:00,411 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:40:00,414 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:40:00,421 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:40:00,424 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:40:00,429 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:40:00,431 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:40:00,433 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:40:00,434 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:40:00,436 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:40:00,438 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:40:00,443 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:40:00,444 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:40:00,446 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:40:00,448 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:40:00,453 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:40:00,457 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:40:00,460 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:40:00,462 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:40:00,464 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:40:00,470 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:40:00,475 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:40:00,475 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:40:00,476 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:40:00,478 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:40:00,479 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:40:00,480 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:40:00,481 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:40:00,483 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:40:00,484 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:40:00,485 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:40:00,485 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:40:00,486 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:40:00,487 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:40:00,487 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:40:00,489 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:40:00,490 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:40:00,491 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2022-11-16 12:40:00,543 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:40:00,543 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:40:00,544 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:40:00,545 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:40:00,546 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:40:00,546 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:40:00,547 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:40:00,548 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:40:00,548 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:40:00,548 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:40:00,549 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:40:00,550 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 12:40:00,550 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:40:00,550 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 12:40:00,551 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 12:40:00,551 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-16 12:40:00,551 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-16 12:40:00,551 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 12:40:00,552 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:40:00,552 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 12:40:00,552 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:40:00,552 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:40:00,552 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:40:00,553 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:40:00,553 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:40:00,553 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:40:00,554 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 12:40:00,554 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-11-16 12:40:00,554 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-16 12:40:00,554 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-16 12:40:00,555 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-16 12:40:00,555 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 12:40:00,555 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-16 12:40:00,555 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 95941aa9b94eb68c259a2121738b5016c7e27e1ecdfd93242f944609798a4a7e [2022-11-16 12:40:01,005 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:40:01,030 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:40:01,034 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:40:01,035 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:40:01,038 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:40:01,040 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c [2022-11-16 12:40:01,121 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/46c36d36a/7cf261faa20f41599416e1cc3eca0d8d/FLAG21574266c [2022-11-16 12:40:01,773 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:40:01,773 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c [2022-11-16 12:40:01,785 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/46c36d36a/7cf261faa20f41599416e1cc3eca0d8d/FLAG21574266c [2022-11-16 12:40:02,098 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/data/46c36d36a/7cf261faa20f41599416e1cc3eca0d8d [2022-11-16 12:40:02,103 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:40:02,105 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:40:02,108 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:40:02,108 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:40:02,112 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:40:02,114 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,115 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@76017f06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02, skipping insertion in model container [2022-11-16 12:40:02,115 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,125 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:40:02,183 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:40:02,420 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c[1107,1120] [2022-11-16 12:40:02,691 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:40:02,698 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:40:02,713 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.v_non-pipelined-microprocessor.c[1107,1120] [2022-11-16 12:40:02,796 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:40:02,811 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:40:02,812 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02 WrapperNode [2022-11-16 12:40:02,812 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:40:02,819 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:40:02,819 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:40:02,819 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:40:02,828 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,857 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,936 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 588 [2022-11-16 12:40:02,936 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:40:02,937 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:40:02,938 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:40:02,938 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:40:02,949 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,949 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,968 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,971 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:02,996 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:03,001 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:03,004 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:03,007 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:03,012 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:40:03,013 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:40:03,013 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:40:03,013 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:40:03,014 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (1/1) ... [2022-11-16 12:40:03,020 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:40:03,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:40:03,062 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:40:03,072 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:40:03,105 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:40:03,106 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:40:03,334 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:40:03,337 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:40:04,199 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:40:04,206 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:40:04,206 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 12:40:04,208 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:40:04 BoogieIcfgContainer [2022-11-16 12:40:04,208 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:40:04,211 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:40:04,211 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:40:04,214 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:40:04,214 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:40:02" (1/3) ... [2022-11-16 12:40:04,215 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2dd69fed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:40:04, skipping insertion in model container [2022-11-16 12:40:04,215 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:40:02" (2/3) ... [2022-11-16 12:40:04,216 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2dd69fed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:40:04, skipping insertion in model container [2022-11-16 12:40:04,216 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:40:04" (3/3) ... [2022-11-16 12:40:04,217 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.v_non-pipelined-microprocessor.c [2022-11-16 12:40:04,235 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:40:04,236 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-16 12:40:04,275 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:40:04,281 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@14791203, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:40:04,282 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-16 12:40:04,290 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:40:04,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:40:04,298 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:40:04,299 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:40:04,300 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 12:40:04,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:40:04,306 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-16 12:40:04,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 12:40:04,322 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1525361905] [2022-11-16 12:40:04,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:40:04,322 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:40:04,323 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 12:40:04,328 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 12:40:04,330 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-16 12:40:04,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:40:04,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 12:40:04,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 12:40:04,994 INFO L130 FreeRefinementEngine]: Strategy WOLF found a feasible trace [2022-11-16 12:40:04,998 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-16 12:40:05,000 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-16 12:40:05,023 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-16 12:40:05,208 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 12:40:05,212 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-16 12:40:05,216 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-16 12:40:05,266 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:40:05,279 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:40:05 BoogieIcfgContainer [2022-11-16 12:40:05,280 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-16 12:40:05,282 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 12:40:05,283 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 12:40:05,283 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 12:40:05,283 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:40:04" (3/4) ... [2022-11-16 12:40:05,289 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-16 12:40:05,300 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 12:40:05,420 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/witness.graphml [2022-11-16 12:40:05,421 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 12:40:05,424 INFO L158 Benchmark]: Toolchain (without parser) took 3317.51ms. Allocated memory was 65.0MB in the beginning and 96.5MB in the end (delta: 31.5MB). Free memory was 44.3MB in the beginning and 39.9MB in the end (delta: 4.4MB). Peak memory consumption was 37.6MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,425 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 65.0MB. Free memory was 45.6MB in the beginning and 45.6MB in the end (delta: 55.9kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 12:40:05,425 INFO L158 Benchmark]: CACSL2BoogieTranslator took 710.66ms. Allocated memory is still 65.0MB. Free memory was 44.0MB in the beginning and 35.9MB in the end (delta: 8.1MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,426 INFO L158 Benchmark]: Boogie Procedure Inliner took 117.51ms. Allocated memory is still 65.0MB. Free memory was 35.7MB in the beginning and 30.9MB in the end (delta: 4.8MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,427 INFO L158 Benchmark]: Boogie Preprocessor took 75.24ms. Allocated memory is still 65.0MB. Free memory was 30.9MB in the beginning and 45.5MB in the end (delta: -14.6MB). Peak memory consumption was 7.4MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,427 INFO L158 Benchmark]: RCFGBuilder took 1195.42ms. Allocated memory was 65.0MB in the beginning and 96.5MB in the end (delta: 31.5MB). Free memory was 45.5MB in the beginning and 54.3MB in the end (delta: -8.8MB). Peak memory consumption was 29.6MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,428 INFO L158 Benchmark]: TraceAbstraction took 1070.00ms. Allocated memory is still 96.5MB. Free memory was 53.6MB in the beginning and 47.6MB in the end (delta: 6.0MB). Peak memory consumption was 5.8MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,428 INFO L158 Benchmark]: Witness Printer took 138.96ms. Allocated memory is still 96.5MB. Free memory was 47.6MB in the beginning and 39.9MB in the end (delta: 7.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-16 12:40:05,430 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 65.0MB. Free memory was 45.6MB in the beginning and 45.6MB in the end (delta: 55.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 710.66ms. Allocated memory is still 65.0MB. Free memory was 44.0MB in the beginning and 35.9MB in the end (delta: 8.1MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 117.51ms. Allocated memory is still 65.0MB. Free memory was 35.7MB in the beginning and 30.9MB in the end (delta: 4.8MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 75.24ms. Allocated memory is still 65.0MB. Free memory was 30.9MB in the beginning and 45.5MB in the end (delta: -14.6MB). Peak memory consumption was 7.4MB. Max. memory is 16.1GB. * RCFGBuilder took 1195.42ms. Allocated memory was 65.0MB in the beginning and 96.5MB in the end (delta: 31.5MB). Free memory was 45.5MB in the beginning and 54.3MB in the end (delta: -8.8MB). Peak memory consumption was 29.6MB. Max. memory is 16.1GB. * TraceAbstraction took 1070.00ms. Allocated memory is still 96.5MB. Free memory was 53.6MB in the beginning and 47.6MB in the end (delta: 6.0MB). Peak memory consumption was 5.8MB. Max. memory is 16.1GB. * Witness Printer took 138.96ms. Allocated memory is still 96.5MB. Free memory was 47.6MB in the beginning and 39.9MB in the end (delta: 7.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 20]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 12); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (12 - 1); [L31] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 3); [L32] const SORT_5 msb_SORT_5 = (SORT_5)1 << (3 - 1); [L34] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 32); [L35] const SORT_9 msb_SORT_9 = (SORT_9)1 << (32 - 1); [L37] const SORT_46 mask_SORT_46 = (SORT_46)-1 >> (sizeof(SORT_46) * 8 - 5); [L38] const SORT_46 msb_SORT_46 = (SORT_46)1 << (5 - 1); [L40] const SORT_3 var_4 = 576; [L41] const SORT_5 var_6 = 0; [L42] const SORT_9 var_11 = 6; [L43] const SORT_3 var_14 = 36; [L44] const SORT_9 var_16 = 5; [L45] const SORT_3 var_19 = 2544; [L46] const SORT_9 var_21 = 4; [L47] const SORT_3 var_24 = 9; [L48] const SORT_9 var_26 = 3; [L49] const SORT_3 var_29 = 54; [L50] const SORT_9 var_31 = 2; [L51] const SORT_3 var_34 = 18; [L52] const SORT_9 var_36 = 1; [L53] const SORT_9 var_40 = 0; [L54] const SORT_46 var_47 = 0; [L55] const SORT_46 var_79 = 1; [L56] const SORT_1 var_116 = 1; [L57] const SORT_9 var_159 = 7; [L59] SORT_1 input_2; [L60] SORT_46 input_143; [L61] SORT_46 input_156; [L62] SORT_46 input_167; [L63] SORT_46 input_174; [L64] SORT_46 input_181; [L65] SORT_46 input_188; [L66] SORT_46 input_195; [L67] SORT_46 input_202; [L69] SORT_5 state_7 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L70] SORT_46 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L71] SORT_46 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L72] SORT_46 state_56 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L73] SORT_46 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L74] SORT_46 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L75] SORT_46 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L76] SORT_46 state_80 = __VERIFIER_nondet_uchar() & mask_SORT_46; [L78] SORT_5 init_8_arg_1 = var_6; [L79] state_7 = init_8_arg_1 [L80] SORT_46 init_49_arg_1 = var_47; [L81] state_48 = init_49_arg_1 [L82] SORT_46 init_51_arg_1 = var_47; [L83] state_50 = init_51_arg_1 [L84] SORT_46 init_57_arg_1 = var_47; [L85] state_56 = init_57_arg_1 [L86] SORT_46 init_65_arg_1 = var_47; [L87] state_64 = init_65_arg_1 [L88] SORT_46 init_70_arg_1 = var_47; [L89] state_69 = init_70_arg_1 [L90] SORT_46 init_75_arg_1 = var_47; [L91] state_74 = init_75_arg_1 [L92] SORT_46 init_81_arg_1 = var_79; [L93] state_80 = init_81_arg_1 VAL [init_49_arg_1=0, init_51_arg_1=0, init_57_arg_1=0, init_65_arg_1=0, init_70_arg_1=0, init_75_arg_1=0, init_81_arg_1=1, init_8_arg_1=0, mask_SORT_1=1, mask_SORT_3=4095, mask_SORT_46=31, mask_SORT_5=7, mask_SORT_9=4294967295, msb_SORT_1=1, msb_SORT_3=2048, msb_SORT_46=16, msb_SORT_5=4, msb_SORT_9=2147483648, state_48=0, state_50=0, state_56=0, state_64=0, state_69=0, state_7=0, state_74=0, state_80=1, var_11=6, var_116=1, var_14=36, var_159=7, var_16=5, var_19=2544, var_21=4, var_24=9, var_26=3, var_29=54, var_31=2, var_34=18, var_36=1, var_4=576, var_40=0, var_47=0, var_6=0, var_79=1] [L96] input_2 = __VERIFIER_nondet_uchar() [L97] input_143 = __VERIFIER_nondet_uchar() [L98] input_156 = __VERIFIER_nondet_uchar() [L99] input_167 = __VERIFIER_nondet_uchar() [L100] input_174 = __VERIFIER_nondet_uchar() [L101] input_181 = __VERIFIER_nondet_uchar() [L102] input_188 = __VERIFIER_nondet_uchar() [L103] input_195 = __VERIFIER_nondet_uchar() [L104] input_202 = __VERIFIER_nondet_uchar() [L107] SORT_5 var_39_arg_0 = state_7; [L108] var_39_arg_0 = var_39_arg_0 & mask_SORT_5 [L109] SORT_9 var_39 = var_39_arg_0; [L110] SORT_9 var_41_arg_0 = var_39; [L111] SORT_9 var_41_arg_1 = var_40; [L112] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L113] SORT_5 var_35_arg_0 = state_7; [L114] var_35_arg_0 = var_35_arg_0 & mask_SORT_5 [L115] SORT_9 var_35 = var_35_arg_0; [L116] SORT_9 var_37_arg_0 = var_35; [L117] SORT_9 var_37_arg_1 = var_36; [L118] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L119] SORT_5 var_30_arg_0 = state_7; [L120] var_30_arg_0 = var_30_arg_0 & mask_SORT_5 [L121] SORT_9 var_30 = var_30_arg_0; [L122] SORT_9 var_32_arg_0 = var_30; [L123] SORT_9 var_32_arg_1 = var_31; [L124] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L125] SORT_5 var_25_arg_0 = state_7; [L126] var_25_arg_0 = var_25_arg_0 & mask_SORT_5 [L127] SORT_9 var_25 = var_25_arg_0; [L128] SORT_9 var_27_arg_0 = var_25; [L129] SORT_9 var_27_arg_1 = var_26; [L130] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L131] SORT_5 var_20_arg_0 = state_7; [L132] var_20_arg_0 = var_20_arg_0 & mask_SORT_5 [L133] SORT_9 var_20 = var_20_arg_0; [L134] SORT_9 var_22_arg_0 = var_20; [L135] SORT_9 var_22_arg_1 = var_21; [L136] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L137] SORT_5 var_15_arg_0 = state_7; [L138] var_15_arg_0 = var_15_arg_0 & mask_SORT_5 [L139] SORT_9 var_15 = var_15_arg_0; [L140] SORT_9 var_17_arg_0 = var_15; [L141] SORT_9 var_17_arg_1 = var_16; [L142] SORT_1 var_17 = var_17_arg_0 == var_17_arg_1; [L143] SORT_5 var_10_arg_0 = state_7; [L144] var_10_arg_0 = var_10_arg_0 & mask_SORT_5 [L145] SORT_9 var_10 = var_10_arg_0; [L146] SORT_9 var_12_arg_0 = var_10; [L147] SORT_9 var_12_arg_1 = var_11; [L148] SORT_1 var_12 = var_12_arg_0 == var_12_arg_1; [L149] SORT_1 var_13_arg_0 = var_12; [L150] SORT_3 var_13_arg_1 = var_4; [L151] SORT_3 var_13_arg_2 = var_4; [L152] SORT_3 var_13 = var_13_arg_0 ? var_13_arg_1 : var_13_arg_2; [L153] SORT_1 var_18_arg_0 = var_17; [L154] SORT_3 var_18_arg_1 = var_14; [L155] SORT_3 var_18_arg_2 = var_13; [L156] SORT_3 var_18 = var_18_arg_0 ? var_18_arg_1 : var_18_arg_2; [L157] SORT_1 var_23_arg_0 = var_22; [L158] SORT_3 var_23_arg_1 = var_19; [L159] SORT_3 var_23_arg_2 = var_18; [L160] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L161] SORT_1 var_28_arg_0 = var_27; [L162] SORT_3 var_28_arg_1 = var_24; [L163] SORT_3 var_28_arg_2 = var_23; [L164] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L165] SORT_1 var_33_arg_0 = var_32; [L166] SORT_3 var_33_arg_1 = var_29; [L167] SORT_3 var_33_arg_2 = var_28; [L168] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L169] SORT_1 var_38_arg_0 = var_37; [L170] SORT_3 var_38_arg_1 = var_34; [L171] SORT_3 var_38_arg_2 = var_33; [L172] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L173] SORT_1 var_42_arg_0 = var_41; [L174] SORT_3 var_42_arg_1 = var_14; [L175] SORT_3 var_42_arg_2 = var_38; [L176] SORT_3 var_42 = var_42_arg_0 ? var_42_arg_1 : var_42_arg_2; [L177] SORT_3 var_43_arg_0 = var_42; [L178] SORT_5 var_43 = var_43_arg_0 >> 0; [L179] SORT_5 var_44_arg_0 = var_43; [L180] var_44_arg_0 = var_44_arg_0 & mask_SORT_5 [L181] SORT_9 var_44 = var_44_arg_0; [L182] SORT_9 var_45_arg_0 = var_44; [L183] SORT_9 var_45_arg_1 = var_21; [L184] SORT_1 var_45 = var_45_arg_0 == var_45_arg_1; [L185] SORT_3 var_52_arg_0 = var_42; [L186] SORT_5 var_52 = var_52_arg_0 >> 3; [L187] SORT_5 var_82_arg_0 = var_52; [L188] var_82_arg_0 = var_82_arg_0 & mask_SORT_5 [L189] SORT_9 var_82 = var_82_arg_0; [L190] SORT_9 var_83_arg_0 = var_82; [L191] SORT_9 var_83_arg_1 = var_40; [L192] SORT_1 var_83 = var_83_arg_0 == var_83_arg_1; [L193] SORT_5 var_76_arg_0 = var_52; [L194] var_76_arg_0 = var_76_arg_0 & mask_SORT_5 [L195] SORT_9 var_76 = var_76_arg_0; [L196] SORT_9 var_77_arg_0 = var_76; [L197] SORT_9 var_77_arg_1 = var_36; [L198] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L199] SORT_5 var_71_arg_0 = var_52; [L200] var_71_arg_0 = var_71_arg_0 & mask_SORT_5 [L201] SORT_9 var_71 = var_71_arg_0; [L202] SORT_9 var_72_arg_0 = var_71; [L203] SORT_9 var_72_arg_1 = var_31; [L204] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L205] SORT_5 var_66_arg_0 = var_52; [L206] var_66_arg_0 = var_66_arg_0 & mask_SORT_5 [L207] SORT_9 var_66 = var_66_arg_0; [L208] SORT_9 var_67_arg_0 = var_66; [L209] SORT_9 var_67_arg_1 = var_26; [L210] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L211] SORT_5 var_61_arg_0 = var_52; [L212] var_61_arg_0 = var_61_arg_0 & mask_SORT_5 [L213] SORT_9 var_61 = var_61_arg_0; [L214] SORT_9 var_62_arg_0 = var_61; [L215] SORT_9 var_62_arg_1 = var_21; [L216] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L217] SORT_5 var_58_arg_0 = var_52; [L218] var_58_arg_0 = var_58_arg_0 & mask_SORT_5 [L219] SORT_9 var_58 = var_58_arg_0; [L220] SORT_9 var_59_arg_0 = var_58; [L221] SORT_9 var_59_arg_1 = var_16; [L222] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L223] SORT_5 var_53_arg_0 = var_52; [L224] var_53_arg_0 = var_53_arg_0 & mask_SORT_5 [L225] SORT_9 var_53 = var_53_arg_0; [L226] SORT_9 var_54_arg_0 = var_53; [L227] SORT_9 var_54_arg_1 = var_11; [L228] SORT_1 var_54 = var_54_arg_0 == var_54_arg_1; [L229] SORT_1 var_55_arg_0 = var_54; [L230] SORT_46 var_55_arg_1 = state_50; [L231] SORT_46 var_55_arg_2 = state_48; [L232] SORT_46 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L233] SORT_1 var_60_arg_0 = var_59; [L234] SORT_46 var_60_arg_1 = state_56; [L235] SORT_46 var_60_arg_2 = var_55; [L236] SORT_46 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L237] SORT_1 var_63_arg_0 = var_62; [L238] SORT_46 var_63_arg_1 = state_56; [L239] SORT_46 var_63_arg_2 = var_60; [L240] SORT_46 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L241] SORT_1 var_68_arg_0 = var_67; [L242] SORT_46 var_68_arg_1 = state_64; [L243] SORT_46 var_68_arg_2 = var_63; [L244] SORT_46 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L245] SORT_1 var_73_arg_0 = var_72; [L246] SORT_46 var_73_arg_1 = state_69; [L247] SORT_46 var_73_arg_2 = var_68; [L248] SORT_46 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L249] SORT_1 var_78_arg_0 = var_77; [L250] SORT_46 var_78_arg_1 = state_74; [L251] SORT_46 var_78_arg_2 = var_73; [L252] SORT_46 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L253] SORT_1 var_84_arg_0 = var_83; [L254] SORT_46 var_84_arg_1 = state_80; [L255] SORT_46 var_84_arg_2 = var_78; [L256] SORT_46 var_84 = var_84_arg_0 ? var_84_arg_1 : var_84_arg_2; [L257] SORT_46 var_85_arg_0 = var_84; [L258] var_85_arg_0 = var_85_arg_0 & mask_SORT_46 [L259] SORT_9 var_85 = var_85_arg_0; [L260] SORT_9 var_86_arg_0 = var_85; [L261] SORT_9 var_86_arg_1 = var_40; [L262] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L263] SORT_1 var_87_arg_0 = var_45; [L264] SORT_1 var_87_arg_1 = var_86; [L265] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L266] SORT_1 var_88_arg_0 = var_87; [L267] SORT_1 var_88 = ~var_88_arg_0; [L268] SORT_3 var_89_arg_0 = var_42; [L269] SORT_5 var_89 = var_89_arg_0 >> 6; [L270] SORT_5 var_108_arg_0 = var_89; [L271] var_108_arg_0 = var_108_arg_0 & mask_SORT_5 [L272] SORT_9 var_108 = var_108_arg_0; [L273] SORT_9 var_109_arg_0 = var_108; [L274] SORT_9 var_109_arg_1 = var_40; [L275] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L276] SORT_5 var_105_arg_0 = var_89; [L277] var_105_arg_0 = var_105_arg_0 & mask_SORT_5 [L278] SORT_9 var_105 = var_105_arg_0; [L279] SORT_9 var_106_arg_0 = var_105; [L280] SORT_9 var_106_arg_1 = var_36; [L281] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L282] SORT_5 var_102_arg_0 = var_89; [L283] var_102_arg_0 = var_102_arg_0 & mask_SORT_5 [L284] SORT_9 var_102 = var_102_arg_0; [L285] SORT_9 var_103_arg_0 = var_102; [L286] SORT_9 var_103_arg_1 = var_31; [L287] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L288] SORT_5 var_99_arg_0 = var_89; [L289] var_99_arg_0 = var_99_arg_0 & mask_SORT_5 [L290] SORT_9 var_99 = var_99_arg_0; [L291] SORT_9 var_100_arg_0 = var_99; [L292] SORT_9 var_100_arg_1 = var_26; [L293] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L294] SORT_5 var_96_arg_0 = var_89; [L295] var_96_arg_0 = var_96_arg_0 & mask_SORT_5 [L296] SORT_9 var_96 = var_96_arg_0; [L297] SORT_9 var_97_arg_0 = var_96; [L298] SORT_9 var_97_arg_1 = var_21; [L299] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L300] SORT_5 var_93_arg_0 = var_89; [L301] var_93_arg_0 = var_93_arg_0 & mask_SORT_5 [L302] SORT_9 var_93 = var_93_arg_0; [L303] SORT_9 var_94_arg_0 = var_93; [L304] SORT_9 var_94_arg_1 = var_16; [L305] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L306] SORT_5 var_90_arg_0 = var_89; [L307] var_90_arg_0 = var_90_arg_0 & mask_SORT_5 [L308] SORT_9 var_90 = var_90_arg_0; [L309] SORT_9 var_91_arg_0 = var_90; [L310] SORT_9 var_91_arg_1 = var_11; [L311] SORT_1 var_91 = var_91_arg_0 == var_91_arg_1; [L312] SORT_1 var_92_arg_0 = var_91; [L313] SORT_46 var_92_arg_1 = state_50; [L314] SORT_46 var_92_arg_2 = state_48; [L315] SORT_46 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L316] SORT_1 var_95_arg_0 = var_94; [L317] SORT_46 var_95_arg_1 = state_56; [L318] SORT_46 var_95_arg_2 = var_92; [L319] SORT_46 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L320] SORT_1 var_98_arg_0 = var_97; [L321] SORT_46 var_98_arg_1 = state_56; [L322] SORT_46 var_98_arg_2 = var_95; [L323] SORT_46 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L324] SORT_1 var_101_arg_0 = var_100; [L325] SORT_46 var_101_arg_1 = state_64; [L326] SORT_46 var_101_arg_2 = var_98; [L327] SORT_46 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L328] SORT_1 var_104_arg_0 = var_103; [L329] SORT_46 var_104_arg_1 = state_69; [L330] SORT_46 var_104_arg_2 = var_101; [L331] SORT_46 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L332] SORT_1 var_107_arg_0 = var_106; [L333] SORT_46 var_107_arg_1 = state_74; [L334] SORT_46 var_107_arg_2 = var_104; [L335] SORT_46 var_107 = var_107_arg_0 ? var_107_arg_1 : var_107_arg_2; [L336] SORT_1 var_110_arg_0 = var_109; [L337] SORT_46 var_110_arg_1 = state_80; [L338] SORT_46 var_110_arg_2 = var_107; [L339] SORT_46 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L340] SORT_46 var_111_arg_0 = var_110; [L341] SORT_5 var_111 = var_111_arg_0 >> 0; [L342] var_111 = var_111 & mask_SORT_5 [L343] SORT_5 var_112_arg_0 = state_7; [L344] SORT_5 var_112_arg_1 = var_111; [L345] SORT_1 var_112 = var_112_arg_0 == var_112_arg_1; [L346] SORT_1 var_113_arg_0 = var_88; [L347] SORT_1 var_113_arg_1 = var_112; [L348] SORT_1 var_113 = var_113_arg_0 & var_113_arg_1; [L349] SORT_1 var_117_arg_0 = var_113; [L350] SORT_1 var_117 = ~var_117_arg_0; [L351] SORT_1 var_118_arg_0 = var_116; [L352] SORT_1 var_118_arg_1 = var_117; [L353] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L354] var_118 = var_118 & mask_SORT_1 [L355] SORT_1 bad_119_arg_0 = var_118; [L356] CALL __VERIFIER_assert(!(bad_119_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 11 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 1.0s, OverallIterations: 1, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=11occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 5 NumberOfCodeBlocks, 5 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-16 12:40:05,466 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_61e2a0b2-b8e8-4d5b-a94c-334d5cd50390/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE