./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/list-simple/dll2n_remove_all.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/list-simple/dll2n_remove_all.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b594cdd667b896d6ce097f6fd96950290806f015d929f3b2b06ffea35d861f89 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:33:22,322 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:33:22,325 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:33:22,367 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:33:22,368 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:33:22,372 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:33:22,375 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:33:22,378 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:33:22,381 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:33:22,386 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:33:22,388 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:33:22,390 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:33:22,391 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:33:22,393 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:33:22,395 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:33:22,397 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:33:22,399 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:33:22,400 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:33:22,401 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:33:22,408 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:33:22,411 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:33:22,412 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:33:22,415 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:33:22,416 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:33:22,425 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:33:22,427 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:33:22,427 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:33:22,429 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:33:22,430 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:33:22,431 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:33:22,431 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:33:22,432 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:33:22,436 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:33:22,437 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:33:22,439 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:33:22,439 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:33:22,440 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:33:22,441 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:33:22,441 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:33:22,442 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:33:22,443 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:33:22,444 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-16 12:33:22,485 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:33:22,486 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:33:22,486 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:33:22,487 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:33:22,488 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:33:22,488 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:33:22,489 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:33:22,490 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:33:22,490 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:33:22,490 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:33:22,492 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 12:33:22,492 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 12:33:22,492 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:33:22,493 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 12:33:22,493 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:33:22,493 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-16 12:33:22,494 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-16 12:33:22,494 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-16 12:33:22,494 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:33:22,494 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 12:33:22,495 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 12:33:22,495 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:33:22,495 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:33:22,496 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:33:22,496 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:33:22,496 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:33:22,497 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:33:22,497 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:33:22,497 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:33:22,498 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 12:33:22,499 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b594cdd667b896d6ce097f6fd96950290806f015d929f3b2b06ffea35d861f89 [2022-11-16 12:33:22,841 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:33:22,869 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:33:22,872 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:33:22,874 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:33:22,875 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:33:22,877 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/list-simple/dll2n_remove_all.i [2022-11-16 12:33:22,946 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/data/2742436a1/cb5bf19f6a0c476980da92eaee2b357e/FLAG0019e4142 [2022-11-16 12:33:23,480 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:33:23,484 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/sv-benchmarks/c/list-simple/dll2n_remove_all.i [2022-11-16 12:33:23,503 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/data/2742436a1/cb5bf19f6a0c476980da92eaee2b357e/FLAG0019e4142 [2022-11-16 12:33:23,742 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/data/2742436a1/cb5bf19f6a0c476980da92eaee2b357e [2022-11-16 12:33:23,745 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:33:23,747 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:33:23,751 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:33:23,751 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:33:23,755 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:33:23,756 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:33:23" (1/1) ... [2022-11-16 12:33:23,757 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5387c7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:23, skipping insertion in model container [2022-11-16 12:33:23,758 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:33:23" (1/1) ... [2022-11-16 12:33:23,765 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:33:23,817 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:33:24,171 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/sv-benchmarks/c/list-simple/dll2n_remove_all.i[24090,24103] [2022-11-16 12:33:24,174 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:33:24,181 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:33:24,244 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/sv-benchmarks/c/list-simple/dll2n_remove_all.i[24090,24103] [2022-11-16 12:33:24,245 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:33:24,269 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:33:24,270 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24 WrapperNode [2022-11-16 12:33:24,270 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:33:24,271 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:33:24,271 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:33:24,272 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:33:24,279 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,292 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,312 INFO L138 Inliner]: procedures = 126, calls = 31, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 81 [2022-11-16 12:33:24,312 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:33:24,313 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:33:24,313 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:33:24,313 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:33:24,322 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,322 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,326 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,327 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,334 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,338 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,340 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,341 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,344 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:33:24,345 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:33:24,345 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:33:24,345 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:33:24,347 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (1/1) ... [2022-11-16 12:33:24,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:33:24,377 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:24,390 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:33:24,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:33:24,423 INFO L130 BoogieDeclarations]: Found specification of procedure myexit [2022-11-16 12:33:24,424 INFO L138 BoogieDeclarations]: Found implementation of procedure myexit [2022-11-16 12:33:24,424 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-16 12:33:24,424 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 12:33:24,424 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 12:33:24,424 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 12:33:24,424 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-16 12:33:24,424 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-16 12:33:24,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 12:33:24,425 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-16 12:33:24,425 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 12:33:24,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:33:24,425 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:33:24,536 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:33:24,538 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:33:24,577 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint myexitFINAL: assume true; [2022-11-16 12:33:24,893 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:33:24,899 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:33:24,900 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-16 12:33:24,901 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:33:24 BoogieIcfgContainer [2022-11-16 12:33:24,902 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:33:24,904 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:33:24,904 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:33:24,907 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:33:24,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:33:23" (1/3) ... [2022-11-16 12:33:24,908 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7bbe12d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:33:24, skipping insertion in model container [2022-11-16 12:33:24,909 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:33:24" (2/3) ... [2022-11-16 12:33:24,909 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7bbe12d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:33:24, skipping insertion in model container [2022-11-16 12:33:24,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:33:24" (3/3) ... [2022-11-16 12:33:24,911 INFO L112 eAbstractionObserver]: Analyzing ICFG dll2n_remove_all.i [2022-11-16 12:33:24,930 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:33:24,930 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 25 error locations. [2022-11-16 12:33:24,998 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:33:25,006 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2296439c, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:33:25,007 INFO L358 AbstractCegarLoop]: Starting to check reachability of 25 error locations. [2022-11-16 12:33:25,013 INFO L276 IsEmpty]: Start isEmpty. Operand has 59 states, 32 states have (on average 2.03125) internal successors, (65), 57 states have internal predecessors, (65), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:33:25,020 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:25,020 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:33:25,022 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:25,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:25,033 INFO L85 PathProgramCache]: Analyzing trace with hash 33471376, now seen corresponding path program 1 times [2022-11-16 12:33:25,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:25,045 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1053944371] [2022-11-16 12:33:25,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:25,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:25,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:25,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:25,322 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:25,322 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1053944371] [2022-11-16 12:33:25,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1053944371] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:25,323 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:33:25,323 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:33:25,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035729506] [2022-11-16 12:33:25,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:25,330 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:33:25,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:25,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:33:25,359 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:25,362 INFO L87 Difference]: Start difference. First operand has 59 states, 32 states have (on average 2.03125) internal successors, (65), 57 states have internal predecessors, (65), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:25,533 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. [2022-11-16 12:33:25,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:33:25,537 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:33:25,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:25,547 INFO L225 Difference]: With dead ends: 86 [2022-11-16 12:33:25,547 INFO L226 Difference]: Without dead ends: 81 [2022-11-16 12:33:25,549 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:25,552 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 43 mSDsluCounter, 25 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:25,553 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 93 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:33:25,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2022-11-16 12:33:25,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 51. [2022-11-16 12:33:25,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 29 states have (on average 1.8620689655172413) internal successors, (54), 50 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 54 transitions. [2022-11-16 12:33:25,587 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 54 transitions. Word has length 5 [2022-11-16 12:33:25,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:25,588 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 54 transitions. [2022-11-16 12:33:25,588 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,588 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 54 transitions. [2022-11-16 12:33:25,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:33:25,589 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:25,589 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:33:25,589 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 12:33:25,590 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:25,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:25,591 INFO L85 PathProgramCache]: Analyzing trace with hash 33471377, now seen corresponding path program 1 times [2022-11-16 12:33:25,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:25,591 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632791990] [2022-11-16 12:33:25,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:25,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:25,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:25,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:25,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:25,756 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632791990] [2022-11-16 12:33:25,756 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632791990] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:25,756 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:33:25,757 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:33:25,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [465591122] [2022-11-16 12:33:25,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:25,761 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:33:25,762 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:25,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:33:25,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:25,764 INFO L87 Difference]: Start difference. First operand 51 states and 54 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:25,847 INFO L93 Difference]: Finished difference Result 85 states and 90 transitions. [2022-11-16 12:33:25,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:33:25,848 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:33:25,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:25,849 INFO L225 Difference]: With dead ends: 85 [2022-11-16 12:33:25,849 INFO L226 Difference]: Without dead ends: 85 [2022-11-16 12:33:25,849 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:25,851 INFO L413 NwaCegarLoop]: 70 mSDtfsCounter, 47 mSDsluCounter, 26 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:25,851 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 96 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:33:25,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-11-16 12:33:25,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 48. [2022-11-16 12:33:25,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 29 states have (on average 1.7586206896551724) internal successors, (51), 47 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2022-11-16 12:33:25,857 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 51 transitions. Word has length 5 [2022-11-16 12:33:25,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:25,858 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 51 transitions. [2022-11-16 12:33:25,858 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,858 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 51 transitions. [2022-11-16 12:33:25,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 12:33:25,859 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:25,859 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:25,859 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-16 12:33:25,860 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:25,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:25,860 INFO L85 PathProgramCache]: Analyzing trace with hash 2100113076, now seen corresponding path program 1 times [2022-11-16 12:33:25,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:25,861 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69925786] [2022-11-16 12:33:25,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:25,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:25,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:25,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:25,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:25,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69925786] [2022-11-16 12:33:25,935 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [69925786] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:25,935 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:33:25,935 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:33:25,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556528395] [2022-11-16 12:33:25,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:25,936 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:33:25,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:25,937 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:33:25,937 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:25,937 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:25,948 INFO L93 Difference]: Finished difference Result 58 states and 62 transitions. [2022-11-16 12:33:25,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:33:25,949 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 12:33:25,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:25,950 INFO L225 Difference]: With dead ends: 58 [2022-11-16 12:33:25,950 INFO L226 Difference]: Without dead ends: 58 [2022-11-16 12:33:25,951 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:25,952 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 10 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:25,952 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 96 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:33:25,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-11-16 12:33:25,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 49. [2022-11-16 12:33:25,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 30 states have (on average 1.7333333333333334) internal successors, (52), 48 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 52 transitions. [2022-11-16 12:33:25,967 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 52 transitions. Word has length 7 [2022-11-16 12:33:25,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:25,968 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 52 transitions. [2022-11-16 12:33:25,968 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:25,968 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 52 transitions. [2022-11-16 12:33:25,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 12:33:25,971 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:25,971 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:25,972 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-16 12:33:25,972 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:25,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:25,979 INFO L85 PathProgramCache]: Analyzing trace with hash 638916372, now seen corresponding path program 1 times [2022-11-16 12:33:25,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:25,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572127565] [2022-11-16 12:33:25,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:25,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:26,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:26,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:26,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:26,121 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [572127565] [2022-11-16 12:33:26,121 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [572127565] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:26,121 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:33:26,121 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:33:26,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681183811] [2022-11-16 12:33:26,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:26,122 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:33:26,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:26,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:33:26,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:26,123 INFO L87 Difference]: Start difference. First operand 49 states and 52 transitions. Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:26,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:26,148 INFO L93 Difference]: Finished difference Result 55 states and 58 transitions. [2022-11-16 12:33:26,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:33:26,149 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 12:33:26,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:26,150 INFO L225 Difference]: With dead ends: 55 [2022-11-16 12:33:26,150 INFO L226 Difference]: Without dead ends: 55 [2022-11-16 12:33:26,150 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:33:26,152 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 1 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:26,152 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 91 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:33:26,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-11-16 12:33:26,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2022-11-16 12:33:26,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 53 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:26,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2022-11-16 12:33:26,158 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 9 [2022-11-16 12:33:26,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:26,158 INFO L495 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2022-11-16 12:33:26,158 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:26,158 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2022-11-16 12:33:26,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:33:26,159 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:26,159 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:26,159 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-16 12:33:26,160 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:26,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:26,160 INFO L85 PathProgramCache]: Analyzing trace with hash -763066877, now seen corresponding path program 1 times [2022-11-16 12:33:26,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:26,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334597834] [2022-11-16 12:33:26,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:26,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:26,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:26,251 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:26,251 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:26,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334597834] [2022-11-16 12:33:26,252 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [334597834] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:26,252 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [704515746] [2022-11-16 12:33:26,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:26,252 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:26,252 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:26,259 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:26,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-16 12:33:26,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:26,359 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 12:33:26,364 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:26,416 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:26,422 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:26,514 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:26,515 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [704515746] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:26,515 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:26,515 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 5 [2022-11-16 12:33:26,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578439672] [2022-11-16 12:33:26,515 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:26,516 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:33:26,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:26,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:33:26,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:33:26,517 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:26,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:26,535 INFO L93 Difference]: Finished difference Result 56 states and 59 transitions. [2022-11-16 12:33:26,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:33:26,536 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-11-16 12:33:26,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:26,537 INFO L225 Difference]: With dead ends: 56 [2022-11-16 12:33:26,537 INFO L226 Difference]: Without dead ends: 56 [2022-11-16 12:33:26,537 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:33:26,539 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 16 mSDsluCounter, 85 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:26,539 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 134 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:33:26,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-11-16 12:33:26,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2022-11-16 12:33:26,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 37 states have (on average 1.5945945945945945) internal successors, (59), 55 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:26,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 59 transitions. [2022-11-16 12:33:26,544 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 59 transitions. Word has length 14 [2022-11-16 12:33:26,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:26,545 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 59 transitions. [2022-11-16 12:33:26,545 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:26,545 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 59 transitions. [2022-11-16 12:33:26,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 12:33:26,545 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:26,546 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:26,560 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-16 12:33:26,752 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:26,752 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:26,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:26,753 INFO L85 PathProgramCache]: Analyzing trace with hash -2097949021, now seen corresponding path program 1 times [2022-11-16 12:33:26,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:26,753 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459377392] [2022-11-16 12:33:26,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:26,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:26,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:26,991 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:26,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:26,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459377392] [2022-11-16 12:33:26,992 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1459377392] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:26,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1682750087] [2022-11-16 12:33:26,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:26,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:26,993 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:26,995 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:27,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-16 12:33:27,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:27,130 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 12:33:27,133 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:27,169 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:33:27,234 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-16 12:33:27,234 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-16 12:33:27,256 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:27,257 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:27,429 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:27,430 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1682750087] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:27,430 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:27,430 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 4] total 6 [2022-11-16 12:33:27,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349006219] [2022-11-16 12:33:27,430 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:27,431 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-16 12:33:27,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:27,431 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-16 12:33:27,432 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:33:27,432 INFO L87 Difference]: Start difference. First operand 56 states and 59 transitions. Second operand has 7 states, 6 states have (on average 4.5) internal successors, (27), 7 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:27,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:27,597 INFO L93 Difference]: Finished difference Result 82 states and 87 transitions. [2022-11-16 12:33:27,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:33:27,598 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 4.5) internal successors, (27), 7 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 12:33:27,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:27,599 INFO L225 Difference]: With dead ends: 82 [2022-11-16 12:33:27,601 INFO L226 Difference]: Without dead ends: 82 [2022-11-16 12:33:27,602 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:33:27,603 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 76 mSDsluCounter, 95 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:27,604 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [76 Valid, 123 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 95 Invalid, 0 Unknown, 46 Unchecked, 0.1s Time] [2022-11-16 12:33:27,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-16 12:33:27,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 55. [2022-11-16 12:33:27,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 37 states have (on average 1.5675675675675675) internal successors, (58), 54 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:27,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 58 transitions. [2022-11-16 12:33:27,609 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 58 transitions. Word has length 16 [2022-11-16 12:33:27,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:27,610 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 58 transitions. [2022-11-16 12:33:27,610 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 4.5) internal successors, (27), 7 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:27,610 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 58 transitions. [2022-11-16 12:33:27,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 12:33:27,611 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:27,611 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:27,619 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-16 12:33:27,817 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:27,818 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:27,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:27,818 INFO L85 PathProgramCache]: Analyzing trace with hash -2097949020, now seen corresponding path program 1 times [2022-11-16 12:33:27,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:27,819 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923657053] [2022-11-16 12:33:27,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:27,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:27,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:28,100 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:28,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:28,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923657053] [2022-11-16 12:33:28,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923657053] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:28,101 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [217852890] [2022-11-16 12:33:28,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:28,101 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:28,102 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:28,103 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:28,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-16 12:33:28,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:28,220 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-16 12:33:28,223 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:28,234 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:33:28,318 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:33:28,319 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:33:28,331 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:33:28,332 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:33:28,367 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:28,368 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:30,656 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2022-11-16 12:33:30,737 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:30,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [217852890] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:30,737 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:30,738 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 13 [2022-11-16 12:33:30,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253202680] [2022-11-16 12:33:30,738 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:30,739 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 12:33:30,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:30,739 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 12:33:30,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2022-11-16 12:33:30,740 INFO L87 Difference]: Start difference. First operand 55 states and 58 transitions. Second operand has 14 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 14 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:30,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:30,932 INFO L93 Difference]: Finished difference Result 81 states and 86 transitions. [2022-11-16 12:33:30,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:33:30,939 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 14 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 12:33:30,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:30,942 INFO L225 Difference]: With dead ends: 81 [2022-11-16 12:33:30,942 INFO L226 Difference]: Without dead ends: 81 [2022-11-16 12:33:30,944 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2022-11-16 12:33:30,946 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 329 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 329 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 169 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 58 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:30,947 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [329 Valid, 60 Invalid, 169 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 105 Invalid, 0 Unknown, 58 Unchecked, 0.1s Time] [2022-11-16 12:33:30,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2022-11-16 12:33:30,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 54. [2022-11-16 12:33:30,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 53 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:30,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2022-11-16 12:33:30,955 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 16 [2022-11-16 12:33:30,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:30,956 INFO L495 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2022-11-16 12:33:30,956 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 14 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:30,956 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2022-11-16 12:33:30,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-16 12:33:30,957 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:30,957 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:30,964 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-16 12:33:31,157 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:31,158 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:31,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:31,158 INFO L85 PathProgramCache]: Analyzing trace with hash -1307957292, now seen corresponding path program 2 times [2022-11-16 12:33:31,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:31,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408745603] [2022-11-16 12:33:31,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:31,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:31,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:31,247 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:31,247 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:31,247 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408745603] [2022-11-16 12:33:31,248 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1408745603] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:31,248 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1704073517] [2022-11-16 12:33:31,248 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:33:31,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:31,248 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:31,249 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:31,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-16 12:33:31,345 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-16 12:33:31,345 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:33:31,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 12:33:31,347 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:31,397 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-16 12:33:31,397 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 12:33:31,397 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1704073517] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:31,397 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 12:33:31,398 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2022-11-16 12:33:31,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302444198] [2022-11-16 12:33:31,399 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:31,400 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:33:31,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:31,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:33:31,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:33:31,401 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:31,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:31,421 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2022-11-16 12:33:31,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:33:31,422 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-16 12:33:31,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:31,423 INFO L225 Difference]: With dead ends: 80 [2022-11-16 12:33:31,423 INFO L226 Difference]: Without dead ends: 80 [2022-11-16 12:33:31,424 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:33:31,424 INFO L413 NwaCegarLoop]: 46 mSDtfsCounter, 91 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:31,425 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [91 Valid, 91 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:33:31,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-16 12:33:31,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 55. [2022-11-16 12:33:31,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 38 states have (on average 1.5263157894736843) internal successors, (58), 54 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:31,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 58 transitions. [2022-11-16 12:33:31,444 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 58 transitions. Word has length 21 [2022-11-16 12:33:31,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:31,447 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 58 transitions. [2022-11-16 12:33:31,447 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:31,448 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 58 transitions. [2022-11-16 12:33:31,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-16 12:33:31,448 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:31,449 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:31,459 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-16 12:33:31,659 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:31,659 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:31,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:31,659 INFO L85 PathProgramCache]: Analyzing trace with hash -1307957265, now seen corresponding path program 1 times [2022-11-16 12:33:31,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:31,660 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072021075] [2022-11-16 12:33:31,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:31,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:31,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:31,747 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:31,747 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:31,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072021075] [2022-11-16 12:33:31,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2072021075] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:31,748 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1642615229] [2022-11-16 12:33:31,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:31,748 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:31,748 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:31,751 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:31,779 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-16 12:33:31,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:31,885 INFO L263 TraceCheckSpWp]: Trace formula consists of 215 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 12:33:31,889 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:31,932 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:31,932 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:31,952 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:31,953 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1642615229] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:31,953 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:31,953 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 4 [2022-11-16 12:33:31,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625156997] [2022-11-16 12:33:31,953 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:31,954 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:33:31,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:31,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:33:31,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:33:31,955 INFO L87 Difference]: Start difference. First operand 55 states and 58 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:31,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:31,989 INFO L93 Difference]: Finished difference Result 55 states and 57 transitions. [2022-11-16 12:33:31,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:33:31,990 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-16 12:33:31,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:31,992 INFO L225 Difference]: With dead ends: 55 [2022-11-16 12:33:31,992 INFO L226 Difference]: Without dead ends: 55 [2022-11-16 12:33:31,992 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:33:31,993 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 81 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:31,994 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 45 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:33:31,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-11-16 12:33:31,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2022-11-16 12:33:31,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 38 states have (on average 1.5) internal successors, (57), 54 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:31,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2022-11-16 12:33:31,997 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 57 transitions. Word has length 21 [2022-11-16 12:33:31,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:31,998 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-11-16 12:33:31,998 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:31,998 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 57 transitions. [2022-11-16 12:33:32,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:33:32,000 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:32,000 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:32,006 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-11-16 12:33:32,206 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-11-16 12:33:32,206 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:32,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:32,206 INFO L85 PathProgramCache]: Analyzing trace with hash 2020822154, now seen corresponding path program 1 times [2022-11-16 12:33:32,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:32,207 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969943909] [2022-11-16 12:33:32,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:32,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:32,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:32,428 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:33:32,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:32,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969943909] [2022-11-16 12:33:32,428 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1969943909] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:32,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [778161659] [2022-11-16 12:33:32,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:32,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:32,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:32,430 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:32,451 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-16 12:33:32,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:32,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-16 12:33:32,563 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:32,573 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:33:32,597 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:33:32,599 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:33:32,628 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:33:32,629 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:33:32,658 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-16 12:33:32,658 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:32,745 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-16 12:33:32,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [778161659] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:32,745 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:32,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 8 [2022-11-16 12:33:32,748 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673282058] [2022-11-16 12:33:32,748 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:32,750 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-16 12:33:32,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:32,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-16 12:33:32,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:33:32,751 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. Second operand has 9 states, 8 states have (on average 4.25) internal successors, (34), 9 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:32,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:32,863 INFO L93 Difference]: Finished difference Result 72 states and 75 transitions. [2022-11-16 12:33:32,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:33:32,864 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 4.25) internal successors, (34), 9 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:33:32,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:32,865 INFO L225 Difference]: With dead ends: 72 [2022-11-16 12:33:32,865 INFO L226 Difference]: Without dead ends: 72 [2022-11-16 12:33:32,865 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 42 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2022-11-16 12:33:32,866 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 99 mSDsluCounter, 63 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:32,866 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 92 Invalid, 119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 90 Invalid, 0 Unknown, 19 Unchecked, 0.1s Time] [2022-11-16 12:33:32,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-11-16 12:33:32,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 55. [2022-11-16 12:33:32,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 39 states have (on average 1.4871794871794872) internal successors, (58), 54 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:32,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 58 transitions. [2022-11-16 12:33:32,870 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 58 transitions. Word has length 22 [2022-11-16 12:33:32,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:32,870 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 58 transitions. [2022-11-16 12:33:32,870 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 4.25) internal successors, (34), 9 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:32,870 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 58 transitions. [2022-11-16 12:33:32,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:33:32,871 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:32,871 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:32,883 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-16 12:33:33,076 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-16 12:33:33,077 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:33,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:33,077 INFO L85 PathProgramCache]: Analyzing trace with hash 2020822155, now seen corresponding path program 1 times [2022-11-16 12:33:33,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:33,077 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413951474] [2022-11-16 12:33:33,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:33,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:33,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:33,461 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:33,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:33,461 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [413951474] [2022-11-16 12:33:33,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [413951474] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:33,461 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [973521109] [2022-11-16 12:33:33,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:33,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:33,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:33,473 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:33,483 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-16 12:33:33,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:33,612 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-16 12:33:33,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:33,627 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:33:33,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:33:33,660 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:33:33,713 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:33:33,715 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:33:33,767 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:33:33,768 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:38,099 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_dll_create_~new_head~0#1.base_28| Int)) (or (forall ((|v_ULTIMATE.start_dll_create_~new_head~0#1.base_27| Int) (v_ArrVal_613 Int)) (or (not (< |v_ULTIMATE.start_dll_create_~new_head~0#1.base_27| |c_#StackHeapBarrier|)) (forall ((v_ArrVal_614 Int)) (<= (+ |c_ULTIMATE.start_main_~#s~0#1.offset| 4) (select (store (store |c_#length| |v_ULTIMATE.start_dll_create_~new_head~0#1.base_28| v_ArrVal_613) |v_ULTIMATE.start_dll_create_~new_head~0#1.base_27| v_ArrVal_614) |c_ULTIMATE.start_main_~#s~0#1.base|))))) (not (< |v_ULTIMATE.start_dll_create_~new_head~0#1.base_28| |c_#StackHeapBarrier|)))) (<= 0 |c_ULTIMATE.start_main_~#s~0#1.offset|)) is different from false [2022-11-16 12:33:38,117 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:33:38,118 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [973521109] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:38,118 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:38,118 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 5] total 11 [2022-11-16 12:33:38,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803433875] [2022-11-16 12:33:38,119 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:38,119 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-16 12:33:38,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:38,120 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-16 12:33:38,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=75, Unknown=1, NotChecked=18, Total=132 [2022-11-16 12:33:38,120 INFO L87 Difference]: Start difference. First operand 55 states and 58 transitions. Second operand has 12 states, 11 states have (on average 5.363636363636363) internal successors, (59), 12 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:38,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:38,274 INFO L93 Difference]: Finished difference Result 66 states and 69 transitions. [2022-11-16 12:33:38,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:33:38,275 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 5.363636363636363) internal successors, (59), 12 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:33:38,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:38,276 INFO L225 Difference]: With dead ends: 66 [2022-11-16 12:33:38,276 INFO L226 Difference]: Without dead ends: 66 [2022-11-16 12:33:38,276 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 38 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=70, Invalid=115, Unknown=1, NotChecked=24, Total=210 [2022-11-16 12:33:38,277 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 180 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 65 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:38,277 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [180 Valid, 37 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 68 Invalid, 0 Unknown, 65 Unchecked, 0.1s Time] [2022-11-16 12:33:38,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-11-16 12:33:38,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 51. [2022-11-16 12:33:38,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 39 states have (on average 1.358974358974359) internal successors, (53), 50 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:38,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 53 transitions. [2022-11-16 12:33:38,280 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 53 transitions. Word has length 22 [2022-11-16 12:33:38,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:38,281 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 53 transitions. [2022-11-16 12:33:38,281 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 5.363636363636363) internal successors, (59), 12 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:38,281 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 53 transitions. [2022-11-16 12:33:38,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-16 12:33:38,282 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:38,282 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:38,291 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-11-16 12:33:38,487 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-11-16 12:33:38,488 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:38,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:38,488 INFO L85 PathProgramCache]: Analyzing trace with hash -1779022636, now seen corresponding path program 1 times [2022-11-16 12:33:38,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:38,488 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276777896] [2022-11-16 12:33:38,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:38,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:38,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:38,671 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 12:33:38,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:38,671 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276777896] [2022-11-16 12:33:38,671 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1276777896] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:38,671 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:33:38,672 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-16 12:33:38,672 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879144426] [2022-11-16 12:33:38,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:38,673 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 12:33:38,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:38,674 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 12:33:38,674 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:33:38,675 INFO L87 Difference]: Start difference. First operand 51 states and 53 transitions. Second operand has 8 states, 7 states have (on average 3.0) internal successors, (21), 8 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:38,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:38,945 INFO L93 Difference]: Finished difference Result 72 states and 75 transitions. [2022-11-16 12:33:38,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:33:38,945 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 3.0) internal successors, (21), 8 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-11-16 12:33:38,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:38,946 INFO L225 Difference]: With dead ends: 72 [2022-11-16 12:33:38,946 INFO L226 Difference]: Without dead ends: 72 [2022-11-16 12:33:38,947 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2022-11-16 12:33:38,948 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 112 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:38,949 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [112 Valid, 119 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:33:38,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-11-16 12:33:38,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 52. [2022-11-16 12:33:38,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.375) internal successors, (55), 51 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:38,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2022-11-16 12:33:38,960 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 55 transitions. Word has length 23 [2022-11-16 12:33:38,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:38,960 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 55 transitions. [2022-11-16 12:33:38,960 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 3.0) internal successors, (21), 8 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:38,961 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 55 transitions. [2022-11-16 12:33:38,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-16 12:33:38,962 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:38,962 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:38,962 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-16 12:33:38,962 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:38,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:38,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1779022635, now seen corresponding path program 1 times [2022-11-16 12:33:38,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:38,963 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186941213] [2022-11-16 12:33:38,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:38,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:38,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:39,314 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:33:39,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:39,314 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186941213] [2022-11-16 12:33:39,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1186941213] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:33:39,315 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:33:39,315 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-16 12:33:39,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67487140] [2022-11-16 12:33:39,315 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:33:39,315 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 12:33:39,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:39,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 12:33:39,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:33:39,316 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. Second operand has 8 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 8 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:39,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:39,571 INFO L93 Difference]: Finished difference Result 66 states and 69 transitions. [2022-11-16 12:33:39,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 12:33:39,571 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 8 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-11-16 12:33:39,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:39,572 INFO L225 Difference]: With dead ends: 66 [2022-11-16 12:33:39,572 INFO L226 Difference]: Without dead ends: 66 [2022-11-16 12:33:39,572 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2022-11-16 12:33:39,573 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 190 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:39,573 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [190 Valid, 89 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:33:39,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-11-16 12:33:39,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 52. [2022-11-16 12:33:39,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.35) internal successors, (54), 51 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:39,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-11-16 12:33:39,576 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 23 [2022-11-16 12:33:39,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:39,576 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-11-16 12:33:39,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 8 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:39,576 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-11-16 12:33:39,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-16 12:33:39,577 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:39,577 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:39,577 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-16 12:33:39,577 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:39,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:39,577 INFO L85 PathProgramCache]: Analyzing trace with hash 1033116430, now seen corresponding path program 1 times [2022-11-16 12:33:39,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:39,578 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329367828] [2022-11-16 12:33:39,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:39,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:39,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:40,255 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:40,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:40,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329367828] [2022-11-16 12:33:40,256 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [329367828] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:40,256 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [518271294] [2022-11-16 12:33:40,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:40,256 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:40,256 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:40,259 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:40,283 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-16 12:33:40,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:40,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 49 conjunts are in the unsatisfiable core [2022-11-16 12:33:40,412 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:40,435 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:33:40,516 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:33:40,516 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:33:40,561 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:33:40,601 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:33:40,630 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:33:40,631 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 35 [2022-11-16 12:33:40,868 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 37 [2022-11-16 12:33:40,937 INFO L321 Elim1Store]: treesize reduction 3, result has 78.6 percent of original size [2022-11-16 12:33:40,938 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 27 [2022-11-16 12:33:40,947 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:40,947 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:41,073 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2022-11-16 12:33:41,271 INFO L321 Elim1Store]: treesize reduction 5, result has 79.2 percent of original size [2022-11-16 12:33:41,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2022-11-16 12:33:41,283 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_812 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_812))) (let ((.cse1 (select (select .cse0 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (select (select .cse0 .cse1) (+ |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| 4)) |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse1)))))) is different from false [2022-11-16 12:33:41,460 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:41,460 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 76 treesize of output 51 [2022-11-16 12:33:41,512 INFO L321 Elim1Store]: treesize reduction 36, result has 48.6 percent of original size [2022-11-16 12:33:41,513 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 123 treesize of output 124 [2022-11-16 12:33:41,531 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:41,531 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 108 treesize of output 104 [2022-11-16 12:33:41,729 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-16 12:33:41,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [518271294] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:41,729 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:41,729 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 14] total 35 [2022-11-16 12:33:41,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941847298] [2022-11-16 12:33:41,729 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:41,730 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-16 12:33:41,730 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:41,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-16 12:33:41,731 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1078, Unknown=13, NotChecked=66, Total=1260 [2022-11-16 12:33:41,731 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 36 states, 35 states have (on average 1.9714285714285715) internal successors, (69), 36 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:43,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:33:43,083 INFO L93 Difference]: Finished difference Result 70 states and 73 transitions. [2022-11-16 12:33:43,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-16 12:33:43,083 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 1.9714285714285715) internal successors, (69), 36 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-16 12:33:43,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:33:43,084 INFO L225 Difference]: With dead ends: 70 [2022-11-16 12:33:43,084 INFO L226 Difference]: Without dead ends: 70 [2022-11-16 12:33:43,085 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=308, Invalid=1663, Unknown=13, NotChecked=86, Total=2070 [2022-11-16 12:33:43,086 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 105 mSDsluCounter, 273 mSDsCounter, 0 mSdLazyCounter, 568 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 297 SdHoareTripleChecker+Invalid, 754 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 568 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 167 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:33:43,086 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 297 Invalid, 754 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 568 Invalid, 0 Unknown, 167 Unchecked, 0.4s Time] [2022-11-16 12:33:43,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-11-16 12:33:43,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 55. [2022-11-16 12:33:43,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 43 states have (on average 1.372093023255814) internal successors, (59), 54 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:43,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 59 transitions. [2022-11-16 12:33:43,088 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 59 transitions. Word has length 26 [2022-11-16 12:33:43,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:33:43,088 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 59 transitions. [2022-11-16 12:33:43,088 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 35 states have (on average 1.9714285714285715) internal successors, (69), 36 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:33:43,089 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 59 transitions. [2022-11-16 12:33:43,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-16 12:33:43,089 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:33:43,089 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:33:43,103 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-16 12:33:43,295 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-11-16 12:33:43,295 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:33:43,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:33:43,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1033116431, now seen corresponding path program 1 times [2022-11-16 12:33:43,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:33:43,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981008633] [2022-11-16 12:33:43,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:43,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:33:43,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:44,338 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:44,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:33:44,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981008633] [2022-11-16 12:33:44,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [981008633] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:33:44,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2025053759] [2022-11-16 12:33:44,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:33:44,339 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:33:44,339 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:33:44,343 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:33:44,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-16 12:33:44,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:33:44,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 69 conjunts are in the unsatisfiable core [2022-11-16 12:33:44,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:33:44,527 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:33:44,646 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:33:44,647 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:33:44,712 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:33:44,730 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:33:44,787 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:33:44,797 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:33:44,907 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:33:44,908 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 68 [2022-11-16 12:33:44,919 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 48 [2022-11-16 12:33:45,488 INFO L321 Elim1Store]: treesize reduction 36, result has 2.7 percent of original size [2022-11-16 12:33:45,488 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 161 treesize of output 74 [2022-11-16 12:33:45,515 INFO L321 Elim1Store]: treesize reduction 14, result has 57.6 percent of original size [2022-11-16 12:33:45,515 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 3 case distinctions, treesize of input 57 treesize of output 45 [2022-11-16 12:33:45,629 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:33:45,629 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:33:46,773 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:46,773 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 265 treesize of output 329 [2022-11-16 12:33:47,888 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ |c_ULTIMATE.start_dll_create_~head~0#1.offset| 1))) (and (or (and (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse3 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse5 (select (select .cse3 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse1 (select (select .cse0 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse2 (+ .cse5 4))) (or (= (select (select .cse0 .cse1) .cse2) 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse1)) (< (select (select .cse3 .cse1) .cse2) .cse4))))) (not (= .cse5 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse9 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse8 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse7 (select (select .cse8 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse6 (select (select .cse8 .cse7) (+ .cse9 4)))) (or (= .cse6 0) (= .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse7))))))) (not (= .cse9 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (= (select (let ((.cse10 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse10 (select (select .cse10 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ 4 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) |c_ULTIMATE.start_dll_create_~head~0#1.base|))) (forall ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int)) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse17 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse12 (select (select .cse17 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse15 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse13 (select (select .cse15 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse16 (+ 4 .cse12))) (let ((.cse11 (select (select .cse17 .cse13) .cse16))) (or (< .cse11 .cse4) (= .cse11 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| .cse12)) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse13)) (= (select (let ((.cse14 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse14 (select (select .cse14 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) (select (select .cse15 .cse13) .cse16)))))))) (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse21 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse22 (select (select .cse21 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse18 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse19 (select (select .cse18 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse20 (+ .cse22 4))) (or (= (select (select .cse18 .cse19) .cse20) 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse19)) (< (select (select .cse21 .cse19) .cse20) .cse4) (not (= .cse22 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))))))) (or (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (= (select (let ((.cse23 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse23 (select (select .cse23 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse24 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse28 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2)) (.cse27 (select (select .cse24 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse26 (+ 4 .cse27)) (.cse25 (select (select .cse28 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (select (select .cse24 .cse25) .cse26) 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| .cse27)) (= (select (select .cse28 .cse25) .cse26) |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse25)))))))) (forall ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int)) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse33 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse30 (select (select .cse33 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse31 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse29 (select (select .cse33 .cse30) (+ .cse31 4)))) (or (= .cse29 0) (= .cse29 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse30)) (not (= .cse31 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (= .cse29 (select (let ((.cse32 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse32 (select (select .cse32 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ 4 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse34 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse39 (select (select .cse34 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse40 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse35 (select (select .cse40 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse36 (+ 4 .cse39))) (let ((.cse38 (select (select .cse40 .cse35) .cse36))) (or (= (select (select .cse34 .cse35) .cse36) 0) (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (= (select (let ((.cse37 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse37 (select (select .cse37 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) .cse38)) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| .cse39)) (= .cse38 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse35)))))))) (forall ((v_ArrVal_920 (Array Int Int)) (v_ArrVal_921 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse41 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_921))) (let ((.cse43 (select (select .cse41 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse42 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_920) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (<= 0 (+ (select (select .cse41 .cse42) (+ .cse43 4)) 8)) (not (= .cse43 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse42 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse47 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse46 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse45 (select (select .cse47 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse44 (select (select .cse47 .cse46) (+ 4 .cse45)))) (or (< .cse44 .cse4) (= .cse44 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| .cse45)) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse46))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse48 (select (let ((.cse53 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse53 (select (select .cse53 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ 4 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (or (= .cse48 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse52 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse51 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse50 (select (select .cse51 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse49 (select (select .cse51 .cse50) (+ .cse52 4)))) (or (= .cse49 0) (= .cse49 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse50)) (= .cse49 .cse48)))))) (not (= .cse52 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse58 (select (let ((.cse61 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse61 (select (select .cse61 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ 4 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (or (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse56 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse60 (select (select .cse56 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse59 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse55 (select (select .cse59 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse57 (+ .cse60 4))) (let ((.cse54 (select (select .cse59 .cse55) .cse57))) (or (= .cse54 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse55)) (< (select (select .cse56 .cse55) .cse57) .cse4) (= .cse54 .cse58)))))) (not (= .cse60 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (= .cse58 |c_ULTIMATE.start_dll_create_~head~0#1.base|)))) (forall ((v_prenex_4 Int) (v_prenex_3 (Array Int Int))) (let ((.cse66 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse67 (select (select .cse66 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_2 (Array Int Int))) (let ((.cse63 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse64 (select (select .cse63 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse65 (+ 4 .cse67))) (let ((.cse62 (select (select .cse66 .cse64) .cse65))) (or (< .cse62 .cse4) (= .cse62 0) (= (select (select .cse63 .cse64) .cse65) |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse64))))))) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| .cse67)))))))) is different from false [2022-11-16 12:33:48,670 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse70 (+ 8 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))) (let ((.cse2 (+ |c_ULTIMATE.start_dll_create_~head~0#1.offset| 1)) (.cse6 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~new_head~0#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~new_head~0#1.base|) .cse70 0))) (.cse7 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~new_head~0#1.base| (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~new_head~0#1.base|) .cse70 0)))) (and (forall ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int)) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse9 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse8 (select (select .cse9 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse3 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse1 (select (select .cse3 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse4 (+ .cse8 4))) (let ((.cse0 (select (select .cse9 .cse1) .cse4))) (or (= .cse0 0) (not (= .cse1 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (< .cse0 .cse2) (= (select (select .cse3 .cse1) .cse4) (select (let ((.cse5 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse5 (select (select .cse5 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4))) (not (= .cse8 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (or (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (= (select (let ((.cse10 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse10 (select (select .cse10 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse11 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse15 (select (select .cse11 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse14 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse12 (select (select .cse14 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse13 (+ .cse15 4))) (or (= (select (select .cse11 .cse12) .cse13) 0) (not (= .cse12 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= (select (select .cse14 .cse12) .cse13) |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse15 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse18 (select (let ((.cse21 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse21 (select (select .cse21 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)))) (or (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse20 (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse19 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse17 (select (select .cse19 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse16 (select (select .cse19 .cse17) (+ .cse20 4)))) (or (= .cse16 0) (= .cse16 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse17 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= .cse18 .cse16)))))) (not (= .cse20 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))))) (= .cse18 |c_ULTIMATE.start_dll_create_~head~0#1.base|)))) (forall ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int)) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse26 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse24 (select (select .cse26 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse23 (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse22 (select (select .cse26 .cse24) (+ .cse23 4)))) (or (= .cse22 0) (= .cse22 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse23 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse24 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= (select (let ((.cse25 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse25 (select (select .cse25 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) .cse22)))))) (or (and (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse30 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse31 (select (select .cse30 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse27 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse29 (+ .cse31 4)) (.cse28 (select (select .cse27 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (select (select .cse27 .cse28) .cse29) 0) (< (select (select .cse30 .cse28) .cse29) .cse2) (not (= .cse28 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)))))) (not (= .cse31 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse32 (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse32 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (forall ((v_prenex_5 (Array Int Int))) (let ((.cse35 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse34 (select (select .cse35 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse33 (select (select .cse35 .cse34) (+ .cse32 4)))) (or (= .cse33 0) (= .cse33 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse34 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|))))))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (= (select (let ((.cse36 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse36 (select (select .cse36 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) |c_ULTIMATE.start_dll_create_~head~0#1.base|))) (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse40 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse37 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5)) (.cse41 (select (select .cse40 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse39 (+ .cse41 4)) (.cse38 (select (select .cse37 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (select (select .cse37 .cse38) .cse39) 0) (< (select (select .cse40 .cse38) .cse39) .cse2) (not (= .cse41 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse38 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|))))))) (forall ((v_prenex_4 Int) (v_prenex_3 (Array Int Int))) (let ((.cse46 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse47 (select (select .cse46 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_2 (Array Int Int))) (let ((.cse44 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse43 (select (select .cse44 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse45 (+ .cse47 4))) (let ((.cse42 (select (select .cse46 .cse43) .cse45))) (or (= .cse42 0) (not (= .cse43 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (< .cse42 .cse2) (= (select (select .cse44 .cse43) .cse45) |c_ULTIMATE.start_dll_create_~head~0#1.base|)))))) (not (= .cse47 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (forall ((v_ArrVal_920 (Array Int Int)) (v_ArrVal_921 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse48 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_921))) (let ((.cse50 (select (select .cse48 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse49 (select (select (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_920) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (<= 0 (+ (select (select .cse48 .cse49) (+ .cse50 4)) 8)) (not (= .cse50 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse49 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse51 (select (let ((.cse58 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse58 (select (select .cse58 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)))) (or (= .cse51 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse53 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse57 (select (select .cse53 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse56 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse54 (select (select .cse56 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse55 (+ .cse57 4))) (let ((.cse52 (select (select .cse56 .cse54) .cse55))) (or (= .cse52 0) (< (select (select .cse53 .cse54) .cse55) .cse2) (not (= .cse54 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= .cse51 .cse52)))))) (not (= .cse57 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse59 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse64 (select (select .cse59 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse65 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse60 (select (select .cse65 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse61 (+ .cse64 4))) (let ((.cse62 (select (select .cse65 .cse60) .cse61))) (or (= (select (select .cse59 .cse60) .cse61) 0) (not (= .cse60 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (= .cse62 (select (let ((.cse63 (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse63 (select (select .cse63 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)))) (= .cse62 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse64 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse69 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse67 (select (select (store .cse6 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse68 (select (select .cse69 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse66 (select (select .cse69 .cse67) (+ .cse68 4)))) (or (= .cse66 0) (not (= .cse67 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (< .cse66 .cse2) (not (= .cse68 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))))) is different from false [2022-11-16 12:33:48,857 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:48,857 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 171 treesize of output 131 [2022-11-16 12:33:49,294 INFO L321 Elim1Store]: treesize reduction 232, result has 36.8 percent of original size [2022-11-16 12:33:49,294 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 0 disjoint index pairs (out of 21 index pairs), introduced 10 new quantified variables, introduced 21 case distinctions, treesize of input 533 treesize of output 547 [2022-11-16 12:33:49,346 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:49,347 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 401 treesize of output 260 [2022-11-16 12:33:49,685 INFO L321 Elim1Store]: treesize reduction 200, result has 43.2 percent of original size [2022-11-16 12:33:49,687 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 1 disjoint index pairs (out of 28 index pairs), introduced 9 new quantified variables, introduced 27 case distinctions, treesize of input 1547 treesize of output 1496 [2022-11-16 12:33:49,808 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:49,809 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 1215 treesize of output 1131 [2022-11-16 12:33:49,943 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:49,944 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 1318 treesize of output 1194 [2022-11-16 12:33:50,037 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:50,038 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 473 treesize of output 467 [2022-11-16 12:33:56,165 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:56,165 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 310 treesize of output 1 [2022-11-16 12:33:56,179 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:56,179 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 100 treesize of output 90 [2022-11-16 12:33:56,190 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:33:56,191 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 85 treesize of output 60 [2022-11-16 12:33:56,197 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:33:56,366 INFO L321 Elim1Store]: treesize reduction 127, result has 43.6 percent of original size [2022-11-16 12:33:56,367 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 1 disjoint index pairs (out of 21 index pairs), introduced 9 new quantified variables, introduced 21 case distinctions, treesize of input 196 treesize of output 229 [2022-11-16 12:33:56,513 INFO L321 Elim1Store]: treesize reduction 4, result has 96.1 percent of original size [2022-11-16 12:33:56,514 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 8 case distinctions, treesize of input 87 treesize of output 155 [2022-11-16 12:33:56,530 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-11-16 12:33:56,548 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 161 treesize of output 137 [2022-11-16 12:33:58,446 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,446 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 308 treesize of output 1 [2022-11-16 12:33:58,458 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,459 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 465 treesize of output 1 [2022-11-16 12:33:58,470 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,471 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 171 treesize of output 1 [2022-11-16 12:33:58,483 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,484 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 240 treesize of output 1 [2022-11-16 12:33:58,496 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,497 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 308 treesize of output 1 [2022-11-16 12:33:58,511 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,511 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 381 treesize of output 1 [2022-11-16 12:33:58,525 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,525 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 379 treesize of output 1 [2022-11-16 12:33:58,537 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:33:58,537 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 242 treesize of output 1 [2022-11-16 12:33:58,803 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:33:58,803 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2025053759] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:33:58,804 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:33:58,804 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 15] total 42 [2022-11-16 12:33:58,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119659438] [2022-11-16 12:33:58,806 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:33:58,806 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-11-16 12:33:58,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:33:58,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-11-16 12:33:58,808 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=1521, Unknown=2, NotChecked=158, Total=1806 [2022-11-16 12:33:58,808 INFO L87 Difference]: Start difference. First operand 55 states and 59 transitions. Second operand has 43 states, 42 states have (on average 1.7857142857142858) internal successors, (75), 43 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:07,523 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse58 (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (.cse52 (+ |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| 4)) (.cse79 (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (.cse51 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (.cse80 (+ 8 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (.cse38 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (.cse78 (+ |c_ULTIMATE.start_dll_create_~head~0#1.offset| 4))) (let ((.cse0 (select .cse38 .cse78)) (.cse3 (+ |c_ULTIMATE.start_dll_create_~head~0#1.offset| 1)) (.cse7 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~new_head~0#1.base| (store .cse51 .cse80 0))) (.cse8 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_create_~new_head~0#1.base| (store .cse79 .cse80 0))) (.cse54 (select .cse79 .cse52)) (.cse39 (+ |c_ULTIMATE.start_dll_create_~head~0#1.offset| 8)) (.cse53 (select .cse58 .cse78))) (and (not (= .cse0 0)) (forall ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int)) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse10 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse9 (select (select .cse10 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse4 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse2 (select (select .cse4 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse5 (+ .cse9 4))) (let ((.cse1 (select (select .cse10 .cse2) .cse5))) (or (= .cse1 0) (not (= .cse2 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (< .cse1 .cse3) (= (select (select .cse4 .cse2) .cse5) (select (let ((.cse6 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse6 (select (select .cse6 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4))) (not (= .cse9 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (or (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (= (select (let ((.cse11 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse11 (select (select .cse11 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse12 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse16 (select (select .cse12 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse15 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse13 (select (select .cse15 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse14 (+ .cse16 4))) (or (= (select (select .cse12 .cse13) .cse14) 0) (not (= .cse13 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= (select (select .cse15 .cse13) .cse14) |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse16 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (= |c_ULTIMATE.start_dll_create_~head~0#1.offset| 0) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse19 (select (let ((.cse22 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse22 (select (select .cse22 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)))) (or (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse21 (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse20 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse18 (select (select .cse20 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse17 (select (select .cse20 .cse18) (+ .cse21 4)))) (or (= .cse17 0) (= .cse17 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse18 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= .cse19 .cse17)))))) (not (= .cse21 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))))) (= .cse19 |c_ULTIMATE.start_dll_create_~head~0#1.base|)))) (forall ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int)) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse27 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse25 (select (select .cse27 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse24 (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse23 (select (select .cse27 .cse25) (+ .cse24 4)))) (or (= .cse23 0) (= .cse23 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse24 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse25 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= (select (let ((.cse26 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse26 (select (select .cse26 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) .cse23)))))) (not (= .cse0 |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (= |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| 0) (= |c_ULTIMATE.start_main_~#s~0#1.offset| 0) (or (and (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse31 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse32 (select (select .cse31 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse28 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse30 (+ .cse32 4)) (.cse29 (select (select .cse28 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (select (select .cse28 .cse29) .cse30) 0) (< (select (select .cse31 .cse29) .cse30) .cse3) (not (= .cse29 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)))))) (not (= .cse32 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse33 (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse33 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (forall ((v_prenex_5 (Array Int Int))) (let ((.cse36 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse35 (select (select .cse36 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse34 (select (select .cse36 .cse35) (+ .cse33 4)))) (or (= .cse34 0) (= .cse34 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse35 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|))))))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (= (select (let ((.cse37 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse37 (select (select .cse37 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)) |c_ULTIMATE.start_dll_create_~head~0#1.base|))) (= (select |c_#valid| |c_ULTIMATE.start_dll_create_~new_head~0#1.base|) 1) (= (select .cse38 .cse39) 0) (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (let ((.cse43 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse40 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5)) (.cse44 (select (select .cse43 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse42 (+ .cse44 4)) (.cse41 (select (select .cse40 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (select (select .cse40 .cse41) .cse42) 0) (< (select (select .cse43 .cse41) .cse42) .cse3) (not (= .cse44 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse41 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|))))))) (forall ((v_prenex_4 Int) (v_prenex_3 (Array Int Int))) (let ((.cse49 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse50 (select (select .cse49 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_2 (Array Int Int))) (let ((.cse47 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse46 (select (select .cse47 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse48 (+ .cse50 4))) (let ((.cse45 (select (select .cse49 .cse46) .cse48))) (or (= .cse45 0) (not (= .cse46 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (< .cse45 .cse3) (= (select (select .cse47 .cse46) .cse48) |c_ULTIMATE.start_dll_create_~head~0#1.base|)))))) (not (= .cse50 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))) (= (select .cse51 .cse52) |c_ULTIMATE.start_dll_create_~head~0#1.base|) (<= (+ .cse53 12) (select |c_#length| .cse0)) (= .cse54 0) (= (select |c_#length| |c_ULTIMATE.start_dll_create_~head~0#1.base|) 12) (= (select |c_#length| |c_ULTIMATE.start_dll_create_~new_head~0#1.base|) 12) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (forall ((v_ArrVal_920 (Array Int Int)) (v_ArrVal_921 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse55 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_921))) (let ((.cse57 (select (select .cse55 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse56 (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_920) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (<= 0 (+ (select (select .cse55 .cse56) (+ .cse57 4)) 8)) (not (= .cse57 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)) (not (= .cse56 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)))))) (= (select |c_#length| (select .cse38 4)) 12) (= (select .cse58 4) 0) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse59 (select (let ((.cse66 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (select .cse66 (select (select .cse66 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)))) (or (= .cse59 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (forall ((v_prenex_7 Int) (v_prenex_6 (Array Int Int))) (let ((.cse61 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6))) (let ((.cse65 (select (select .cse61 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (forall ((v_prenex_5 (Array Int Int))) (let ((.cse64 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (let ((.cse62 (select (select .cse64 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse63 (+ .cse65 4))) (let ((.cse60 (select (select .cse64 .cse62) .cse63))) (or (= .cse60 0) (< (select (select .cse61 .cse62) .cse63) .cse3) (not (= .cse62 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (= .cse59 .cse60)))))) (not (= .cse65 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))))))))) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse67 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse72 (select (select .cse67 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse73 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2))) (let ((.cse68 (select (select .cse73 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse69 (+ .cse72 4))) (let ((.cse70 (select (select .cse73 .cse68) .cse69))) (or (= (select (select .cse67 .cse68) .cse69) 0) (not (= .cse68 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (forall ((v_prenex_7 Int) (v_prenex_5 (Array Int Int)) (v_prenex_6 (Array Int Int))) (= .cse70 (select (let ((.cse71 (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_5))) (select .cse71 (select (select .cse71 v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ (select (select (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_6) v_prenex_7) |c_ULTIMATE.start_main_~#s~0#1.offset|) 4)))) (= .cse70 |c_ULTIMATE.start_dll_create_~head~0#1.base|) (not (= .cse72 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|)))))))) (not (= 0 |c_ULTIMATE.start_dll_create_~head~0#1.base|)) (forall ((v_prenex_4 Int) (v_prenex_2 (Array Int Int)) (v_prenex_3 (Array Int Int))) (let ((.cse77 (store .cse8 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_3))) (let ((.cse75 (select (select (store .cse7 |c_ULTIMATE.start_dll_create_~head~0#1.base| v_prenex_2) v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse76 (select (select .cse77 v_prenex_4) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse74 (select (select .cse77 .cse75) (+ .cse76 4)))) (or (= .cse74 0) (not (= .cse75 |c_ULTIMATE.start_dll_create_~new_head~0#1.base|)) (< .cse74 .cse3) (not (= .cse76 |c_ULTIMATE.start_dll_create_~new_head~0#1.offset|))))))) (= |c_ULTIMATE.start_dll_create_~head~0#1.offset| .cse54) (= (select .cse58 .cse39) 0) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| 0)) (= (select |c_#valid| |c_ULTIMATE.start_dll_create_~head~0#1.base|) 1) (= .cse53 0)))) is different from false [2022-11-16 12:34:10,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:10,021 INFO L93 Difference]: Finished difference Result 99 states and 101 transitions. [2022-11-16 12:34:10,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-16 12:34:10,022 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.7857142857142858) internal successors, (75), 43 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-16 12:34:10,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:10,022 INFO L225 Difference]: With dead ends: 99 [2022-11-16 12:34:10,022 INFO L226 Difference]: Without dead ends: 99 [2022-11-16 12:34:10,024 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 401 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=395, Invalid=2671, Unknown=26, NotChecked=330, Total=3422 [2022-11-16 12:34:10,024 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 200 mSDsluCounter, 514 mSDsCounter, 0 mSdLazyCounter, 582 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 541 SdHoareTripleChecker+Invalid, 978 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 582 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 369 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:10,025 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 541 Invalid, 978 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 582 Invalid, 0 Unknown, 369 Unchecked, 0.6s Time] [2022-11-16 12:34:10,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2022-11-16 12:34:10,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 55. [2022-11-16 12:34:10,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 43 states have (on average 1.3255813953488371) internal successors, (57), 54 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:10,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2022-11-16 12:34:10,027 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 57 transitions. Word has length 26 [2022-11-16 12:34:10,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:10,027 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-11-16 12:34:10,027 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 42 states have (on average 1.7857142857142858) internal successors, (75), 43 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:10,027 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 57 transitions. [2022-11-16 12:34:10,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-16 12:34:10,028 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:10,028 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:10,036 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-16 12:34:10,228 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-16 12:34:10,229 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:10,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:10,229 INFO L85 PathProgramCache]: Analyzing trace with hash 687445232, now seen corresponding path program 1 times [2022-11-16 12:34:10,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:10,230 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707747987] [2022-11-16 12:34:10,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:10,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:10,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:10,546 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:34:10,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:10,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707747987] [2022-11-16 12:34:10,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1707747987] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:34:10,547 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:34:10,547 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-16 12:34:10,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [514311216] [2022-11-16 12:34:10,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:34:10,547 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-16 12:34:10,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:10,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-16 12:34:10,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:34:10,548 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. Second operand has 9 states, 8 states have (on average 3.5) internal successors, (28), 9 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:10,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:10,715 INFO L93 Difference]: Finished difference Result 63 states and 65 transitions. [2022-11-16 12:34:10,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:34:10,715 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.5) internal successors, (28), 9 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-16 12:34:10,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:10,716 INFO L225 Difference]: With dead ends: 63 [2022-11-16 12:34:10,716 INFO L226 Difference]: Without dead ends: 63 [2022-11-16 12:34:10,716 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2022-11-16 12:34:10,717 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 185 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:10,717 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 101 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 90 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:34:10,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-11-16 12:34:10,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 57. [2022-11-16 12:34:10,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 45 states have (on average 1.3111111111111111) internal successors, (59), 56 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:10,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 59 transitions. [2022-11-16 12:34:10,719 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 59 transitions. Word has length 28 [2022-11-16 12:34:10,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:10,719 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 59 transitions. [2022-11-16 12:34:10,719 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.5) internal successors, (28), 9 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:10,719 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 59 transitions. [2022-11-16 12:34:10,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-16 12:34:10,720 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:10,720 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:10,720 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-11-16 12:34:10,720 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:10,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:10,720 INFO L85 PathProgramCache]: Analyzing trace with hash -164034179, now seen corresponding path program 1 times [2022-11-16 12:34:10,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:10,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493347015] [2022-11-16 12:34:10,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:10,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:10,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:11,207 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:34:11,208 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:11,208 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493347015] [2022-11-16 12:34:11,208 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [493347015] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:34:11,208 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:34:11,208 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-16 12:34:11,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727952380] [2022-11-16 12:34:11,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:34:11,208 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-16 12:34:11,208 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:11,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-16 12:34:11,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2022-11-16 12:34:11,209 INFO L87 Difference]: Start difference. First operand 57 states and 59 transitions. Second operand has 12 states, 11 states have (on average 2.6363636363636362) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:11,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:11,530 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2022-11-16 12:34:11,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 12:34:11,530 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.6363636363636362) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-16 12:34:11,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:11,531 INFO L225 Difference]: With dead ends: 62 [2022-11-16 12:34:11,531 INFO L226 Difference]: Without dead ends: 62 [2022-11-16 12:34:11,531 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=98, Invalid=208, Unknown=0, NotChecked=0, Total=306 [2022-11-16 12:34:11,532 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 169 mSDsluCounter, 90 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:11,532 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [169 Valid, 110 Invalid, 185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:34:11,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-11-16 12:34:11,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 58. [2022-11-16 12:34:11,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 46 states have (on average 1.3043478260869565) internal successors, (60), 57 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:11,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 60 transitions. [2022-11-16 12:34:11,534 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 60 transitions. Word has length 29 [2022-11-16 12:34:11,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:11,534 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 60 transitions. [2022-11-16 12:34:11,534 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.6363636363636362) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:11,535 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 60 transitions. [2022-11-16 12:34:11,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-16 12:34:11,535 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:11,535 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:11,535 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-11-16 12:34:11,535 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:11,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:11,536 INFO L85 PathProgramCache]: Analyzing trace with hash -790092142, now seen corresponding path program 1 times [2022-11-16 12:34:11,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:11,536 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320014101] [2022-11-16 12:34:11,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:11,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:11,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:11,928 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 12:34:11,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:11,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320014101] [2022-11-16 12:34:11,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [320014101] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:34:11,928 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:34:11,928 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-16 12:34:11,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638425149] [2022-11-16 12:34:11,929 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:34:11,929 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-16 12:34:11,929 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:11,929 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-16 12:34:11,929 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:34:11,930 INFO L87 Difference]: Start difference. First operand 58 states and 60 transitions. Second operand has 11 states, 10 states have (on average 2.8) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:12,338 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2022-11-16 12:34:12,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 12:34:12,338 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.8) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-11-16 12:34:12,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:12,339 INFO L225 Difference]: With dead ends: 59 [2022-11-16 12:34:12,339 INFO L226 Difference]: Without dead ends: 59 [2022-11-16 12:34:12,339 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=82, Invalid=190, Unknown=0, NotChecked=0, Total=272 [2022-11-16 12:34:12,340 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 92 mSDsluCounter, 118 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 271 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:12,340 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [92 Valid, 145 Invalid, 271 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:34:12,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-11-16 12:34:12,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2022-11-16 12:34:12,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 47 states have (on average 1.297872340425532) internal successors, (61), 58 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2022-11-16 12:34:12,342 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 30 [2022-11-16 12:34:12,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:12,342 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2022-11-16 12:34:12,342 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.8) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,342 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2022-11-16 12:34:12,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-16 12:34:12,343 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:12,343 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:12,343 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-11-16 12:34:12,343 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:12,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:12,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1276947488, now seen corresponding path program 1 times [2022-11-16 12:34:12,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:12,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390634526] [2022-11-16 12:34:12,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:12,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:12,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:12,510 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-16 12:34:12,510 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:12,510 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390634526] [2022-11-16 12:34:12,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [390634526] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:34:12,510 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:34:12,511 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-16 12:34:12,511 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286660569] [2022-11-16 12:34:12,511 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:34:12,511 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 12:34:12,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:12,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 12:34:12,512 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:34:12,512 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand has 8 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 8 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:12,609 INFO L93 Difference]: Finished difference Result 58 states and 60 transitions. [2022-11-16 12:34:12,609 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:34:12,609 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 8 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-11-16 12:34:12,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:12,610 INFO L225 Difference]: With dead ends: 58 [2022-11-16 12:34:12,610 INFO L226 Difference]: Without dead ends: 58 [2022-11-16 12:34:12,610 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:34:12,611 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 83 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:12,611 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [83 Valid, 60 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:34:12,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-11-16 12:34:12,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2022-11-16 12:34:12,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 47 states have (on average 1.2765957446808511) internal successors, (60), 57 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 60 transitions. [2022-11-16 12:34:12,613 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 60 transitions. Word has length 31 [2022-11-16 12:34:12,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:12,613 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 60 transitions. [2022-11-16 12:34:12,613 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 8 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,613 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 60 transitions. [2022-11-16 12:34:12,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-11-16 12:34:12,614 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:12,614 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:12,614 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-11-16 12:34:12,614 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:12,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:12,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1472458184, now seen corresponding path program 1 times [2022-11-16 12:34:12,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:12,615 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989466874] [2022-11-16 12:34:12,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:12,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:12,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:12,687 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-16 12:34:12,688 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:12,688 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989466874] [2022-11-16 12:34:12,688 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1989466874] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:34:12,688 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:34:12,688 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:34:12,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [127163642] [2022-11-16 12:34:12,689 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:34:12,689 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:34:12,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:12,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:34:12,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:34:12,690 INFO L87 Difference]: Start difference. First operand 58 states and 60 transitions. Second operand has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:12,735 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2022-11-16 12:34:12,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:34:12,736 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-11-16 12:34:12,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:12,737 INFO L225 Difference]: With dead ends: 56 [2022-11-16 12:34:12,737 INFO L226 Difference]: Without dead ends: 56 [2022-11-16 12:34:12,737 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:34:12,738 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 46 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:12,738 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 31 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:34:12,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-11-16 12:34:12,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2022-11-16 12:34:12,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 47 states have (on average 1.2340425531914894) internal successors, (58), 55 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 58 transitions. [2022-11-16 12:34:12,740 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 58 transitions. Word has length 35 [2022-11-16 12:34:12,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:12,741 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 58 transitions. [2022-11-16 12:34:12,741 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:12,741 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2022-11-16 12:34:12,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-16 12:34:12,742 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:12,742 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:12,742 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-11-16 12:34:12,742 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:12,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:12,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1598435685, now seen corresponding path program 1 times [2022-11-16 12:34:12,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:12,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614628852] [2022-11-16 12:34:12,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:12,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:12,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:14,065 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:14,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:14,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614628852] [2022-11-16 12:34:14,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [614628852] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:34:14,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [882433825] [2022-11-16 12:34:14,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:14,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:34:14,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:34:14,071 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:34:14,074 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-16 12:34:14,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:14,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 316 conjuncts, 77 conjunts are in the unsatisfiable core [2022-11-16 12:34:14,247 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:34:14,281 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:34:14,377 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:34:14,377 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:34:14,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:34:14,495 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:34:14,523 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:34:14,523 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-11-16 12:34:14,800 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-16 12:34:15,050 INFO L321 Elim1Store]: treesize reduction 64, result has 22.0 percent of original size [2022-11-16 12:34:15,050 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 9 case distinctions, treesize of input 34 treesize of output 46 [2022-11-16 12:34:15,057 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2022-11-16 12:34:15,216 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-16 12:34:15,449 INFO L321 Elim1Store]: treesize reduction 15, result has 46.4 percent of original size [2022-11-16 12:34:15,449 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 26 [2022-11-16 12:34:15,586 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:34:15,587 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 82 treesize of output 59 [2022-11-16 12:34:16,068 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:34:16,068 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 105 treesize of output 77 [2022-11-16 12:34:16,214 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:16,215 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:34:16,565 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-16 12:34:16,652 INFO L321 Elim1Store]: treesize reduction 13, result has 78.7 percent of original size [2022-11-16 12:34:16,653 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 76 treesize of output 99 [2022-11-16 12:34:17,470 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 56 [2022-11-16 12:34:17,479 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1328 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse2 (select (select |c_#memory_$Pointer$.base| .cse1) (+ |c_ULTIMATE.start_dll_create_#res#1.offset| 4)))) (let ((.cse0 (select (select (store |c_#memory_$Pointer$.base| .cse2 v_ArrVal_1328) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= .cse0 |ULTIMATE.start_main_~#s~0#1.base|) (not (= .cse1 |c_ULTIMATE.start_dll_create_#res#1.base|)) (not (= .cse2 .cse0))))))) is different from false [2022-11-16 12:34:17,496 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1328 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse2 (select (select |c_#memory_$Pointer$.base| |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse0 (select (select |c_#memory_$Pointer$.base| .cse2) (+ |c_ULTIMATE.start_dll_create_~head~0#1.offset| 4)))) (let ((.cse1 (select (select (store |c_#memory_$Pointer$.base| .cse0 v_ArrVal_1328) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse0 .cse1)) (= .cse1 |ULTIMATE.start_main_~#s~0#1.base|) (not (= .cse2 |c_ULTIMATE.start_dll_create_~head~0#1.base|))))))) is different from false [2022-11-16 12:34:17,646 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1328 (Array Int Int)) (v_ArrVal_1327 (Array Int Int)) (|ULTIMATE.start_main_~#s~0#1.base| Int)) (let ((.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_create_~head~0#1.base| v_ArrVal_1327))) (let ((.cse2 (select (select .cse3 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse0 (select (select .cse3 .cse2) (+ |c_ULTIMATE.start_dll_create_~new_head~0#1.offset| 4)))) (let ((.cse1 (select (select (store .cse3 .cse0 v_ArrVal_1328) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse0 .cse1)) (not (= |c_ULTIMATE.start_dll_create_~new_head~0#1.base| .cse2)) (= |ULTIMATE.start_main_~#s~0#1.base| .cse1))))))) is different from false [2022-11-16 12:34:17,893 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:34:17,894 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 222 treesize of output 107 [2022-11-16 12:34:17,935 INFO L321 Elim1Store]: treesize reduction 55, result has 21.4 percent of original size [2022-11-16 12:34:17,935 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 2052 treesize of output 1508 [2022-11-16 12:34:18,004 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:34:18,005 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1182 treesize of output 1012 [2022-11-16 12:34:18,033 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 976 treesize of output 944 [2022-11-16 12:34:18,533 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:34:18,533 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [882433825] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:34:18,533 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:34:18,533 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 21] total 59 [2022-11-16 12:34:18,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564748800] [2022-11-16 12:34:18,533 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:34:18,534 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 60 states [2022-11-16 12:34:18,534 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:18,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2022-11-16 12:34:18,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=2966, Unknown=44, NotChecked=336, Total=3540 [2022-11-16 12:34:18,536 INFO L87 Difference]: Start difference. First operand 56 states and 58 transitions. Second operand has 60 states, 59 states have (on average 1.7796610169491525) internal successors, (105), 60 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:21,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:21,773 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2022-11-16 12:34:21,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-11-16 12:34:21,773 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 59 states have (on average 1.7796610169491525) internal successors, (105), 60 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-16 12:34:21,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:21,774 INFO L225 Difference]: With dead ends: 70 [2022-11-16 12:34:21,774 INFO L226 Difference]: Without dead ends: 70 [2022-11-16 12:34:21,776 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 34 SyntacticMatches, 5 SemanticMatches, 77 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 891 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=630, Invalid=5036, Unknown=46, NotChecked=450, Total=6162 [2022-11-16 12:34:21,777 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 292 mSDsluCounter, 554 mSDsCounter, 0 mSdLazyCounter, 647 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 292 SdHoareTripleChecker+Valid, 573 SdHoareTripleChecker+Invalid, 1021 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 647 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 333 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:21,777 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [292 Valid, 573 Invalid, 1021 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 647 Invalid, 0 Unknown, 333 Unchecked, 0.6s Time] [2022-11-16 12:34:21,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-11-16 12:34:21,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 62. [2022-11-16 12:34:21,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 53 states have (on average 1.2452830188679245) internal successors, (66), 61 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:21,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 66 transitions. [2022-11-16 12:34:21,780 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 66 transitions. Word has length 36 [2022-11-16 12:34:21,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:21,780 INFO L495 AbstractCegarLoop]: Abstraction has 62 states and 66 transitions. [2022-11-16 12:34:21,780 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 60 states, 59 states have (on average 1.7796610169491525) internal successors, (105), 60 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:21,781 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 66 transitions. [2022-11-16 12:34:21,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-16 12:34:21,781 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:21,781 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:21,791 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-16 12:34:21,987 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-11-16 12:34:21,987 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:21,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:21,988 INFO L85 PathProgramCache]: Analyzing trace with hash -1598435684, now seen corresponding path program 1 times [2022-11-16 12:34:21,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:21,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722174978] [2022-11-16 12:34:21,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:21,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:22,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:23,167 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:23,167 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:23,167 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [722174978] [2022-11-16 12:34:23,168 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [722174978] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:34:23,168 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1952006130] [2022-11-16 12:34:23,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:23,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:34:23,168 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:34:23,171 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:34:23,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-16 12:34:23,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:23,375 INFO L263 TraceCheckSpWp]: Trace formula consists of 316 conjuncts, 80 conjunts are in the unsatisfiable core [2022-11-16 12:34:23,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:34:23,404 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:34:23,513 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:34:23,513 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:34:23,580 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:34:23,630 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:34:23,652 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:34:23,874 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2022-11-16 12:34:23,940 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:23,948 INFO L321 Elim1Store]: treesize reduction 18, result has 14.3 percent of original size [2022-11-16 12:34:23,949 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 28 treesize of output 18 [2022-11-16 12:34:24,280 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:34:24,285 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2022-11-16 12:34:24,390 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-11-16 12:34:24,405 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-16 12:34:24,442 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:24,443 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:34:24,608 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 56 [2022-11-16 12:34:30,747 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:34:30,748 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 121 treesize of output 116 [2022-11-16 12:34:30,928 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2022-11-16 12:34:31,233 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2022-11-16 12:34:31,788 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:34:31,788 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 78 treesize of output 53 [2022-11-16 12:34:31,853 INFO L321 Elim1Store]: treesize reduction 25, result has 65.3 percent of original size [2022-11-16 12:34:31,854 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 116 treesize of output 136 [2022-11-16 12:34:31,884 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:34:31,884 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 107 treesize of output 123 [2022-11-16 12:34:32,939 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:32,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1952006130] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:34:32,939 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:34:32,939 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 20, 20] total 56 [2022-11-16 12:34:32,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739535645] [2022-11-16 12:34:32,939 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:34:32,940 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2022-11-16 12:34:32,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:32,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2022-11-16 12:34:32,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=225, Invalid=2944, Unknown=23, NotChecked=0, Total=3192 [2022-11-16 12:34:32,942 INFO L87 Difference]: Start difference. First operand 62 states and 66 transitions. Second operand has 57 states, 56 states have (on average 1.875) internal successors, (105), 57 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:34,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:34,942 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2022-11-16 12:34:34,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-16 12:34:34,945 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 56 states have (on average 1.875) internal successors, (105), 57 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-16 12:34:34,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:34,946 INFO L225 Difference]: With dead ends: 114 [2022-11-16 12:34:34,946 INFO L226 Difference]: Without dead ends: 114 [2022-11-16 12:34:34,949 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1601 ImplicationChecksByTransitivity, 9.4s TimeCoverageRelationStatistics Valid=780, Invalid=5516, Unknown=24, NotChecked=0, Total=6320 [2022-11-16 12:34:34,949 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 465 mSDsluCounter, 670 mSDsCounter, 0 mSdLazyCounter, 934 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 465 SdHoareTripleChecker+Valid, 694 SdHoareTripleChecker+Invalid, 1375 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 934 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 407 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:34,950 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [465 Valid, 694 Invalid, 1375 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 934 Invalid, 0 Unknown, 407 Unchecked, 0.7s Time] [2022-11-16 12:34:34,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2022-11-16 12:34:34,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 62. [2022-11-16 12:34:34,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 61 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:34,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 65 transitions. [2022-11-16 12:34:34,952 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 65 transitions. Word has length 36 [2022-11-16 12:34:34,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:34,953 INFO L495 AbstractCegarLoop]: Abstraction has 62 states and 65 transitions. [2022-11-16 12:34:34,953 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 56 states have (on average 1.875) internal successors, (105), 57 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:34,953 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 65 transitions. [2022-11-16 12:34:34,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-11-16 12:34:34,953 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:34,954 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:34,963 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-16 12:34:35,159 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:34:35,160 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:35,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:35,160 INFO L85 PathProgramCache]: Analyzing trace with hash 1988076587, now seen corresponding path program 1 times [2022-11-16 12:34:35,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:35,160 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465539587] [2022-11-16 12:34:35,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:35,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:35,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:35,299 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:34:35,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:35,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465539587] [2022-11-16 12:34:35,299 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1465539587] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:34:35,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1800101826] [2022-11-16 12:34:35,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:35,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:34:35,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:34:35,301 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:34:35,312 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-16 12:34:35,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:35,503 INFO L263 TraceCheckSpWp]: Trace formula consists of 309 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-16 12:34:35,507 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:34:35,557 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-16 12:34:35,557 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:34:35,608 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-16 12:34:35,609 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1800101826] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:34:35,609 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:34:35,609 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-11-16 12:34:35,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489798768] [2022-11-16 12:34:35,609 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:34:35,609 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:34:35,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:34:35,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:34:35,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:34:35,610 INFO L87 Difference]: Start difference. First operand 62 states and 65 transitions. Second operand has 6 states, 6 states have (on average 6.5) internal successors, (39), 6 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:35,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:34:35,642 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2022-11-16 12:34:35,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:34:35,643 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.5) internal successors, (39), 6 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2022-11-16 12:34:35,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:34:35,643 INFO L225 Difference]: With dead ends: 62 [2022-11-16 12:34:35,643 INFO L226 Difference]: Without dead ends: 62 [2022-11-16 12:34:35,644 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:34:35,644 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 74 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 103 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:34:35,644 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [74 Valid, 103 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:34:35,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-11-16 12:34:35,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2022-11-16 12:34:35,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 53 states have (on average 1.2075471698113207) internal successors, (64), 61 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:35,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 64 transitions. [2022-11-16 12:34:35,647 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 64 transitions. Word has length 37 [2022-11-16 12:34:35,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:34:35,647 INFO L495 AbstractCegarLoop]: Abstraction has 62 states and 64 transitions. [2022-11-16 12:34:35,647 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 6.5) internal successors, (39), 6 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:34:35,647 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 64 transitions. [2022-11-16 12:34:35,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-11-16 12:34:35,648 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:34:35,648 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:34:35,655 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-11-16 12:34:35,853 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:34:35,853 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-16 12:34:35,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:34:35,854 INFO L85 PathProgramCache]: Analyzing trace with hash -695048217, now seen corresponding path program 1 times [2022-11-16 12:34:35,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:34:35,854 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36287777] [2022-11-16 12:34:35,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:35,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:34:35,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:38,278 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:38,279 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:34:38,279 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36287777] [2022-11-16 12:34:38,279 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [36287777] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:34:38,279 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [421467701] [2022-11-16 12:34:38,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:34:38,279 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:34:38,279 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:34:38,280 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:34:38,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c5186091-c937-4173-9395-cc3fe8c776cc/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-16 12:34:38,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:34:38,474 INFO L263 TraceCheckSpWp]: Trace formula consists of 329 conjuncts, 122 conjunts are in the unsatisfiable core [2022-11-16 12:34:38,480 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:34:38,537 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:34:38,640 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:34:38,649 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:34:38,725 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:34:38,738 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:34:38,856 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:34:38,857 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:34:38,968 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-16 12:34:38,982 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-16 12:34:39,006 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-16 12:34:39,019 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-16 12:34:39,121 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-11-16 12:34:39,134 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-11-16 12:34:39,186 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:39,187 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:39,188 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:34:39,192 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:34:39,193 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 110 treesize of output 73 [2022-11-16 12:34:39,210 INFO L321 Elim1Store]: treesize reduction 23, result has 36.1 percent of original size [2022-11-16 12:34:39,210 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 47 [2022-11-16 12:34:40,222 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:34:40,223 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:40,276 INFO L321 Elim1Store]: treesize reduction 154, result has 16.8 percent of original size [2022-11-16 12:34:40,277 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 7 new quantified variables, introduced 14 case distinctions, treesize of input 118 treesize of output 91 [2022-11-16 12:34:40,293 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:40,343 INFO L321 Elim1Store]: treesize reduction 188, result has 16.4 percent of original size [2022-11-16 12:34:40,343 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 14 case distinctions, treesize of input 149 treesize of output 139 [2022-11-16 12:34:40,774 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:40,775 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:34:40,783 INFO L321 Elim1Store]: treesize reduction 19, result has 5.0 percent of original size [2022-11-16 12:34:40,783 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 6 case distinctions, treesize of input 121 treesize of output 88 [2022-11-16 12:34:40,791 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:40,806 INFO L321 Elim1Store]: treesize reduction 49, result has 5.8 percent of original size [2022-11-16 12:34:40,806 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 4 case distinctions, treesize of input 64 treesize of output 56 [2022-11-16 12:34:41,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:41,273 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:34:41,280 INFO L321 Elim1Store]: treesize reduction 22, result has 12.0 percent of original size [2022-11-16 12:34:41,281 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 6 case distinctions, treesize of input 85 treesize of output 48 [2022-11-16 12:34:41,290 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:34:41,296 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-16 12:34:41,297 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 21 [2022-11-16 12:34:41,306 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:34:41,306 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:35:02,189 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:35:02,190 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1780 treesize of output 1296 [2022-11-16 12:35:02,217 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:35:02,218 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1300 treesize of output 936 [2022-11-16 12:35:02,304 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:35:02,304 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1780 treesize of output 1396 [2022-11-16 12:35:02,329 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:35:02,330 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1400 treesize of output 936 [2022-11-16 12:35:19,317 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:35:19,317 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 2210 treesize of output 1480 [2022-11-16 12:35:19,348 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:35:19,348 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1490 treesize of output 940 [2022-11-16 12:35:19,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:35:46,039 WARN L233 SmtUtils]: Spent 24.98s on a formula simplification. DAG size of input: 308 DAG size of output: 204 (called from [L 318] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.arrays.Elim1Store.elim1) [2022-11-16 12:35:46,040 INFO L321 Elim1Store]: treesize reduction 524, result has 44.7 percent of original size [2022-11-16 12:35:46,045 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 19 new quantified variables, introduced 66 case distinctions, treesize of input 2596932 treesize of output 2344178 [2022-11-16 12:36:32,384 INFO L217 Elim1Store]: Index analysis took 102 ms