./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/list-ext3-properties/dll_nondet_free_order-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/list-ext3-properties/dll_nondet_free_order-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f6eaec015dd6fdb220ef146938a83a65106037c982563310cbbb34d0417543f1 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:44:06,274 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:44:06,276 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:44:06,314 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:44:06,315 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:44:06,320 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:44:06,325 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:44:06,335 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:44:06,337 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:44:06,338 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:44:06,339 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:44:06,340 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:44:06,341 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:44:06,342 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:44:06,343 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:44:06,345 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:44:06,346 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:44:06,350 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:44:06,353 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:44:06,365 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:44:06,366 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:44:06,372 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:44:06,374 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:44:06,375 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:44:06,387 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:44:06,387 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:44:06,388 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:44:06,389 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:44:06,389 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:44:06,393 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:44:06,394 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:44:06,396 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:44:06,398 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:44:06,399 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:44:06,402 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:44:06,403 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:44:06,404 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:44:06,404 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:44:06,404 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:44:06,406 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:44:06,407 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:44:06,408 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-16 12:44:06,465 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:44:06,466 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:44:06,467 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:44:06,467 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:44:06,469 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:44:06,469 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:44:06,470 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:44:06,470 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:44:06,471 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:44:06,471 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:44:06,473 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 12:44:06,473 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 12:44:06,473 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:44:06,473 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 12:44:06,474 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:44:06,474 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-16 12:44:06,474 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-16 12:44:06,474 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-16 12:44:06,475 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:44:06,475 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 12:44:06,475 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 12:44:06,476 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:44:06,476 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:44:06,476 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:44:06,476 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:44:06,477 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:44:06,477 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:44:06,477 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:44:06,478 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:44:06,478 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 12:44:06,478 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f6eaec015dd6fdb220ef146938a83a65106037c982563310cbbb34d0417543f1 [2022-11-16 12:44:06,846 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:44:06,890 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:44:06,893 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:44:06,895 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:44:06,896 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:44:06,898 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/list-ext3-properties/dll_nondet_free_order-1.i [2022-11-16 12:44:06,998 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/data/75ee3c63c/58d80718f3814352849240ba705066ba/FLAG666af4b1b [2022-11-16 12:44:07,632 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:44:07,633 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/sv-benchmarks/c/list-ext3-properties/dll_nondet_free_order-1.i [2022-11-16 12:44:07,647 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/data/75ee3c63c/58d80718f3814352849240ba705066ba/FLAG666af4b1b [2022-11-16 12:44:07,888 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/data/75ee3c63c/58d80718f3814352849240ba705066ba [2022-11-16 12:44:07,891 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:44:07,893 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:44:07,894 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:44:07,895 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:44:07,899 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:44:07,899 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:44:07" (1/1) ... [2022-11-16 12:44:07,901 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1abc6ca8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:07, skipping insertion in model container [2022-11-16 12:44:07,901 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:44:07" (1/1) ... [2022-11-16 12:44:07,909 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:44:07,943 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:44:08,328 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:44:08,335 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:44:08,394 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:44:08,429 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:44:08,430 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08 WrapperNode [2022-11-16 12:44:08,430 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:44:08,431 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:44:08,431 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:44:08,432 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:44:08,442 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,481 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,524 INFO L138 Inliner]: procedures = 116, calls = 31, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 128 [2022-11-16 12:44:08,528 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:44:08,529 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:44:08,529 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:44:08,529 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:44:08,540 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,541 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,544 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,544 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,553 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,557 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,559 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,560 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,563 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:44:08,564 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:44:08,564 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:44:08,565 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:44:08,566 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (1/1) ... [2022-11-16 12:44:08,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:44:08,588 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:08,604 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:44:08,621 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:44:08,658 INFO L130 BoogieDeclarations]: Found specification of procedure myexit [2022-11-16 12:44:08,658 INFO L138 BoogieDeclarations]: Found implementation of procedure myexit [2022-11-16 12:44:08,659 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 12:44:08,660 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-16 12:44:08,660 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-16 12:44:08,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 12:44:08,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:44:08,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:44:08,782 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:44:08,783 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:44:08,814 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint myexitFINAL: assume true; [2022-11-16 12:44:09,240 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:44:09,249 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:44:09,249 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 12:44:09,252 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:44:09 BoogieIcfgContainer [2022-11-16 12:44:09,252 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:44:09,254 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:44:09,255 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:44:09,258 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:44:09,259 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:44:07" (1/3) ... [2022-11-16 12:44:09,260 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@327322be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:44:09, skipping insertion in model container [2022-11-16 12:44:09,260 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:44:08" (2/3) ... [2022-11-16 12:44:09,260 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@327322be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:44:09, skipping insertion in model container [2022-11-16 12:44:09,261 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:44:09" (3/3) ... [2022-11-16 12:44:09,262 INFO L112 eAbstractionObserver]: Analyzing ICFG dll_nondet_free_order-1.i [2022-11-16 12:44:09,283 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:44:09,284 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 62 error locations. [2022-11-16 12:44:09,363 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:44:09,370 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3f08f99a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:44:09,370 INFO L358 AbstractCegarLoop]: Starting to check reachability of 62 error locations. [2022-11-16 12:44:09,375 INFO L276 IsEmpty]: Start isEmpty. Operand has 139 states, 74 states have (on average 1.9594594594594594) internal successors, (145), 137 states have internal predecessors, (145), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:09,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-16 12:44:09,383 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:09,384 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-16 12:44:09,384 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:09,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:09,390 INFO L85 PathProgramCache]: Analyzing trace with hash 1079622, now seen corresponding path program 1 times [2022-11-16 12:44:09,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:09,418 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211980780] [2022-11-16 12:44:09,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:09,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:09,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:09,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:09,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:09,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211980780] [2022-11-16 12:44:09,744 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211980780] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:09,744 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:09,744 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:44:09,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653232579] [2022-11-16 12:44:09,747 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:09,754 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:44:09,755 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:09,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:44:09,799 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:09,804 INFO L87 Difference]: Start difference. First operand has 139 states, 74 states have (on average 1.9594594594594594) internal successors, (145), 137 states have internal predecessors, (145), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:10,023 INFO L93 Difference]: Finished difference Result 136 states and 143 transitions. [2022-11-16 12:44:10,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:44:10,026 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-16 12:44:10,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:10,047 INFO L225 Difference]: With dead ends: 136 [2022-11-16 12:44:10,048 INFO L226 Difference]: Without dead ends: 130 [2022-11-16 12:44:10,051 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,056 INFO L413 NwaCegarLoop]: 117 mSDtfsCounter, 50 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 175 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:10,057 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 175 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:44:10,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-16 12:44:10,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2022-11-16 12:44:10,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 71 states have (on average 1.9014084507042253) internal successors, (135), 129 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 135 transitions. [2022-11-16 12:44:10,127 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 135 transitions. Word has length 4 [2022-11-16 12:44:10,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:10,128 INFO L495 AbstractCegarLoop]: Abstraction has 130 states and 135 transitions. [2022-11-16 12:44:10,128 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,128 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 135 transitions. [2022-11-16 12:44:10,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-16 12:44:10,129 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:10,129 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-16 12:44:10,129 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 12:44:10,130 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:10,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:10,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1079623, now seen corresponding path program 1 times [2022-11-16 12:44:10,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:10,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442036138] [2022-11-16 12:44:10,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:10,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:10,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:10,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:10,229 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:10,230 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442036138] [2022-11-16 12:44:10,230 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [442036138] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:10,230 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:10,231 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:44:10,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086821684] [2022-11-16 12:44:10,231 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:10,232 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:44:10,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:10,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:44:10,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,234 INFO L87 Difference]: Start difference. First operand 130 states and 135 transitions. Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:10,277 INFO L93 Difference]: Finished difference Result 127 states and 132 transitions. [2022-11-16 12:44:10,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:44:10,278 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-16 12:44:10,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:10,280 INFO L225 Difference]: With dead ends: 127 [2022-11-16 12:44:10,280 INFO L226 Difference]: Without dead ends: 127 [2022-11-16 12:44:10,281 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,282 INFO L413 NwaCegarLoop]: 116 mSDtfsCounter, 128 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:10,283 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 117 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:44:10,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-11-16 12:44:10,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-16 12:44:10,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 71 states have (on average 1.8591549295774648) internal successors, (132), 126 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 132 transitions. [2022-11-16 12:44:10,292 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 132 transitions. Word has length 4 [2022-11-16 12:44:10,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:10,292 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 132 transitions. [2022-11-16 12:44:10,293 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,293 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 132 transitions. [2022-11-16 12:44:10,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 12:44:10,293 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:10,294 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:10,294 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-16 12:44:10,294 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:10,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:10,295 INFO L85 PathProgramCache]: Analyzing trace with hash 2065247192, now seen corresponding path program 1 times [2022-11-16 12:44:10,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:10,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490283802] [2022-11-16 12:44:10,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:10,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:10,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:10,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:10,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:10,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490283802] [2022-11-16 12:44:10,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1490283802] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:10,451 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:10,451 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 12:44:10,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508881073] [2022-11-16 12:44:10,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:10,452 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:44:10,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:10,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:44:10,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,453 INFO L87 Difference]: Start difference. First operand 127 states and 132 transitions. Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:10,468 INFO L93 Difference]: Finished difference Result 136 states and 141 transitions. [2022-11-16 12:44:10,469 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:44:10,469 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 12:44:10,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:10,470 INFO L225 Difference]: With dead ends: 136 [2022-11-16 12:44:10,471 INFO L226 Difference]: Without dead ends: 136 [2022-11-16 12:44:10,471 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,472 INFO L413 NwaCegarLoop]: 130 mSDtfsCounter, 8 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 254 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:10,473 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 254 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:44:10,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-11-16 12:44:10,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 128. [2022-11-16 12:44:10,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 72 states have (on average 1.8472222222222223) internal successors, (133), 127 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 133 transitions. [2022-11-16 12:44:10,482 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 133 transitions. Word has length 9 [2022-11-16 12:44:10,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:10,482 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 133 transitions. [2022-11-16 12:44:10,483 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,483 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 133 transitions. [2022-11-16 12:44:10,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 12:44:10,483 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:10,484 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:10,484 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-16 12:44:10,484 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:10,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:10,485 INFO L85 PathProgramCache]: Analyzing trace with hash 2065248729, now seen corresponding path program 1 times [2022-11-16 12:44:10,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:10,486 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690708928] [2022-11-16 12:44:10,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:10,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:10,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:10,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:10,619 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:10,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690708928] [2022-11-16 12:44:10,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690708928] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:10,620 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:10,620 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:44:10,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885772492] [2022-11-16 12:44:10,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:10,621 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:44:10,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:10,622 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:44:10,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,622 INFO L87 Difference]: Start difference. First operand 128 states and 133 transitions. Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:10,705 INFO L93 Difference]: Finished difference Result 127 states and 132 transitions. [2022-11-16 12:44:10,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:44:10,706 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 12:44:10,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:10,707 INFO L225 Difference]: With dead ends: 127 [2022-11-16 12:44:10,707 INFO L226 Difference]: Without dead ends: 127 [2022-11-16 12:44:10,708 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,709 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 40 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 52 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:10,710 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 169 Invalid, 52 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:44:10,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-11-16 12:44:10,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-16 12:44:10,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 72 states have (on average 1.8333333333333333) internal successors, (132), 126 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 132 transitions. [2022-11-16 12:44:10,718 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 132 transitions. Word has length 9 [2022-11-16 12:44:10,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:10,718 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 132 transitions. [2022-11-16 12:44:10,719 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,719 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 132 transitions. [2022-11-16 12:44:10,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 12:44:10,719 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:10,719 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:10,720 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-16 12:44:10,720 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:10,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:10,727 INFO L85 PathProgramCache]: Analyzing trace with hash 2065248730, now seen corresponding path program 1 times [2022-11-16 12:44:10,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:10,727 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959977783] [2022-11-16 12:44:10,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:10,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:10,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:10,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:10,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:10,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959977783] [2022-11-16 12:44:10,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1959977783] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:10,878 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:10,878 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:44:10,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650711089] [2022-11-16 12:44:10,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:10,881 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:44:10,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:10,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:44:10,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,882 INFO L87 Difference]: Start difference. First operand 127 states and 132 transitions. Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:10,921 INFO L93 Difference]: Finished difference Result 126 states and 131 transitions. [2022-11-16 12:44:10,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:44:10,922 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 12:44:10,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:10,925 INFO L225 Difference]: With dead ends: 126 [2022-11-16 12:44:10,925 INFO L226 Difference]: Without dead ends: 126 [2022-11-16 12:44:10,926 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:44:10,933 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 122 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 121 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:10,935 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [122 Valid, 121 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:44:10,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-11-16 12:44:10,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2022-11-16 12:44:10,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 72 states have (on average 1.8194444444444444) internal successors, (131), 125 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 131 transitions. [2022-11-16 12:44:10,950 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 131 transitions. Word has length 9 [2022-11-16 12:44:10,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:10,950 INFO L495 AbstractCegarLoop]: Abstraction has 126 states and 131 transitions. [2022-11-16 12:44:10,951 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:10,951 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 131 transitions. [2022-11-16 12:44:10,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-11-16 12:44:10,951 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:10,952 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:10,952 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-16 12:44:10,952 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:10,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:10,953 INFO L85 PathProgramCache]: Analyzing trace with hash -401798830, now seen corresponding path program 1 times [2022-11-16 12:44:10,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:10,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913569926] [2022-11-16 12:44:10,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:10,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:10,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:11,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:11,106 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:11,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913569926] [2022-11-16 12:44:11,106 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913569926] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:11,107 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:11,107 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:44:11,107 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16158395] [2022-11-16 12:44:11,107 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:11,108 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:44:11,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:11,108 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:44:11,108 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:44:11,109 INFO L87 Difference]: Start difference. First operand 126 states and 131 transitions. Second operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:11,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:11,254 INFO L93 Difference]: Finished difference Result 130 states and 135 transitions. [2022-11-16 12:44:11,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:44:11,255 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-11-16 12:44:11,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:11,256 INFO L225 Difference]: With dead ends: 130 [2022-11-16 12:44:11,256 INFO L226 Difference]: Without dead ends: 130 [2022-11-16 12:44:11,256 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:44:11,257 INFO L413 NwaCegarLoop]: 106 mSDtfsCounter, 114 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 217 SdHoareTripleChecker+Invalid, 103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:11,258 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [114 Valid, 217 Invalid, 103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:44:11,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-16 12:44:11,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 129. [2022-11-16 12:44:11,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 75 states have (on average 1.8) internal successors, (135), 128 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:11,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 135 transitions. [2022-11-16 12:44:11,263 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 135 transitions. Word has length 10 [2022-11-16 12:44:11,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:11,264 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 135 transitions. [2022-11-16 12:44:11,264 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:11,264 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 135 transitions. [2022-11-16 12:44:11,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-11-16 12:44:11,265 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:11,265 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:11,265 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-16 12:44:11,265 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:11,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:11,266 INFO L85 PathProgramCache]: Analyzing trace with hash -401798829, now seen corresponding path program 1 times [2022-11-16 12:44:11,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:11,266 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912589366] [2022-11-16 12:44:11,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:11,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:11,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:11,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:11,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:11,465 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912589366] [2022-11-16 12:44:11,465 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1912589366] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:11,466 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:11,466 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:44:11,466 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987864789] [2022-11-16 12:44:11,466 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:11,466 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:44:11,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:11,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:44:11,467 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:44:11,468 INFO L87 Difference]: Start difference. First operand 129 states and 135 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:11,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:11,630 INFO L93 Difference]: Finished difference Result 130 states and 135 transitions. [2022-11-16 12:44:11,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:44:11,630 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-11-16 12:44:11,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:11,631 INFO L225 Difference]: With dead ends: 130 [2022-11-16 12:44:11,631 INFO L226 Difference]: Without dead ends: 130 [2022-11-16 12:44:11,632 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:44:11,633 INFO L413 NwaCegarLoop]: 105 mSDtfsCounter, 135 mSDsluCounter, 158 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 263 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:11,633 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [135 Valid, 263 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:44:11,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-16 12:44:11,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 129. [2022-11-16 12:44:11,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 75 states have (on average 1.7866666666666666) internal successors, (134), 128 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:11,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 134 transitions. [2022-11-16 12:44:11,638 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 134 transitions. Word has length 10 [2022-11-16 12:44:11,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:11,638 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 134 transitions. [2022-11-16 12:44:11,638 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:11,639 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 134 transitions. [2022-11-16 12:44:11,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:44:11,639 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:11,639 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:11,639 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-16 12:44:11,640 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:11,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:11,640 INFO L85 PathProgramCache]: Analyzing trace with hash -1662359483, now seen corresponding path program 1 times [2022-11-16 12:44:11,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:11,641 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587128618] [2022-11-16 12:44:11,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:11,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:11,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:11,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:11,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:11,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587128618] [2022-11-16 12:44:11,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587128618] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:11,715 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1934543965] [2022-11-16 12:44:11,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:11,715 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:11,715 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:11,719 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:11,727 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-16 12:44:11,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:11,842 INFO L263 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 12:44:11,848 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:11,934 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:11,934 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:11,984 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:11,984 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1934543965] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:11,984 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:11,984 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 5 [2022-11-16 12:44:11,985 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [50940776] [2022-11-16 12:44:11,985 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:11,986 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:44:11,986 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:11,986 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:44:11,987 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:44:11,988 INFO L87 Difference]: Start difference. First operand 129 states and 134 transitions. Second operand has 5 states, 5 states have (on average 4.8) internal successors, (24), 5 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:12,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:12,008 INFO L93 Difference]: Finished difference Result 131 states and 136 transitions. [2022-11-16 12:44:12,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:44:12,008 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.8) internal successors, (24), 5 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-11-16 12:44:12,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:12,009 INFO L225 Difference]: With dead ends: 131 [2022-11-16 12:44:12,010 INFO L226 Difference]: Without dead ends: 131 [2022-11-16 12:44:12,011 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:44:12,012 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 14 mSDsluCounter, 361 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 489 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:12,014 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 489 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:44:12,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-11-16 12:44:12,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2022-11-16 12:44:12,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131 states, 77 states have (on average 1.7662337662337662) internal successors, (136), 130 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:12,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 136 transitions. [2022-11-16 12:44:12,029 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 136 transitions. Word has length 14 [2022-11-16 12:44:12,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:12,029 INFO L495 AbstractCegarLoop]: Abstraction has 131 states and 136 transitions. [2022-11-16 12:44:12,030 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.8) internal successors, (24), 5 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:12,030 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 136 transitions. [2022-11-16 12:44:12,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 12:44:12,030 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:12,030 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:12,047 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:12,239 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:12,240 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:12,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:12,240 INFO L85 PathProgramCache]: Analyzing trace with hash 6511237, now seen corresponding path program 1 times [2022-11-16 12:44:12,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:12,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483712429] [2022-11-16 12:44:12,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:12,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:12,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:12,401 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:12,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:12,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483712429] [2022-11-16 12:44:12,402 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [483712429] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:12,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1766981998] [2022-11-16 12:44:12,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:12,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:12,403 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:12,404 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:12,427 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-16 12:44:12,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:12,511 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 12:44:12,518 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:12,562 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:12,622 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-16 12:44:12,623 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-16 12:44:12,639 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:12,639 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:12,792 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:12,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1766981998] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:12,793 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:12,793 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 4] total 6 [2022-11-16 12:44:12,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127135893] [2022-11-16 12:44:12,794 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:12,794 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-16 12:44:12,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:12,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-16 12:44:12,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-11-16 12:44:12,795 INFO L87 Difference]: Start difference. First operand 131 states and 136 transitions. Second operand has 7 states, 6 states have (on average 4.5) internal successors, (27), 7 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:12,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:12,844 INFO L93 Difference]: Finished difference Result 129 states and 134 transitions. [2022-11-16 12:44:12,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:44:12,845 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 4.5) internal successors, (27), 7 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 12:44:12,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:12,846 INFO L225 Difference]: With dead ends: 129 [2022-11-16 12:44:12,846 INFO L226 Difference]: Without dead ends: 129 [2022-11-16 12:44:12,846 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-11-16 12:44:12,847 INFO L413 NwaCegarLoop]: 109 mSDtfsCounter, 138 mSDsluCounter, 169 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 69 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:12,848 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 278 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 23 Invalid, 0 Unknown, 69 Unchecked, 0.0s Time] [2022-11-16 12:44:12,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2022-11-16 12:44:12,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2022-11-16 12:44:12,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 77 states have (on average 1.7402597402597402) internal successors, (134), 128 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:12,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 134 transitions. [2022-11-16 12:44:12,851 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 134 transitions. Word has length 15 [2022-11-16 12:44:12,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:12,852 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 134 transitions. [2022-11-16 12:44:12,852 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 4.5) internal successors, (27), 7 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:12,852 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 134 transitions. [2022-11-16 12:44:12,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 12:44:12,853 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:12,853 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:12,869 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:13,058 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:13,059 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:13,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:13,060 INFO L85 PathProgramCache]: Analyzing trace with hash 6511238, now seen corresponding path program 1 times [2022-11-16 12:44:13,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:13,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274756571] [2022-11-16 12:44:13,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:13,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:13,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:13,368 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:13,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:13,368 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274756571] [2022-11-16 12:44:13,368 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274756571] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:13,368 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [725372398] [2022-11-16 12:44:13,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:13,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:13,369 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:13,370 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:13,395 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-16 12:44:13,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:13,478 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 15 conjunts are in the unsatisfiable core [2022-11-16 12:44:13,480 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:13,493 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:13,499 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:13,596 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:13,598 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:44:13,609 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:44:13,609 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:44:13,644 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:13,644 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:22,099 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:22,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [725372398] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:22,100 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:22,100 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 12 [2022-11-16 12:44:22,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661042891] [2022-11-16 12:44:22,100 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:22,101 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-16 12:44:22,101 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:22,102 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-16 12:44:22,102 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2022-11-16 12:44:22,102 INFO L87 Difference]: Start difference. First operand 129 states and 134 transitions. Second operand has 13 states, 12 states have (on average 3.0) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:22,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:22,459 INFO L93 Difference]: Finished difference Result 127 states and 132 transitions. [2022-11-16 12:44:22,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:44:22,460 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 3.0) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 12:44:22,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:22,461 INFO L225 Difference]: With dead ends: 127 [2022-11-16 12:44:22,461 INFO L226 Difference]: Without dead ends: 127 [2022-11-16 12:44:22,462 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=74, Invalid=198, Unknown=0, NotChecked=0, Total=272 [2022-11-16 12:44:22,462 INFO L413 NwaCegarLoop]: 102 mSDtfsCounter, 609 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 609 SdHoareTripleChecker+Valid, 324 SdHoareTripleChecker+Invalid, 219 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 72 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:22,463 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [609 Valid, 324 Invalid, 219 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 138 Invalid, 0 Unknown, 72 Unchecked, 0.2s Time] [2022-11-16 12:44:22,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-11-16 12:44:22,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-16 12:44:22,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 77 states have (on average 1.7142857142857142) internal successors, (132), 126 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:22,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 132 transitions. [2022-11-16 12:44:22,466 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 132 transitions. Word has length 15 [2022-11-16 12:44:22,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:22,466 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 132 transitions. [2022-11-16 12:44:22,466 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 3.0) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:22,467 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 132 transitions. [2022-11-16 12:44:22,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:44:22,467 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:22,468 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:22,484 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:22,673 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-16 12:44:22,674 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:22,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:22,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1580520033, now seen corresponding path program 1 times [2022-11-16 12:44:22,675 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:22,675 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303395510] [2022-11-16 12:44:22,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:22,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:22,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:22,859 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 12:44:22,859 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:22,859 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303395510] [2022-11-16 12:44:22,860 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [303395510] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:22,860 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:22,860 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:44:22,860 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558036603] [2022-11-16 12:44:22,860 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:22,861 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:44:22,861 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:22,862 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:44:22,862 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:44:22,862 INFO L87 Difference]: Start difference. First operand 127 states and 132 transitions. Second operand has 6 states, 5 states have (on average 4.0) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:23,081 INFO L93 Difference]: Finished difference Result 124 states and 129 transitions. [2022-11-16 12:44:23,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:44:23,082 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.0) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:44:23,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:23,083 INFO L225 Difference]: With dead ends: 124 [2022-11-16 12:44:23,083 INFO L226 Difference]: Without dead ends: 124 [2022-11-16 12:44:23,083 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:44:23,084 INFO L413 NwaCegarLoop]: 104 mSDtfsCounter, 108 mSDsluCounter, 221 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 325 SdHoareTripleChecker+Invalid, 191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:23,084 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [108 Valid, 325 Invalid, 191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:44:23,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2022-11-16 12:44:23,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2022-11-16 12:44:23,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 77 states have (on average 1.6753246753246753) internal successors, (129), 123 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 129 transitions. [2022-11-16 12:44:23,088 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 129 transitions. Word has length 22 [2022-11-16 12:44:23,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:23,088 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 129 transitions. [2022-11-16 12:44:23,088 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.0) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,088 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 129 transitions. [2022-11-16 12:44:23,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:44:23,089 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:23,089 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:23,089 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-16 12:44:23,089 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:23,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:23,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1580520034, now seen corresponding path program 1 times [2022-11-16 12:44:23,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:23,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585225027] [2022-11-16 12:44:23,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:23,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:23,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:23,312 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:44:23,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:23,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [585225027] [2022-11-16 12:44:23,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [585225027] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:23,313 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:23,313 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:44:23,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134850943] [2022-11-16 12:44:23,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:23,314 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:44:23,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:23,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:44:23,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:44:23,315 INFO L87 Difference]: Start difference. First operand 124 states and 129 transitions. Second operand has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:23,492 INFO L93 Difference]: Finished difference Result 117 states and 122 transitions. [2022-11-16 12:44:23,492 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:44:23,492 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:44:23,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:23,493 INFO L225 Difference]: With dead ends: 117 [2022-11-16 12:44:23,493 INFO L226 Difference]: Without dead ends: 117 [2022-11-16 12:44:23,493 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:44:23,494 INFO L413 NwaCegarLoop]: 82 mSDtfsCounter, 412 mSDsluCounter, 13 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 412 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:23,494 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [412 Valid, 95 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:44:23,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-11-16 12:44:23,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2022-11-16 12:44:23,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 77 states have (on average 1.5844155844155845) internal successors, (122), 116 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 122 transitions. [2022-11-16 12:44:23,498 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 122 transitions. Word has length 22 [2022-11-16 12:44:23,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:23,498 INFO L495 AbstractCegarLoop]: Abstraction has 117 states and 122 transitions. [2022-11-16 12:44:23,498 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,499 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 122 transitions. [2022-11-16 12:44:23,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-16 12:44:23,499 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:23,499 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:23,500 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-16 12:44:23,500 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:23,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:23,500 INFO L85 PathProgramCache]: Analyzing trace with hash 67241285, now seen corresponding path program 1 times [2022-11-16 12:44:23,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:23,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898679308] [2022-11-16 12:44:23,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:23,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:23,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:23,651 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:44:23,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:23,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1898679308] [2022-11-16 12:44:23,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1898679308] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:23,653 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:23,653 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 12:44:23,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14201341] [2022-11-16 12:44:23,657 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:23,657 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 12:44:23,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:23,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 12:44:23,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:44:23,660 INFO L87 Difference]: Start difference. First operand 117 states and 122 transitions. Second operand has 6 states, 5 states have (on average 5.6) internal successors, (28), 6 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:23,811 INFO L93 Difference]: Finished difference Result 112 states and 117 transitions. [2022-11-16 12:44:23,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:44:23,811 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.6) internal successors, (28), 6 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-16 12:44:23,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:23,812 INFO L225 Difference]: With dead ends: 112 [2022-11-16 12:44:23,812 INFO L226 Difference]: Without dead ends: 112 [2022-11-16 12:44:23,813 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-11-16 12:44:23,813 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 387 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 387 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:23,813 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [387 Valid, 84 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:44:23,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-11-16 12:44:23,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2022-11-16 12:44:23,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 77 states have (on average 1.5194805194805194) internal successors, (117), 111 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 117 transitions. [2022-11-16 12:44:23,816 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 117 transitions. Word has length 28 [2022-11-16 12:44:23,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:23,817 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 117 transitions. [2022-11-16 12:44:23,817 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.6) internal successors, (28), 6 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:23,817 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 117 transitions. [2022-11-16 12:44:23,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-16 12:44:23,817 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:23,818 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:23,818 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-16 12:44:23,818 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:23,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:23,818 INFO L85 PathProgramCache]: Analyzing trace with hash 67280267, now seen corresponding path program 1 times [2022-11-16 12:44:23,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:23,821 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605285137] [2022-11-16 12:44:23,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:23,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:23,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:24,342 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:44:24,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:24,343 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605285137] [2022-11-16 12:44:24,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [605285137] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:24,343 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:24,344 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-16 12:44:24,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341083941] [2022-11-16 12:44:24,344 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:24,344 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-16 12:44:24,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:24,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-16 12:44:24,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:44:24,347 INFO L87 Difference]: Start difference. First operand 112 states and 117 transitions. Second operand has 11 states, 10 states have (on average 2.8) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:24,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:24,643 INFO L93 Difference]: Finished difference Result 107 states and 112 transitions. [2022-11-16 12:44:24,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 12:44:24,644 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.8) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-16 12:44:24,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:24,644 INFO L225 Difference]: With dead ends: 107 [2022-11-16 12:44:24,645 INFO L226 Difference]: Without dead ends: 107 [2022-11-16 12:44:24,645 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2022-11-16 12:44:24,645 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 638 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 638 SdHoareTripleChecker+Valid, 156 SdHoareTripleChecker+Invalid, 137 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:24,646 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [638 Valid, 156 Invalid, 137 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:44:24,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2022-11-16 12:44:24,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2022-11-16 12:44:24,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 77 states have (on average 1.4545454545454546) internal successors, (112), 106 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:24,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 112 transitions. [2022-11-16 12:44:24,649 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 112 transitions. Word has length 28 [2022-11-16 12:44:24,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:24,649 INFO L495 AbstractCegarLoop]: Abstraction has 107 states and 112 transitions. [2022-11-16 12:44:24,649 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.8) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:24,649 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 112 transitions. [2022-11-16 12:44:24,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-16 12:44:24,650 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:24,650 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:24,650 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-11-16 12:44:24,650 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:24,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:24,653 INFO L85 PathProgramCache]: Analyzing trace with hash 67279051, now seen corresponding path program 1 times [2022-11-16 12:44:24,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:24,654 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999013930] [2022-11-16 12:44:24,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:24,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:24,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:25,380 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:25,381 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:25,381 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999013930] [2022-11-16 12:44:25,381 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [999013930] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:25,381 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1765631091] [2022-11-16 12:44:25,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:25,381 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:25,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:25,383 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:25,403 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-16 12:44:25,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:25,524 INFO L263 TraceCheckSpWp]: Trace formula consists of 218 conjuncts, 56 conjunts are in the unsatisfiable core [2022-11-16 12:44:25,530 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:25,594 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:25,814 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-16 12:44:25,815 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:44:25,894 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:44:25,973 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-16 12:44:26,107 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-16 12:44:26,168 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:26,169 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-16 12:44:26,352 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:26,352 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 10 [2022-11-16 12:44:26,362 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:26,363 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:26,396 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_465 (Array Int Int))) (= (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_465) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) 0)) is different from false [2022-11-16 12:44:26,411 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_465 (Array Int Int))) (= (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_465) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|) 0)) is different from false [2022-11-16 12:44:30,613 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:30,613 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 22 [2022-11-16 12:44:30,620 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 52 [2022-11-16 12:44:30,632 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2022-11-16 12:44:30,639 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2022-11-16 12:44:31,033 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-16 12:44:31,034 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-11-16 12:44:31,043 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-11-16 12:44:31,043 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1765631091] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:31,043 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:31,044 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 14] total 35 [2022-11-16 12:44:31,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224500850] [2022-11-16 12:44:31,044 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:31,044 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-16 12:44:31,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:31,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-16 12:44:31,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1002, Unknown=13, NotChecked=130, Total=1260 [2022-11-16 12:44:31,046 INFO L87 Difference]: Start difference. First operand 107 states and 112 transitions. Second operand has 36 states, 35 states have (on average 1.8) internal successors, (63), 36 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:32,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:32,627 INFO L93 Difference]: Finished difference Result 106 states and 111 transitions. [2022-11-16 12:44:32,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-16 12:44:32,632 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 1.8) internal successors, (63), 36 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-16 12:44:32,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:32,632 INFO L225 Difference]: With dead ends: 106 [2022-11-16 12:44:32,632 INFO L226 Difference]: Without dead ends: 106 [2022-11-16 12:44:32,634 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 48 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 427 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=400, Invalid=1851, Unknown=13, NotChecked=186, Total=2450 [2022-11-16 12:44:32,634 INFO L413 NwaCegarLoop]: 58 mSDtfsCounter, 1102 mSDsluCounter, 470 mSDsCounter, 0 mSdLazyCounter, 523 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1102 SdHoareTripleChecker+Valid, 528 SdHoareTripleChecker+Invalid, 910 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 523 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 358 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:32,635 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1102 Valid, 528 Invalid, 910 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 523 Invalid, 0 Unknown, 358 Unchecked, 0.6s Time] [2022-11-16 12:44:32,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-11-16 12:44:32,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 102. [2022-11-16 12:44:32,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 77 states have (on average 1.3896103896103895) internal successors, (107), 101 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:32,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2022-11-16 12:44:32,638 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 107 transitions. Word has length 28 [2022-11-16 12:44:32,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:32,638 INFO L495 AbstractCegarLoop]: Abstraction has 102 states and 107 transitions. [2022-11-16 12:44:32,638 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 35 states have (on average 1.8) internal successors, (63), 36 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:32,639 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 107 transitions. [2022-11-16 12:44:32,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-16 12:44:32,648 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:32,648 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:32,665 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-11-16 12:44:32,854 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-16 12:44:32,854 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:32,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:32,854 INFO L85 PathProgramCache]: Analyzing trace with hash 2085688457, now seen corresponding path program 1 times [2022-11-16 12:44:32,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:32,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621006925] [2022-11-16 12:44:32,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:32,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:32,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:33,461 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:44:33,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:33,462 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621006925] [2022-11-16 12:44:33,462 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1621006925] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:33,462 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:33,462 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-16 12:44:33,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705853274] [2022-11-16 12:44:33,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:33,463 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-16 12:44:33,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:33,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-16 12:44:33,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:44:33,464 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. Second operand has 11 states, 10 states have (on average 2.9) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:34,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:34,021 INFO L93 Difference]: Finished difference Result 97 states and 102 transitions. [2022-11-16 12:44:34,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 12:44:34,021 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.9) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-16 12:44:34,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:34,024 INFO L225 Difference]: With dead ends: 97 [2022-11-16 12:44:34,024 INFO L226 Difference]: Without dead ends: 97 [2022-11-16 12:44:34,024 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2022-11-16 12:44:34,025 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 494 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 211 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 211 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:34,025 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 75 Invalid, 217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 211 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-16 12:44:34,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-11-16 12:44:34,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2022-11-16 12:44:34,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 77 states have (on average 1.3246753246753247) internal successors, (102), 96 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:34,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 102 transitions. [2022-11-16 12:44:34,030 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 102 transitions. Word has length 29 [2022-11-16 12:44:34,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:34,031 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 102 transitions. [2022-11-16 12:44:34,031 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.9) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:34,031 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 102 transitions. [2022-11-16 12:44:34,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-16 12:44:34,034 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:34,035 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:34,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-11-16 12:44:34,035 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:34,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:34,036 INFO L85 PathProgramCache]: Analyzing trace with hash 2085650723, now seen corresponding path program 1 times [2022-11-16 12:44:34,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:34,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1004202784] [2022-11-16 12:44:34,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:34,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:34,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:34,790 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:34,790 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:34,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1004202784] [2022-11-16 12:44:34,791 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1004202784] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:34,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1540225245] [2022-11-16 12:44:34,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:34,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:34,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:34,792 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:34,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-16 12:44:34,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:34,955 INFO L263 TraceCheckSpWp]: Trace formula consists of 220 conjuncts, 46 conjunts are in the unsatisfiable core [2022-11-16 12:44:34,958 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:34,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:35,053 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-16 12:44:35,054 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:44:35,104 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:44:35,185 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-16 12:44:35,420 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2022-11-16 12:44:35,508 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:35,515 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2022-11-16 12:44:35,744 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 27 [2022-11-16 12:44:35,771 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:35,771 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:35,886 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_587 (Array Int Int))) (<= (+ (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_587) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) 1) |c_#StackHeapBarrier|)) is different from false [2022-11-16 12:44:40,093 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:40,093 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 24 [2022-11-16 12:44:40,098 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 60 [2022-11-16 12:44:40,103 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2022-11-16 12:44:40,111 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2022-11-16 12:44:40,531 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-16 12:44:40,532 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-11-16 12:44:40,540 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:44:40,541 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1540225245] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:40,541 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:40,541 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 28 [2022-11-16 12:44:40,541 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327661691] [2022-11-16 12:44:40,542 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:40,542 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-11-16 12:44:40,542 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:40,543 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-16 12:44:40,543 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=659, Unknown=17, NotChecked=52, Total=812 [2022-11-16 12:44:40,544 INFO L87 Difference]: Start difference. First operand 97 states and 102 transitions. Second operand has 29 states, 28 states have (on average 1.9642857142857142) internal successors, (55), 29 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:42,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:42,308 INFO L93 Difference]: Finished difference Result 179 states and 189 transitions. [2022-11-16 12:44:42,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-16 12:44:42,309 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 1.9642857142857142) internal successors, (55), 29 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-16 12:44:42,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:42,310 INFO L225 Difference]: With dead ends: 179 [2022-11-16 12:44:42,310 INFO L226 Difference]: Without dead ends: 179 [2022-11-16 12:44:42,311 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 42 SyntacticMatches, 4 SemanticMatches, 34 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=169, Invalid=1008, Unknown=17, NotChecked=66, Total=1260 [2022-11-16 12:44:42,311 INFO L413 NwaCegarLoop]: 47 mSDtfsCounter, 575 mSDsluCounter, 718 mSDsCounter, 0 mSdLazyCounter, 753 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 575 SdHoareTripleChecker+Valid, 765 SdHoareTripleChecker+Invalid, 1242 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 753 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 471 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:42,312 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [575 Valid, 765 Invalid, 1242 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 753 Invalid, 0 Unknown, 471 Unchecked, 1.0s Time] [2022-11-16 12:44:42,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-11-16 12:44:42,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 136. [2022-11-16 12:44:42,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 135 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:42,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 149 transitions. [2022-11-16 12:44:42,317 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 149 transitions. Word has length 29 [2022-11-16 12:44:42,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:42,317 INFO L495 AbstractCegarLoop]: Abstraction has 136 states and 149 transitions. [2022-11-16 12:44:42,318 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 1.9642857142857142) internal successors, (55), 29 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:42,318 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 149 transitions. [2022-11-16 12:44:42,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-16 12:44:42,319 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:42,319 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:42,331 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-11-16 12:44:42,525 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:42,525 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:42,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:42,526 INFO L85 PathProgramCache]: Analyzing trace with hash 231832909, now seen corresponding path program 1 times [2022-11-16 12:44:42,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:42,526 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504249321] [2022-11-16 12:44:42,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:42,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:42,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:43,003 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 12:44:43,003 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:43,003 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504249321] [2022-11-16 12:44:43,004 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1504249321] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:44:43,004 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:44:43,004 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-11-16 12:44:43,004 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [900427398] [2022-11-16 12:44:43,004 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:44:43,004 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-16 12:44:43,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:43,005 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-16 12:44:43,005 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2022-11-16 12:44:43,005 INFO L87 Difference]: Start difference. First operand 136 states and 149 transitions. Second operand has 12 states, 11 states have (on average 2.727272727272727) internal successors, (30), 12 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:43,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:43,585 INFO L93 Difference]: Finished difference Result 135 states and 147 transitions. [2022-11-16 12:44:43,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 12:44:43,585 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.727272727272727) internal successors, (30), 12 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-11-16 12:44:43,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:43,586 INFO L225 Difference]: With dead ends: 135 [2022-11-16 12:44:43,587 INFO L226 Difference]: Without dead ends: 135 [2022-11-16 12:44:43,587 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=102, Invalid=240, Unknown=0, NotChecked=0, Total=342 [2022-11-16 12:44:43,588 INFO L413 NwaCegarLoop]: 74 mSDtfsCounter, 321 mSDsluCounter, 238 mSDsCounter, 0 mSdLazyCounter, 360 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 321 SdHoareTripleChecker+Valid, 312 SdHoareTripleChecker+Invalid, 362 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 360 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:43,588 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [321 Valid, 312 Invalid, 362 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 360 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-16 12:44:43,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2022-11-16 12:44:43,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2022-11-16 12:44:43,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 116 states have (on average 1.2672413793103448) internal successors, (147), 134 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:43,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 147 transitions. [2022-11-16 12:44:43,592 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 147 transitions. Word has length 30 [2022-11-16 12:44:43,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:43,592 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 147 transitions. [2022-11-16 12:44:43,593 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.727272727272727) internal successors, (30), 12 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:43,593 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 147 transitions. [2022-11-16 12:44:43,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-16 12:44:43,593 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:43,593 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:43,594 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-11-16 12:44:43,594 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:43,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:43,594 INFO L85 PathProgramCache]: Analyzing trace with hash 230663117, now seen corresponding path program 1 times [2022-11-16 12:44:43,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:43,597 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879486278] [2022-11-16 12:44:43,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:43,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:43,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:44,222 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:44,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:44,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [879486278] [2022-11-16 12:44:44,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [879486278] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:44,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1653982689] [2022-11-16 12:44:44,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:44,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:44,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:44,224 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:44,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-16 12:44:44,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:44,389 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 53 conjunts are in the unsatisfiable core [2022-11-16 12:44:44,394 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:44,399 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:44,444 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:44:44,444 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:44:44,497 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-16 12:44:44,497 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:44:44,523 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:44:44,554 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:44:44,555 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-11-16 12:44:44,678 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-11-16 12:44:44,752 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:44,754 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-11-16 12:44:45,001 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:45,002 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2022-11-16 12:44:45,047 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:45,047 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:45,231 INFO L321 Elim1Store]: treesize reduction 18, result has 60.0 percent of original size [2022-11-16 12:44:45,231 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 38 [2022-11-16 12:44:45,331 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:45,332 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 35 [2022-11-16 12:44:45,338 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 235 treesize of output 215 [2022-11-16 12:44:45,351 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 195 treesize of output 187 [2022-11-16 12:44:45,359 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 187 treesize of output 171 [2022-11-16 12:44:45,755 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:45,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1653982689] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:45,755 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:45,756 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 13] total 28 [2022-11-16 12:44:45,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2102650610] [2022-11-16 12:44:45,756 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:45,758 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-11-16 12:44:45,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:45,759 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-16 12:44:45,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=717, Unknown=9, NotChecked=0, Total=812 [2022-11-16 12:44:45,762 INFO L87 Difference]: Start difference. First operand 135 states and 147 transitions. Second operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 29 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:47,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:47,175 INFO L93 Difference]: Finished difference Result 134 states and 146 transitions. [2022-11-16 12:44:47,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-16 12:44:47,175 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 29 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-11-16 12:44:47,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:47,176 INFO L225 Difference]: With dead ends: 134 [2022-11-16 12:44:47,177 INFO L226 Difference]: Without dead ends: 134 [2022-11-16 12:44:47,178 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 46 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=322, Invalid=1475, Unknown=9, NotChecked=0, Total=1806 [2022-11-16 12:44:47,178 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 202 mSDsluCounter, 748 mSDsCounter, 0 mSdLazyCounter, 577 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 815 SdHoareTripleChecker+Invalid, 743 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 577 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 151 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:47,179 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 815 Invalid, 743 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 577 Invalid, 0 Unknown, 151 Unchecked, 0.6s Time] [2022-11-16 12:44:47,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2022-11-16 12:44:47,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2022-11-16 12:44:47,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 116 states have (on average 1.2586206896551724) internal successors, (146), 133 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:47,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 146 transitions. [2022-11-16 12:44:47,189 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 146 transitions. Word has length 30 [2022-11-16 12:44:47,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:47,189 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 146 transitions. [2022-11-16 12:44:47,190 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 29 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:47,190 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 146 transitions. [2022-11-16 12:44:47,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-16 12:44:47,191 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:47,191 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:47,199 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:47,395 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:47,396 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:47,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:47,397 INFO L85 PathProgramCache]: Analyzing trace with hash 823875782, now seen corresponding path program 1 times [2022-11-16 12:44:47,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:47,398 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028269875] [2022-11-16 12:44:47,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:47,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:47,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:48,119 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:48,119 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:48,120 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028269875] [2022-11-16 12:44:48,120 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2028269875] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:48,120 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1151538139] [2022-11-16 12:44:48,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:48,120 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:48,120 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:48,122 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:48,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-16 12:44:48,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:48,281 INFO L263 TraceCheckSpWp]: Trace formula consists of 229 conjuncts, 36 conjunts are in the unsatisfiable core [2022-11-16 12:44:48,284 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:48,347 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:44:48,347 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:44:48,475 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:44:48,595 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:48,596 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 21 [2022-11-16 12:44:48,936 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:44:48,936 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:44:48,948 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:48,948 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:49,235 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 11 [2022-11-16 12:44:49,239 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-11-16 12:44:49,248 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-11-16 12:44:49,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:49,261 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:44:49,340 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-16 12:44:49,341 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 12 [2022-11-16 12:44:49,350 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:49,351 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1151538139] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:49,351 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:49,351 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 14] total 28 [2022-11-16 12:44:49,352 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691003374] [2022-11-16 12:44:49,352 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:49,352 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-11-16 12:44:49,353 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:49,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-16 12:44:49,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=716, Unknown=0, NotChecked=0, Total=812 [2022-11-16 12:44:49,354 INFO L87 Difference]: Start difference. First operand 134 states and 146 transitions. Second operand has 29 states, 28 states have (on average 2.4285714285714284) internal successors, (68), 29 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:50,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:50,530 INFO L93 Difference]: Finished difference Result 133 states and 144 transitions. [2022-11-16 12:44:50,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-16 12:44:50,531 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.4285714285714284) internal successors, (68), 29 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-11-16 12:44:50,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:50,532 INFO L225 Difference]: With dead ends: 133 [2022-11-16 12:44:50,532 INFO L226 Difference]: Without dead ends: 133 [2022-11-16 12:44:50,533 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 50 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=256, Invalid=1226, Unknown=0, NotChecked=0, Total=1482 [2022-11-16 12:44:50,534 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 438 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 667 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 438 SdHoareTripleChecker+Valid, 608 SdHoareTripleChecker+Invalid, 739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 667 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 59 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:50,534 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [438 Valid, 608 Invalid, 739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 667 Invalid, 0 Unknown, 59 Unchecked, 0.7s Time] [2022-11-16 12:44:50,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2022-11-16 12:44:50,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2022-11-16 12:44:50,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 116 states have (on average 1.2413793103448276) internal successors, (144), 132 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:50,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 144 transitions. [2022-11-16 12:44:50,538 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 144 transitions. Word has length 33 [2022-11-16 12:44:50,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:50,540 INFO L495 AbstractCegarLoop]: Abstraction has 133 states and 144 transitions. [2022-11-16 12:44:50,540 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.4285714285714284) internal successors, (68), 29 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:50,540 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 144 transitions. [2022-11-16 12:44:50,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-16 12:44:50,546 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:50,546 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:50,552 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:50,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:50,747 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:50,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:50,748 INFO L85 PathProgramCache]: Analyzing trace with hash 823444806, now seen corresponding path program 1 times [2022-11-16 12:44:50,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:50,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081245600] [2022-11-16 12:44:50,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:50,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:50,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:51,500 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:51,500 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:51,500 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081245600] [2022-11-16 12:44:51,500 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1081245600] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:51,500 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1129569024] [2022-11-16 12:44:51,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:51,501 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:51,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:51,502 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:51,533 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-16 12:44:51,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:51,677 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-16 12:44:51,685 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:51,689 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:51,733 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:44:51,734 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:44:51,847 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-16 12:44:51,847 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:44:51,870 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:44:51,905 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:44:51,906 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-11-16 12:44:51,990 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-11-16 12:44:52,049 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:52,050 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-11-16 12:44:52,202 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:52,202 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 21 [2022-11-16 12:44:52,443 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:44:52,466 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:52,466 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:52,901 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 4 |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|))) (and (forall ((v_ArrVal_881 Int) (v_ArrVal_880 (Array Int Int))) (= (select |c_#valid| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_880) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) .cse0 v_ArrVal_881) 0)) 1)) (forall ((v_ArrVal_881 Int) (v_ArrVal_880 (Array Int Int))) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_880) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) .cse0 v_ArrVal_881) 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|))))) is different from false [2022-11-16 12:44:52,938 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_dll_circular_create_~head~0#1.offset_29| Int)) (or (forall ((v_ArrVal_881 Int) (v_ArrVal_880 (Array Int Int))) (= (select |c_#valid| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_880) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) (+ |v_ULTIMATE.start_dll_circular_create_~head~0#1.offset_29| 4) v_ArrVal_881) 0)) 1)) (not (<= |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| |v_ULTIMATE.start_dll_circular_create_~head~0#1.offset_29|)))) (forall ((|v_ULTIMATE.start_dll_circular_create_~head~0#1.offset_29| Int)) (or (forall ((v_ArrVal_881 Int) (v_ArrVal_880 (Array Int Int))) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_880) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) (+ |v_ULTIMATE.start_dll_circular_create_~head~0#1.offset_29| 4) v_ArrVal_881) 0) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|))) (not (<= |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| |v_ULTIMATE.start_dll_circular_create_~head~0#1.offset_29|))))) is different from false [2022-11-16 12:44:52,966 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:52,967 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 61 [2022-11-16 12:44:53,298 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:53,298 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 28 [2022-11-16 12:44:53,304 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 171 treesize of output 165 [2022-11-16 12:44:53,316 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 210 treesize of output 202 [2022-11-16 12:44:53,336 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:53,336 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 235 treesize of output 237 [2022-11-16 12:44:53,349 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 250 treesize of output 246 [2022-11-16 12:44:53,420 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:44:53,421 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 1 [2022-11-16 12:44:53,484 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-11-16 12:44:53,485 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1129569024] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:53,485 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:53,485 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 32 [2022-11-16 12:44:53,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999499596] [2022-11-16 12:44:53,486 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:53,486 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-11-16 12:44:53,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:53,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-11-16 12:44:53,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=844, Unknown=7, NotChecked=118, Total=1056 [2022-11-16 12:44:53,488 INFO L87 Difference]: Start difference. First operand 133 states and 144 transitions. Second operand has 33 states, 32 states have (on average 2.28125) internal successors, (73), 33 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:55,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:55,458 INFO L93 Difference]: Finished difference Result 132 states and 143 transitions. [2022-11-16 12:44:55,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-16 12:44:55,459 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 32 states have (on average 2.28125) internal successors, (73), 33 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-11-16 12:44:55,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:55,460 INFO L225 Difference]: With dead ends: 132 [2022-11-16 12:44:55,461 INFO L226 Difference]: Without dead ends: 132 [2022-11-16 12:44:55,461 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 49 SyntacticMatches, 5 SemanticMatches, 42 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 275 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=270, Invalid=1453, Unknown=7, NotChecked=162, Total=1892 [2022-11-16 12:44:55,462 INFO L413 NwaCegarLoop]: 65 mSDtfsCounter, 258 mSDsluCounter, 860 mSDsCounter, 0 mSdLazyCounter, 851 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 258 SdHoareTripleChecker+Valid, 925 SdHoareTripleChecker+Invalid, 1088 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 851 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 203 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:55,463 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [258 Valid, 925 Invalid, 1088 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 851 Invalid, 0 Unknown, 203 Unchecked, 0.8s Time] [2022-11-16 12:44:55,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2022-11-16 12:44:55,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2022-11-16 12:44:55,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 116 states have (on average 1.2327586206896552) internal successors, (143), 131 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:55,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 143 transitions. [2022-11-16 12:44:55,467 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 143 transitions. Word has length 33 [2022-11-16 12:44:55,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:55,467 INFO L495 AbstractCegarLoop]: Abstraction has 132 states and 143 transitions. [2022-11-16 12:44:55,468 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 32 states have (on average 2.28125) internal successors, (73), 33 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:55,468 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 143 transitions. [2022-11-16 12:44:55,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-16 12:44:55,469 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:55,469 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:55,483 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:55,675 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-11-16 12:44:55,676 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:44:55,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:55,676 INFO L85 PathProgramCache]: Analyzing trace with hash -1553624943, now seen corresponding path program 1 times [2022-11-16 12:44:55,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:55,677 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725028849] [2022-11-16 12:44:55,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:55,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:55,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:56,801 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:56,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:56,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725028849] [2022-11-16 12:44:56,801 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725028849] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:56,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1444836838] [2022-11-16 12:44:56,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:56,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:56,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:56,803 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:56,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-16 12:44:57,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:57,035 INFO L263 TraceCheckSpWp]: Trace formula consists of 234 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-16 12:44:57,046 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:57,049 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:44:57,147 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-16 12:44:57,148 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-16 12:44:57,337 INFO L321 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-11-16 12:44:57,337 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:44:57,415 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:44:57,483 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:44:57,483 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 35 [2022-11-16 12:44:57,629 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2022-11-16 12:44:57,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:57,653 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-11-16 12:44:58,013 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:58,013 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 24 [2022-11-16 12:44:58,060 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:44:58,072 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:58,072 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:58,444 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_968 (Array Int Int))) (not (= |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_968) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|)))) (forall ((v_ArrVal_968 (Array Int Int))) (= (select |c_#valid| (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_968) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|)) 1))) is different from false [2022-11-16 12:44:58,583 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:58,584 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 41 [2022-11-16 12:44:58,766 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:44:58,766 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 23 [2022-11-16 12:44:58,769 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 57 [2022-11-16 12:44:58,776 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:44:58,784 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:44:58,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:44:58,803 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:44:58,804 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 1 [2022-11-16 12:44:59,427 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:44:59,427 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1444836838] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:59,427 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:59,427 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 18, 19] total 50 [2022-11-16 12:44:59,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741004860] [2022-11-16 12:44:59,428 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:59,428 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2022-11-16 12:44:59,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:59,429 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2022-11-16 12:44:59,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=200, Invalid=2218, Unknown=36, NotChecked=96, Total=2550 [2022-11-16 12:44:59,430 INFO L87 Difference]: Start difference. First operand 132 states and 143 transitions. Second operand has 51 states, 50 states have (on average 1.6) internal successors, (80), 51 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:01,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:01,686 INFO L93 Difference]: Finished difference Result 131 states and 142 transitions. [2022-11-16 12:45:01,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-16 12:45:01,690 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 50 states have (on average 1.6) internal successors, (80), 51 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-16 12:45:01,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:01,691 INFO L225 Difference]: With dead ends: 131 [2022-11-16 12:45:01,691 INFO L226 Difference]: Without dead ends: 131 [2022-11-16 12:45:01,692 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 63 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1158 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=449, Invalid=3549, Unknown=38, NotChecked=124, Total=4160 [2022-11-16 12:45:01,693 INFO L413 NwaCegarLoop]: 52 mSDtfsCounter, 368 mSDsluCounter, 618 mSDsCounter, 0 mSdLazyCounter, 1067 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 670 SdHoareTripleChecker+Invalid, 1373 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 1067 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 280 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:01,693 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 670 Invalid, 1373 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 1067 Invalid, 0 Unknown, 280 Unchecked, 1.1s Time] [2022-11-16 12:45:01,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-11-16 12:45:01,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2022-11-16 12:45:01,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131 states, 116 states have (on average 1.2241379310344827) internal successors, (142), 130 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:01,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 142 transitions. [2022-11-16 12:45:01,697 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 142 transitions. Word has length 34 [2022-11-16 12:45:01,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:01,698 INFO L495 AbstractCegarLoop]: Abstraction has 131 states and 142 transitions. [2022-11-16 12:45:01,698 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 50 states have (on average 1.6) internal successors, (80), 51 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:01,698 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 142 transitions. [2022-11-16 12:45:01,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-16 12:45:01,698 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:01,699 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:01,715 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:01,904 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-11-16 12:45:01,904 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:01,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:01,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1554055919, now seen corresponding path program 1 times [2022-11-16 12:45:01,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:01,905 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936482582] [2022-11-16 12:45:01,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:01,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:01,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:02,549 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:02,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:02,549 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [936482582] [2022-11-16 12:45:02,549 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [936482582] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:02,549 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116702628] [2022-11-16 12:45:02,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:02,550 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:02,550 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:02,551 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:02,553 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-16 12:45:02,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:02,705 INFO L263 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-16 12:45:02,712 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:02,780 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-16 12:45:02,781 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-16 12:45:02,867 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:45:02,953 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:02,954 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 16 [2022-11-16 12:45:03,160 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:45:03,160 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-11-16 12:45:03,232 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:03,233 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:03,485 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2022-11-16 12:45:03,535 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 11 [2022-11-16 12:45:03,537 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-11-16 12:45:03,592 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-16 12:45:03,592 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 12 [2022-11-16 12:45:03,600 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:03,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2116702628] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:45:03,600 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:45:03,600 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 30 [2022-11-16 12:45:03,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012438695] [2022-11-16 12:45:03,601 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:45:03,601 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-11-16 12:45:03,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:03,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-11-16 12:45:03,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=818, Unknown=0, NotChecked=0, Total=930 [2022-11-16 12:45:03,602 INFO L87 Difference]: Start difference. First operand 131 states and 142 transitions. Second operand has 31 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 31 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:04,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:04,594 INFO L93 Difference]: Finished difference Result 130 states and 140 transitions. [2022-11-16 12:45:04,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-16 12:45:04,595 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 31 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-16 12:45:04,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:04,597 INFO L225 Difference]: With dead ends: 130 [2022-11-16 12:45:04,597 INFO L226 Difference]: Without dead ends: 130 [2022-11-16 12:45:04,598 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 355 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=289, Invalid=1351, Unknown=0, NotChecked=0, Total=1640 [2022-11-16 12:45:04,598 INFO L413 NwaCegarLoop]: 55 mSDtfsCounter, 634 mSDsluCounter, 471 mSDsCounter, 0 mSdLazyCounter, 642 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 634 SdHoareTripleChecker+Valid, 526 SdHoareTripleChecker+Invalid, 822 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 642 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 166 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:04,599 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [634 Valid, 526 Invalid, 822 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 642 Invalid, 0 Unknown, 166 Unchecked, 0.5s Time] [2022-11-16 12:45:04,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-16 12:45:04,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2022-11-16 12:45:04,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 116 states have (on average 1.206896551724138) internal successors, (140), 129 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:04,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 140 transitions. [2022-11-16 12:45:04,603 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 140 transitions. Word has length 34 [2022-11-16 12:45:04,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:04,604 INFO L495 AbstractCegarLoop]: Abstraction has 130 states and 140 transitions. [2022-11-16 12:45:04,604 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 31 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:04,604 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 140 transitions. [2022-11-16 12:45:04,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-16 12:45:04,605 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:04,605 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:04,612 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:04,812 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-11-16 12:45:04,812 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:04,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:04,812 INFO L85 PathProgramCache]: Analyzing trace with hash 449486225, now seen corresponding path program 1 times [2022-11-16 12:45:04,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:04,813 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923387773] [2022-11-16 12:45:04,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:04,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:04,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:05,880 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:05,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:05,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1923387773] [2022-11-16 12:45:05,881 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1923387773] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:05,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [239796641] [2022-11-16 12:45:05,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:05,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:05,881 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:05,888 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:05,915 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-16 12:45:06,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:06,056 INFO L263 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-16 12:45:06,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:06,062 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:45:06,114 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-16 12:45:06,115 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-16 12:45:06,246 INFO L321 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-11-16 12:45:06,247 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:45:06,307 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:45:06,380 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:06,380 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 28 [2022-11-16 12:45:06,517 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-16 12:45:06,592 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:06,593 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-11-16 12:45:06,941 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:06,941 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 24 [2022-11-16 12:45:06,981 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:45:06,991 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:06,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:07,369 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:45:07,372 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1137 (Array Int Int))) (not (= (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1137) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) is different from false [2022-11-16 12:45:07,710 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:07,711 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 23 [2022-11-16 12:45:07,714 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 57 [2022-11-16 12:45:07,726 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:45:07,734 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:45:07,756 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:45:08,145 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:45:08,145 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [239796641] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:45:08,146 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:45:08,146 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17, 17] total 47 [2022-11-16 12:45:08,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [787567950] [2022-11-16 12:45:08,146 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:45:08,147 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2022-11-16 12:45:08,147 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:08,147 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-11-16 12:45:08,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=1966, Unknown=22, NotChecked=90, Total=2256 [2022-11-16 12:45:08,149 INFO L87 Difference]: Start difference. First operand 130 states and 140 transitions. Second operand has 48 states, 47 states have (on average 1.702127659574468) internal successors, (80), 48 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:10,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:10,651 INFO L93 Difference]: Finished difference Result 127 states and 137 transitions. [2022-11-16 12:45:10,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-16 12:45:10,652 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 47 states have (on average 1.702127659574468) internal successors, (80), 48 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-16 12:45:10,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:10,653 INFO L225 Difference]: With dead ends: 127 [2022-11-16 12:45:10,653 INFO L226 Difference]: Without dead ends: 127 [2022-11-16 12:45:10,656 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 63 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1022 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=606, Invalid=3408, Unknown=22, NotChecked=124, Total=4160 [2022-11-16 12:45:10,656 INFO L413 NwaCegarLoop]: 47 mSDtfsCounter, 679 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 951 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 679 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 1203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 951 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 201 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:10,657 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [679 Valid, 577 Invalid, 1203 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 951 Invalid, 0 Unknown, 201 Unchecked, 0.9s Time] [2022-11-16 12:45:10,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-11-16 12:45:10,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-16 12:45:10,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 116 states have (on average 1.1810344827586208) internal successors, (137), 126 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:10,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 137 transitions. [2022-11-16 12:45:10,661 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 137 transitions. Word has length 34 [2022-11-16 12:45:10,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:10,661 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 137 transitions. [2022-11-16 12:45:10,662 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 47 states have (on average 1.702127659574468) internal successors, (80), 48 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:10,662 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 137 transitions. [2022-11-16 12:45:10,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-16 12:45:10,662 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:10,663 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:10,671 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:10,869 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-11-16 12:45:10,870 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:10,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:10,870 INFO L85 PathProgramCache]: Analyzing trace with hash 449055249, now seen corresponding path program 1 times [2022-11-16 12:45:10,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:10,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194148370] [2022-11-16 12:45:10,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:10,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:10,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:11,571 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:11,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:11,571 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194148370] [2022-11-16 12:45:11,572 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [194148370] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:11,572 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265843905] [2022-11-16 12:45:11,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:11,572 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:11,572 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:11,576 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:11,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-16 12:45:11,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:11,778 INFO L263 TraceCheckSpWp]: Trace formula consists of 232 conjuncts, 42 conjunts are in the unsatisfiable core [2022-11-16 12:45:11,782 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:11,785 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:45:11,844 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:11,844 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:45:11,894 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-16 12:45:11,894 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:45:11,942 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:45:11,996 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:11,996 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 22 [2022-11-16 12:45:12,066 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2022-11-16 12:45:12,091 INFO L321 Elim1Store]: treesize reduction 15, result has 46.4 percent of original size [2022-11-16 12:45:12,092 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 27 [2022-11-16 12:45:12,249 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:12,249 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2022-11-16 12:45:12,419 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:45:12,419 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-11-16 12:45:12,497 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:12,497 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:12,805 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-16 12:45:13,002 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:13,003 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 20 [2022-11-16 12:45:13,012 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:13,012 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2022-11-16 12:45:13,017 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-11-16 12:45:13,237 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:13,237 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1265843905] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:45:13,238 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:45:13,238 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 16] total 34 [2022-11-16 12:45:13,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12632270] [2022-11-16 12:45:13,238 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:45:13,239 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-11-16 12:45:13,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:13,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-16 12:45:13,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=1077, Unknown=1, NotChecked=0, Total=1190 [2022-11-16 12:45:13,240 INFO L87 Difference]: Start difference. First operand 127 states and 137 transitions. Second operand has 35 states, 34 states have (on average 2.5294117647058822) internal successors, (86), 35 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:14,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:14,376 INFO L93 Difference]: Finished difference Result 126 states and 136 transitions. [2022-11-16 12:45:14,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-16 12:45:14,377 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.5294117647058822) internal successors, (86), 35 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-16 12:45:14,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:14,378 INFO L225 Difference]: With dead ends: 126 [2022-11-16 12:45:14,378 INFO L226 Difference]: Without dead ends: 126 [2022-11-16 12:45:14,379 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 48 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 417 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=323, Invalid=1838, Unknown=1, NotChecked=0, Total=2162 [2022-11-16 12:45:14,380 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 656 mSDsluCounter, 440 mSDsCounter, 0 mSdLazyCounter, 443 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 656 SdHoareTripleChecker+Valid, 491 SdHoareTripleChecker+Invalid, 565 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 443 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 78 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:14,380 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [656 Valid, 491 Invalid, 565 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 443 Invalid, 0 Unknown, 78 Unchecked, 0.4s Time] [2022-11-16 12:45:14,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-11-16 12:45:14,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2022-11-16 12:45:14,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 116 states have (on average 1.1724137931034482) internal successors, (136), 125 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:14,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 136 transitions. [2022-11-16 12:45:14,384 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 136 transitions. Word has length 34 [2022-11-16 12:45:14,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:14,385 INFO L495 AbstractCegarLoop]: Abstraction has 126 states and 136 transitions. [2022-11-16 12:45:14,385 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 2.5294117647058822) internal successors, (86), 35 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:14,385 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 136 transitions. [2022-11-16 12:45:14,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-16 12:45:14,386 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:14,386 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:14,391 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:14,591 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:14,592 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:14,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:14,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1035188976, now seen corresponding path program 2 times [2022-11-16 12:45:14,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:14,593 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950728658] [2022-11-16 12:45:14,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:14,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:14,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:14,693 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:14,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:14,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950728658] [2022-11-16 12:45:14,694 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1950728658] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:14,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [74638711] [2022-11-16 12:45:14,695 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:45:14,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:14,695 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:14,696 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:14,737 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-16 12:45:14,920 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:45:14,920 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:45:14,922 INFO L263 TraceCheckSpWp]: Trace formula consists of 264 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 12:45:14,923 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:14,962 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:14,962 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 12:45:14,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [74638711] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:45:14,963 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 12:45:14,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2022-11-16 12:45:14,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [754894962] [2022-11-16 12:45:14,964 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:45:14,964 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:45:14,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:14,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:45:14,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:45:14,965 INFO L87 Difference]: Start difference. First operand 126 states and 136 transitions. Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:14,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:14,980 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2022-11-16 12:45:14,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 12:45:14,981 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-16 12:45:14,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:14,981 INFO L225 Difference]: With dead ends: 82 [2022-11-16 12:45:14,981 INFO L226 Difference]: Without dead ends: 82 [2022-11-16 12:45:14,982 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:45:14,982 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 70 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:14,983 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 100 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 12:45:14,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-16 12:45:14,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2022-11-16 12:45:14,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.1168831168831168) internal successors, (86), 81 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:14,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 86 transitions. [2022-11-16 12:45:14,986 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 86 transitions. Word has length 34 [2022-11-16 12:45:14,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:14,986 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 86 transitions. [2022-11-16 12:45:14,987 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:14,987 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 86 transitions. [2022-11-16 12:45:14,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-16 12:45:14,988 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:14,988 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:14,995 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:15,191 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-11-16 12:45:15,191 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:15,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:15,192 INFO L85 PathProgramCache]: Analyzing trace with hash -1654547908, now seen corresponding path program 1 times [2022-11-16 12:45:15,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:15,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530161291] [2022-11-16 12:45:15,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:15,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:15,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:16,355 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:16,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:16,356 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530161291] [2022-11-16 12:45:16,356 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [530161291] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:16,356 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1991420433] [2022-11-16 12:45:16,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:16,357 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:16,357 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:16,358 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:16,365 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-16 12:45:16,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:16,538 INFO L263 TraceCheckSpWp]: Trace formula consists of 236 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-16 12:45:16,542 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:16,545 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:45:16,606 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-16 12:45:16,606 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-16 12:45:16,750 INFO L321 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-11-16 12:45:16,750 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:45:16,825 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:45:16,896 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:16,896 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 35 [2022-11-16 12:45:17,049 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2022-11-16 12:45:17,133 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 28 [2022-11-16 12:45:17,545 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:17,567 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:17,568 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 63 treesize of output 53 [2022-11-16 12:45:18,403 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-11-16 12:45:18,499 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-11-16 12:45:18,510 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:18,510 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:20,421 INFO L321 Elim1Store]: treesize reduction 8, result has 85.5 percent of original size [2022-11-16 12:45:20,421 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 116 treesize of output 141 [2022-11-16 12:45:20,615 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4))) (and (forall ((v_prenex_10 (Array Int Int)) (v_prenex_12 Int) (v_prenex_11 (Array Int Int))) (let ((.cse0 (select (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_prenex_11) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_prenex_10) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse1 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|) v_prenex_12))) (or (= |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| .cse0) (= .cse0 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) (not (<= v_prenex_12 0)) (not (<= 0 v_prenex_12))))) (forall ((v_ArrVal_1410 (Array Int Int)) (v_ArrVal_1409 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (= (select (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_ArrVal_1409) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1410) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse1 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|) |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|)) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 (Array Int Int)) (v_prenex_9 Int)) (or (not (let ((.cse2 (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_prenex_8) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_prenex_7) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse1 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (= (select .cse2 (+ v_prenex_9 4)) (select .cse2 v_prenex_9)))) (not (<= v_prenex_9 0)) (not (<= 0 v_prenex_9)))) (or (forall ((v_prenex_10 (Array Int Int)) (v_prenex_12 Int) (v_prenex_11 (Array Int Int))) (let ((.cse3 (select (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_prenex_11) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_prenex_10) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse1 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|) v_prenex_12))) (or (= |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| .cse3) (= .cse3 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|)))) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_9 Int) (v_prenex_7 (Array Int Int))) (or (not (let ((.cse4 (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_prenex_8) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_prenex_7) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse1 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (= (select .cse4 (+ v_prenex_9 4)) (select .cse4 v_prenex_9)))) (not (<= v_prenex_9 0)) (not (<= 0 v_prenex_9))))))) is different from false [2022-11-16 12:45:20,680 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:20,681 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 105 treesize of output 81 [2022-11-16 12:45:20,688 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 553 treesize of output 535 [2022-11-16 12:45:20,722 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 191 treesize of output 183 [2022-11-16 12:45:20,788 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:20,788 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 675 treesize of output 685 [2022-11-16 12:45:20,854 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 410 treesize of output 362 [2022-11-16 12:45:20,901 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 408 treesize of output 384 [2022-11-16 12:45:20,949 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 415 treesize of output 399 [2022-11-16 12:45:22,535 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:45:22,535 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 1 [2022-11-16 12:45:22,555 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:45:22,556 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 1 [2022-11-16 12:45:22,566 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-16 12:45:22,566 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 1 [2022-11-16 12:45:23,018 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-16 12:45:23,019 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1991420433] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:45:23,019 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:45:23,019 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 19, 19] total 54 [2022-11-16 12:45:23,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1870911474] [2022-11-16 12:45:23,019 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:45:23,020 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2022-11-16 12:45:23,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:23,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2022-11-16 12:45:23,022 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=2670, Unknown=1, NotChecked=104, Total=2970 [2022-11-16 12:45:23,023 INFO L87 Difference]: Start difference. First operand 82 states and 86 transitions. Second operand has 55 states, 54 states have (on average 1.7222222222222223) internal successors, (93), 55 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:26,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:26,583 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2022-11-16 12:45:26,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-16 12:45:26,584 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 54 states have (on average 1.7222222222222223) internal successors, (93), 55 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-16 12:45:26,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:26,585 INFO L225 Difference]: With dead ends: 80 [2022-11-16 12:45:26,585 INFO L226 Difference]: Without dead ends: 80 [2022-11-16 12:45:26,587 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 37 SyntacticMatches, 4 SemanticMatches, 68 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1299 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=573, Invalid=4122, Unknown=1, NotChecked=134, Total=4830 [2022-11-16 12:45:26,588 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 562 mSDsluCounter, 662 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 562 SdHoareTripleChecker+Valid, 704 SdHoareTripleChecker+Invalid, 1344 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 475 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:26,588 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [562 Valid, 704 Invalid, 1344 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 827 Invalid, 0 Unknown, 475 Unchecked, 0.8s Time] [2022-11-16 12:45:26,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-16 12:45:26,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2022-11-16 12:45:26,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 77 states have (on average 1.0909090909090908) internal successors, (84), 79 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:26,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2022-11-16 12:45:26,591 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 36 [2022-11-16 12:45:26,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:26,591 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2022-11-16 12:45:26,591 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 54 states have (on average 1.7222222222222223) internal successors, (93), 55 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:26,592 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2022-11-16 12:45:26,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-11-16 12:45:26,592 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:26,593 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:26,598 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:26,798 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-11-16 12:45:26,799 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:26,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:26,799 INFO L85 PathProgramCache]: Analyzing trace with hash -1472889600, now seen corresponding path program 1 times [2022-11-16 12:45:26,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:26,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248053317] [2022-11-16 12:45:26,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:26,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:26,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:27,881 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:27,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:27,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248053317] [2022-11-16 12:45:27,882 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [248053317] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:27,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1452311175] [2022-11-16 12:45:27,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:27,882 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:27,882 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:27,884 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:27,886 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-16 12:45:28,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:28,063 INFO L263 TraceCheckSpWp]: Trace formula consists of 241 conjuncts, 53 conjunts are in the unsatisfiable core [2022-11-16 12:45:28,066 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:28,071 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-16 12:45:28,116 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:28,116 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 14 [2022-11-16 12:45:28,217 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-16 12:45:28,217 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:45:28,278 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:45:28,359 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:28,360 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 22 [2022-11-16 12:45:28,481 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2022-11-16 12:45:28,495 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2022-11-16 12:45:28,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:28,775 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:28,776 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 39 [2022-11-16 12:45:29,138 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:45:29,138 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-11-16 12:45:29,339 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:45:29,340 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 38 [2022-11-16 12:45:29,424 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:29,424 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:29,842 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 74 [2022-11-16 12:45:30,178 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4))) (and (forall ((v_ArrVal_1502 (Array Int Int))) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1502) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse0 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|) 4) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|))) (forall ((v_ArrVal_1502 (Array Int Int))) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1502) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) .cse0 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|) 0) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|))))) is different from false [2022-11-16 12:45:31,180 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:31,180 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 28 [2022-11-16 12:45:31,183 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 171 treesize of output 165 [2022-11-16 12:45:31,194 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:31,195 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 191 treesize of output 193 [2022-11-16 12:45:31,207 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 206 treesize of output 202 [2022-11-16 12:45:31,217 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 254 treesize of output 246 [2022-11-16 12:45:31,274 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:31,274 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 28 [2022-11-16 12:45:31,278 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:45:31,281 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2022-11-16 12:45:31,287 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 39 [2022-11-16 12:45:31,293 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:45:31,294 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2022-11-16 12:45:31,532 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-16 12:45:31,533 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1452311175] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:45:31,533 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:45:31,533 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 19] total 49 [2022-11-16 12:45:31,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321042106] [2022-11-16 12:45:31,534 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:45:31,534 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-16 12:45:31,534 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:31,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-16 12:45:31,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=2143, Unknown=7, NotChecked=94, Total=2450 [2022-11-16 12:45:31,536 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand has 50 states, 49 states have (on average 2.0816326530612246) internal successors, (102), 50 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:33,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:33,680 INFO L93 Difference]: Finished difference Result 78 states and 82 transitions. [2022-11-16 12:45:33,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-16 12:45:33,681 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 2.0816326530612246) internal successors, (102), 50 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2022-11-16 12:45:33,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:33,682 INFO L225 Difference]: With dead ends: 78 [2022-11-16 12:45:33,682 INFO L226 Difference]: Without dead ends: 78 [2022-11-16 12:45:33,683 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 48 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1188 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=601, Invalid=3818, Unknown=7, NotChecked=130, Total=4556 [2022-11-16 12:45:33,684 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 628 mSDsluCounter, 430 mSDsCounter, 0 mSdLazyCounter, 554 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 628 SdHoareTripleChecker+Valid, 467 SdHoareTripleChecker+Invalid, 914 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 554 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 308 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:33,684 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [628 Valid, 467 Invalid, 914 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 554 Invalid, 0 Unknown, 308 Unchecked, 0.5s Time] [2022-11-16 12:45:33,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-11-16 12:45:33,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2022-11-16 12:45:33,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 77 states have (on average 1.0649350649350648) internal successors, (82), 77 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:33,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2022-11-16 12:45:33,687 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 82 transitions. Word has length 37 [2022-11-16 12:45:33,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:33,688 INFO L495 AbstractCegarLoop]: Abstraction has 78 states and 82 transitions. [2022-11-16 12:45:33,688 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 49 states have (on average 2.0816326530612246) internal successors, (102), 50 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:33,688 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 82 transitions. [2022-11-16 12:45:33,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-16 12:45:33,688 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:33,689 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:33,695 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:33,894 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-11-16 12:45:33,894 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:45:33,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:33,895 INFO L85 PathProgramCache]: Analyzing trace with hash -882633249, now seen corresponding path program 1 times [2022-11-16 12:45:33,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:33,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022503782] [2022-11-16 12:45:33,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:33,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:33,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:35,609 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:35,609 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:35,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022503782] [2022-11-16 12:45:35,609 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022503782] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:35,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [866013883] [2022-11-16 12:45:35,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:35,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:35,610 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:35,610 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:35,613 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-16 12:45:35,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:35,793 INFO L263 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-16 12:45:35,797 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:36,137 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:45:36,266 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:36,267 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 53 [2022-11-16 12:45:36,543 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:36,544 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2022-11-16 12:45:36,563 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 46 [2022-11-16 12:45:37,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:37,288 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:37,288 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 81 treesize of output 67 [2022-11-16 12:45:39,017 WARN L855 $PredicateComparison]: unable to prove that (exists ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base| Int) (|ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base| Int) (|ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base| Int)) (let ((.cse0 (store |c_ULTIMATE.start_main_old_#valid#1| |ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base| 1))) (let ((.cse1 (store .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base| 1))) (and (= (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base|) 0) (= |c_#valid| (store (store (store .cse1 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base| 0) |ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base| 0) |ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base|) 0) (= (select .cse1 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base|) 0))))) is different from true [2022-11-16 12:45:39,031 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:39,031 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:39,657 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= (let ((.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:45:39,669 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (= (let ((.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_#res#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_#res#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:45:39,686 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (= (let ((.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:45:39,719 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= |c_ULTIMATE.start_main_old_#valid#1| (let ((.cse0 (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) (+ 4 |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0))) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:45:39,760 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1595 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= |c_ULTIMATE.start_main_old_#valid#1| (let ((.cse0 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1595) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) (+ 4 |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0))) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:45:39,788 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1595 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)) (= |c_ULTIMATE.start_main_old_#valid#1| (let ((.cse0 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1595) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0))))) is different from false [2022-11-16 12:45:39,806 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1595 (Array Int Int)) (v_ArrVal_1594 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)) (= (let ((.cse0 (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_ArrVal_1594) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1595) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base| 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0)) |c_ULTIMATE.start_main_old_#valid#1|))) is different from false [2022-11-16 12:45:39,818 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:39,819 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 57 [2022-11-16 12:45:39,825 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 164 [2022-11-16 12:45:39,835 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 308 treesize of output 284 [2022-11-16 12:45:39,889 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:45:39,890 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 224 treesize of output 228 [2022-11-16 12:45:39,910 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 216 treesize of output 204 [2022-11-16 12:45:58,853 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse10 (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base| 0))) (let ((.cse12 (store .cse10 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0)) (.cse286 (= |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|)) (.cse397 (< 3 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|)) (.cse392 (< |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 1)) (.cse398 (< (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 3) 0)) (.cse406 (< 0 (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 1)))) (let ((.cse393 (or .cse398 .cse406)) (.cse394 (< 0 (+ 5 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|))) (.cse0 (= |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|)) (.cse11 (store .cse10 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0)) (.cse395 (or .cse397 .cse392)) (.cse396 (< |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 5)) (.cse405 (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4)) (.cse14 (not .cse286)) (.cse143 (store .cse12 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0))) (let ((.cse3 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse431 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse432 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse431 (select (store .cse432 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse431 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse431 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse431 (select (store .cse432 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (.cse6 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse427 (store .cse10 v_arrayElimCell_197 0)) (.cse425 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse426 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse425 (select (store .cse426 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse425 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse425 (select (store .cse426 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse425 (select (store .cse427 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse425 (select (store .cse427 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse425 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse430 (store .cse10 v_arrayElimCell_197 0)) (.cse428 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse429 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse428 (select (store .cse429 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse428 (select (store .cse429 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse428 (select (store .cse430 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse428 (select (store .cse430 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse428 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (.cse119 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse424 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse424 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse424 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse424 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (.cse26 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse423 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse423 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse423 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse423 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse29 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse422 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse422 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse422 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse422 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse35 (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse421 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse421 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse421 (select .cse12 v_antiDerIndex_entry0_1))))) .cse14)) (.cse138 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse420 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse420 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse420 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse420 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse13 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse419 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse419 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse419 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse419 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse419 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse66 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (.cse65 (forall ((v_arrayElimCell_193 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (.cse38 (not (<= .cse405 0))) (.cse39 (not (<= 0 .cse405))) (.cse52 (forall ((v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse418 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse418 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse418 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (.cse51 (forall ((v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))) (.cse188 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse417 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse417 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse417 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse417 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse417 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (.cse287 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse415 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse416 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse415 (select (store .cse416 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse415 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse415 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse415 (select (store .cse416 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (.cse134 (not (<= |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 0))) (.cse149 (not (<= 0 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|))) (.cse238 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse414 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse414 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse414 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse414 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse414 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse163 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse413 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse413 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse413 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse413 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse413 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse150 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse412 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse412 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse412 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse412 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse127 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse411 (store .cse10 v_arrayElimCell_197 0)) (.cse409 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse410 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse409 (select (store .cse410 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse409 (select (store .cse411 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse409 (select (store .cse411 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse409 (select (store .cse410 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (.cse2 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse408 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse408 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse408 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse408 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse408 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse132 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse407 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse407 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse407 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse407 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))))) (.cse7 (and .cse406 .cse395 .cse396)) (.cse4 (and .cse392 .cse406)) (.cse37 (store .cse11 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0)) (.cse24 (< .cse405 0)) (.cse25 (< 0 .cse405)) (.cse5 (not .cse0)) (.cse126 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse401 (store .cse10 v_arrayElimCell_197 0)) (.cse399 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse400 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse399 (select (store .cse400 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse399 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse399 (select (store .cse400 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse399 (select (store .cse401 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse399 (select (store .cse401 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse399 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse399 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse404 (store .cse10 v_arrayElimCell_197 0)) (.cse402 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse403 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse402 (select (store .cse403 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse402 (select (store .cse403 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse402 (select (store .cse404 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse402 (select (store .cse404 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse402 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse402 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (.cse30 (< |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 0)) (.cse31 (< 0 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|)) (.cse57 (and .cse398 .cse394)) (.cse33 (and (or .cse397 .cse398) .cse394 .cse396)) (.cse1 (and .cse395 .cse393 .cse394 .cse396)) (.cse8 (and .cse392 .cse393 .cse394))) (and (or .cse0 .cse1 .cse2) (or .cse3 .cse4 .cse5) (or .cse6 .cse0 .cse7) (or .cse8 .cse0 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse9 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse9 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse9 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse9 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse9 (select .cse12 v_antiDerIndex_entry0_1)))))) (or .cse13 .cse4 .cse5) (or .cse4 .cse14 (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse15 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse16 (store .cse10 v_arrayElimCell_197 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse15 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse15 (select (store .cse16 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_192 Int)) (= .cse15 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse15 (select (store .cse16 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse18 (store .cse10 v_arrayElimCell_197 0)) (.cse17 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse17 (select (store .cse18 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse17 (select (store .cse18 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse19 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse17 (select (store .cse19 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse17 (select (store .cse19 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))))))) (or (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse20 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse20 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse20 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse20 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse20 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse21 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse21 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse21 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse21 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse21 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse21 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) .cse0 .cse1) (or .cse8 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse22 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse23 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse22 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse22 (select (store .cse23 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse22 (select (store .cse23 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (or .cse3 .cse24 .cse25 .cse5) (or .cse0 (let ((.cse34 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse40 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse40 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse40 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse40 (select .cse12 v_antiDerIndex_entry0_1))))))) (and (or .cse26 .cse7) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse27 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse27 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse27 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse27 (select .cse12 v_antiDerIndex_entry0_1))))) .cse7) (or (forall ((v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse28 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse28 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse28 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse28 (select .cse12 v_antiDerIndex_entry0_1))))) .cse8) (or .cse29 .cse30 .cse31) (or .cse24 .cse25 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse32 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse32 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse32 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse32 (select .cse12 v_antiDerIndex_entry0_1)))))) (or .cse33 .cse26) (or .cse34 .cse4) .cse35 (or .cse34 .cse8) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse36 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse36 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse36 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse36 (select .cse12 v_antiDerIndex_entry0_1))))) .cse38 .cse39)))) (or .cse38 .cse39 (and (or (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse41 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse41 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse41 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse41 (select .cse12 v_antiDerIndex_entry0_1)) (= .cse41 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse42 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse42 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int)) (= .cse42 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse42 (select .cse12 v_antiDerIndex_entry0_1)) (= .cse42 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse43 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse43 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse43 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse43 (select .cse12 v_antiDerIndex_entry0_1)) (= .cse43 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse44 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse44 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse44 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse44 (select .cse12 v_antiDerIndex_entry0_1)) (= .cse44 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or (and (or .cse0 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse45 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse46 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse45 (select (store .cse46 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse45 (select (store .cse46 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse45 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse45 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse45 (select .cse12 v_antiDerIndex_entry0_1)))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse47 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse47 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse47 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse47 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse47 (select .cse12 v_antiDerIndex_entry0_1)))))) .cse24 .cse25) (or (let ((.cse63 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse67 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse68 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse67 (select (store .cse68 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse67 (select (store .cse68 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (let ((.cse55 (or .cse8 .cse66)) (.cse56 (or .cse65 .cse30 .cse31)) (.cse61 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse64 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse64 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse64 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (.cse62 (or .cse63 .cse4))) (and (or .cse24 .cse25 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse48 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse49 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse48 (select (store .cse49 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse48 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse48 (select (store .cse49 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or (and (forall ((v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse50 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse50 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse50 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse51 .cse52 (forall ((v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse53 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse54 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse53 (select (store .cse54 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse53 (select (store .cse54 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse53 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse38 .cse39) .cse55 (or (and .cse55 .cse56 (or .cse57 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse58 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse58 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse58 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))))))) .cse14) .cse56 (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse59 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse60 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse59 (select (store .cse60 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse59 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse59 (select (store .cse60 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse24 .cse25) (or .cse14 (and .cse61 .cse62)) (or .cse63 .cse24 .cse25) (or .cse61 .cse30 .cse31) .cse62))) .cse5) (or .cse38 (let ((.cse69 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse102 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse102 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse103 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse102 (select (store .cse103 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse102 (select (store .cse103 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))))))) (and (or (and .cse69 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse70 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse70 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (forall ((v_arrayElimCell_192 Int)) (= .cse70 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse70 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse14) (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse71 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse71 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse71 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) .cse14) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse72 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse72 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse72 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse73 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse73 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse74 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse73 (select (store .cse74 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse73 (select (store .cse74 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse75 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (let ((.cse76 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse75 (select (store .cse76 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse75 (select (store .cse76 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse75 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse77 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse77 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse77 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse0) (or .cse69 .cse5) (or (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse78 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse79 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse78 (select (store .cse79 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse78 (select (store .cse79 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse78 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse78 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse80 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse81 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse80 (select (store .cse81 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse80 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse80 (select (store .cse81 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse80 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse80 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse0) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse82 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse82 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse82 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse83 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse82 (select (store .cse83 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse82 (select (store .cse83 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse84 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse84 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse84 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse84 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse85 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse86 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse85 (select (store .cse86 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse85 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse85 (select (store .cse86 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (or (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse87 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse88 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse87 (select (store .cse88 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int)) (= .cse87 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse87 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse87 (select (store .cse88 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse89 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse90 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse89 (select (store .cse90 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse89 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse91 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse89 (select (store .cse91 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse89 (select (store .cse91 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse89 (select (store .cse90 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse0) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse92 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse92 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse92 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse92 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse93 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse93 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse94 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse93 (select (store .cse94 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse93 (select (store .cse94 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse93 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (or .cse0 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse95 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse96 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse95 (select (store .cse96 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse95 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse95 (select (store .cse96 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse95 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse95 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse97 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse98 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse97 (select (store .cse98 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse97 (select (store .cse98 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse97 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse97 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse99 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse99 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse99 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse100 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse100 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse100 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse101 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse100 (select (store .cse101 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse100 (select (store .cse101 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))))))) .cse39) (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse105 (store .cse10 v_arrayElimCell_197 0)) (.cse104 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse104 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse104 (select (store .cse105 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse104 (select (store .cse105 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse104 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse107 (store .cse10 v_arrayElimCell_197 0)) (.cse106 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse106 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse106 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse106 (select (store .cse107 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse106 (select (store .cse107 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse106 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) .cse8 .cse14) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse110 (store .cse10 v_arrayElimCell_197 0)) (.cse108 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse109 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse108 (select (store .cse109 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse108 (select (store .cse110 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse108 (select (store .cse110 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse108 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse108 (select (store .cse109 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse24 .cse25) (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse112 (store .cse10 v_arrayElimCell_197 0)) (.cse111 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse111 (select (store .cse112 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse111 (select (store .cse112 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse111 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse113 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse111 (select (store .cse113 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse111 (select (store .cse113 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse115 (store .cse10 v_arrayElimCell_197 0)) (.cse114 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse114 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse114 (select (store .cse115 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_192 Int)) (= .cse114 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse114 (select (store .cse115 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse114 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) .cse4 .cse14) (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse116 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse116 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse116 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_192 Int)) (= .cse116 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse117 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse117 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse118 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse117 (select (store .cse118 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse117 (select (store .cse118 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))))) .cse8 .cse14) (or .cse6 .cse0 .cse1) (or .cse8 .cse119 .cse5) (or .cse8 .cse14 (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse120 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse120 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse120 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse120 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse121 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse121 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse121 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse122 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse122 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse122 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse122 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse122 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse123 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse123 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse123 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse123 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse124 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse124 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse124 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse125 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse124 (select (store .cse125 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse124 (select (store .cse125 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))))))))) (or .cse0 .cse7 .cse126) (or .cse24 .cse127 .cse25 .cse5) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse129 (store .cse10 v_arrayElimCell_197 0)) (.cse128 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse128 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse128 (select (store .cse129 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse128 (select (store .cse129 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse128 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse128 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse131 (store .cse10 v_arrayElimCell_197 0)) (.cse130 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse130 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse130 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse130 (select (store .cse131 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse130 (select (store .cse131 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse130 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse130 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or (and (or .cse132 .cse30 .cse31) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse133 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse133 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse133 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse133 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse133 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))))) .cse57) (or .cse8 .cse119)) .cse14) (or .cse134 (let ((.cse139 (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse148 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse148 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (forall ((v_arrayElimCell_192 Int)) (= .cse148 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse148 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse148 (select .cse12 v_antiDerIndex_entry0_1)))))) (.cse146 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse147 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse147 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse147 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_192 Int)) (= .cse147 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse147 (select .cse12 v_antiDerIndex_entry0_1))))))) (and (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse135 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse135 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse135 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse135 (select .cse12 v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse136 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse136 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse136 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse136 (select .cse12 v_antiDerIndex_entry0_1)))))) .cse14) (or (and .cse26 .cse29 .cse35) .cse0) (or (forall ((v_arrayElimCell_193 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse137 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse137 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse137 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse137 (select .cse12 v_antiDerIndex_entry0_1))))) .cse5) (or .cse138 .cse5) (or .cse139 .cse14) (or .cse139 .cse5) (or (and (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse140 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse140 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse140 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse140 (select .cse12 v_antiDerIndex_entry0_1))))) (or (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse141 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse141 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse141 (select .cse12 v_antiDerIndex_entry0_1))))) .cse14) (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse142 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse142 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse142 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse142 (select .cse12 v_antiDerIndex_entry0_1)))))) .cse0) (or .cse14 (and (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse144 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse144 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse144 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse144 (select .cse12 v_antiDerIndex_entry0_1))))) (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse145 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse145 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse145 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse145 (select .cse12 v_antiDerIndex_entry0_1))))))) (or .cse146 .cse5) (or .cse146 .cse14))) .cse149) (or (and (or .cse30 .cse138 .cse31) (or .cse8 .cse150) (or .cse57 .cse150)) .cse14) (or (and (or (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse153 (store .cse10 v_arrayElimCell_197 0)) (.cse151 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse152 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse151 (select (store .cse152 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse151 (select (store .cse152 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse151 (select (store .cse153 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse151 (select (store .cse153 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse151 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse156 (store .cse10 v_arrayElimCell_197 0)) (.cse154 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse155 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse154 (select (store .cse155 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse154 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse154 (select (store .cse155 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse154 (select (store .cse156 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse154 (select (store .cse156 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse154 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse0) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse158 (store .cse10 v_arrayElimCell_197 0)) (.cse157 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse157 (select (store .cse158 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse157 (select (store .cse158 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse157 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse159 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse157 (select (store .cse159 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse157 (select (store .cse159 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))))) .cse24 .cse25) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse162 (store .cse10 v_arrayElimCell_197 0)) (.cse160 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse161 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse160 (select (store .cse161 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse160 (select (store .cse162 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse160 (select (store .cse162 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse160 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse160 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse160 (select (store .cse161 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse24 .cse25) (or .cse0 .cse1 .cse163) (or .cse13 .cse8 .cse5) (or .cse0 (and (or (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse165 (store .cse10 v_arrayElimCell_197 0)) (.cse164 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse164 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse164 (select (store .cse165 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse164 (select (store .cse165 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse164 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse167 (store .cse10 v_arrayElimCell_197 0)) (.cse166 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse166 (select (store .cse167 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse166 (select (store .cse167 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse166 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse1) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse169 (store .cse10 v_arrayElimCell_197 0)) (.cse168 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse170 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse168 (select (store .cse169 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse168 (select (store .cse169 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse168 (select (store .cse170 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse168 (select (store .cse170 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse7) (or .cse4 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse171 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse172 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse171 (select (store .cse172 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse171 (select (store .cse172 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse14) (or .cse24 .cse25 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse174 (store .cse10 v_arrayElimCell_197 0)) (.cse173 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse173 (select (store .cse174 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse173 (select (store .cse174 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse173 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or .cse1 (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse175 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse176 (store .cse10 v_arrayElimCell_197 0))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse175 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse175 (select (store .cse176 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse175 (select (store .cse176 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse178 (store .cse10 v_arrayElimCell_197 0)) (.cse177 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse177 (select (store .cse178 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse177 (select (store .cse178 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse177 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse177 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))))))) (or .cse4 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse179 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse180 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse179 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse179 (select (store .cse180 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse179 (select (store .cse180 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse181 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse182 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse181 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse181 (select (store .cse182 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse181 (select (store .cse182 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse24 .cse25) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse184 (store .cse10 v_arrayElimCell_197 0)) (.cse183 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse185 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse183 (select (store .cse184 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse183 (select (store .cse184 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse183 (select (store .cse185 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse183 (select (store .cse185 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) .cse7) (or .cse8 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse186 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse187 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse186 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse186 (select (store .cse187 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse186 (select (store .cse187 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))))) (or .cse188 .cse30 .cse5 .cse31) (or .cse8 .cse0 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse189 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse190 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse189 (select (store .cse190 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse189 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse189 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse189 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse189 (select (store .cse190 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or .cse0 (and (or .cse8 .cse14 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))) (or .cse8 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse191 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse191 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse191 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse191 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse1 (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse192 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse192 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse192 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse193 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse193 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse193 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse193 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse194 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse194 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse195 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse194 (select (store .cse195 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse194 (select (store .cse195 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))))))))) (or .cse1 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse196 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse196 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse196 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse196 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse197 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse197 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int)) (let ((.cse198 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse197 (select (store .cse198 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse197 (select (store .cse198 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse199 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse199 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse199 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or (forall ((v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse200 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse200 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse200 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse8) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse201 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse201 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse201 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse8))) (or (and (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse202 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse202 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse202 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse202 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse202 (select .cse12 v_antiDerIndex_entry0_1)) (= .cse202 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse30 .cse31) (or .cse13 .cse24 .cse25)) .cse5) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse204 (store .cse10 v_arrayElimCell_197 0)) (.cse203 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse203 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse203 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse203 (select (store .cse204 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse203 (select (store .cse204 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse203 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse206 (store .cse10 v_arrayElimCell_197 0)) (.cse205 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse205 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse205 (select (store .cse206 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse205 (select (store .cse206 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse205 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse207 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse205 (select (store .cse207 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse205 (select (store .cse207 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse209 (store .cse10 v_arrayElimCell_197 0)) (.cse208 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse208 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse208 (select (store .cse209 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse208 (select (store .cse209 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse208 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse208 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse208 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or (and (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse211 (store .cse10 v_arrayElimCell_197 0)) (.cse210 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse210 (select (store .cse211 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse210 (select (store .cse211 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse210 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse212 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse210 (select (store .cse212 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse210 (select (store .cse212 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse210 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse214 (store .cse10 v_arrayElimCell_197 0)) (.cse213 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse213 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse213 (select (store .cse214 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse213 (select (store .cse214 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse213 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse213 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (or (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse215 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse215 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse215 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse215 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse217 (store .cse10 v_arrayElimCell_197 0)) (.cse216 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse216 (select (store .cse217 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int)) (= .cse216 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse216 (select (store .cse217 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse216 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse216 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse24 .cse25) (or (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse218 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse218 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse218 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse218 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse219 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse219 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse219 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse219 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse219 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse0 .cse1) (or .cse0 (and (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse222 (store .cse10 v_arrayElimCell_197 0)) (.cse223 (store .cse10 v_arrayElimCell_194 0)) (.cse220 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse221 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse220 (select (store .cse221 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse220 (select (store .cse222 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse220 (select (store .cse222 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse220 (select (store .cse223 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse220 (select (store .cse223 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse220 (select (store .cse221 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse7) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse226 (store .cse10 v_arrayElimCell_197 0)) (.cse224 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse225 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse224 (select (store .cse225 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse224 (select (store .cse226 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse224 (select (store .cse226 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse224 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse224 (select (store .cse225 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse24 .cse25) (or .cse1 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse229 (store .cse10 v_arrayElimCell_197 0)) (.cse227 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse228 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse227 (select (store .cse228 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse227 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse227 (select (store .cse229 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse227 (select (store .cse229 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse227 (select (store .cse228 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse232 (store .cse10 v_arrayElimCell_197 0)) (.cse230 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse231 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse230 (select (store .cse231 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse230 (select (store .cse232 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse230 (select (store .cse232 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse230 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse230 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse230 (select (store .cse231 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))))) (or .cse8 .cse0 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse235 (store .cse10 v_arrayElimCell_197 0)) (.cse233 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse234 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse233 (select (store .cse234 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse233 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse233 (select (store .cse235 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse233 (select (store .cse235 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse233 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse233 (select (store .cse234 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse236 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse237 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse236 (select (store .cse237 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse236 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse236 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse236 (select (store .cse237 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse8 .cse0) (or .cse238 .cse30 .cse5 .cse31) (or .cse8 (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse239 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse240 (store .cse10 v_arrayElimCell_197 0))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse239 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse239 (select (store .cse240 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse239 (select (store .cse240 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse241 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse242 (store .cse10 v_arrayElimCell_197 0))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse241 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse241 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse241 (select (store .cse242 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse241 (select (store .cse242 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse14) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse243 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse244 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse243 (select (store .cse244 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse243 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse243 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse243 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse243 (select (store .cse244 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse245 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse246 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse245 (select (store .cse246 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse245 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse245 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse245 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse245 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse245 (select (store .cse246 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse247 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse248 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse247 (select (store .cse248 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse247 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse247 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse249 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse247 (select (store .cse249 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse247 (select (store .cse249 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse247 (select (store .cse248 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or .cse8 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse250 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse250 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse250 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse5) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse251 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse251 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse251 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse251 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse8 .cse0) (or (let ((.cse254 (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse258 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse258 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (forall ((v_arrayElimCell_192 Int)) (= .cse258 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse258 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (and (or .cse0 (and (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse252 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse252 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse252 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse252 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (or (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))) .cse14) (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse253 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse253 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse253 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or .cse254 .cse5) (or (and (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse255 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse255 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse255 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse255 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse256 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse256 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse256 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) .cse14) (or (forall ((v_arrayElimCell_193 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse257 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse257 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse257 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))))) .cse5) (or .cse254 .cse14))) .cse30 .cse31) (or .cse24 (and (or .cse0 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse261 (store .cse10 v_arrayElimCell_197 0)) (.cse259 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse260 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse259 (select (store .cse260 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse259 (select (store .cse260 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse259 (select (store .cse261 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse259 (select (store .cse261 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse259 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse259 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse264 (store .cse10 v_arrayElimCell_197 0)) (.cse262 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse263 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse262 (select (store .cse263 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse262 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse262 (select (store .cse263 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse262 (select (store .cse264 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse262 (select (store .cse264 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse262 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse262 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse266 (store .cse10 v_arrayElimCell_197 0)) (.cse265 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse265 (select (store .cse266 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse265 (select (store .cse266 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse265 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse265 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (let ((.cse267 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse265 (select (store .cse267 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse265 (select (store .cse267 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))))) .cse25) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse269 (store .cse10 v_arrayElimCell_197 0)) (.cse268 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (or (= .cse268 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse268 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse268 (select (store .cse269 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse268 (select (store .cse269 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse268 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse271 (store .cse10 v_arrayElimCell_197 0)) (.cse270 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse270 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse270 (select (store .cse271 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse270 (select (store .cse271 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse270 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or .cse0 .cse7 .cse2) (or (let ((.cse272 (or (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) .cse24 .cse25))) (and (or (and .cse272 (or .cse1 (and (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int)) (let ((.cse273 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse273 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse273 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))))) (or (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int)) (let ((.cse274 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse275 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse274 (select (store .cse275 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse274 (select (store .cse275 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) .cse7)) .cse0) (or (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse276 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse276 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse276 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse276 (select .cse11 v_antiDerIndex_entry0_1))))) (or .cse66 .cse5) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse277 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse277 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse277 (select .cse11 v_antiDerIndex_entry0_1)))))) .cse8) (or .cse30 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse278 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse278 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse278 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse278 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse279 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse279 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse279 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))))) (or .cse65 .cse5)) .cse31) (or .cse0 (and (or .cse38 .cse39 (forall ((v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select .cse37 v_antiDerIndex_entry0_1)))) (or (forall ((v_antiDerIndex_entry0_1 Int)) (let ((.cse280 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse280 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse280 (select .cse11 v_antiDerIndex_entry0_1))))) .cse4) (or .cse8 (forall ((v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select .cse11 v_antiDerIndex_entry0_1)))))) (or (forall ((v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) .cse8 .cse0) (or (and .cse52 (or .cse51 .cse5) (forall ((v_arrayElimCell_192 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse281 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (let ((.cse282 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse281 (select (store .cse282 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse281 (select (store .cse282 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse281 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse24 .cse25) (or .cse0 (and .cse272 (or (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse283 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse284 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse283 (select (store .cse284 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse283 (select (store .cse284 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse7) (or (forall ((v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select .cse143 v_antiDerIndex_entry0_1))) .cse30 .cse31) (or .cse33 (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (let ((.cse285 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse285 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse285 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or (forall ((v_arrayElimCell_194 Int) (v_antiDerIndex_entry0_1 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1) (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))) .cse1))))) .cse286) (or (and (or .cse8 .cse287) (or .cse188 .cse57) (or .cse188 .cse30 .cse31)) .cse14) (or .cse8 .cse287 .cse5) (or .cse8 .cse0 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse288 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse288 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse288 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse288 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse288 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse8 .cse0 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse289 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse290 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse289 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse289 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse289 (select (store .cse290 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse289 (select (store .cse290 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or .cse8 .cse0 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse293 (store .cse10 v_arrayElimCell_197 0)) (.cse291 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse292 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse291 (select (store .cse292 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse291 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse291 (select (store .cse293 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse291 (select (store .cse293 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse291 (select (store .cse292 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) (or (and (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse295 (store .cse10 v_arrayElimCell_197 0)) (.cse294 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int)) (= .cse294 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse294 (select (store .cse295 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse294 (select (store .cse295 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse294 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse297 (store .cse10 v_arrayElimCell_197 0)) (.cse296 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse296 (select (store .cse297 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse296 (select (store .cse297 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse298 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse296 (select (store .cse298 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse296 (select (store .cse298 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse296 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (or (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse300 (store .cse10 v_arrayElimCell_197 0)) (.cse299 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse299 (select (store .cse300 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse299 (select (store .cse300 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse299 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (forall ((v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse302 (store .cse10 v_arrayElimCell_197 0)) (.cse301 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse301 (select (store .cse302 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int)) (= .cse301 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse301 (select (store .cse302 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse301 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse24 .cse25) (or .cse0 (and (or .cse24 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse305 (store .cse10 v_arrayElimCell_197 0)) (.cse303 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse304 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse303 (select (store .cse304 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse303 (select (store .cse305 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse303 (select (store .cse305 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse303 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse303 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse303 (select (store .cse304 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse25) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_arrayElimCell_196 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse308 (store .cse10 v_arrayElimCell_197 0)) (.cse309 (store .cse10 v_arrayElimCell_194 0)) (.cse306 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse307 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse306 (select (store .cse307 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse306 (select (store .cse308 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse306 (select (store .cse308 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse306 (select (store .cse309 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse306 (select (store .cse309 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse306 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse306 (select (store .cse307 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse7) (or (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse312 (store .cse10 v_arrayElimCell_197 0)) (.cse310 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse311 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse310 (select (store .cse311 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse310 (select (store .cse312 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse310 (select (store .cse312 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse310 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse310 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse310 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse310 (select (store .cse311 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse315 (store .cse10 v_arrayElimCell_197 0)) (.cse313 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse314 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse313 (select (store .cse314 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse313 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse313 (select (store .cse315 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse313 (select (store .cse315 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse313 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse313 (select (store .cse314 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse1))) (or .cse134 .cse149 (let ((.cse316 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse322 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse322 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (forall ((v_arrayElimCell_192 Int)) (= .cse322 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))) (= .cse322 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse322 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse322 (select .cse12 v_antiDerIndex_entry0_1))))))) (and (or .cse238 .cse5) (or .cse316 .cse14) (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse317 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int)) (= .cse317 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse317 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse317 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse317 (select .cse12 v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse318 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse318 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse318 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse318 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse318 (select .cse12 v_antiDerIndex_entry0_1)))))) .cse14) (or .cse0 (and (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse319 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse319 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse319 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse319 (select .cse12 v_antiDerIndex_entry0_1))))) .cse14) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse320 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse320 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse320 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse320 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse320 (select .cse12 v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse321 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse321 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse321 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse321 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse321 (select .cse12 v_antiDerIndex_entry0_1))))))) (or .cse316 .cse5)))) (or .cse0 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse324 (store .cse10 v_arrayElimCell_197 0)) (.cse323 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse323 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse323 (select (store .cse324 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse323 (select (store .cse324 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse325 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse323 (select (store .cse325 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse323 (select (store .cse325 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse327 (store .cse10 v_arrayElimCell_197 0)) (.cse326 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse326 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse326 (select (store .cse327 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse326 (select (store .cse327 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse326 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse326 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse328 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse329 (store .cse10 v_arrayElimCell_197 0))) (or (= .cse328 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse328 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse328 (select (store .cse329 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse328 (select (store .cse329 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse1) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse331 (store .cse10 v_arrayElimCell_197 0)) (.cse330 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse330 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse330 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse330 (select (store .cse331 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse330 (select (store .cse331 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse330 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse8 .cse0) (or .cse0 (and (or .cse24 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse332 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse332 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse332 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse332 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse332 (select .cse12 v_antiDerIndex_entry0_1))))) .cse25) (or .cse7 .cse163))) (or .cse14 (and (or .cse4 .cse150) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse333 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse333 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse333 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse333 (select .cse12 v_antiDerIndex_entry0_1)) (= .cse333 (select (store (store .cse10 v_arrayElimCell_192 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse334 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse334 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse334 (select (store (store .cse10 v_arrayElimCell_197 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse334 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse8 .cse5) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse335 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse336 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse335 (select (store .cse336 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse335 (select (store .cse336 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse335 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse335 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse337 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse338 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse337 (select (store .cse338 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse337 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse337 (select (store .cse338 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse337 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse337 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1))))))) (or .cse0 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse339 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse340 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse339 (select (store .cse340 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse339 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse339 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse339 (select (store .cse340 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse341 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse342 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse341 (select (store .cse342 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse341 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse343 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse341 (select (store .cse343 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse341 (select (store .cse343 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))) (= .cse341 (select (store .cse342 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse344 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse345 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse344 (select (store .cse345 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse344 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse344 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse344 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse344 (select (store .cse345 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)))))) .cse1) (or (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse346 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse347 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (or (= .cse346 (select (store .cse347 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse346 (select (store .cse12 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)))) (= .cse346 (select (store .cse347 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse346 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse346 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse346 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse348 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_192 Int)) (let ((.cse349 (store .cse10 v_arrayElimCell_192 0))) (or (forall ((v_arrayElimCell_193 Int)) (= .cse348 (select (store .cse349 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1))) (= .cse348 (select (store .cse349 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) (= .cse348 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse348 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse348 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) .cse0 .cse1) (or .cse4 .cse127 .cse5) (or .cse24 .cse2 .cse25) (or .cse0 .cse1 (and (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse350 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse350 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse350 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse350 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse350 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse350 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse351 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse351 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse351 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse351 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse352 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse351 (select (store .cse352 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse351 (select (store .cse352 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))))))) (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse353 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse353 (select (store (store .cse10 v_arrayElimCell_192 0) v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse353 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse353 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse353 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or .cse132 .cse30 .cse5 .cse31) (or (and (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse355 (store .cse10 v_arrayElimCell_197 0)) (.cse356 (store .cse10 v_arrayElimCell_194 0)) (.cse354 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse354 (select (store .cse355 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse354 (select (store .cse355 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse354 (select (store .cse356 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse354 (select (store .cse356 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse354 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse7) (or .cse1 (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse358 (store .cse10 v_arrayElimCell_197 0)) (.cse357 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse357 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse357 (select (store .cse358 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse357 (select (store .cse358 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse357 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse360 (store .cse10 v_arrayElimCell_197 0)) (.cse359 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse359 (select (store .cse360 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse359 (select (store .cse360 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse359 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse359 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse359 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or .cse4 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse362 (store .cse10 v_arrayElimCell_197 0)) (.cse361 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse361 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse361 (select (store .cse362 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse361 (select (store .cse362 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse361 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse364 (store .cse10 v_arrayElimCell_197 0)) (.cse365 (store .cse10 v_arrayElimCell_194 0)) (.cse363 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse363 (select (store .cse364 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse363 (select (store .cse364 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse363 (select (store .cse365 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse363 (select (store .cse365 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse363 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse7) (or .cse4 .cse14 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse367 (store .cse10 v_arrayElimCell_197 0)) (.cse366 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse366 (select (store .cse367 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse366 (select (store .cse367 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse366 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse8 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse369 (store .cse10 v_arrayElimCell_197 0)) (.cse368 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse368 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse368 (select (store .cse369 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse368 (select (store .cse369 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse368 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse1 (and (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse371 (store .cse10 v_arrayElimCell_197 0)) (.cse370 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse370 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse370 (select (store .cse371 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse370 (select (store .cse371 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse370 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse370 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse373 (store .cse10 v_arrayElimCell_197 0)) (.cse372 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse372 (select (store .cse373 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse372 (select (store .cse373 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse372 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse372 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))) (or .cse24 .cse25 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse375 (store .cse10 v_arrayElimCell_197 0)) (.cse374 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse374 (select (store .cse375 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse374 (select (store .cse375 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse374 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse374 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse377 (store .cse10 v_arrayElimCell_197 0)) (.cse376 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse376 (select .cse37 v_antiDerIndex_entry0_1)) (= .cse376 (select (store .cse377 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse376 (select (store .cse377 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse376 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse24 .cse25)) .cse0) (or .cse8 (forall ((v_arrayElimCell_193 Int) (v_arrayElimCell_192 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse378 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1)) (.cse379 (store .cse10 v_arrayElimCell_192 0))) (or (= .cse378 (select (store .cse379 v_arrayElimCell_193 0) v_antiDerIndex_entry0_1)) (= .cse378 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse378 (select (store .cse379 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1))))) .cse5) (or .cse0 .cse1 .cse126) (or .cse0 (and (or .cse1 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse380 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse380 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse380 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse380 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or (and (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse381 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse381 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (or (= .cse381 (select (store .cse12 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse381 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)))) (= .cse381 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse382 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (= .cse382 (select (store (store .cse10 v_arrayElimCell_194 0) v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))) (= .cse382 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse382 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse383 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse383 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse383 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_196 Int)) (let ((.cse384 (store .cse10 v_arrayElimCell_194 0))) (or (= .cse383 (select (store .cse384 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse383 (select (store .cse384 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1))))))))) .cse1) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse385 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse385 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse385 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse385 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse30 .cse31) (or (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse386 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse386 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse386 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))) .cse57 .cse14) (or .cse8 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_196 Int) (v_arrayElimCell_198 Int)) (let ((.cse387 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse387 (select (store .cse11 v_arrayElimCell_196 0) v_antiDerIndex_entry0_1)) (= .cse387 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse387 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse33 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse388 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse388 (select .cse143 v_antiDerIndex_entry0_1)) (= .cse388 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse388 (select (store (store .cse10 v_arrayElimCell_194 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse388 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse1 (forall ((v_arrayElimCell_194 Int) (v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse390 (store .cse10 v_arrayElimCell_194 0)) (.cse389 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse389 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse389 (select (store .cse390 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse389 (select (store .cse390 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_1)) (= .cse389 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)))))) (or .cse8 (forall ((v_arrayElimCell_197 Int) (v_antiDerIndex_entry0_1 Int) (v_arrayElimCell_198 Int)) (let ((.cse391 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_1))) (or (= .cse391 (select .cse11 v_antiDerIndex_entry0_1)) (= .cse391 (select (store (store .cse10 v_arrayElimCell_197 0) v_arrayElimCell_198 0) v_antiDerIndex_entry0_1)) (= .cse391 (select (store .cse12 v_arrayElimCell_198 0) v_antiDerIndex_entry0_1))))))))))))) is different from false [2022-11-16 12:47:41,379 WARN L233 SmtUtils]: Spent 1.10m on a formula simplification. DAG size of input: 262 DAG size of output: 59 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:47:53,815 WARN L233 SmtUtils]: Spent 10.10s on a formula simplification that was a NOOP. DAG size: 59 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:47:59,117 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2022-11-16 12:47:59,118 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [866013883] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:47:59,118 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:47:59,118 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 19, 20] total 59 [2022-11-16 12:47:59,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1832585487] [2022-11-16 12:47:59,118 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:47:59,118 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 60 states [2022-11-16 12:47:59,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:47:59,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2022-11-16 12:47:59,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=2413, Unknown=14, NotChecked=954, Total=3540 [2022-11-16 12:47:59,120 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. Second operand has 60 states, 59 states have (on average 1.8135593220338984) internal successors, (107), 60 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:51:35,607 WARN L233 SmtUtils]: Spent 3.42m on a formula simplification. DAG size of input: 859 DAG size of output: 80 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:54:37,876 WARN L233 SmtUtils]: Spent 2.79m on a formula simplification. DAG size of input: 862 DAG size of output: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:55:34,992 WARN L233 SmtUtils]: Spent 40.76s on a formula simplification. DAG size of input: 867 DAG size of output: 30 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:55:39,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:55:39,712 INFO L93 Difference]: Finished difference Result 80 states and 83 transitions. [2022-11-16 12:55:39,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-16 12:55:39,712 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 59 states have (on average 1.8135593220338984) internal successors, (107), 60 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-16 12:55:39,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:55:39,713 INFO L225 Difference]: With dead ends: 80 [2022-11-16 12:55:39,713 INFO L226 Difference]: Without dead ends: 72 [2022-11-16 12:55:39,715 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 41 SyntacticMatches, 2 SemanticMatches, 75 ConstructedPredicates, 9 IntricatePredicates, 0 DeprecatedPredicates, 760 ImplicationChecksByTransitivity, 575.6s TimeCoverageRelationStatistics Valid=258, Invalid=4317, Unknown=17, NotChecked=1260, Total=5852 [2022-11-16 12:55:39,716 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 33 mSDsluCounter, 1142 mSDsCounter, 0 mSdLazyCounter, 523 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 1192 SdHoareTripleChecker+Invalid, 1057 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 523 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 531 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:55:39,716 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 1192 Invalid, 1057 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 523 Invalid, 0 Unknown, 531 Unchecked, 0.5s Time] [2022-11-16 12:55:39,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-11-16 12:55:39,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2022-11-16 12:55:39,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 71 states have (on average 1.056338028169014) internal successors, (75), 71 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:55:39,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 75 transitions. [2022-11-16 12:55:39,719 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 75 transitions. Word has length 38 [2022-11-16 12:55:39,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:55:39,719 INFO L495 AbstractCegarLoop]: Abstraction has 72 states and 75 transitions. [2022-11-16 12:55:39,719 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 60 states, 59 states have (on average 1.8135593220338984) internal successors, (107), 60 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:55:39,720 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 75 transitions. [2022-11-16 12:55:39,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-16 12:55:39,720 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:55:39,720 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:55:39,727 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-16 12:55:39,927 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-11-16 12:55:39,927 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 59 more)] === [2022-11-16 12:55:39,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:55:39,928 INFO L85 PathProgramCache]: Analyzing trace with hash 68066961, now seen corresponding path program 1 times [2022-11-16 12:55:39,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:55:39,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808963442] [2022-11-16 12:55:39,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:55:39,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:55:39,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:55:41,569 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:55:41,569 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:55:41,569 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808963442] [2022-11-16 12:55:41,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1808963442] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:55:41,569 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1106295874] [2022-11-16 12:55:41,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:55:41,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:55:41,570 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:55:41,571 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:55:41,588 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_92e607fe-2a25-4b8e-bee8-e90eb6c3e2e2/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-16 12:55:41,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:55:41,767 INFO L263 TraceCheckSpWp]: Trace formula consists of 244 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-16 12:55:41,769 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:55:42,130 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:55:42,245 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:55:42,246 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 53 [2022-11-16 12:55:42,515 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:55:42,515 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2022-11-16 12:55:42,538 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 46 [2022-11-16 12:55:43,296 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:55:43,324 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:55:43,325 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 81 treesize of output 67 [2022-11-16 12:55:44,957 WARN L855 $PredicateComparison]: unable to prove that (exists ((|ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base| Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base|) 0) (exists ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base| Int) (|ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base| Int)) (let ((.cse1 (store |c_ULTIMATE.start_main_old_#valid#1| |ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base| 1))) (let ((.cse0 (store .cse1 |ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base| 1))) (and (= |c_#valid| (store (store (store .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base| 0) |ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base| 0) |ULTIMATE.start__destroy_in_nondeterministic_order_~pred~0#1.base| 0)) (= (select .cse1 |ULTIMATE.start__destroy_in_nondeterministic_order_~succ~0#1.base|) 0) (= (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base|) 0))))))) is different from true [2022-11-16 12:55:44,971 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:55:44,971 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:55:45,503 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= (let ((.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:55:45,516 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)) (= |c_ULTIMATE.start_main_old_#valid#1| (let ((.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_#res#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_#res#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0))))) is different from false [2022-11-16 12:55:45,528 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= (let ((.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:55:45,557 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= (let ((.cse0 (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) (+ 4 |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:55:45,571 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1689 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)) (= (let ((.cse0 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1689) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base|) (+ 4 |c_ULTIMATE.start_dll_circular_create_~head~0#1.offset|) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0)) |c_ULTIMATE.start_main_old_#valid#1|))) is different from false [2022-11-16 12:55:45,597 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1689 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (= (let ((.cse0 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1689) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:55:45,614 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1689 (Array Int Int)) (v_ArrVal_1688 (Array Int Int)) (|ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| Int)) (or (not (<= 0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|)) (= (let ((.cse0 (store (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| v_ArrVal_1688) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| v_ArrVal_1689) |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|) (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base|))) (store (store (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base| 0) (select .cse0 |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset|) 0) (select .cse0 (+ |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 4)) 0)) |c_ULTIMATE.start_main_old_#valid#1|) (not (<= |ULTIMATE.start__destroy_in_nondeterministic_order_~head#1.offset| 0)))) is different from false [2022-11-16 12:55:45,624 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:55:45,625 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 57 [2022-11-16 12:55:45,631 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 164 [2022-11-16 12:55:45,661 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:55:45,662 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 165 treesize of output 169 [2022-11-16 12:55:45,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 383 treesize of output 359 [2022-11-16 12:55:45,696 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 224 treesize of output 212 [2022-11-16 12:56:01,274 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (store |c_#valid| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base| 0)) (.cse341 (< (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 3) 0)) (.cse326 (< 0 (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 1)))) (let ((.cse336 (+ |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 4)) (.cse335 (< |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 1)) (.cse300 (or .cse341 .cse326)) (.cse301 (< 0 (+ 5 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|))) (.cse2 (store .cse3 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0))) (let ((.cse0 (store .cse3 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0)) (.cse39 (store .cse2 |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0)) (.cse16 (and .cse335 .cse300 .cse301)) (.cse86 (not (<= |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 0))) (.cse90 (not (<= 0 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|))) (.cse40 (and .cse341 .cse301)) (.cse27 (and .cse335 .cse326)) (.cse80 (not (<= .cse336 0))) (.cse81 (not (<= 0 .cse336)))) (let ((.cse121 (= |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|)) (.cse10 (= |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.base|)) (.cse33 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) .cse80 .cse81)) (.cse36 (or .cse27 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse340 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse340) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse340)))))) (.cse54 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse338 (store .cse3 v_arrayElimCell_211 0)) (.cse339 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse338 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse339) (= (select (store .cse338 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse339)))) .cse40)) (.cse56 (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) .cse90)) (.cse57 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) .cse16)) (.cse58 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse337 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse337) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse337))))) (.cse5 (< .cse336 0)) (.cse7 (< 0 .cse336)) (.cse299 (or (< 3 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|) .cse335)) (.cse302 (< |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 5)) (.cse325 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int)) (let ((.cse334 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse334) (= (select .cse39 v_antiDerIndex_entry0_2) .cse334))))) (.cse89 (store .cse0 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0)) (.cse95 (< |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset| 0)) (.cse96 (< 0 |c_ULTIMATE.start_dll_circular_create_~new_head~0#1.offset|))) (let ((.cse11 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int)) (let ((.cse332 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int)) (or (forall ((v_arrayElimCell_213 Int)) (= .cse332 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= .cse332 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse332) (= (select .cse39 v_antiDerIndex_entry0_2) .cse332) (= (select .cse2 v_antiDerIndex_entry0_2) .cse332)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int)) (let ((.cse333 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse333 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse333) (= (select .cse39 v_antiDerIndex_entry0_2) .cse333) (= (select .cse2 v_antiDerIndex_entry0_2) .cse333)))))) (.cse35 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse330 (store .cse3 v_arrayElimCell_211 0)) (.cse331 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse330 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse331) (= (select .cse89 v_antiDerIndex_entry0_2) .cse331) (= (select (store .cse330 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse331)))) .cse95 .cse96)) (.cse52 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse329 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse329) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse329) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse329))))) (.cse55 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse328 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse328) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse328) (= (select .cse39 v_antiDerIndex_entry0_2) .cse328))))) (.cse41 (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse327 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse327) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse327) (= (select .cse89 v_antiDerIndex_entry0_2) .cse327)))) .cse90)) (.cse42 (or .cse80 .cse325 .cse81)) (.cse4 (and .cse326 .cse299 .cse302)) (.cse43 (or .cse325 .cse5 .cse7)) (.cse44 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse324 (store .cse3 v_arrayElimCell_211 0)) (.cse323 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse323) (= (select (store .cse324 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse323) (= (select (store .cse324 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse323)))) .cse40)) (.cse59 (and .cse33 .cse36 .cse54 .cse56 .cse57 .cse58)) (.cse50 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse322 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse322) (= (select .cse39 v_antiDerIndex_entry0_2) .cse322) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse322))))) (.cse51 (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_211 Int)) (let ((.cse321 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse321) (= (select .cse89 v_antiDerIndex_entry0_2) .cse321)))) .cse90)) (.cse34 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse320 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse320) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse320) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse320))))) (.cse46 (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse318 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse318) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse319 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse319 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse318) (= (select (store .cse319 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse318)))))))) (.cse47 (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse317 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse317)) (= (select .cse0 v_antiDerIndex_entry0_2) .cse317) (forall ((v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse317)))))) (.cse48 (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse316 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse316) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse316) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse316))))))) (.cse49 (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse315 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse315) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse315)))))) (.cse83 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse314 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse314) (= .cse314 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse314 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (.cse23 (or .cse27 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse313 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse313) (= .cse313 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse313 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse313)))))) (.cse24 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse312 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse312) (= .cse312 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse312 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse5 .cse7)) (.cse25 (or .cse27 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse311 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse311) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse311) (= .cse311 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse311 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) (.cse28 (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse308 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse308)) (= .cse308 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse308 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse309 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse309 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse309 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse310 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse310 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse309) (= (select (store .cse310 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse309)))))))))) (.cse134 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse306 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse307 (store .cse3 v_arrayElimCell_213 0))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse306) (= (select (store .cse307 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse306) (= .cse306 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse306 (select (store .cse307 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (.cse132 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse305 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse305) (= .cse305 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse305))))) (.cse168 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse303 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse304 (store .cse3 v_arrayElimCell_213 0))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse303) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse303) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse303) (= (select (store .cse304 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse303) (= .cse303 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse303 (select (store .cse304 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (.cse8 (and .cse299 .cse300 .cse301 .cse302)) (.cse147 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse298 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse298) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse298)) (= .cse298 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse298 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (.cse148 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse296 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse296) (= .cse296 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse296 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse297 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse297 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse296) (= (select (store .cse297 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse296)))))))) (.cse177 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse294 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse295 (store .cse3 v_arrayElimCell_213 0))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse294) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse294)) (= (select (store .cse295 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse294) (= .cse294 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse294 (select (store .cse295 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (.cse178 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse292 (store .cse3 v_arrayElimCell_213 0)) (.cse291 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse291) (= (select (store .cse292 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse291) (= .cse291 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse291 (select (store .cse292 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse293 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse293 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse291) (= (select (store .cse293 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse291)))))))) (.cse140 (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse289 (store .cse3 v_arrayElimCell_213 0)) (.cse290 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse289 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse290) (= .cse290 (select (store .cse289 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse290)))))) (.cse141 (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse286 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse286 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse286) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse286)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse287 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse287) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse288 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse288 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse287) (= .cse287 (select (store .cse288 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse287))))))) (.cse142 (or .cse40 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse285 (store .cse3 v_arrayElimCell_213 0)) (.cse283 (store .cse3 v_arrayElimCell_211 0)) (.cse284 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse283 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse284) (= (select (store .cse285 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse284) (= .cse284 (select (store .cse285 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store .cse283 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse284)))))) (.cse143 (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse280 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse280 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse281 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse281 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse280) (= (select (store .cse281 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse280))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse282 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse282)) (= .cse282 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))))) (.cse144 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse278 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse279 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse278) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse278) (= (select (store .cse279 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse278) (= .cse278 (select (store .cse279 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse40)) (.cse145 (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse277 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse277) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse277) (= .cse277 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) (.cse146 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse275 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse276 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse275) (= (select (store .cse276 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse275) (= .cse275 (select (store .cse276 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse95 .cse96)) (.cse195 (or .cse80 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int)) (let ((.cse273 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse273 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse273) (= (select .cse2 v_antiDerIndex_entry0_2) .cse273)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int)) (let ((.cse274 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int)) (or (forall ((v_arrayElimCell_213 Int)) (= .cse274 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= .cse274 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse274) (= (select .cse2 v_antiDerIndex_entry0_2) .cse274))))) .cse81)) (.cse196 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse272 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse272 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse272) (= (select .cse2 v_antiDerIndex_entry0_2) .cse272)))) .cse27)) (.cse209 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse271 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse271) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse271) (= .cse271 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse271))))) (.cse63 (not .cse10)) (.cse29 (not .cse121)) (.cse125 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse270 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse270) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse270 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse270) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse270))))) (.cse126 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse268 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse268) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse268) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse269 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse269 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse268) (= .cse268 (select (store .cse269 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse268))))) (.cse215 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse267 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse267) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse267)) (= .cse267 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse267))))) (.cse217 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse265 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse265) (= .cse265 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse265) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse266 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse266 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse265) (= (select (store .cse266 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse265))))))))) (and (or (and (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int) (v_arrayElimCell_207 Int)) (let ((.cse1 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse1) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse1) (= .cse1 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse1 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse4) (or .cse5 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int) (v_arrayElimCell_207 Int)) (let ((.cse6 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse6) (= .cse6 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse6 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse7) (or .cse8 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int) (v_arrayElimCell_207 Int)) (let ((.cse9 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse9) (= .cse9 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse9 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) .cse10) (or .cse5 .cse7 .cse11) (or .cse10 .cse8 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse12 (store .cse3 v_arrayElimCell_213 0)) (.cse13 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse12 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse13) (= .cse13 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse13 (select (store .cse12 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_207 Int)) (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse13))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse14 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse15 (store .cse3 v_arrayElimCell_213 0))) (or (forall ((v_arrayElimCell_207 Int)) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse14) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse14))) (= (select (store .cse15 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse14) (= .cse14 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse14 (select (store .cse15 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse17 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse17) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse17) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse17) (= .cse17 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse18 (store .cse3 v_arrayElimCell_213 0)) (.cse19 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse18 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse19) (= .cse19 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse19 (select (store .cse18 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (= (select (store (store .cse3 v_arrayElimCell_209 0) v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse19))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse20 (store .cse3 v_arrayElimCell_213 0)) (.cse21 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse20 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse21) (= .cse21 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse21 (select (store .cse20 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (let ((.cse22 (store .cse3 v_arrayElimCell_209 0))) (or (= (select (store .cse22 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse21) (= (select (store .cse22 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse21)))))))) .cse10 .cse8) (or (and .cse23 .cse24 .cse25 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse26 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse26 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse26 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse27 .cse10) .cse28) .cse29) (or .cse10 (let ((.cse30 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int) (v_arrayElimCell_207 Int)) (let ((.cse32 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse32) (= .cse32 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse32)))))) (and (or .cse8 .cse30) (or .cse4 .cse30) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int) (v_arrayElimCell_207 Int)) (let ((.cse31 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse31) (= .cse31 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse31)))) .cse5 .cse7)))) (or (and .cse33 (or .cse16 .cse34) .cse35 .cse36 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse37 (store .cse3 v_arrayElimCell_211 0)) (.cse38 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse37 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse38) (= (select .cse39 v_antiDerIndex_entry0_2) .cse38) (= (select (store .cse37 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse38)))) .cse40) .cse41 .cse42 .cse43 .cse44 (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse45 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse45) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse45))))) (or (and .cse46 .cse47 .cse48 .cse49) .cse16) (or .cse27 .cse50) .cse51 (or .cse52 .cse40) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse53 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse39 v_antiDerIndex_entry0_2) .cse53) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse53))))) .cse54 .cse55 .cse56 .cse57 .cse58 (or .cse59 .cse29) (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse60 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse60)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse60)))) (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse61 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse39 v_antiDerIndex_entry0_2) .cse61) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse62 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse62 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse61) (= (select (store .cse62 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse61)))))))))) .cse63) (or .cse10 .cse8 (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int) (v_arrayElimCell_207 Int)) (let ((.cse64 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_209 0) v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse64) (= .cse64 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse64))))) (or (let ((.cse65 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse79 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse79)) (= .cse79 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (.cse66 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse78 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse78)) (= .cse78 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse78)))))) (.cse67 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse77 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse77) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse77))) (= .cse77 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) (and (or (and .cse65 .cse66 (or .cse10 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2) (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))) .cse67) .cse29) (or (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse68 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_207 Int)) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse68)) (= .cse68 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse69 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_207 Int)) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse69) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse69))) (= .cse69 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) .cse10) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int)) (let ((.cse70 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse70) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse70) (= .cse70 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse70)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int)) (let ((.cse71 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse71) (= .cse71 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse71) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse71)))) (or (and .cse65 .cse66 .cse67) .cse63) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int)) (let ((.cse72 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse72) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse72) (= .cse72 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse72)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int)) (let ((.cse73 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse73) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse73) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse73) (= .cse73 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse74 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse74)) (= .cse74 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse74)))) (or (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse75 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse75 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse75)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int)) (let ((.cse76 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse76) (= .cse76 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) .cse10))) .cse80 .cse81) (or .cse10 (and (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse82 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse82 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse82 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse82)))) .cse5 .cse7) (or .cse27 .cse83))) (or .cse80 .cse81 .cse11) (or .cse10 .cse5 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse84 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_207 Int)) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse84)) (= .cse84 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse84)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse85 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse85 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_207 Int)) (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse85)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse85))))) .cse7) (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse88 (store .cse3 v_arrayElimCell_213 0)) (.cse87 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse87) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse87) (= (select (store .cse88 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse87) (= .cse87 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse87 (select (store .cse88 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse87)))) .cse90) (or .cse80 .cse81 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse91 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse91) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse91) (= .cse91 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse91) (= (select .cse2 v_antiDerIndex_entry0_2) .cse91))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse94 (store .cse3 v_arrayElimCell_213 0)) (.cse92 (store .cse3 v_arrayElimCell_211 0)) (.cse93 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse92 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse93) (= (select (store .cse94 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse93) (= .cse93 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse93 (select (store .cse94 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse93) (= (select (store .cse92 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse93)))) .cse95 .cse96) (or (and (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse97 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse98 (store .cse3 v_arrayElimCell_213 0))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse97) (= (select (store .cse98 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse97) (= .cse97 (select (store .cse98 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse40) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse99 (store .cse3 v_arrayElimCell_213 0)) (.cse100 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse99 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse100) (= .cse100 (select (store .cse99 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse100)))) .cse95 .cse96) (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse101 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse101) (= .cse101 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse101)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse102 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse102) (= .cse102 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse102))))))) .cse10) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse104 (store .cse3 v_arrayElimCell_213 0)) (.cse103 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse103) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse103) (= (select (store .cse104 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse103) (= .cse103 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse103 (select (store .cse104 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse103))))) (or (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse105 (store .cse3 v_arrayElimCell_213 0)) (.cse106 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse105 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse106) (= .cse106 (select (store .cse105 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_207 Int)) (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse106))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse107 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse108 (store .cse3 v_arrayElimCell_213 0))) (or (forall ((v_arrayElimCell_207 Int)) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse107) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse107))) (= (select (store .cse108 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse107) (= .cse107 (select (store .cse108 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) .cse10 .cse8) (or (let ((.cse110 (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse120 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse120) (= (select .cse39 v_antiDerIndex_entry0_2) .cse120))))) (.cse109 (forall ((v_antiDerIndex_entry0_2 Int)) (= (select .cse39 v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))))) (and (or (and (or .cse109 .cse5 .cse7) (or .cse27 .cse110)) .cse10) (or .cse5 .cse55 .cse7) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse111 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse111) (= (select .cse39 v_antiDerIndex_entry0_2) .cse111) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse111)))) .cse16) .cse35 .cse52 (or .cse80 .cse81 .cse55) .cse41 .cse42 (or (and (or .cse8 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_207 Int)) (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_207 Int)) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) .cse5 .cse7) (or .cse4 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_207 Int)) (let ((.cse112 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse112) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse112)))))) .cse10) .cse43 .cse44 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse113 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse113) (= (select .cse89 v_antiDerIndex_entry0_2) .cse113) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse113)))) .cse16) (or .cse10 .cse8 (and (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_207 Int)) (= (select (store (store .cse3 v_arrayElimCell_209 0) v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_207 Int)) (let ((.cse114 (store .cse3 v_arrayElimCell_209 0)) (.cse115 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse114 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse115) (= (select (store .cse114 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse115)))))) (or .cse59 .cse63) (or (and (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse116 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse116) (= (select .cse39 v_antiDerIndex_entry0_2) .cse116) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse117 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse117 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse116) (= (select (store .cse117 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse116))))))) (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse118 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse118) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse118)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse118))))) .cse16) (or .cse50 .cse5 .cse7) .cse51 (or (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2) (select (store (store .cse3 v_arrayElimCell_209 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_2))) .cse16 .cse10) (or .cse27 .cse34) (or .cse16 (and .cse46 .cse47 .cse48 .cse49 (or .cse10 (forall ((v_antiDerIndex_entry0_2 Int)) (= (select .cse0 v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)))))) (or (and (or .cse40 (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse119 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse119) (= (select .cse89 v_antiDerIndex_entry0_2) .cse119))))) .cse110 (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int)) (= (select .cse89 v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) .cse90) (or .cse80 .cse109 .cse81)) .cse10))) .cse121) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse124 (store .cse3 v_arrayElimCell_213 0)) (.cse122 (store .cse3 v_arrayElimCell_211 0)) (.cse123 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse122 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse123) (= (select (store .cse124 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse123) (= .cse123 (select (store .cse124 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse123) (= (select (store .cse122 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse123)))) .cse95 .cse96) (or .cse16 (and .cse125 .cse126)) (or .cse16 .cse10 (and (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int)) (let ((.cse127 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse127 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= .cse127 (select (store (store .cse3 v_arrayElimCell_209 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_2))))) (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int)) (let ((.cse128 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse128 (select (store (store .cse3 v_arrayElimCell_209 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse129 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse129 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse128) (= .cse128 (select (store .cse129 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))))))) (or .cse10 (and (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse130 (store .cse3 v_arrayElimCell_213 0)) (.cse131 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse130 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse131) (= .cse131 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse131 (select (store .cse130 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse131)))) .cse90) .cse132 (or .cse80 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse133 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse133 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse133) (= (select .cse2 v_antiDerIndex_entry0_2) .cse133)))) .cse81) (or .cse40 .cse134))) (or .cse8 (and (or (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse135 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse135 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (let ((.cse136 (store .cse3 v_arrayElimCell_209 0))) (or (= (select (store .cse136 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse135) (= (select (store .cse136 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse135))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse137 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse137 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (= (select (store (store .cse3 v_arrayElimCell_209 0) v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse137)))))) .cse10) (or .cse10 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse138 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse138 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_207 Int)) (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse138))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse139 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_207 Int)) (or (= (select (store .cse0 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse139) (= (select (store .cse2 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse139))) (= .cse139 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))))) (or (and .cse140 .cse141 .cse142 .cse143 .cse144 .cse145 .cse146) .cse63) (or (and .cse147 (or .cse10 .cse83) .cse148 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse149 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse149) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse149) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse149))) (= .cse149 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse149 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse150 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse150)) (= (select .cse0 v_antiDerIndex_entry0_2) .cse150) (= .cse150 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse150 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse150)))))) .cse16) (or (and .cse23 .cse24 .cse25 .cse28) .cse63) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse152 (store .cse3 v_arrayElimCell_213 0)) (.cse151 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse151) (= (select (store .cse152 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse151) (= .cse151 (select (store .cse152 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse151))))) (or .cse5 .cse7 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse153 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int)) (or (forall ((v_arrayElimCell_213 Int)) (= .cse153 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= .cse153 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse153) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse153) (= (select .cse39 v_antiDerIndex_entry0_2) .cse153) (= (select .cse2 v_antiDerIndex_entry0_2) .cse153)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse154 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse154) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse154 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse154) (= (select .cse39 v_antiDerIndex_entry0_2) .cse154) (= (select .cse2 v_antiDerIndex_entry0_2) .cse154)))))) (or .cse10 (and (or .cse16 .cse134) (or (and (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse155 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int)) (or (forall ((v_arrayElimCell_213 Int)) (= .cse155 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= .cse155 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))) (= (select .cse39 v_antiDerIndex_entry0_2) .cse155) (= (select .cse2 v_antiDerIndex_entry0_2) .cse155)))) (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse156 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse156 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select .cse39 v_antiDerIndex_entry0_2) .cse156) (= (select .cse2 v_antiDerIndex_entry0_2) .cse156))))) .cse5 .cse7) (or .cse27 .cse132))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse157 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse157) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse157) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse157) (= .cse157 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse157)))) (or .cse10 .cse8 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse158 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse158 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse158 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (= (select (store (store .cse3 v_arrayElimCell_209 0) v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse158))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse159 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse159 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse159 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (let ((.cse160 (store .cse3 v_arrayElimCell_209 0))) (or (= (select (store .cse160 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse159) (= (select (store .cse160 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse159))))))))) (or .cse5 .cse7 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse161 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse161 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select .cse39 v_antiDerIndex_entry0_2) .cse161) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse161) (= (select .cse2 v_antiDerIndex_entry0_2) .cse161)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse162 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_212 Int)) (or (forall ((v_arrayElimCell_213 Int)) (= .cse162 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= .cse162 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))) (= (select .cse39 v_antiDerIndex_entry0_2) .cse162) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse162) (= (select .cse2 v_antiDerIndex_entry0_2) .cse162)))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse164 (store .cse3 v_arrayElimCell_213 0)) (.cse163 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse163) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse163) (= (select (store .cse164 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse163) (= .cse163 (select (store .cse164 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse163)))) .cse95 .cse96) (or .cse27 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse165 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse165) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse165) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse165) (= .cse165 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse165 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse167 (store .cse3 v_arrayElimCell_213 0)) (.cse166 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse166) (= (select (store .cse167 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse166) (= .cse166 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse166 (select (store .cse167 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse166))))) (or .cse16 .cse168) (or .cse86 .cse90 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse170 (store .cse3 v_arrayElimCell_213 0)) (.cse169 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse169) (= (select (store .cse170 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse169) (= .cse169 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse169 (select (store .cse170 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse169))))) (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse171 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse171) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse171) (forall ((v_arrayElimCell_212 Int)) (or (= .cse171 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_213 Int)) (let ((.cse172 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse172 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse171) (= .cse171 (select (store .cse172 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse171)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse173 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse173) (forall ((v_arrayElimCell_212 Int)) (or (= .cse173 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_213 Int)) (let ((.cse174 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse174 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse173) (= .cse173 (select (store .cse174 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse173) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse173)))) (or (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse175 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse175) (forall ((v_arrayElimCell_212 Int)) (or (= .cse175 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_213 Int)) (let ((.cse176 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse176 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse175) (= .cse175 (select (store .cse176 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))))))) .cse10) .cse177 .cse178)) (or .cse40 .cse168) (or .cse16 .cse10 (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse180 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse179 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse179 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse180) (= .cse180 (select (store (store .cse3 v_arrayElimCell_209 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_2)) (= .cse180 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse180 (select (store .cse179 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse183 (store .cse3 v_arrayElimCell_213 0)) (.cse182 (store .cse3 v_arrayElimCell_211 0)) (.cse181 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse181) (= (select (store .cse182 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse181) (= (select (store .cse183 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse181) (= .cse181 (select (store .cse183 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store .cse182 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse181)))) .cse40) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse185 (store .cse3 v_arrayElimCell_213 0)) (.cse184 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse184) (= (select (store .cse185 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse184) (= .cse184 (select (store .cse185 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse184)))) .cse95 .cse96) (or .cse16 .cse10 (forall ((v_arrayElimCell_209 Int) (v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse186 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse186 (select (store (store .cse3 v_arrayElimCell_209 0) |c_ULTIMATE.start_dll_circular_create_~head~0#1.base| 0) v_antiDerIndex_entry0_2)) (= .cse186 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse186 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or .cse10 .cse8 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse187 (store .cse3 v_arrayElimCell_213 0)) (.cse188 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse187 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse188) (= .cse188 (select (store .cse187 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (let ((.cse189 (store .cse3 v_arrayElimCell_209 0))) (or (= (select (store .cse189 v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse188) (= (select (store .cse189 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse188))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse190 (store .cse3 v_arrayElimCell_213 0)) (.cse191 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse190 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse191) (= .cse191 (select (store .cse190 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_209 Int) (v_arrayElimCell_207 Int)) (= (select (store (store .cse3 v_arrayElimCell_209 0) v_arrayElimCell_207 0) v_antiDerIndex_entry0_2) .cse191))))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse192 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse192) (= .cse192 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse192 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse192) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse192)))) .cse5 .cse7) (or (and (or .cse86 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse193 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse194 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse193) (= (select (store .cse194 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse193) (= .cse193 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse193 (select (store .cse194 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse90) .cse195 .cse196 (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse198 (store .cse3 v_arrayElimCell_213 0)) (.cse197 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse197) (= (select (store .cse198 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse197) (= .cse197 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse197 (select (store .cse198 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse197))))) (or .cse10 (and (or .cse40 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse200 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse199 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse199 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse200) (= .cse200 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse200 (select (store .cse199 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse201 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= .cse201 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse2 v_antiDerIndex_entry0_2) .cse201)))))) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse202 (store .cse3 v_arrayElimCell_213 0)) (.cse203 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse202 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse203) (= .cse203 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse203 (select (store .cse202 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse203))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse204 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse205 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse204) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse204) (= (select (store .cse205 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse204) (= .cse204 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse204 (select (store .cse205 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse40) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse208 (store .cse3 v_arrayElimCell_213 0)) (.cse206 (store .cse3 v_arrayElimCell_211 0)) (.cse207 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse206 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse207) (= (select (store .cse208 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse207) (= .cse207 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse207 (select (store .cse208 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store .cse206 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse207)))) .cse40) .cse209) .cse29) (or (and .cse147 .cse148) .cse16) (or .cse27 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse210 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse210) (= .cse210 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse210) (= (select .cse2 v_antiDerIndex_entry0_2) .cse210))))) (or .cse16 (and .cse177 .cse178)) (or .cse29 (and .cse140 .cse141 .cse142 .cse143 .cse144 .cse145 (or .cse10 (and (or .cse40 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse212 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse211 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse211 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse212) (= .cse212 (select (store .cse211 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2) (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) .cse146)) (or .cse16 (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse213 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse213) (= .cse213 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse213) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse214 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse214 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse213) (= (select (store .cse214 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse213))))))) .cse215 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse216 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse216) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse216)) (= .cse216 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse89 v_antiDerIndex_entry0_2) .cse216)))) .cse217)) (or .cse40 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse218 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse219 (store .cse3 v_arrayElimCell_213 0))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse218) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse218) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse218) (= (select (store .cse219 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse218) (= .cse218 (select (store .cse219 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse222 (store .cse3 v_arrayElimCell_213 0)) (.cse221 (store .cse3 v_arrayElimCell_211 0)) (.cse220 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse220) (= (select (store .cse221 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse220) (= (select (store .cse222 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse220) (= .cse220 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse220 (select (store .cse222 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store .cse221 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse220)))) .cse40) (or .cse27 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse223 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse223) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse223) (= .cse223 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse223 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse223))))) (or .cse5 .cse7 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse224 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse224) (= .cse224 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse224 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse224))))) (or (and .cse195 .cse196 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse225 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse225) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse225) (= .cse225 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse225)))) .cse16) (or .cse16 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse226 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse226) (= .cse226 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse226))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse227 (store .cse3 v_arrayElimCell_211 0)) (.cse228 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store .cse227 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse228) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse228) (= .cse228 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select (store .cse227 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse228)))) .cse40) (or .cse86 .cse90 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse229 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse229) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse229) (= .cse229 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (or .cse40 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse230 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse230) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse230) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse230) (= .cse230 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) .cse209) .cse63) (or .cse86 .cse90 (let ((.cse236 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse245 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse245) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse246 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse246 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse245) (= (select (store .cse246 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse245)))))))) (.cse237 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse244 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse244) (forall ((v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse244)))))) (.cse238 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse243 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (forall ((v_arrayElimCell_210 Int)) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse243)) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse243) (forall ((v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse243))))))) (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse231 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse231) (= (select .cse89 v_antiDerIndex_entry0_2) .cse231) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse232 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse232 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse231) (= (select (store .cse232 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse231))))))) (or (and (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse233 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse233) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse233)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse234 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse234) (= (select .cse89 v_antiDerIndex_entry0_2) .cse234))))) .cse10) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse235 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse235) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse235) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse235) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse235)))) (or (and .cse236 .cse237 .cse238) .cse63) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse239 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse239) (= (select .cse89 v_antiDerIndex_entry0_2) .cse239) (forall ((v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse239))))) (or (and .cse236 (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) .cse10) .cse237 .cse238) .cse29) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse240 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse240) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse240) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse240) (= (select .cse89 v_antiDerIndex_entry0_2) .cse240)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_213 Int)) (let ((.cse241 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse241) (= (select (store (store .cse3 v_arrayElimCell_213 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse241) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse242 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse242 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse241) (= (select (store .cse242 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse241)))))))))) (or (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_211 Int) (v_arrayElimCell_213 Int)) (let ((.cse247 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse247) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse247) (= .cse247 (select (store .cse2 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= .cse247 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (= (select .cse39 v_antiDerIndex_entry0_2) .cse247)))) .cse5 .cse7) (or .cse16 (and .cse125 .cse126 .cse215 (or .cse10 (and (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse248 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse248) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse248 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select .cse39 v_antiDerIndex_entry0_2) .cse248)))) (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse249 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse249) (= (select .cse39 v_antiDerIndex_entry0_2) .cse249) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse250 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse250 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse249) (= .cse249 (select (store .cse250 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse251 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse251) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse251) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse251 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse251)))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse253 (store .cse3 v_arrayElimCell_213 0)) (.cse252 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse252) (= (select (store .cse253 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse252) (= .cse252 (select (store .cse253 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse254 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse254 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse252) (= (select (store .cse254 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse252))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse255 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse255) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse255)) (= .cse255 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) .cse217 (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse256 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2)) (.cse257 (store .cse3 v_arrayElimCell_213 0))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse256) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (= (select (store (store .cse3 v_arrayElimCell_211 0) v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse256)) (= (select (store .cse257 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse256) (= .cse256 (select (store .cse257 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2))))) (or .cse10 (and (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse258 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse258) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (= .cse258 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))) (forall ((v_antiDerIndex_entry0_2 Int)) (let ((.cse259 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse259) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse260 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse260 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse259) (= .cse259 (select (store .cse260 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse261 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse261) (= .cse261 (select (store (store .cse3 v_arrayElimCell_213 0) v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)) (forall ((v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse262 (store .cse3 v_arrayElimCell_211 0))) (or (= (select (store .cse262 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse261) (= (select (store .cse262 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse261))))))) (forall ((v_antiDerIndex_entry0_2 Int) (v_arrayElimCell_210 Int) (v_arrayElimCell_211 Int)) (let ((.cse263 (select |c_ULTIMATE.start_main_old_#valid#1| v_antiDerIndex_entry0_2))) (or (= (select .cse0 v_antiDerIndex_entry0_2) .cse263) (= (select (store (store .cse3 v_arrayElimCell_211 0) |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse263) (= (select (store .cse2 v_arrayElimCell_210 0) v_antiDerIndex_entry0_2) .cse263) (forall ((v_arrayElimCell_212 Int) (v_arrayElimCell_213 Int)) (let ((.cse264 (store .cse3 v_arrayElimCell_213 0))) (or (= (select (store .cse264 |c_ULTIMATE.start_dll_circular_create_~last~0#1.base| 0) v_antiDerIndex_entry0_2) .cse263) (= .cse263 (select (store .cse264 v_arrayElimCell_212 0) v_antiDerIndex_entry0_2)))))))))))))))) is different from false [2022-11-16 12:58:36,622 WARN L233 SmtUtils]: Spent 1.69m on a formula simplification. DAG size of input: 328 DAG size of output: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:58:49,108 WARN L233 SmtUtils]: Spent 10.05s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:58:52,007 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2022-11-16 12:58:52,007 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1106295874] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:58:52,007 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:58:52,007 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 19, 20] total 57 [2022-11-16 12:58:52,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933342070] [2022-11-16 12:58:52,007 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:58:52,008 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2022-11-16 12:58:52,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:58:52,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2022-11-16 12:58:52,010 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=2212, Unknown=32, NotChecked=918, Total=3306 [2022-11-16 12:58:52,010 INFO L87 Difference]: Start difference. First operand 72 states and 75 transitions. Second operand has 58 states, 57 states have (on average 1.8070175438596492) internal successors, (103), 58 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)