./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/pthread/queue_ok.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/pthread/queue_ok.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7cc273f13a619f37768d5108c297b75ab7c37145fe391daced9c134730721251 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 12:41:02,699 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 12:41:02,705 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 12:41:02,745 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 12:41:02,746 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 12:41:02,750 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 12:41:02,754 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 12:41:02,758 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 12:41:02,760 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 12:41:02,766 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 12:41:02,768 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 12:41:02,771 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 12:41:02,771 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 12:41:02,774 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 12:41:02,776 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 12:41:02,779 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 12:41:02,781 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 12:41:02,782 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 12:41:02,784 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 12:41:02,793 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 12:41:02,796 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 12:41:02,798 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 12:41:02,801 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 12:41:02,802 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 12:41:02,812 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 12:41:02,813 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 12:41:02,814 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 12:41:02,816 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 12:41:02,816 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 12:41:02,818 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 12:41:02,818 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 12:41:02,820 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 12:41:02,822 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 12:41:02,824 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 12:41:02,826 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 12:41:02,827 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 12:41:02,827 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 12:41:02,828 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 12:41:02,828 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 12:41:02,830 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 12:41:02,830 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 12:41:02,831 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-16 12:41:02,876 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 12:41:02,876 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 12:41:02,877 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 12:41:02,878 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 12:41:02,879 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 12:41:02,879 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 12:41:02,880 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 12:41:02,880 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 12:41:02,881 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 12:41:02,881 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 12:41:02,883 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 12:41:02,883 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 12:41:02,883 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 12:41:02,884 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 12:41:02,884 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 12:41:02,884 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-16 12:41:02,885 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-16 12:41:02,885 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-16 12:41:02,885 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 12:41:02,885 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 12:41:02,886 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 12:41:02,886 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 12:41:02,886 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 12:41:02,887 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 12:41:02,887 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 12:41:02,887 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:41:02,888 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 12:41:02,888 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 12:41:02,889 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 12:41:02,889 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 12:41:02,889 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7cc273f13a619f37768d5108c297b75ab7c37145fe391daced9c134730721251 [2022-11-16 12:41:03,251 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 12:41:03,287 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 12:41:03,291 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 12:41:03,294 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 12:41:03,295 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 12:41:03,296 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/pthread/queue_ok.i [2022-11-16 12:41:03,372 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/data/2f8ae2863/2c92985162e742caa027c72a4fa09bee/FLAGeb334174e [2022-11-16 12:41:04,076 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 12:41:04,077 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/sv-benchmarks/c/pthread/queue_ok.i [2022-11-16 12:41:04,101 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/data/2f8ae2863/2c92985162e742caa027c72a4fa09bee/FLAGeb334174e [2022-11-16 12:41:04,294 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/data/2f8ae2863/2c92985162e742caa027c72a4fa09bee [2022-11-16 12:41:04,298 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 12:41:04,301 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 12:41:04,304 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 12:41:04,304 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 12:41:04,308 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 12:41:04,309 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:41:04" (1/1) ... [2022-11-16 12:41:04,311 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ea9b00a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:04, skipping insertion in model container [2022-11-16 12:41:04,312 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:41:04" (1/1) ... [2022-11-16 12:41:04,320 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 12:41:04,391 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 12:41:05,037 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/sv-benchmarks/c/pthread/queue_ok.i[43266,43279] [2022-11-16 12:41:05,047 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/sv-benchmarks/c/pthread/queue_ok.i[43543,43556] [2022-11-16 12:41:05,056 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:41:05,073 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 12:41:05,170 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/sv-benchmarks/c/pthread/queue_ok.i[43266,43279] [2022-11-16 12:41:05,175 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/sv-benchmarks/c/pthread/queue_ok.i[43543,43556] [2022-11-16 12:41:05,182 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 12:41:05,268 INFO L208 MainTranslator]: Completed translation [2022-11-16 12:41:05,269 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05 WrapperNode [2022-11-16 12:41:05,269 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 12:41:05,271 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 12:41:05,271 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 12:41:05,271 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 12:41:05,280 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,311 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,374 INFO L138 Inliner]: procedures = 274, calls = 59, calls flagged for inlining = 7, calls inlined = 7, statements flattened = 204 [2022-11-16 12:41:05,375 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 12:41:05,376 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 12:41:05,376 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 12:41:05,376 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 12:41:05,386 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,387 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,404 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,412 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,421 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,438 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,440 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,451 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,455 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 12:41:05,456 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 12:41:05,456 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 12:41:05,456 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 12:41:05,458 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (1/1) ... [2022-11-16 12:41:05,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 12:41:05,483 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:41:05,503 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 12:41:05,530 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 12:41:05,564 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2022-11-16 12:41:05,564 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2022-11-16 12:41:05,564 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2022-11-16 12:41:05,564 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2022-11-16 12:41:05,565 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 12:41:05,565 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 12:41:05,565 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-16 12:41:05,565 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-16 12:41:05,566 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2022-11-16 12:41:05,566 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 12:41:05,566 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 12:41:05,567 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 12:41:05,567 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 12:41:05,569 WARN L209 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-11-16 12:41:05,773 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 12:41:05,776 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 12:41:06,595 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 12:41:06,607 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 12:41:06,607 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-16 12:41:06,626 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:41:06 BoogieIcfgContainer [2022-11-16 12:41:06,627 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 12:41:06,630 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 12:41:06,630 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 12:41:06,637 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 12:41:06,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:41:04" (1/3) ... [2022-11-16 12:41:06,639 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e62168f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:41:06, skipping insertion in model container [2022-11-16 12:41:06,639 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:41:05" (2/3) ... [2022-11-16 12:41:06,640 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e62168f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:41:06, skipping insertion in model container [2022-11-16 12:41:06,640 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:41:06" (3/3) ... [2022-11-16 12:41:06,641 INFO L112 eAbstractionObserver]: Analyzing ICFG queue_ok.i [2022-11-16 12:41:06,664 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 12:41:06,664 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 61 error locations. [2022-11-16 12:41:06,664 INFO L515 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-11-16 12:41:06,882 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-11-16 12:41:06,933 INFO L115 etLargeBlockEncoding]: Petri net LBE is using semantic-based independence relation. [2022-11-16 12:41:06,954 INFO L131 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 287 places, 293 transitions, 602 flow [2022-11-16 12:41:06,960 INFO L113 LiptonReduction]: Starting Lipton reduction on Petri net that has 287 places, 293 transitions, 602 flow [2022-11-16 12:41:06,962 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 287 places, 293 transitions, 602 flow [2022-11-16 12:41:07,116 INFO L130 PetriNetUnfolder]: 13/291 cut-off events. [2022-11-16 12:41:07,116 INFO L131 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-11-16 12:41:07,126 INFO L83 FinitePrefix]: Finished finitePrefix Result has 300 conditions, 291 events. 13/291 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 672 event pairs, 0 based on Foata normal form. 0/217 useless extension candidates. Maximal degree in co-relation 190. Up to 3 conditions per place. [2022-11-16 12:41:07,137 INFO L119 LiptonReduction]: Number of co-enabled transitions 18694 [2022-11-16 12:41:32,313 INFO L134 LiptonReduction]: Checked pairs total: 62284 [2022-11-16 12:41:32,313 INFO L136 LiptonReduction]: Total number of compositions: 466 [2022-11-16 12:41:32,322 INFO L113 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 109 places, 109 transitions, 234 flow [2022-11-16 12:41:32,585 INFO L135 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 5589 states, 4122 states have (on average 3.8469189713731198) internal successors, (15857), 5588 states have internal predecessors, (15857), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:32,610 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 12:41:32,620 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@22355ac0, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 12:41:32,620 INFO L358 AbstractCegarLoop]: Starting to check reachability of 104 error locations. [2022-11-16 12:41:32,644 INFO L276 IsEmpty]: Start isEmpty. Operand has 5589 states, 4122 states have (on average 3.8469189713731198) internal successors, (15857), 5588 states have internal predecessors, (15857), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:32,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2 [2022-11-16 12:41:32,652 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:32,653 INFO L195 NwaCegarLoop]: trace histogram [1] [2022-11-16 12:41:32,654 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:32,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:32,665 INFO L85 PathProgramCache]: Analyzing trace with hash 1316, now seen corresponding path program 1 times [2022-11-16 12:41:32,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:32,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409377841] [2022-11-16 12:41:32,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:32,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:32,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:32,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:32,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:32,837 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409377841] [2022-11-16 12:41:32,838 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409377841] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:32,838 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:32,838 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [0] imperfect sequences [] total 0 [2022-11-16 12:41:32,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332377578] [2022-11-16 12:41:32,841 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:32,846 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-16 12:41:32,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:32,879 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-16 12:41:32,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-16 12:41:32,898 INFO L87 Difference]: Start difference. First operand has 5589 states, 4122 states have (on average 3.8469189713731198) internal successors, (15857), 5588 states have internal predecessors, (15857), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 1 states have (on average 1.0) internal successors, (1), 1 states have internal predecessors, (1), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:33,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:33,087 INFO L93 Difference]: Finished difference Result 2668 states and 7688 transitions. [2022-11-16 12:41:33,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-16 12:41:33,090 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 1 states have (on average 1.0) internal successors, (1), 1 states have internal predecessors, (1), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1 [2022-11-16 12:41:33,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:33,124 INFO L225 Difference]: With dead ends: 2668 [2022-11-16 12:41:33,124 INFO L226 Difference]: Without dead ends: 2668 [2022-11-16 12:41:33,125 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 0 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-16 12:41:33,128 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:33,129 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 6 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:33,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2668 states. [2022-11-16 12:41:33,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2668 to 2668. [2022-11-16 12:41:33,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2340 states have (on average 3.2854700854700853) internal successors, (7688), 2667 states have internal predecessors, (7688), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:33,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 7688 transitions. [2022-11-16 12:41:33,293 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 7688 transitions. Word has length 1 [2022-11-16 12:41:33,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:33,294 INFO L495 AbstractCegarLoop]: Abstraction has 2668 states and 7688 transitions. [2022-11-16 12:41:33,294 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 1 states have (on average 1.0) internal successors, (1), 1 states have internal predecessors, (1), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:33,294 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 7688 transitions. [2022-11-16 12:41:33,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-16 12:41:33,294 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:33,295 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-16 12:41:33,295 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 12:41:33,295 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:33,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:33,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1292139, now seen corresponding path program 1 times [2022-11-16 12:41:33,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:33,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948644184] [2022-11-16 12:41:33,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:33,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:33,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:33,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:33,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:33,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948644184] [2022-11-16 12:41:33,680 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [948644184] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:33,680 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:33,691 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 12:41:33,692 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362798255] [2022-11-16 12:41:33,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:33,694 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:41:33,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:33,696 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:41:33,696 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:33,699 INFO L87 Difference]: Start difference. First operand 2668 states and 7688 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:33,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:33,860 INFO L93 Difference]: Finished difference Result 2618 states and 7583 transitions. [2022-11-16 12:41:33,861 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:33,861 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-16 12:41:33,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:33,881 INFO L225 Difference]: With dead ends: 2618 [2022-11-16 12:41:33,882 INFO L226 Difference]: Without dead ends: 2618 [2022-11-16 12:41:33,883 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:33,891 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 65 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:33,896 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 4 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:33,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2618 states. [2022-11-16 12:41:33,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2618 to 2618. [2022-11-16 12:41:33,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2618 states, 2310 states have (on average 3.2826839826839826) internal successors, (7583), 2617 states have internal predecessors, (7583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:33,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2618 states to 2618 states and 7583 transitions. [2022-11-16 12:41:33,999 INFO L78 Accepts]: Start accepts. Automaton has 2618 states and 7583 transitions. Word has length 3 [2022-11-16 12:41:34,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:34,000 INFO L495 AbstractCegarLoop]: Abstraction has 2618 states and 7583 transitions. [2022-11-16 12:41:34,001 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:34,001 INFO L276 IsEmpty]: Start isEmpty. Operand 2618 states and 7583 transitions. [2022-11-16 12:41:34,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-16 12:41:34,002 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:34,002 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-16 12:41:34,002 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-16 12:41:34,003 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:34,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:34,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1292140, now seen corresponding path program 1 times [2022-11-16 12:41:34,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:34,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729337551] [2022-11-16 12:41:34,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:34,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:34,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:34,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:34,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:34,108 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729337551] [2022-11-16 12:41:34,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1729337551] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:34,108 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:34,108 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 12:41:34,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [968620280] [2022-11-16 12:41:34,109 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:34,109 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:41:34,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:34,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:41:34,110 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:34,111 INFO L87 Difference]: Start difference. First operand 2618 states and 7583 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:34,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:34,259 INFO L93 Difference]: Finished difference Result 2568 states and 7478 transitions. [2022-11-16 12:41:34,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:34,260 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-16 12:41:34,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:34,277 INFO L225 Difference]: With dead ends: 2568 [2022-11-16 12:41:34,278 INFO L226 Difference]: Without dead ends: 2568 [2022-11-16 12:41:34,279 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:34,282 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 63 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:34,286 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 4 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:34,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2568 states. [2022-11-16 12:41:34,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2568 to 2568. [2022-11-16 12:41:34,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2568 states, 2280 states have (on average 3.2798245614035086) internal successors, (7478), 2567 states have internal predecessors, (7478), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:34,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2568 states to 2568 states and 7478 transitions. [2022-11-16 12:41:34,393 INFO L78 Accepts]: Start accepts. Automaton has 2568 states and 7478 transitions. Word has length 3 [2022-11-16 12:41:34,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:34,393 INFO L495 AbstractCegarLoop]: Abstraction has 2568 states and 7478 transitions. [2022-11-16 12:41:34,393 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:34,394 INFO L276 IsEmpty]: Start isEmpty. Operand 2568 states and 7478 transitions. [2022-11-16 12:41:34,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:41:34,394 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:34,394 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:41:34,395 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-16 12:41:34,398 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:34,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:34,399 INFO L85 PathProgramCache]: Analyzing trace with hash 1241774886, now seen corresponding path program 1 times [2022-11-16 12:41:34,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:34,400 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246636908] [2022-11-16 12:41:34,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:34,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:34,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:35,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:35,022 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:35,026 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246636908] [2022-11-16 12:41:35,026 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1246636908] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:35,026 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:35,026 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 12:41:35,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1009771623] [2022-11-16 12:41:35,027 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:35,027 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:41:35,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:35,028 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:41:35,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:35,029 INFO L87 Difference]: Start difference. First operand 2568 states and 7478 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:35,220 INFO L93 Difference]: Finished difference Result 2575 states and 7493 transitions. [2022-11-16 12:41:35,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:35,221 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:41:35,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:35,238 INFO L225 Difference]: With dead ends: 2575 [2022-11-16 12:41:35,239 INFO L226 Difference]: Without dead ends: 2575 [2022-11-16 12:41:35,239 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:35,240 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 7 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 121 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 121 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:35,240 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 9 Invalid, 122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 121 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:41:35,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2575 states. [2022-11-16 12:41:35,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2575 to 2569. [2022-11-16 12:41:35,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2569 states, 2281 states have (on average 3.280140289346778) internal successors, (7482), 2568 states have internal predecessors, (7482), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2569 states to 2569 states and 7482 transitions. [2022-11-16 12:41:35,331 INFO L78 Accepts]: Start accepts. Automaton has 2569 states and 7482 transitions. Word has length 5 [2022-11-16 12:41:35,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:35,332 INFO L495 AbstractCegarLoop]: Abstraction has 2569 states and 7482 transitions. [2022-11-16 12:41:35,332 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,332 INFO L276 IsEmpty]: Start isEmpty. Operand 2569 states and 7482 transitions. [2022-11-16 12:41:35,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:41:35,333 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:35,333 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:41:35,333 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-16 12:41:35,334 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting t1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:35,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:35,334 INFO L85 PathProgramCache]: Analyzing trace with hash 1241774839, now seen corresponding path program 1 times [2022-11-16 12:41:35,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:35,334 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356050097] [2022-11-16 12:41:35,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:35,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:35,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:35,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:35,454 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:35,454 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356050097] [2022-11-16 12:41:35,455 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356050097] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:35,455 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:35,455 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 12:41:35,456 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460760853] [2022-11-16 12:41:35,460 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:35,460 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:41:35,461 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:35,461 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:41:35,461 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:35,462 INFO L87 Difference]: Start difference. First operand 2569 states and 7482 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:35,601 INFO L93 Difference]: Finished difference Result 2283 states and 6671 transitions. [2022-11-16 12:41:35,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:35,603 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:41:35,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:35,620 INFO L225 Difference]: With dead ends: 2283 [2022-11-16 12:41:35,620 INFO L226 Difference]: Without dead ends: 2283 [2022-11-16 12:41:35,620 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:35,622 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 58 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:35,622 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [58 Valid, 4 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:35,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2283 states. [2022-11-16 12:41:35,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2283 to 2283. [2022-11-16 12:41:35,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2283 states, 2073 states have (on average 3.218041485769416) internal successors, (6671), 2282 states have internal predecessors, (6671), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2283 states to 2283 states and 6671 transitions. [2022-11-16 12:41:35,720 INFO L78 Accepts]: Start accepts. Automaton has 2283 states and 6671 transitions. Word has length 5 [2022-11-16 12:41:35,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:35,720 INFO L495 AbstractCegarLoop]: Abstraction has 2283 states and 6671 transitions. [2022-11-16 12:41:35,721 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,721 INFO L276 IsEmpty]: Start isEmpty. Operand 2283 states and 6671 transitions. [2022-11-16 12:41:35,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:41:35,722 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:35,722 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:41:35,722 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-16 12:41:35,723 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:35,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:35,723 INFO L85 PathProgramCache]: Analyzing trace with hash 1241770997, now seen corresponding path program 1 times [2022-11-16 12:41:35,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:35,724 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156836825] [2022-11-16 12:41:35,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:35,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:35,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:35,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:35,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:35,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156836825] [2022-11-16 12:41:35,823 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156836825] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:35,823 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:35,823 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:41:35,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335474363] [2022-11-16 12:41:35,824 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:35,824 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:41:35,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:35,824 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:41:35,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:35,825 INFO L87 Difference]: Start difference. First operand 2283 states and 6671 transitions. Second operand has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:35,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:35,973 INFO L93 Difference]: Finished difference Result 1737 states and 4918 transitions. [2022-11-16 12:41:35,973 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:35,974 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:41:35,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:35,995 INFO L225 Difference]: With dead ends: 1737 [2022-11-16 12:41:35,995 INFO L226 Difference]: Without dead ends: 1737 [2022-11-16 12:41:35,996 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:35,996 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 117 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:35,997 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [117 Valid, 4 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 59 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:36,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1737 states. [2022-11-16 12:41:36,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1737 to 1737. [2022-11-16 12:41:36,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1737 states, 1597 states have (on average 3.0795241077019413) internal successors, (4918), 1736 states have internal predecessors, (4918), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1737 states to 1737 states and 4918 transitions. [2022-11-16 12:41:36,052 INFO L78 Accepts]: Start accepts. Automaton has 1737 states and 4918 transitions. Word has length 5 [2022-11-16 12:41:36,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:36,052 INFO L495 AbstractCegarLoop]: Abstraction has 1737 states and 4918 transitions. [2022-11-16 12:41:36,053 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1737 states and 4918 transitions. [2022-11-16 12:41:36,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 12:41:36,053 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:36,054 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 12:41:36,054 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-16 12:41:36,054 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:36,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:36,055 INFO L85 PathProgramCache]: Analyzing trace with hash 1241770998, now seen corresponding path program 1 times [2022-11-16 12:41:36,055 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:36,055 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846948467] [2022-11-16 12:41:36,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:36,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:36,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:36,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:36,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:36,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846948467] [2022-11-16 12:41:36,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846948467] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:36,189 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:36,189 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:41:36,189 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287824530] [2022-11-16 12:41:36,189 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:36,190 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:41:36,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:36,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:41:36,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:36,191 INFO L87 Difference]: Start difference. First operand 1737 states and 4918 transitions. Second operand has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:36,300 INFO L93 Difference]: Finished difference Result 1191 states and 3165 transitions. [2022-11-16 12:41:36,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:36,301 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 12:41:36,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:36,306 INFO L225 Difference]: With dead ends: 1191 [2022-11-16 12:41:36,307 INFO L226 Difference]: Without dead ends: 1191 [2022-11-16 12:41:36,307 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:36,308 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 115 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:36,309 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 4 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:36,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1191 states. [2022-11-16 12:41:36,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1191 to 1191. [2022-11-16 12:41:36,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1191 states, 1121 states have (on average 2.823371989295272) internal successors, (3165), 1190 states have internal predecessors, (3165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1191 states to 1191 states and 3165 transitions. [2022-11-16 12:41:36,356 INFO L78 Accepts]: Start accepts. Automaton has 1191 states and 3165 transitions. Word has length 5 [2022-11-16 12:41:36,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:36,356 INFO L495 AbstractCegarLoop]: Abstraction has 1191 states and 3165 transitions. [2022-11-16 12:41:36,357 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,357 INFO L276 IsEmpty]: Start isEmpty. Operand 1191 states and 3165 transitions. [2022-11-16 12:41:36,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-16 12:41:36,359 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:36,359 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-16 12:41:36,359 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-16 12:41:36,359 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting t1Err5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:36,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:36,360 INFO L85 PathProgramCache]: Analyzing trace with hash -159682190, now seen corresponding path program 1 times [2022-11-16 12:41:36,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:36,360 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974640030] [2022-11-16 12:41:36,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:36,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:36,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:36,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:36,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:36,549 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974640030] [2022-11-16 12:41:36,549 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [974640030] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:36,549 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:36,550 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:41:36,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903911382] [2022-11-16 12:41:36,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:36,550 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:41:36,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:36,551 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:41:36,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:36,551 INFO L87 Difference]: Start difference. First operand 1191 states and 3165 transitions. Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:36,754 INFO L93 Difference]: Finished difference Result 1202 states and 3220 transitions. [2022-11-16 12:41:36,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:41:36,754 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-16 12:41:36,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:36,764 INFO L225 Difference]: With dead ends: 1202 [2022-11-16 12:41:36,771 INFO L226 Difference]: Without dead ends: 1202 [2022-11-16 12:41:36,771 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:41:36,772 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 99 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:36,772 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 12 Invalid, 130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:41:36,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1202 states. [2022-11-16 12:41:36,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1202 to 915. [2022-11-16 12:41:36,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 915 states, 887 states have (on average 2.763246899661781) internal successors, (2451), 914 states have internal predecessors, (2451), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 915 states to 915 states and 2451 transitions. [2022-11-16 12:41:36,804 INFO L78 Accepts]: Start accepts. Automaton has 915 states and 2451 transitions. Word has length 6 [2022-11-16 12:41:36,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:36,804 INFO L495 AbstractCegarLoop]: Abstraction has 915 states and 2451 transitions. [2022-11-16 12:41:36,805 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:36,805 INFO L276 IsEmpty]: Start isEmpty. Operand 915 states and 2451 transitions. [2022-11-16 12:41:36,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-16 12:41:36,807 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:36,807 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-16 12:41:36,808 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-11-16 12:41:36,808 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:36,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:36,809 INFO L85 PathProgramCache]: Analyzing trace with hash -159686387, now seen corresponding path program 1 times [2022-11-16 12:41:36,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:36,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144040247] [2022-11-16 12:41:36,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:36,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:36,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:37,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:37,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:37,433 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144040247] [2022-11-16 12:41:37,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2144040247] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:37,433 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:37,433 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:41:37,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1095080416] [2022-11-16 12:41:37,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:37,434 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:41:37,435 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:37,435 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:41:37,435 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:37,436 INFO L87 Difference]: Start difference. First operand 915 states and 2451 transitions. Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:37,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:37,590 INFO L93 Difference]: Finished difference Result 1190 states and 3172 transitions. [2022-11-16 12:41:37,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:41:37,591 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-16 12:41:37,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:37,595 INFO L225 Difference]: With dead ends: 1190 [2022-11-16 12:41:37,596 INFO L226 Difference]: Without dead ends: 1190 [2022-11-16 12:41:37,596 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:37,597 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 56 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:37,598 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 8 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:37,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1190 states. [2022-11-16 12:41:37,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1190 to 998. [2022-11-16 12:41:37,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 998 states, 970 states have (on average 2.8072164948453606) internal successors, (2723), 997 states have internal predecessors, (2723), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:37,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 998 states to 998 states and 2723 transitions. [2022-11-16 12:41:37,633 INFO L78 Accepts]: Start accepts. Automaton has 998 states and 2723 transitions. Word has length 6 [2022-11-16 12:41:37,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:37,634 INFO L495 AbstractCegarLoop]: Abstraction has 998 states and 2723 transitions. [2022-11-16 12:41:37,634 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:37,634 INFO L276 IsEmpty]: Start isEmpty. Operand 998 states and 2723 transitions. [2022-11-16 12:41:37,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 12:41:37,640 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:37,641 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:37,641 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-16 12:41:37,641 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting t2Err7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:37,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:37,642 INFO L85 PathProgramCache]: Analyzing trace with hash -1844995603, now seen corresponding path program 1 times [2022-11-16 12:41:37,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:37,642 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936553937] [2022-11-16 12:41:37,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:37,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:37,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:37,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:37,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:37,707 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936553937] [2022-11-16 12:41:37,707 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1936553937] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:37,707 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:37,707 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:41:37,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972217912] [2022-11-16 12:41:37,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:37,708 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:41:37,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:37,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:41:37,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:37,709 INFO L87 Difference]: Start difference. First operand 998 states and 2723 transitions. Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:37,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:37,811 INFO L93 Difference]: Finished difference Result 434 states and 998 transitions. [2022-11-16 12:41:37,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:37,812 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 12:41:37,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:37,813 INFO L225 Difference]: With dead ends: 434 [2022-11-16 12:41:37,813 INFO L226 Difference]: Without dead ends: 426 [2022-11-16 12:41:37,814 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:37,814 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 28 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:37,815 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 9 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:37,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2022-11-16 12:41:37,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 400. [2022-11-16 12:41:37,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 400 states, 387 states have (on average 2.41343669250646) internal successors, (934), 399 states have internal predecessors, (934), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:37,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 934 transitions. [2022-11-16 12:41:37,828 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 934 transitions. Word has length 9 [2022-11-16 12:41:37,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:37,828 INFO L495 AbstractCegarLoop]: Abstraction has 400 states and 934 transitions. [2022-11-16 12:41:37,828 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:37,829 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 934 transitions. [2022-11-16 12:41:37,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-16 12:41:37,829 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:37,830 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:37,830 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-11-16 12:41:37,830 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting t1Err16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:37,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:37,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1829498534, now seen corresponding path program 1 times [2022-11-16 12:41:37,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:37,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345612346] [2022-11-16 12:41:37,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:37,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:37,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:37,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:37,954 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:37,954 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345612346] [2022-11-16 12:41:37,954 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1345612346] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:37,955 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:37,955 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 12:41:37,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624530325] [2022-11-16 12:41:37,955 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:37,955 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:41:37,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:37,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:41:37,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:37,957 INFO L87 Difference]: Start difference. First operand 400 states and 934 transitions. Second operand has 3 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:38,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:38,043 INFO L93 Difference]: Finished difference Result 380 states and 890 transitions. [2022-11-16 12:41:38,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:41:38,043 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-16 12:41:38,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:38,045 INFO L225 Difference]: With dead ends: 380 [2022-11-16 12:41:38,045 INFO L226 Difference]: Without dead ends: 380 [2022-11-16 12:41:38,045 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:41:38,046 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 42 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:38,046 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 4 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:38,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2022-11-16 12:41:38,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 380. [2022-11-16 12:41:38,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 370 states have (on average 2.4054054054054053) internal successors, (890), 379 states have internal predecessors, (890), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:38,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 890 transitions. [2022-11-16 12:41:38,057 INFO L78 Accepts]: Start accepts. Automaton has 380 states and 890 transitions. Word has length 11 [2022-11-16 12:41:38,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:38,057 INFO L495 AbstractCegarLoop]: Abstraction has 380 states and 890 transitions. [2022-11-16 12:41:38,057 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:38,058 INFO L276 IsEmpty]: Start isEmpty. Operand 380 states and 890 transitions. [2022-11-16 12:41:38,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-16 12:41:38,058 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:38,058 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:38,059 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-16 12:41:38,059 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting t1Err17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:38,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:38,060 INFO L85 PathProgramCache]: Analyzing trace with hash -1829498533, now seen corresponding path program 1 times [2022-11-16 12:41:38,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:38,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589315016] [2022-11-16 12:41:38,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:38,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:38,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:38,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:38,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:38,313 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589315016] [2022-11-16 12:41:38,313 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589315016] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:38,313 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:38,313 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:41:38,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291342134] [2022-11-16 12:41:38,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:38,314 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 12:41:38,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:38,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 12:41:38,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:38,315 INFO L87 Difference]: Start difference. First operand 380 states and 890 transitions. Second operand has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:38,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:38,453 INFO L93 Difference]: Finished difference Result 476 states and 1106 transitions. [2022-11-16 12:41:38,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 12:41:38,453 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-16 12:41:38,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:38,455 INFO L225 Difference]: With dead ends: 476 [2022-11-16 12:41:38,455 INFO L226 Difference]: Without dead ends: 476 [2022-11-16 12:41:38,455 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 12:41:38,456 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 70 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 103 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 103 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:38,456 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 9 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 103 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 12:41:38,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states. [2022-11-16 12:41:38,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 476. [2022-11-16 12:41:38,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 476 states, 466 states have (on average 2.3733905579399144) internal successors, (1106), 475 states have internal predecessors, (1106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:38,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 1106 transitions. [2022-11-16 12:41:38,469 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 1106 transitions. Word has length 11 [2022-11-16 12:41:38,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:38,470 INFO L495 AbstractCegarLoop]: Abstraction has 476 states and 1106 transitions. [2022-11-16 12:41:38,470 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:38,470 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 1106 transitions. [2022-11-16 12:41:38,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-16 12:41:38,471 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:38,471 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:38,471 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-16 12:41:38,472 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:38,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:38,472 INFO L85 PathProgramCache]: Analyzing trace with hash -879876191, now seen corresponding path program 1 times [2022-11-16 12:41:38,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:38,473 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496674248] [2022-11-16 12:41:38,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:38,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:38,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:38,989 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:38,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:38,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496674248] [2022-11-16 12:41:38,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [496674248] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:41:38,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [815032756] [2022-11-16 12:41:38,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:38,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:41:38,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:41:38,998 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:41:39,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-16 12:41:39,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:39,178 INFO L263 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-16 12:41:39,194 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:41:39,472 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:41:39,549 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:39,551 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:41:39,575 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:39,576 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:41:39,743 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:41:39,744 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 30 [2022-11-16 12:41:39,759 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:41:39,759 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 49 [2022-11-16 12:41:39,764 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-11-16 12:41:39,802 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:41:39,802 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 27 [2022-11-16 12:41:39,806 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:41:39,810 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:39,811 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2022-11-16 12:41:39,951 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:39,952 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [815032756] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:41:39,952 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:41:39,952 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 12 [2022-11-16 12:41:39,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371014755] [2022-11-16 12:41:39,953 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:41:39,953 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 12:41:39,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:39,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 12:41:39,954 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=136, Unknown=2, NotChecked=0, Total=182 [2022-11-16 12:41:39,955 INFO L87 Difference]: Start difference. First operand 476 states and 1106 transitions. Second operand has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:40,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:40,703 INFO L93 Difference]: Finished difference Result 724 states and 1658 transitions. [2022-11-16 12:41:40,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:41:40,704 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-11-16 12:41:40,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:40,706 INFO L225 Difference]: With dead ends: 724 [2022-11-16 12:41:40,707 INFO L226 Difference]: Without dead ends: 724 [2022-11-16 12:41:40,707 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 14 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=97, Invalid=243, Unknown=2, NotChecked=0, Total=342 [2022-11-16 12:41:40,708 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 366 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 365 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 366 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 426 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 365 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 48 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:40,708 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [366 Valid, 45 Invalid, 426 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 365 Invalid, 0 Unknown, 48 Unchecked, 0.4s Time] [2022-11-16 12:41:40,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2022-11-16 12:41:40,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 512. [2022-11-16 12:41:40,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 512 states, 502 states have (on average 2.412350597609562) internal successors, (1211), 511 states have internal predecessors, (1211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:40,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 512 states to 512 states and 1211 transitions. [2022-11-16 12:41:40,724 INFO L78 Accepts]: Start accepts. Automaton has 512 states and 1211 transitions. Word has length 12 [2022-11-16 12:41:40,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:40,725 INFO L495 AbstractCegarLoop]: Abstraction has 512 states and 1211 transitions. [2022-11-16 12:41:40,725 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:40,725 INFO L276 IsEmpty]: Start isEmpty. Operand 512 states and 1211 transitions. [2022-11-16 12:41:40,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-16 12:41:40,726 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:40,726 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:40,738 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-11-16 12:41:40,932 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-11-16 12:41:40,932 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:40,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:40,932 INFO L85 PathProgramCache]: Analyzing trace with hash -1506378004, now seen corresponding path program 1 times [2022-11-16 12:41:40,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:40,933 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711452426] [2022-11-16 12:41:40,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:40,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:40,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:42,113 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:42,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:42,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711452426] [2022-11-16 12:41:42,113 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [711452426] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:41:42,114 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:41:42,114 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 12:41:42,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639241190] [2022-11-16 12:41:42,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:41:42,114 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 12:41:42,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:42,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 12:41:42,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-16 12:41:42,115 INFO L87 Difference]: Start difference. First operand 512 states and 1211 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:42,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:42,548 INFO L93 Difference]: Finished difference Result 510 states and 1206 transitions. [2022-11-16 12:41:42,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 12:41:42,548 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-11-16 12:41:42,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:42,550 INFO L225 Difference]: With dead ends: 510 [2022-11-16 12:41:42,550 INFO L226 Difference]: Without dead ends: 510 [2022-11-16 12:41:42,550 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-11-16 12:41:42,551 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 6 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 17 SdHoareTripleChecker+Invalid, 199 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:42,551 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 17 Invalid, 199 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-16 12:41:42,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 510 states. [2022-11-16 12:41:42,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 510 to 510. [2022-11-16 12:41:42,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 510 states, 500 states have (on average 2.412) internal successors, (1206), 509 states have internal predecessors, (1206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:42,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 510 states to 510 states and 1206 transitions. [2022-11-16 12:41:42,564 INFO L78 Accepts]: Start accepts. Automaton has 510 states and 1206 transitions. Word has length 13 [2022-11-16 12:41:42,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:42,565 INFO L495 AbstractCegarLoop]: Abstraction has 510 states and 1206 transitions. [2022-11-16 12:41:42,565 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:42,565 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 1206 transitions. [2022-11-16 12:41:42,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-16 12:41:42,566 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:42,566 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:42,566 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-11-16 12:41:42,567 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:42,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:42,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1549526904, now seen corresponding path program 1 times [2022-11-16 12:41:42,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:42,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231420756] [2022-11-16 12:41:42,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:42,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:42,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:43,629 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:43,629 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:43,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231420756] [2022-11-16 12:41:43,630 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1231420756] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:41:43,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [700539265] [2022-11-16 12:41:43,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:43,630 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:41:43,630 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:41:43,632 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:41:43,660 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-16 12:41:43,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:43,794 INFO L263 TraceCheckSpWp]: Trace formula consists of 274 conjuncts, 57 conjunts are in the unsatisfiable core [2022-11-16 12:41:43,799 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:41:43,836 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:43,840 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:43,842 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:43,856 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:41:43,856 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 35 [2022-11-16 12:41:43,862 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2022-11-16 12:41:43,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:43,876 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:41:43,883 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-16 12:41:44,072 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:41:44,085 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:41:44,086 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:41:44,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:44,212 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2022-11-16 12:41:44,368 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 22 [2022-11-16 12:41:44,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:44,449 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2022-11-16 12:41:44,499 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:44,500 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:41:44,598 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_511 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_511) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_511 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_511) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:41:44,733 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_507 Int) (v_ArrVal_511 (Array Int Int))) (<= (+ (* 4 (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_507) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_511) |c_~#queue~0.base|) .cse4)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_507 Int) (v_ArrVal_511 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_507) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_511) |c_~#queue~0.base|) .cse4)) |c_~#queue~0.offset|)))))) is different from false [2022-11-16 12:41:49,159 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:49,159 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [700539265] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:41:49,160 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:41:49,160 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 7] total 19 [2022-11-16 12:41:49,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953488856] [2022-11-16 12:41:49,163 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:41:49,164 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-16 12:41:49,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:41:49,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-16 12:41:49,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=253, Unknown=8, NotChecked=70, Total=420 [2022-11-16 12:41:49,165 INFO L87 Difference]: Start difference. First operand 510 states and 1206 transitions. Second operand has 21 states, 20 states have (on average 1.95) internal successors, (39), 20 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:49,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:41:49,769 INFO L93 Difference]: Finished difference Result 515 states and 1216 transitions. [2022-11-16 12:41:49,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 12:41:49,770 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.95) internal successors, (39), 20 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-11-16 12:41:49,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:41:49,772 INFO L225 Difference]: With dead ends: 515 [2022-11-16 12:41:49,772 INFO L226 Difference]: Without dead ends: 515 [2022-11-16 12:41:49,772 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=127, Invalid=335, Unknown=8, NotChecked=82, Total=552 [2022-11-16 12:41:49,773 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 4 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 183 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 564 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 183 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 380 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 12:41:49,773 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 79 Invalid, 564 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 183 Invalid, 0 Unknown, 380 Unchecked, 0.3s Time] [2022-11-16 12:41:49,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 515 states. [2022-11-16 12:41:49,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 515 to 510. [2022-11-16 12:41:49,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 510 states, 500 states have (on average 2.412) internal successors, (1206), 509 states have internal predecessors, (1206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:49,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 510 states to 510 states and 1206 transitions. [2022-11-16 12:41:49,790 INFO L78 Accepts]: Start accepts. Automaton has 510 states and 1206 transitions. Word has length 13 [2022-11-16 12:41:49,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:41:49,791 INFO L495 AbstractCegarLoop]: Abstraction has 510 states and 1206 transitions. [2022-11-16 12:41:49,791 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.95) internal successors, (39), 20 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:41:49,791 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 1206 transitions. [2022-11-16 12:41:49,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:41:49,792 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:41:49,792 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:41:49,802 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-16 12:41:49,998 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-16 12:41:49,999 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:41:49,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:41:49,999 INFO L85 PathProgramCache]: Analyzing trace with hash -177351661, now seen corresponding path program 1 times [2022-11-16 12:41:50,000 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:41:50,000 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328488116] [2022-11-16 12:41:50,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:50,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:41:50,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:51,046 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:51,046 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:41:51,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [328488116] [2022-11-16 12:41:51,046 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [328488116] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:41:51,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1617319352] [2022-11-16 12:41:51,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:41:51,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:41:51,047 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:41:51,048 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:41:51,055 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-16 12:41:51,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:41:51,219 INFO L263 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-16 12:41:51,222 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:41:51,248 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:51,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:51,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:51,277 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:41:51,278 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 35 [2022-11-16 12:41:51,284 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2022-11-16 12:41:51,307 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:41:51,307 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:41:51,566 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:51,568 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-16 12:41:51,667 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:41:51,682 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:41:51,683 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:41:51,814 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:51,815 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:41:51,991 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 15 [2022-11-16 12:41:52,081 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:41:52,082 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:41:52,131 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:41:52,131 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:41:52,186 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_604 (Array Int Int))) (<= 0 (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_604 (Array Int Int))) (<= (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:41:52,296 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_604 (Array Int Int))) (<= (+ |c_~#queue~0.offset| (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse1) 4) 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_604 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse1) 4)))))) is different from false [2022-11-16 12:41:52,331 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_604 (Array Int Int)) (v_ArrVal_600 Int)) (<= (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_600) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_604 (Array Int Int)) (v_ArrVal_600 Int)) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_600) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset|)))))) is different from false [2022-11-16 12:41:52,371 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse4 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_599 Int) (v_ArrVal_604 (Array Int Int)) (v_ArrVal_600 Int)) (<= (+ (* 4 (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse0 (store .cse3 .cse4 v_ArrVal_599))) (store (store .cse0 .cse1 v_ArrVal_600) .cse2 (+ (select .cse0 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse5)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_599 Int) (v_ArrVal_604 (Array Int Int)) (v_ArrVal_600 Int)) (<= 0 (+ (* 4 (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse6 (store .cse3 .cse4 v_ArrVal_599))) (store (store .cse6 .cse1 v_ArrVal_600) .cse2 (+ (select .cse6 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_604) |c_~#queue~0.base|) .cse5)) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:03,370 WARN L233 SmtUtils]: Spent 6.06s on a formula simplification that was a NOOP. DAG size: 48 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:42:03,492 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:03,492 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1617319352] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:03,492 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:03,493 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 22 [2022-11-16 12:42:03,493 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1435568443] [2022-11-16 12:42:03,493 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:03,494 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-16 12:42:03,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:03,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-16 12:42:03,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=298, Unknown=14, NotChecked=156, Total=552 [2022-11-16 12:42:03,495 INFO L87 Difference]: Start difference. First operand 510 states and 1206 transitions. Second operand has 24 states, 23 states have (on average 1.826086956521739) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:04,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:04,937 INFO L93 Difference]: Finished difference Result 539 states and 1259 transitions. [2022-11-16 12:42:04,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 12:42:04,938 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 1.826086956521739) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-11-16 12:42:04,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:42:04,941 INFO L225 Difference]: With dead ends: 539 [2022-11-16 12:42:04,941 INFO L226 Difference]: Without dead ends: 539 [2022-11-16 12:42:04,941 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 13 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 4 IntricatePredicates, 1 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 12.3s TimeCoverageRelationStatistics Valid=135, Invalid=466, Unknown=15, NotChecked=196, Total=812 [2022-11-16 12:42:04,942 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 100 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 373 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 1021 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 373 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 630 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:42:04,942 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [100 Valid, 85 Invalid, 1021 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 373 Invalid, 0 Unknown, 630 Unchecked, 0.7s Time] [2022-11-16 12:42:04,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2022-11-16 12:42:04,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 508. [2022-11-16 12:42:04,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 508 states, 498 states have (on average 2.4136546184738954) internal successors, (1202), 507 states have internal predecessors, (1202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:04,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 508 states and 1202 transitions. [2022-11-16 12:42:04,958 INFO L78 Accepts]: Start accepts. Automaton has 508 states and 1202 transitions. Word has length 14 [2022-11-16 12:42:04,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:42:04,959 INFO L495 AbstractCegarLoop]: Abstraction has 508 states and 1202 transitions. [2022-11-16 12:42:04,959 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 1.826086956521739) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:04,959 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 1202 transitions. [2022-11-16 12:42:04,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:42:04,960 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:42:04,960 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:04,967 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:05,167 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-11-16 12:42:05,168 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:42:05,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:05,168 INFO L85 PathProgramCache]: Analyzing trace with hash -790713627, now seen corresponding path program 2 times [2022-11-16 12:42:05,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:05,169 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809931268] [2022-11-16 12:42:05,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:05,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:05,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:06,295 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:06,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:06,295 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809931268] [2022-11-16 12:42:06,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1809931268] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:06,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2089148893] [2022-11-16 12:42:06,296 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:42:06,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:06,296 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:06,298 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:06,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-16 12:42:06,517 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:42:06,517 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:42:06,523 INFO L263 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 74 conjunts are in the unsatisfiable core [2022-11-16 12:42:06,528 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:06,551 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:06,556 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:06,561 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:06,566 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:06,567 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:06,628 INFO L321 Elim1Store]: treesize reduction 26, result has 42.2 percent of original size [2022-11-16 12:42:06,629 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 82 treesize of output 136 [2022-11-16 12:42:06,677 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:42:06,677 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:42:06,696 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-16 12:42:06,712 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:42:06,823 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:06,825 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:06,836 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 34 [2022-11-16 12:42:06,844 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-16 12:42:07,501 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:07,548 INFO L321 Elim1Store]: treesize reduction 17, result has 51.4 percent of original size [2022-11-16 12:42:07,549 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 153 treesize of output 159 [2022-11-16 12:42:07,612 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 12:42:07,947 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 37 [2022-11-16 12:42:08,284 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2022-11-16 12:42:08,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:08,403 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 76 [2022-11-16 12:42:08,530 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:08,531 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 76 [2022-11-16 12:42:08,627 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:08,627 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:08,687 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_706 (Array Int Int))) (<= 0 (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_706 (Array Int Int))) (<= (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:42:14,898 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:14,921 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:14,969 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int)) (v_ArrVal_701 Int)) (<= 0 (+ (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_701) .cse2 .cse3)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int)) (v_ArrVal_701 Int)) (<= (+ (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_701) .cse2 .cse3)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:42:17,341 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (select |c_#memory_int| |c_~#queue~0.base|)) (.cse2 (+ 84 |c_~#queue~0.offset|))) (let ((.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse4 (select .cse3 .cse2))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1335| Int)) (or (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int)) (v_ArrVal_701 Int) (v_ArrVal_700 Int)) (<= 0 (+ (* (select (select (store (store (store |c_#memory_int| |c_~#queue~0.base| (let ((.cse0 (store .cse3 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1335| 4) |c_~#queue~0.offset|) v_ArrVal_700))) (store (store .cse0 .cse1 v_ArrVal_701) .cse2 (+ (select .cse0 .cse2) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1335| .cse4)))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1335| Int)) (or (forall ((v_ArrVal_706 (Array Int Int)) (v_ArrVal_705 (Array Int Int)) (v_ArrVal_701 Int) (v_ArrVal_700 Int)) (<= (+ (* (select (select (store (store (store |c_#memory_int| |c_~#queue~0.base| (let ((.cse5 (store .cse3 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1335| 4) |c_~#queue~0.offset|) v_ArrVal_700))) (store (store .cse5 .cse1 v_ArrVal_701) .cse2 (+ (select .cse5 .cse2) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_705) |c_~#stored_elements~0.base| v_ArrVal_706) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1335| .cse4))))))) is different from false [2022-11-16 12:42:17,469 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-16 12:42:17,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2089148893] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:17,470 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:17,470 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 23 [2022-11-16 12:42:17,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878369021] [2022-11-16 12:42:17,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:17,471 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-16 12:42:17,471 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:17,472 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-16 12:42:17,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=286, Unknown=12, NotChecked=200, Total=600 [2022-11-16 12:42:17,473 INFO L87 Difference]: Start difference. First operand 508 states and 1202 transitions. Second operand has 25 states, 24 states have (on average 1.75) internal successors, (42), 24 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:18,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:18,357 INFO L93 Difference]: Finished difference Result 518 states and 1224 transitions. [2022-11-16 12:42:18,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 12:42:18,358 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 24 states have (on average 1.75) internal successors, (42), 24 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-11-16 12:42:18,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:42:18,360 INFO L225 Difference]: With dead ends: 518 [2022-11-16 12:42:18,360 INFO L226 Difference]: Without dead ends: 518 [2022-11-16 12:42:18,360 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 5 IntricatePredicates, 3 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=139, Invalid=419, Unknown=14, NotChecked=240, Total=812 [2022-11-16 12:42:18,361 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 0 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 324 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 291 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:42:18,361 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 61 Invalid, 324 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 33 Invalid, 0 Unknown, 291 Unchecked, 0.1s Time] [2022-11-16 12:42:18,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 518 states. [2022-11-16 12:42:18,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 518 to 507. [2022-11-16 12:42:18,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 507 states, 497 states have (on average 2.414486921529175) internal successors, (1200), 506 states have internal predecessors, (1200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:18,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 1200 transitions. [2022-11-16 12:42:18,387 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 1200 transitions. Word has length 14 [2022-11-16 12:42:18,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:42:18,391 INFO L495 AbstractCegarLoop]: Abstraction has 507 states and 1200 transitions. [2022-11-16 12:42:18,391 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 24 states have (on average 1.75) internal successors, (42), 24 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:18,392 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 1200 transitions. [2022-11-16 12:42:18,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-16 12:42:18,392 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:42:18,393 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:18,402 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:18,602 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-11-16 12:42:18,602 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:42:18,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:18,603 INFO L85 PathProgramCache]: Analyzing trace with hash -790695957, now seen corresponding path program 3 times [2022-11-16 12:42:18,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:18,603 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156500667] [2022-11-16 12:42:18,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:18,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:18,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:19,788 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:19,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:19,789 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156500667] [2022-11-16 12:42:19,789 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156500667] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:19,789 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [627539525] [2022-11-16 12:42:19,789 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 12:42:19,789 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:19,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:19,791 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:19,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-16 12:42:20,004 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 12:42:20,004 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:42:20,007 INFO L263 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 56 conjunts are in the unsatisfiable core [2022-11-16 12:42:20,010 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:20,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:20,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:20,052 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:42:20,052 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 35 [2022-11-16 12:42:20,057 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2022-11-16 12:42:20,088 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:42:20,089 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:42:20,378 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:20,395 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:42:20,396 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:42:20,550 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:20,552 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:42:20,722 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 15 [2022-11-16 12:42:20,803 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:42:20,859 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:20,860 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:42:20,935 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:20,935 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:20,996 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_799 (Array Int Int))) (<= (+ (* (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_799 (Array Int Int))) (<= 0 (+ (* (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:21,015 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int))) (<= (+ (* 4 (select (select (store (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse0)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse0)) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:21,037 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int))) (<= (+ (* 4 (select (select (store (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse1)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse1)) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:21,060 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse1) 4)) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse1) 4)))))) is different from false [2022-11-16 12:42:21,107 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int)) (v_ArrVal_794 Int)) (<= 0 (+ (* 4 (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_794) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse4)) |c_~#queue~0.offset|))) (forall ((v_ArrVal_799 (Array Int Int)) (v_ArrVal_798 (Array Int Int)) (v_ArrVal_794 Int)) (<= (+ (* 4 (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_794) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_798) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_799) |c_~#queue~0.base|) .cse4)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:42:36,134 WARN L233 SmtUtils]: Spent 6.33s on a formula simplification that was a NOOP. DAG size: 47 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:42:36,263 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:36,263 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [627539525] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:36,264 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:36,264 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 22 [2022-11-16 12:42:36,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [197372555] [2022-11-16 12:42:36,265 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:36,267 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-16 12:42:36,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:36,267 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-16 12:42:36,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=261, Unknown=7, NotChecked=190, Total=552 [2022-11-16 12:42:36,268 INFO L87 Difference]: Start difference. First operand 507 states and 1200 transitions. Second operand has 24 states, 23 states have (on average 1.826086956521739) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:37,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:37,739 INFO L93 Difference]: Finished difference Result 882 states and 2074 transitions. [2022-11-16 12:42:37,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 12:42:37,740 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 1.826086956521739) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-11-16 12:42:37,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:42:37,743 INFO L225 Difference]: With dead ends: 882 [2022-11-16 12:42:37,744 INFO L226 Difference]: Without dead ends: 882 [2022-11-16 12:42:37,744 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 12 SyntacticMatches, 7 SemanticMatches, 23 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 16.0s TimeCoverageRelationStatistics Valid=105, Invalid=288, Unknown=7, NotChecked=200, Total=600 [2022-11-16 12:42:37,745 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 119 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 559 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 119 SdHoareTripleChecker+Valid, 107 SdHoareTripleChecker+Invalid, 1185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 559 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 615 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-16 12:42:37,745 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [119 Valid, 107 Invalid, 1185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 559 Invalid, 0 Unknown, 615 Unchecked, 1.1s Time] [2022-11-16 12:42:37,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 882 states. [2022-11-16 12:42:37,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 882 to 526. [2022-11-16 12:42:37,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 526 states, 516 states have (on average 2.4205426356589146) internal successors, (1249), 525 states have internal predecessors, (1249), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:37,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 526 states to 526 states and 1249 transitions. [2022-11-16 12:42:37,764 INFO L78 Accepts]: Start accepts. Automaton has 526 states and 1249 transitions. Word has length 14 [2022-11-16 12:42:37,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:42:37,764 INFO L495 AbstractCegarLoop]: Abstraction has 526 states and 1249 transitions. [2022-11-16 12:42:37,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 1.826086956521739) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:37,765 INFO L276 IsEmpty]: Start isEmpty. Operand 526 states and 1249 transitions. [2022-11-16 12:42:37,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 12:42:37,765 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:42:37,766 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:37,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:37,972 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:37,973 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:42:37,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:37,973 INFO L85 PathProgramCache]: Analyzing trace with hash -1203206797, now seen corresponding path program 1 times [2022-11-16 12:42:37,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:37,973 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869467371] [2022-11-16 12:42:37,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:37,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:38,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:39,220 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:39,220 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:39,220 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869467371] [2022-11-16 12:42:39,220 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869467371] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:39,220 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [843527008] [2022-11-16 12:42:39,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:39,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:39,221 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:39,224 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:39,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-16 12:42:39,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:39,414 INFO L263 TraceCheckSpWp]: Trace formula consists of 296 conjuncts, 65 conjunts are in the unsatisfiable core [2022-11-16 12:42:39,418 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:39,441 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:39,446 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:39,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:39,478 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:42:39,478 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 36 [2022-11-16 12:42:39,512 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:42:39,512 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:42:39,828 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:39,829 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 37 [2022-11-16 12:42:39,968 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 36 [2022-11-16 12:42:40,162 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 57 [2022-11-16 12:42:40,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2022-11-16 12:42:40,580 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:40,581 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 38 [2022-11-16 12:42:40,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:40,650 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:40,711 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_896 (Array Int Int))) (<= 0 (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_896 (Array Int Int))) (<= (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:42:40,738 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_896 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_896 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:40,755 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_896 (Array Int Int))) (<= (+ (* 4 (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse1)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_896 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse1)) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:41,000 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse4 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_893 Int) (v_ArrVal_891 Int) (v_ArrVal_896 (Array Int Int))) (<= (+ (* 4 (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse0 (store .cse3 .cse4 v_ArrVal_891))) (store (store .cse0 .cse1 v_ArrVal_893) .cse2 (+ (select .cse0 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse5)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_893 Int) (v_ArrVal_891 Int) (v_ArrVal_896 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse6 (store .cse3 .cse4 v_ArrVal_891))) (store (store .cse6 .cse1 v_ArrVal_893) .cse2 (+ (select .cse6 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse5)) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:41,032 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse4 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_889 (Array Int Int)) (v_ArrVal_893 Int) (v_ArrVal_891 Int) (v_ArrVal_896 (Array Int Int))) (<= (+ (* 4 (select (select (store (let ((.cse0 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_889))) (store .cse0 |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse1 (store (select .cse0 |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) .cse4 v_ArrVal_891))) (store (store .cse1 .cse2 v_ArrVal_893) .cse3 (+ (select .cse1 .cse3) 1))))) |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse5)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_889 (Array Int Int)) (v_ArrVal_893 Int) (v_ArrVal_891 Int) (v_ArrVal_896 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store (let ((.cse6 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_889))) (store .cse6 |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse7 (store (select .cse6 |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) .cse4 v_ArrVal_891))) (store (store .cse7 .cse2 v_ArrVal_893) .cse3 (+ (select .cse7 .cse3) 1))))) |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse5)) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:42:43,072 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse4 (+ (* (select (select |c_#memory_int| |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_889 (Array Int Int)) (v_ArrVal_893 Int) (v_ArrVal_891 Int) (v_ArrVal_896 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (let ((.cse0 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_889))) (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store (select .cse0 |c_~#queue~0.base|) .cse4 v_ArrVal_891))) (store (store .cse1 .cse2 v_ArrVal_893) .cse3 (+ (select .cse1 .cse3) 1))))) |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse3) 4)))) (forall ((v_ArrVal_889 (Array Int Int)) (v_ArrVal_893 Int) (v_ArrVal_891 Int) (v_ArrVal_896 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (let ((.cse5 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_889))) (store .cse5 |c_~#queue~0.base| (let ((.cse6 (store (select .cse5 |c_~#queue~0.base|) .cse4 v_ArrVal_891))) (store (store .cse6 .cse2 v_ArrVal_893) .cse3 (+ (select .cse6 .cse3) 1))))) |c_~#stored_elements~0.base| v_ArrVal_896) |c_~#queue~0.base|) .cse3) 4)) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:42:43,127 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-16 12:42:43,127 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [843527008] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:43,127 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:43,127 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 22 [2022-11-16 12:42:43,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708294586] [2022-11-16 12:42:43,128 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:43,128 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-16 12:42:43,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:43,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-16 12:42:43,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=237, Unknown=7, NotChecked=222, Total=552 [2022-11-16 12:42:43,129 INFO L87 Difference]: Start difference. First operand 526 states and 1249 transitions. Second operand has 24 states, 23 states have (on average 1.9565217391304348) internal successors, (45), 23 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:44,230 INFO L93 Difference]: Finished difference Result 671 states and 1597 transitions. [2022-11-16 12:42:44,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-16 12:42:44,231 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 1.9565217391304348) internal successors, (45), 23 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 12:42:44,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:42:44,233 INFO L225 Difference]: With dead ends: 671 [2022-11-16 12:42:44,234 INFO L226 Difference]: Without dead ends: 671 [2022-11-16 12:42:44,234 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 14 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 6 IntricatePredicates, 3 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=124, Invalid=355, Unknown=7, NotChecked=270, Total=756 [2022-11-16 12:42:44,235 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 23 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 476 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:42:44,235 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 100 Invalid, 654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 177 Invalid, 0 Unknown, 476 Unchecked, 0.4s Time] [2022-11-16 12:42:44,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 671 states. [2022-11-16 12:42:44,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 671 to 589. [2022-11-16 12:42:44,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 589 states, 579 states have (on average 2.435233160621762) internal successors, (1410), 588 states have internal predecessors, (1410), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 589 states to 589 states and 1410 transitions. [2022-11-16 12:42:44,252 INFO L78 Accepts]: Start accepts. Automaton has 589 states and 1410 transitions. Word has length 15 [2022-11-16 12:42:44,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:42:44,253 INFO L495 AbstractCegarLoop]: Abstraction has 589 states and 1410 transitions. [2022-11-16 12:42:44,253 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 1.9565217391304348) internal successors, (45), 23 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:44,253 INFO L276 IsEmpty]: Start isEmpty. Operand 589 states and 1410 transitions. [2022-11-16 12:42:44,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 12:42:44,254 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:42:44,254 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:44,261 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:44,460 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:44,460 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:42:44,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:44,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1056354707, now seen corresponding path program 2 times [2022-11-16 12:42:44,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:44,461 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23980372] [2022-11-16 12:42:44,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:44,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:44,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:42:45,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:45,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:42:45,713 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23980372] [2022-11-16 12:42:45,713 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [23980372] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:42:45,713 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [248888269] [2022-11-16 12:42:45,713 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:42:45,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:45,714 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:42:45,715 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:42:45,734 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-16 12:42:45,955 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:42:45,955 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:42:45,959 INFO L263 TraceCheckSpWp]: Trace formula consists of 296 conjuncts, 71 conjunts are in the unsatisfiable core [2022-11-16 12:42:45,963 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:42:45,983 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:46,341 INFO L321 Elim1Store]: treesize reduction 136, result has 50.2 percent of original size [2022-11-16 12:42:46,341 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 4 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 5 new quantified variables, introduced 8 case distinctions, treesize of input 826 treesize of output 641 [2022-11-16 12:42:46,391 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-16 12:42:46,435 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:42:46,471 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:42:46,546 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:42:46,546 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-16 12:42:46,695 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:46,703 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:46,827 INFO L321 Elim1Store]: treesize reduction 37, result has 17.8 percent of original size [2022-11-16 12:42:46,827 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 3 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 7 case distinctions, treesize of input 188 treesize of output 306 [2022-11-16 12:42:46,904 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-16 12:42:46,950 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:46,960 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:46,990 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:47,015 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:47,017 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 167 treesize of output 279 [2022-11-16 12:42:47,070 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-16 12:42:47,279 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:47,282 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:47,290 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:47,293 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:42:47,294 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 98 [2022-11-16 12:42:47,307 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-16 12:42:47,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:47,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:47,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:47,407 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 130 treesize of output 81 [2022-11-16 12:42:47,417 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-16 12:42:47,526 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 32 [2022-11-16 12:42:47,532 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2022-11-16 12:42:47,844 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 42 [2022-11-16 12:42:48,158 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2022-11-16 12:42:48,314 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:42:48,318 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 45 [2022-11-16 12:42:48,721 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2022-11-16 12:42:48,912 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 82 [2022-11-16 12:42:49,052 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:49,052 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:42:49,341 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_998 (Array Int Int))) (<= 0 (+ (* 4 (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_998) |c_~#queue~0.base|) .cse1)) |c_~#queue~0.offset|))) (forall ((v_ArrVal_998 (Array Int Int))) (<= (+ (* 4 (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_998) |c_~#queue~0.base|) .cse1)) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:42:49,370 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_998 (Array Int Int)) (v_ArrVal_995 (Array Int Int))) (<= 0 (+ (* (select (select (store (let ((.cse0 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_995))) (store .cse0 |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse1 (select .cse0 |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (store .cse1 .cse2 (+ (select .cse1 .cse2) 1))))) |c_~#stored_elements~0.base| v_ArrVal_998) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_998 (Array Int Int)) (v_ArrVal_995 (Array Int Int))) (<= (+ (* (select (select (store (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_995))) (store .cse4 |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse5 (select .cse4 |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (store .cse5 .cse2 (+ (select .cse5 .cse2) 1))))) |c_~#stored_elements~0.base| v_ArrVal_998) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:42:58,665 WARN L233 SmtUtils]: Spent 6.37s on a formula simplification that was a NOOP. DAG size: 54 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:42:58,789 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:42:58,789 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [248888269] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:42:58,789 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:42:58,790 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 9] total 25 [2022-11-16 12:42:58,790 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034207079] [2022-11-16 12:42:58,790 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:42:58,792 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-16 12:42:58,793 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:42:58,793 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-16 12:42:58,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=461, Unknown=28, NotChecked=94, Total=702 [2022-11-16 12:42:58,794 INFO L87 Difference]: Start difference. First operand 589 states and 1410 transitions. Second operand has 27 states, 26 states have (on average 1.7307692307692308) internal successors, (45), 26 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:59,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:42:59,705 INFO L93 Difference]: Finished difference Result 668 states and 1598 transitions. [2022-11-16 12:42:59,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 12:42:59,705 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 1.7307692307692308) internal successors, (45), 26 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 12:42:59,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:42:59,708 INFO L225 Difference]: With dead ends: 668 [2022-11-16 12:42:59,708 INFO L226 Difference]: Without dead ends: 668 [2022-11-16 12:42:59,709 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 12 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 11.0s TimeCoverageRelationStatistics Valid=145, Invalid=537, Unknown=28, NotChecked=102, Total=812 [2022-11-16 12:42:59,710 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 7 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 212 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 642 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 429 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:42:59,710 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 88 Invalid, 642 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 212 Invalid, 0 Unknown, 429 Unchecked, 0.5s Time] [2022-11-16 12:42:59,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 668 states. [2022-11-16 12:42:59,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 668 to 601. [2022-11-16 12:42:59,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 601 states, 591 states have (on average 2.4416243654822334) internal successors, (1443), 600 states have internal predecessors, (1443), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:59,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 1443 transitions. [2022-11-16 12:42:59,728 INFO L78 Accepts]: Start accepts. Automaton has 601 states and 1443 transitions. Word has length 15 [2022-11-16 12:42:59,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:42:59,729 INFO L495 AbstractCegarLoop]: Abstraction has 601 states and 1443 transitions. [2022-11-16 12:42:59,729 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 26 states have (on average 1.7307692307692308) internal successors, (45), 26 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:42:59,729 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 1443 transitions. [2022-11-16 12:42:59,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 12:42:59,730 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:42:59,731 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:42:59,743 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-16 12:42:59,938 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:42:59,938 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:42:59,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:42:59,938 INFO L85 PathProgramCache]: Analyzing trace with hash 1056616967, now seen corresponding path program 3 times [2022-11-16 12:42:59,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:42:59,938 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294032050] [2022-11-16 12:42:59,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:42:59,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:42:59,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:01,031 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:01,031 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:43:01,031 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294032050] [2022-11-16 12:43:01,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1294032050] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:43:01,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1424724272] [2022-11-16 12:43:01,032 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 12:43:01,032 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:43:01,032 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:43:01,034 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:43:01,054 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-16 12:43:01,265 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 12:43:01,265 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:43:01,268 INFO L263 TraceCheckSpWp]: Trace formula consists of 296 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-16 12:43:01,272 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:43:01,282 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:01,347 INFO L321 Elim1Store]: treesize reduction 20, result has 63.0 percent of original size [2022-11-16 12:43:01,348 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 39 [2022-11-16 12:43:01,354 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 31 [2022-11-16 12:43:01,379 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:43:01,380 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:43:01,403 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-16 12:43:01,783 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:43:01,837 INFO L321 Elim1Store]: treesize reduction 40, result has 49.4 percent of original size [2022-11-16 12:43:01,838 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 66 [2022-11-16 12:43:02,107 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:02,108 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:43:02,108 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2022-11-16 12:43:02,190 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:02,191 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:43:02,437 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 15 [2022-11-16 12:43:02,527 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:43:02,617 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:02,618 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:43:19,277 WARN L233 SmtUtils]: Spent 6.08s on a formula simplification that was a NOOP. DAG size: 54 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:43:19,417 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:19,418 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1424724272] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:43:19,418 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:43:19,418 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 9] total 25 [2022-11-16 12:43:19,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483451579] [2022-11-16 12:43:19,418 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:43:19,419 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-16 12:43:19,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:43:19,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-16 12:43:19,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=535, Unknown=17, NotChecked=0, Total=702 [2022-11-16 12:43:19,420 INFO L87 Difference]: Start difference. First operand 601 states and 1443 transitions. Second operand has 27 states, 26 states have (on average 1.7307692307692308) internal successors, (45), 26 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:21,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:43:21,830 INFO L93 Difference]: Finished difference Result 777 states and 1880 transitions. [2022-11-16 12:43:21,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-16 12:43:21,831 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 1.7307692307692308) internal successors, (45), 26 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 12:43:21,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:43:21,834 INFO L225 Difference]: With dead ends: 777 [2022-11-16 12:43:21,834 INFO L226 Difference]: Without dead ends: 777 [2022-11-16 12:43:21,835 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 18 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 323 ImplicationChecksByTransitivity, 18.5s TimeCoverageRelationStatistics Valid=296, Invalid=869, Unknown=25, NotChecked=0, Total=1190 [2022-11-16 12:43:21,835 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 258 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 403 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 258 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 1089 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 403 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 656 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-16 12:43:21,836 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [258 Valid, 105 Invalid, 1089 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 403 Invalid, 0 Unknown, 656 Unchecked, 1.0s Time] [2022-11-16 12:43:21,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 777 states. [2022-11-16 12:43:21,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 777 to 489. [2022-11-16 12:43:21,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 489 states, 479 states have (on average 2.396659707724426) internal successors, (1148), 488 states have internal predecessors, (1148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:21,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 489 states and 1148 transitions. [2022-11-16 12:43:21,854 INFO L78 Accepts]: Start accepts. Automaton has 489 states and 1148 transitions. Word has length 15 [2022-11-16 12:43:21,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:43:21,854 INFO L495 AbstractCegarLoop]: Abstraction has 489 states and 1148 transitions. [2022-11-16 12:43:21,855 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 26 states have (on average 1.7307692307692308) internal successors, (45), 26 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:21,855 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 1148 transitions. [2022-11-16 12:43:21,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 12:43:21,856 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:43:21,856 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:43:21,867 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-16 12:43:22,063 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:43:22,064 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:43:22,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:43:22,064 INFO L85 PathProgramCache]: Analyzing trace with hash -1228863905, now seen corresponding path program 1 times [2022-11-16 12:43:22,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:43:22,065 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343548979] [2022-11-16 12:43:22,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:43:22,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:43:22,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:22,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:22,190 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:43:22,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343548979] [2022-11-16 12:43:22,190 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343548979] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 12:43:22,190 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 12:43:22,191 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 12:43:22,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926018461] [2022-11-16 12:43:22,191 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 12:43:22,191 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 12:43:22,192 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:43:22,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 12:43:22,192 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:43:22,193 INFO L87 Difference]: Start difference. First operand 489 states and 1148 transitions. Second operand has 3 states, 3 states have (on average 5.0) internal successors, (15), 2 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:22,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:43:22,431 INFO L93 Difference]: Finished difference Result 501 states and 1156 transitions. [2022-11-16 12:43:22,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 12:43:22,432 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.0) internal successors, (15), 2 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 12:43:22,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:43:22,434 INFO L225 Difference]: With dead ends: 501 [2022-11-16 12:43:22,434 INFO L226 Difference]: Without dead ends: 501 [2022-11-16 12:43:22,434 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 12:43:22,435 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 27 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 12:43:22,435 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 11 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 12:43:22,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 501 states. [2022-11-16 12:43:22,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 501 to 475. [2022-11-16 12:43:22,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 475 states, 465 states have (on average 2.389247311827957) internal successors, (1111), 474 states have internal predecessors, (1111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:22,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 1111 transitions. [2022-11-16 12:43:22,449 INFO L78 Accepts]: Start accepts. Automaton has 475 states and 1111 transitions. Word has length 15 [2022-11-16 12:43:22,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:43:22,449 INFO L495 AbstractCegarLoop]: Abstraction has 475 states and 1111 transitions. [2022-11-16 12:43:22,449 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.0) internal successors, (15), 2 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:22,449 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 1111 transitions. [2022-11-16 12:43:22,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-16 12:43:22,450 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:43:22,451 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:43:22,451 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-11-16 12:43:22,451 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting t1Err17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:43:22,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:43:22,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1989337795, now seen corresponding path program 1 times [2022-11-16 12:43:22,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:43:22,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74321564] [2022-11-16 12:43:22,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:43:22,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:43:22,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:24,146 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:24,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:43:24,147 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74321564] [2022-11-16 12:43:24,147 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [74321564] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:43:24,147 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1109454676] [2022-11-16 12:43:24,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:43:24,147 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:43:24,148 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:43:24,149 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:43:24,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-16 12:43:24,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:24,380 INFO L263 TraceCheckSpWp]: Trace formula consists of 318 conjuncts, 67 conjunts are in the unsatisfiable core [2022-11-16 12:43:24,385 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:43:24,418 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:24,425 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:24,951 INFO L321 Elim1Store]: treesize reduction 136, result has 50.2 percent of original size [2022-11-16 12:43:24,951 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 4 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 5 new quantified variables, introduced 8 case distinctions, treesize of input 3334 treesize of output 1265 [2022-11-16 12:43:25,011 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-16 12:43:25,076 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:43:25,129 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:43:26,502 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:26,509 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:26,518 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 19 [2022-11-16 12:43:26,524 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2022-11-16 12:43:26,531 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 30 [2022-11-16 12:43:26,537 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2022-11-16 12:43:26,828 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:26,834 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:26,854 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 38 [2022-11-16 12:43:26,862 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 51 [2022-11-16 12:43:26,873 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2022-11-16 12:43:26,879 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:43:26,881 WARN L207 Elim1Store]: Array PQE input equivalent to false [2022-11-16 12:43:27,353 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 42 [2022-11-16 12:43:27,536 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2022-11-16 12:43:27,947 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2022-11-16 12:43:28,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:28,092 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 82 [2022-11-16 12:43:28,374 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 91 [2022-11-16 12:43:28,707 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 89 [2022-11-16 12:43:30,947 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:30,947 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:43:31,160 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1235 (Array Int Int)) (v_ArrVal_1237 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| Int)) (let ((.cse0 (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1235) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| (select .cse0 .cse1))) (not (= (select (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| 4) |c_~#queue~0.offset|) v_ArrVal_1237) .cse1) 20))))) is different from false [2022-11-16 12:43:31,188 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1235 (Array Int Int)) (v_ArrVal_1237 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1))) |c_~#stored_elements~0.base| v_ArrVal_1235) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (= (select (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| 4) |c_~#queue~0.offset|) v_ArrVal_1237) .cse1) 20)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| (select .cse0 .cse1)))))) is different from false [2022-11-16 12:43:31,359 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1231 Int) (v_ArrVal_1235 (Array Int Int)) (v_ArrVal_1237 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_1231) .cse3 (+ (select .cse2 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1235) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| (select .cse0 .cse1))) (not (= (select (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| 4) |c_~#queue~0.offset|) v_ArrVal_1237) .cse1) 20))))) is different from false [2022-11-16 12:43:31,415 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1231 Int) (v_ArrVal_1235 (Array Int Int)) (v_ArrVal_1237 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| Int) (v_ArrVal_1229 Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_1229)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_1231) .cse3 (+ (select .cse2 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1235) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| (select .cse0 .cse1))) (not (= (select (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1355| 4) |c_~#queue~0.offset|) v_ArrVal_1237) .cse1) 20))))) is different from false [2022-11-16 12:43:31,679 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-11-16 12:43:31,679 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1109454676] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:43:31,679 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:43:31,679 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 10] total 28 [2022-11-16 12:43:31,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931508411] [2022-11-16 12:43:31,680 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:43:31,680 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-11-16 12:43:31,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:43:31,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-16 12:43:31,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=452, Unknown=11, NotChecked=196, Total=812 [2022-11-16 12:43:31,681 INFO L87 Difference]: Start difference. First operand 475 states and 1111 transitions. Second operand has 29 states, 29 states have (on average 1.8275862068965518) internal successors, (53), 28 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:32,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:43:32,739 INFO L93 Difference]: Finished difference Result 491 states and 1134 transitions. [2022-11-16 12:43:32,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-16 12:43:32,739 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.8275862068965518) internal successors, (53), 28 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-16 12:43:32,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:43:32,741 INFO L225 Difference]: With dead ends: 491 [2022-11-16 12:43:32,742 INFO L226 Difference]: Without dead ends: 491 [2022-11-16 12:43:32,742 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 4 IntricatePredicates, 3 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=218, Invalid=657, Unknown=11, NotChecked=236, Total=1122 [2022-11-16 12:43:32,743 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 7 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 492 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 334 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:43:32,743 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 59 Invalid, 492 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 157 Invalid, 0 Unknown, 334 Unchecked, 0.4s Time] [2022-11-16 12:43:32,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 491 states. [2022-11-16 12:43:32,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 491 to 479. [2022-11-16 12:43:32,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 479 states, 469 states have (on average 2.3859275053304905) internal successors, (1119), 478 states have internal predecessors, (1119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:32,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 479 states and 1119 transitions. [2022-11-16 12:43:32,757 INFO L78 Accepts]: Start accepts. Automaton has 479 states and 1119 transitions. Word has length 19 [2022-11-16 12:43:32,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:43:32,757 INFO L495 AbstractCegarLoop]: Abstraction has 479 states and 1119 transitions. [2022-11-16 12:43:32,757 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 1.8275862068965518) internal successors, (53), 28 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:32,758 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 1119 transitions. [2022-11-16 12:43:32,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-11-16 12:43:32,759 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:43:32,759 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:43:32,765 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-16 12:43:32,965 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-11-16 12:43:32,965 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting t1Err17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:43:32,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:43:32,966 INFO L85 PathProgramCache]: Analyzing trace with hash -2034187128, now seen corresponding path program 1 times [2022-11-16 12:43:32,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:43:32,966 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134916986] [2022-11-16 12:43:32,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:43:32,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:43:32,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:33,279 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:33,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:43:33,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134916986] [2022-11-16 12:43:33,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134916986] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:43:33,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [610886081] [2022-11-16 12:43:33,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:43:33,280 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:43:33,281 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:43:33,282 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:43:33,314 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-16 12:43:33,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:33,511 INFO L263 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-16 12:43:33,513 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:43:33,533 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:33,536 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:33,538 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:33,541 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2022-11-16 12:43:33,962 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:33,962 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:43:34,270 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:34,270 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [610886081] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:43:34,270 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:43:34,270 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 9 [2022-11-16 12:43:34,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724777791] [2022-11-16 12:43:34,271 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:43:34,271 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-16 12:43:34,271 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:43:34,272 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-16 12:43:34,272 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2022-11-16 12:43:34,272 INFO L87 Difference]: Start difference. First operand 479 states and 1119 transitions. Second operand has 11 states, 10 states have (on average 6.0) internal successors, (60), 10 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:35,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:43:35,444 INFO L93 Difference]: Finished difference Result 879 states and 2055 transitions. [2022-11-16 12:43:35,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 12:43:35,444 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 6.0) internal successors, (60), 10 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-11-16 12:43:35,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:43:35,447 INFO L225 Difference]: With dead ends: 879 [2022-11-16 12:43:35,447 INFO L226 Difference]: Without dead ends: 879 [2022-11-16 12:43:35,448 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=82, Invalid=158, Unknown=0, NotChecked=0, Total=240 [2022-11-16 12:43:35,448 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 241 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 384 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 241 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 390 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 384 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-16 12:43:35,449 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [241 Valid, 35 Invalid, 390 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 384 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-16 12:43:35,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 879 states. [2022-11-16 12:43:35,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 879 to 855. [2022-11-16 12:43:35,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 855 states, 845 states have (on average 2.396449704142012) internal successors, (2025), 854 states have internal predecessors, (2025), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:35,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 855 states to 855 states and 2025 transitions. [2022-11-16 12:43:35,475 INFO L78 Accepts]: Start accepts. Automaton has 855 states and 2025 transitions. Word has length 20 [2022-11-16 12:43:35,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:43:35,475 INFO L495 AbstractCegarLoop]: Abstraction has 855 states and 2025 transitions. [2022-11-16 12:43:35,475 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 6.0) internal successors, (60), 10 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:43:35,476 INFO L276 IsEmpty]: Start isEmpty. Operand 855 states and 2025 transitions. [2022-11-16 12:43:35,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-16 12:43:35,477 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:43:35,477 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2022-11-16 12:43:35,484 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-16 12:43:35,683 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-11-16 12:43:35,683 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:43:35,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:43:35,684 INFO L85 PathProgramCache]: Analyzing trace with hash -536235030, now seen corresponding path program 2 times [2022-11-16 12:43:35,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:43:35,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192388989] [2022-11-16 12:43:35,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:43:35,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:43:35,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:43:37,579 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:37,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:43:37,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [192388989] [2022-11-16 12:43:37,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [192388989] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:43:37,580 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1483591359] [2022-11-16 12:43:37,580 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:43:37,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:43:37,580 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:43:37,581 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:43:37,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-16 12:43:37,822 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:43:37,822 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:43:37,826 INFO L263 TraceCheckSpWp]: Trace formula consists of 358 conjuncts, 89 conjunts are in the unsatisfiable core [2022-11-16 12:43:37,831 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:43:37,843 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:37,849 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:43:37,880 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:43:37,880 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 36 [2022-11-16 12:43:37,910 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:43:37,910 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:43:38,265 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 47 [2022-11-16 12:43:38,436 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 57 [2022-11-16 12:43:38,885 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2022-11-16 12:43:39,008 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 38 [2022-11-16 12:43:39,184 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 47 [2022-11-16 12:43:39,440 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 45 [2022-11-16 12:43:39,809 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2022-11-16 12:43:39,976 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 87 [2022-11-16 12:43:40,108 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:43:40,108 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:43:40,170 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse0) 4) 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse0) 4)))))) is different from false [2022-11-16 12:43:40,189 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:43:40,207 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:43:40,421 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse4 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse0 (store .cse3 .cse4 v_ArrVal_1437))) (store (store .cse0 .cse1 v_ArrVal_1440) .cse2 (+ (select .cse0 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse5) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse6 (store .cse3 .cse4 v_ArrVal_1437))) (store (store .cse6 .cse1 v_ArrVal_1440) .cse2 (+ (select .cse6 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse5) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:43:57,366 WARN L233 SmtUtils]: Spent 10.09s on a formula simplification that was a NOOP. DAG size: 44 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:43:57,411 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse0 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse4 (select .cse0 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ (* (select (select (store (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store .cse4 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse1 .cse2 v_ArrVal_1440) .cse3 (+ (select .cse1 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse4 .cse3))))))) (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse5 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse7 (select .cse5 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ (* (select (select (store (store .cse5 |c_~#queue~0.base| (let ((.cse6 (store .cse7 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse6 .cse2 v_ArrVal_1440) .cse3 (+ (select .cse6 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse7 .cse3))))))))) is different from false [2022-11-16 12:43:57,483 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse5 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1))))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse2 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse0 (select .cse2 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse0 .cse1))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse0 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse3 .cse4 v_ArrVal_1440) .cse1 (+ (select .cse3 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4)))))))) (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse7 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse6 .cse1))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ |c_~#queue~0.offset| (* (select (select (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse6 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse8 .cse4 v_ArrVal_1440) .cse1 (+ (select .cse8 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) 4) (select |c_#length| |c_~#queue~0.base|))))))))) is different from false [2022-11-16 12:44:08,810 WARN L233 SmtUtils]: Spent 6.17s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:44:09,032 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-16 12:44:09,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1483591359] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:09,032 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:09,032 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 15] total 35 [2022-11-16 12:44:09,033 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55266152] [2022-11-16 12:44:09,033 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:09,033 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-16 12:44:09,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:09,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-16 12:44:09,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=730, Unknown=21, NotChecked=378, Total=1332 [2022-11-16 12:44:09,035 INFO L87 Difference]: Start difference. First operand 855 states and 2025 transitions. Second operand has 37 states, 36 states have (on average 1.75) internal successors, (63), 36 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:13,237 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse7 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse8 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse10 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse0 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse14 (select |c_#length| |c_~#queue~0.base|))) (and (or (not (<= (+ 92 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (select |c_#length| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (not (<= 0 .cse0)) (let ((.cse5 (+ 88 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1431 Int)) (let ((.cse6 (store .cse10 .cse0 v_ArrVal_1431))) (let ((.cse9 (select .cse6 .cse8))) (or (forall ((v_ArrVal_1436 (Array Int Int)) (v_ArrVal_1433 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse3 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse6 .cse7 v_ArrVal_1433) .cse8 (+ .cse9 1))) |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse1 (select .cse3 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse1 .cse2))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ (* (select (select (store (store .cse3 |c_~#queue~0.base| (let ((.cse4 (store .cse1 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse4 .cse5 v_ArrVal_1440) .cse2 (+ (select .cse4 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset|))))))) (= 20 .cse9))))) (forall ((v_ArrVal_1431 Int)) (let ((.cse15 (store .cse10 .cse0 v_ArrVal_1431))) (let ((.cse16 (select .cse15 .cse8))) (or (forall ((v_ArrVal_1436 (Array Int Int)) (v_ArrVal_1433 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse12 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse15 .cse7 v_ArrVal_1433) .cse8 (+ .cse16 1))) |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse11 (select .cse12 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse11 .cse2))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ (* (select (select (store (store .cse12 |c_~#queue~0.base| (let ((.cse13 (store .cse11 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse13 .cse5 v_ArrVal_1440) .cse2 (+ (select .cse13 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset| 4) .cse14)))))) (= 20 .cse16)))))))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse17 (store .cse10 .cse0 v_ArrVal_1437))) (store (store .cse17 .cse7 v_ArrVal_1440) .cse8 (+ (select .cse17 .cse8) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse18 (store .cse10 .cse0 v_ArrVal_1437))) (store (store .cse18 .cse7 v_ArrVal_1440) .cse8 (+ (select .cse18 .cse8) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset| 4) .cse14)))) is different from false [2022-11-16 12:44:13,618 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse6 (select .cse0 .cse2))) (let ((.cse5 (select |c_#length| |c_~#queue~0.base|)) (.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ .cse6 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int))) (<= (+ |c_~#queue~0.offset| (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1440) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse4) 4) 4) .cse5)) (or (= .cse6 20) (let ((.cse10 (+ 88 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (v_ArrVal_1433 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse8 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1433) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse7 (select .cse8 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse7 .cse4))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse8 |c_~#queue~0.base| (let ((.cse9 (store .cse7 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse9 .cse10 v_ArrVal_1440) .cse4 (+ (select .cse9 .cse4) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse4) 4)))))))) (forall ((v_ArrVal_1436 (Array Int Int)) (v_ArrVal_1433 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse11 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1433) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse13 (select .cse11 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ |c_~#queue~0.offset| (* (select (select (store (store .cse11 |c_~#queue~0.base| (let ((.cse12 (store .cse13 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse12 .cse10 v_ArrVal_1440) .cse4 (+ (select .cse12 .cse4) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse4) 4) 4) .cse5)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse13 .cse4)))))))))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1440) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse4) 4)))))))) is different from false [2022-11-16 12:44:13,639 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse11 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse12 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse10 (select .cse11 .cse12))) (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse11 .cse12 (+ .cse10 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse9 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (or (let ((.cse4 (+ 88 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse2 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse5 (select .cse2 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse5 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse3 .cse4 v_ArrVal_1440) .cse1 (+ 1 (select .cse3 .cse1))))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4)))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse5 .cse1))))))) (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse6 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse8 (select .cse6 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store .cse8 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse7 .cse4 v_ArrVal_1440) .cse1 (+ 1 (select .cse7 .cse1))))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4)) .cse9)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse8 .cse1))))))))) (= .cse10 20)) (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse9)))))) is different from false [2022-11-16 12:44:13,659 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse5 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse10 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse11 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse10 .cse11 (+ (select .cse10 .cse11) 1))))) (.cse3 (+ 84 |c_~#queue~0.offset|)) (.cse9 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse0 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse4 (select .cse0 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store .cse4 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse1 .cse2 v_ArrVal_1440) .cse3 (+ 1 (select .cse1 .cse3))))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4)))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse4 .cse3))))))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse6 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse8 (select .cse6 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store .cse8 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse7 .cse2 v_ArrVal_1440) .cse3 (+ 1 (select .cse7 .cse3))))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4)) .cse9)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse8 .cse3))))))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ (* (select (select (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset| 4) .cse9)))) is different from false [2022-11-16 12:44:13,677 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse9 (select |c_#length| |c_~#queue~0.base|)) (.cse5 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse2 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse0 (select .cse2 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse0 .cse1))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse0 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse3 .cse4 v_ArrVal_1440) .cse1 (+ (select .cse3 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4)))))))) (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse7 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse6 .cse1))) (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ |c_~#queue~0.offset| (* (select (select (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse6 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse8 .cse4 v_ArrVal_1440) .cse1 (+ (select .cse8 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) 4) .cse9)))))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ (* (select (select (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse9)) (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:44:13,696 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse8 (select |c_#length| |c_~#queue~0.base|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse0 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse4 (select .cse0 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= 0 (+ (* (select (select (store (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store .cse4 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse1 .cse2 v_ArrVal_1440) .cse3 (+ (select .cse1 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse4 .cse3))))))) (forall ((v_ArrVal_1436 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| Int)) (let ((.cse5 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1436))) (let ((.cse7 (select .cse5 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1440 Int) (v_ArrVal_1443 (Array Int Int)) (v_ArrVal_1437 Int)) (<= (+ (* (select (select (store (store .cse5 |c_~#queue~0.base| (let ((.cse6 (store .cse7 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| 4)) v_ArrVal_1437))) (store (store .cse6 .cse2 v_ArrVal_1440) .cse3 (+ (select .cse6 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset| 4) .cse8)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1366| (select .cse7 .cse3))))))) (forall ((v_ArrVal_1443 (Array Int Int))) (<= (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4) 4) .cse8)) (forall ((v_ArrVal_1443 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1443) |c_~#queue~0.base|) .cse3) 4)))))) is different from false [2022-11-16 12:44:22,321 WARN L233 SmtUtils]: Spent 6.14s on a formula simplification. DAG size of input: 49 DAG size of output: 47 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:44:22,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:44:22,548 INFO L93 Difference]: Finished difference Result 874 states and 2064 transitions. [2022-11-16 12:44:22,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-16 12:44:22,549 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.75) internal successors, (63), 36 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-16 12:44:22,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:44:22,552 INFO L225 Difference]: With dead ends: 874 [2022-11-16 12:44:22,552 INFO L226 Difference]: Without dead ends: 874 [2022-11-16 12:44:22,553 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 18 SyntacticMatches, 4 SemanticMatches, 51 ConstructedPredicates, 12 IntricatePredicates, 6 DeprecatedPredicates, 540 ImplicationChecksByTransitivity, 43.0s TimeCoverageRelationStatistics Valid=386, Invalid=1263, Unknown=39, NotChecked=1068, Total=2756 [2022-11-16 12:44:22,554 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 12 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 781 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 632 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:44:22,554 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 109 Invalid, 781 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 148 Invalid, 0 Unknown, 632 Unchecked, 0.4s Time] [2022-11-16 12:44:22,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 874 states. [2022-11-16 12:44:22,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 874 to 870. [2022-11-16 12:44:22,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 870 states, 860 states have (on average 2.391860465116279) internal successors, (2057), 869 states have internal predecessors, (2057), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:22,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 870 states to 870 states and 2057 transitions. [2022-11-16 12:44:22,578 INFO L78 Accepts]: Start accepts. Automaton has 870 states and 2057 transitions. Word has length 21 [2022-11-16 12:44:22,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:44:22,578 INFO L495 AbstractCegarLoop]: Abstraction has 870 states and 2057 transitions. [2022-11-16 12:44:22,579 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 36 states have (on average 1.75) internal successors, (63), 36 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:22,579 INFO L276 IsEmpty]: Start isEmpty. Operand 870 states and 2057 transitions. [2022-11-16 12:44:22,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:44:22,580 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:44:22,580 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:44:22,592 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-16 12:44:22,792 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-11-16 12:44:22,792 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:44:22,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:44:22,792 INFO L85 PathProgramCache]: Analyzing trace with hash -686771083, now seen corresponding path program 4 times [2022-11-16 12:44:22,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:44:22,793 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071713467] [2022-11-16 12:44:22,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:44:22,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:44:22,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:44:25,055 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:25,055 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:44:25,055 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071713467] [2022-11-16 12:44:25,055 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071713467] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:44:25,055 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1429479732] [2022-11-16 12:44:25,055 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 12:44:25,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:44:25,056 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:44:25,057 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:44:25,060 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-16 12:44:25,268 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 12:44:25,268 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:44:25,271 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 88 conjunts are in the unsatisfiable core [2022-11-16 12:44:25,276 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:44:25,317 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:25,331 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:25,825 INFO L321 Elim1Store]: treesize reduction 136, result has 50.2 percent of original size [2022-11-16 12:44:25,825 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 4 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 5 new quantified variables, introduced 8 case distinctions, treesize of input 408 treesize of output 537 [2022-11-16 12:44:25,925 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:44:25,925 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-16 12:44:25,962 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-16 12:44:25,997 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:44:26,037 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-16 12:44:27,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:27,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:27,400 INFO L321 Elim1Store]: treesize reduction 96, result has 38.1 percent of original size [2022-11-16 12:44:27,401 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 3 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 6 new quantified variables, introduced 14 case distinctions, treesize of input 938 treesize of output 1218 [2022-11-16 12:44:27,525 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 12:44:27,716 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 12:44:27,763 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 12:44:27,838 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2022-11-16 12:44:27,894 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 175 treesize of output 163 [2022-11-16 12:44:28,054 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-16 12:44:28,155 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:28,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:44:28,177 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:44:28,180 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:44:28,201 INFO L321 Elim1Store]: treesize reduction 32, result has 3.0 percent of original size [2022-11-16 12:44:28,201 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 308 treesize of output 299 [2022-11-16 12:44:28,654 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:28,673 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-16 12:44:28,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 145 treesize of output 16 [2022-11-16 12:44:30,306 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:30,317 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:30,323 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:30,525 INFO L321 Elim1Store]: treesize reduction 46, result has 53.1 percent of original size [2022-11-16 12:44:30,525 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 2 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 10 case distinctions, treesize of input 316 treesize of output 341 [2022-11-16 12:44:30,594 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 12:44:31,039 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 42 [2022-11-16 12:44:31,420 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2022-11-16 12:44:33,988 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2022-11-16 12:44:36,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:36,215 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 82 [2022-11-16 12:44:36,557 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 91 [2022-11-16 12:44:36,993 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 89 [2022-11-16 12:44:42,464 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 100 [2022-11-16 12:44:42,766 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:44:42,766 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 178 treesize of output 180 [2022-11-16 12:44:43,060 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:44:43,061 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:44:43,176 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1568 (Array Int Int))) (<= (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_1568 (Array Int Int))) (<= 0 (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:44:43,730 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1564 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1564) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse4) 4)))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1564 Int)) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1564) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse4) 4)) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:44:43,771 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse4 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse0 (store .cse3 .cse4 v_ArrVal_1563))) (store (store .cse0 .cse1 v_ArrVal_1564) .cse2 (+ (select .cse0 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse5) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse6 (store .cse3 .cse4 v_ArrVal_1563))) (store (store .cse6 .cse1 v_ArrVal_1564) .cse2 (+ (select .cse6 .cse2) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse5) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:44:53,877 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int))) (let ((.cse2 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse0 (select .cse2 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse0 .cse1))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse3 .cse4 v_ArrVal_1564) .cse1 (+ (select .cse3 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse1) 4)) (select |c_#length| |c_~#queue~0.base|))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int))) (let ((.cse6 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse5 (select .cse6 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse5 .cse1))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store .cse5 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse7 .cse4 v_ArrVal_1564) .cse1 (+ (select .cse7 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse1) 4)))))))))) is different from false [2022-11-16 12:44:53,919 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse5 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1))))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int))) (let ((.cse2 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse0 (select .cse2 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse0 .cse1))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse3 .cse4 v_ArrVal_1564) .cse1 (+ (select .cse3 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse1) 4)))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int))) (let ((.cse6 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse8 (select .cse6 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store .cse8 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse7 .cse4 v_ArrVal_1564) .cse1 (+ (select .cse7 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse1) 4)) (select |c_#length| |c_~#queue~0.base|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse8 .cse1))))))))) is different from false [2022-11-16 12:44:53,962 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse5 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse9 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse10 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse9 .cse10 (+ (select .cse9 .cse10) 1)))))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int))) (let ((.cse2 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse0 (select .cse2 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse0 .cse1))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ (* (select (select (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse3 .cse4 v_ArrVal_1564) .cse1 (+ (select .cse3 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int))) (let ((.cse7 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse6 .cse1))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ (* (select (select (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse6 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse8 .cse4 v_ArrVal_1564) .cse1 (+ (select .cse8 .cse1) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))))))) is different from false [2022-11-16 12:44:54,059 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse7 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|)) (.cse6 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse8 (+ (select .cse5 .cse7) 1))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int)) (v_ArrVal_1558 Int)) (let ((.cse0 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse5 .cse6 v_ArrVal_1558) .cse7 .cse8)) |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse4 (select .cse0 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store .cse4 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse1 .cse2 v_ArrVal_1564) .cse3 (+ (select .cse1 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse3) 4)))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse4 .cse3))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int)) (v_ArrVal_1558 Int)) (let ((.cse10 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse5 .cse6 v_ArrVal_1558) .cse7 .cse8)) |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse9 (select .cse10 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse9 .cse3))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ |c_~#queue~0.offset| (* (select (select (store (store .cse10 |c_~#queue~0.base| (let ((.cse11 (store .cse9 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse11 .cse2 v_ArrVal_1564) .cse3 (+ (select .cse11 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse3) 4) 4) (select |c_#length| |c_~#queue~0.base|)))))))))) is different from false [2022-11-16 12:44:57,643 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (+ 84 |c_~#queue~0.offset|))) (let ((.cse5 (select |c_#length| |c_~#queue~0.base|)) (.cse9 (select (select |c_#memory_int| |c_~#queue~0.base|) .cse3)) (.cse2 (+ 88 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| Int)) (let ((.cse8 (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| 4))) (or (forall ((v_ArrVal_1554 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int)) (v_ArrVal_1555 Int) (v_ArrVal_1558 Int)) (let ((.cse0 (store (let ((.cse6 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_1554))) (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store (select .cse6 |c_~#queue~0.base|) (+ |c_~#queue~0.offset| .cse8) v_ArrVal_1555))) (store (store .cse7 .cse2 v_ArrVal_1558) .cse3 (+ (select .cse7 .cse3) 1))))) |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse4 (select .cse0 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ (* (select (select (store (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store .cse4 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse1 .cse2 v_ArrVal_1564) .cse3 (+ (select .cse1 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset| 4) .cse5)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse4 .cse3))))))) (not (<= (+ |c_~#queue~0.offset| .cse8 4) .cse5)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| .cse9))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| Int)) (let ((.cse10 (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| 4))) (or (not (<= (+ |c_~#queue~0.offset| .cse10 4) .cse5)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| .cse9)) (forall ((v_ArrVal_1554 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int)) (v_ArrVal_1555 Int) (v_ArrVal_1558 Int)) (let ((.cse12 (store (let ((.cse14 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_1554))) (store .cse14 |c_~#queue~0.base| (let ((.cse15 (store (select .cse14 |c_~#queue~0.base|) (+ |c_~#queue~0.offset| .cse10) v_ArrVal_1555))) (store (store .cse15 .cse2 v_ArrVal_1558) .cse3 (+ (select .cse15 .cse3) 1))))) |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse11 (select .cse12 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse11 .cse3))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ (* (select (select (store (store .cse12 |c_~#queue~0.base| (let ((.cse13 (store .cse11 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse13 .cse2 v_ArrVal_1564) .cse3 (+ (select .cse13 .cse3) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))))))))))))) is different from false [2022-11-16 12:44:57,948 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 9 not checked. [2022-11-16 12:44:57,948 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1429479732] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:44:57,948 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:44:57,949 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 14] total 38 [2022-11-16 12:44:57,949 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286707230] [2022-11-16 12:44:57,949 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:44:57,949 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2022-11-16 12:44:57,949 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:44:57,950 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2022-11-16 12:44:57,951 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=176, Invalid=816, Unknown=32, NotChecked=536, Total=1560 [2022-11-16 12:44:57,951 INFO L87 Difference]: Start difference. First operand 870 states and 2057 transitions. Second operand has 40 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:44:58,092 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_~#queue~0.base|)) (.cse12 (+ 84 |c_~#queue~0.offset|))) (let ((.cse0 (select |c_#length| |c_~#queue~0.base|)) (.cse20 (select .cse1 .cse12)) (.cse13 (+ 88 |c_~#queue~0.offset|))) (and (<= (+ 92 |c_~#queue~0.offset|) .cse0) (<= 92 .cse0) (= |c_~#queue~0.offset| 0) (= (select .cse1 84) 0) (let ((.cse9 (store (store (store ((as const (Array Int Int)) 0) (+ |c_~#queue~0.offset| 80) 0) .cse12 0) .cse13 0))) (let ((.cse2 (= .cse9 .cse1)) (.cse4 (select |c_#memory_int| |c_~#stored_elements~0.base|))) (or (and .cse2 (exists ((|ULTIMATE.start_main_~#id1~0#1.base| Int) (v_DerPreprocessor_45 (Array Int Int)) (v_DerPreprocessor_46 (Array Int Int))) (let ((.cse3 (let ((.cse5 (select |c_#memory_int| |ULTIMATE.start_main_~#id1~0#1.base|))) (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store |c_#memory_int| |c_~#queue~0.base| v_DerPreprocessor_45) |c_~#stored_elements~0.base| v_DerPreprocessor_46) |c_~#queue~0.base| v_DerPreprocessor_45) |ULTIMATE.start_main_~#id1~0#1.base| .cse5) |c_~#queue~0.base| v_DerPreprocessor_45) |c_~#stored_elements~0.base| v_DerPreprocessor_46) |c_~#queue~0.base| v_DerPreprocessor_45) |ULTIMATE.start_main_~#id1~0#1.base| .cse5) |c_~#queue~0.base| v_DerPreprocessor_45) |c_~#stored_elements~0.base| v_DerPreprocessor_46) |c_~#queue~0.base| v_DerPreprocessor_45) |ULTIMATE.start_main_~#id1~0#1.base| .cse5) |c_~#queue~0.base| v_DerPreprocessor_45) |c_~#stored_elements~0.base| v_DerPreprocessor_46) |c_~#queue~0.base| v_DerPreprocessor_45) |ULTIMATE.start_main_~#id1~0#1.base| .cse5) |c_~#queue~0.base| v_DerPreprocessor_45) |c_~#stored_elements~0.base| v_DerPreprocessor_46) |c_~#queue~0.base| v_DerPreprocessor_45) |ULTIMATE.start_main_~#id1~0#1.base| .cse5) |c_~#queue~0.base| v_DerPreprocessor_45) |c_~#stored_elements~0.base| v_DerPreprocessor_46) |c_~#queue~0.base| v_DerPreprocessor_45) |ULTIMATE.start_main_~#id1~0#1.base| .cse5)))) (and (= (select .cse3 |c_~#stored_elements~0.base|) .cse4) (not (= |c_~#queue~0.base| |ULTIMATE.start_main_~#id1~0#1.base|)) (not (= |c_~#stored_elements~0.base| |ULTIMATE.start_main_~#id1~0#1.base|)) (= .cse1 (select .cse3 |c_~#queue~0.base|)))))) (and .cse2 (exists ((v_DerPreprocessor_30 (Array Int Int)) (v_DerPreprocessor_31 (Array Int Int)) (v_DerPreprocessor_32 (Array Int Int)) (|ULTIMATE.start_main_~#id1~0#1.offset| Int) (|ULTIMATE.start_main_~#id1~0#1.base| Int) (v_prenex_25 (Array Int Int)) (v_prenex_26 (Array Int Int))) (let ((.cse6 (select (select |c_#memory_int| |ULTIMATE.start_main_~#id1~0#1.base|) |ULTIMATE.start_main_~#id1~0#1.offset|))) (let ((.cse8 (store (store (store (store (store (store (store (store |c_#memory_int| |c_~#queue~0.base| v_DerPreprocessor_30) |c_~#stored_elements~0.base| v_DerPreprocessor_31) |c_~#queue~0.base| v_DerPreprocessor_30) |ULTIMATE.start_main_~#id1~0#1.base| v_DerPreprocessor_32) |c_~#queue~0.base| v_DerPreprocessor_30) |c_~#stored_elements~0.base| v_DerPreprocessor_31) |c_~#queue~0.base| v_DerPreprocessor_30) |ULTIMATE.start_main_~#id1~0#1.base| v_DerPreprocessor_32)) (.cse7 (let ((.cse10 (store .cse9 |ULTIMATE.start_main_~#id1~0#1.offset| .cse6))) (store (store (store (store (store (store (store (store |c_#memory_int| |c_~#queue~0.base| v_prenex_25) |c_~#stored_elements~0.base| v_prenex_26) |c_~#queue~0.base| v_prenex_25) |ULTIMATE.start_main_~#id1~0#1.base| .cse10) |c_~#queue~0.base| v_prenex_25) |c_~#stored_elements~0.base| v_prenex_26) |c_~#queue~0.base| v_prenex_25) |ULTIMATE.start_main_~#id1~0#1.base| .cse10)))) (and (not (= |c_~#queue~0.base| |ULTIMATE.start_main_~#id1~0#1.base|)) (= (select v_DerPreprocessor_32 |ULTIMATE.start_main_~#id1~0#1.offset|) .cse6) (= (select .cse7 |c_~#stored_elements~0.base|) v_prenex_26) (= v_DerPreprocessor_31 (select .cse8 |c_~#stored_elements~0.base|)) (= .cse9 (select .cse8 |c_~#queue~0.base|)) (<= |ULTIMATE.start_main_~#id1~0#1.offset| 0) (= .cse9 (select .cse7 |c_~#queue~0.base|))))))) (and (exists ((v_DerPreprocessor_43 (Array Int Int)) (v_DerPreprocessor_49 (Array Int Int))) (let ((.cse11 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store |c_#memory_int| |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_49) |c_~#queue~0.base| .cse1))) (and (= .cse4 (select .cse11 |c_~#stored_elements~0.base|)) (= .cse4 (select (store (store (store (store (store (store (store (store (store (store (store (store .cse11 |c_~#stored_elements~0.base| v_DerPreprocessor_43) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_43) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_43) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_43) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_43) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base| v_DerPreprocessor_43) |c_~#queue~0.base| .cse1) |c_~#stored_elements~0.base|))))) (exists ((|ULTIMATE.start_main_~#id1~0#1.offset| Int)) (and (exists ((v_arrayElimCell_102 Int)) (= (store .cse9 |ULTIMATE.start_main_~#id1~0#1.offset| v_arrayElimCell_102) .cse1)) (<= |ULTIMATE.start_main_~#id1~0#1.offset| 0))))))) (not (= |c_ULTIMATE.start_main_~#id2~0#1.base| |c_~#queue~0.base|)) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| Int)) (let ((.cse19 (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| 4))) (or (forall ((v_ArrVal_1554 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int)) (v_ArrVal_1555 Int) (v_ArrVal_1558 Int)) (let ((.cse14 (store (let ((.cse17 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_1554))) (store .cse17 |c_~#queue~0.base| (let ((.cse18 (store (select .cse17 |c_~#queue~0.base|) (+ |c_~#queue~0.offset| .cse19) v_ArrVal_1555))) (store (store .cse18 .cse13 v_ArrVal_1558) .cse12 (+ (select .cse18 .cse12) 1))))) |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse16 (select .cse14 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= (+ (* (select (select (store (store .cse14 |c_~#queue~0.base| (let ((.cse15 (store .cse16 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse15 .cse13 v_ArrVal_1564) .cse12 (+ (select .cse15 .cse12) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse12) 4) |c_~#queue~0.offset| 4) .cse0)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse16 .cse12))))))) (not (<= (+ |c_~#queue~0.offset| .cse19 4) .cse0)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| .cse20))))) (= 7 |c_~#stored_elements~0.base|) (not (= 7 |c_~#queue~0.base|)) (<= 7 |c_~#stored_elements~0.base|) (= 6 |c_~#queue~0.base|) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| Int)) (let ((.cse21 (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| 4))) (or (not (<= (+ |c_~#queue~0.offset| .cse21 4) .cse0)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1375| .cse20)) (forall ((v_ArrVal_1554 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| Int) (v_ArrVal_1561 (Array Int Int)) (v_ArrVal_1555 Int) (v_ArrVal_1558 Int)) (let ((.cse23 (store (let ((.cse25 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_1554))) (store .cse25 |c_~#queue~0.base| (let ((.cse26 (store (select .cse25 |c_~#queue~0.base|) (+ |c_~#queue~0.offset| .cse21) v_ArrVal_1555))) (store (store .cse26 .cse13 v_ArrVal_1558) .cse12 (+ (select .cse26 .cse12) 1))))) |c_~#stored_elements~0.base| v_ArrVal_1561))) (let ((.cse22 (select .cse23 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| (select .cse22 .cse12))) (forall ((v_ArrVal_1568 (Array Int Int)) (v_ArrVal_1563 Int) (v_ArrVal_1564 Int)) (<= 0 (+ (* (select (select (store (store .cse23 |c_~#queue~0.base| (let ((.cse24 (store .cse22 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1373| 4) |c_~#queue~0.offset|) v_ArrVal_1563))) (store (store .cse24 .cse13 v_ArrVal_1564) .cse12 (+ (select .cse24 .cse12) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1568) |c_~#queue~0.base|) .cse12) 4) |c_~#queue~0.offset|)))))))))) (<= (select |c_#length| |c_ULTIMATE.start_main_~#id2~0#1.base|) 4)))) is different from true [2022-11-16 12:45:13,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:13,157 INFO L93 Difference]: Finished difference Result 894 states and 2107 transitions. [2022-11-16 12:45:13,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-16 12:45:13,157 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:45:13,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:13,160 INFO L225 Difference]: With dead ends: 894 [2022-11-16 12:45:13,160 INFO L226 Difference]: Without dead ends: 894 [2022-11-16 12:45:13,161 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 9 IntricatePredicates, 3 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 41.2s TimeCoverageRelationStatistics Valid=287, Invalid=1433, Unknown=38, NotChecked=792, Total=2550 [2022-11-16 12:45:13,162 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 0 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 209 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 689 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 209 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 480 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:13,162 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 85 Invalid, 689 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 209 Invalid, 0 Unknown, 480 Unchecked, 0.5s Time] [2022-11-16 12:45:13,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 894 states. [2022-11-16 12:45:13,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 894 to 894. [2022-11-16 12:45:13,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 894 states, 884 states have (on average 2.3834841628959276) internal successors, (2107), 893 states have internal predecessors, (2107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:13,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 894 states to 894 states and 2107 transitions. [2022-11-16 12:45:13,187 INFO L78 Accepts]: Start accepts. Automaton has 894 states and 2107 transitions. Word has length 22 [2022-11-16 12:45:13,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:13,187 INFO L495 AbstractCegarLoop]: Abstraction has 894 states and 2107 transitions. [2022-11-16 12:45:13,188 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:13,188 INFO L276 IsEmpty]: Start isEmpty. Operand 894 states and 2107 transitions. [2022-11-16 12:45:13,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:45:13,189 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:13,189 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:13,198 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-11-16 12:45:13,395 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:13,395 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:45:13,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:13,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1065442219, now seen corresponding path program 5 times [2022-11-16 12:45:13,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:13,396 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488019872] [2022-11-16 12:45:13,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:13,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:13,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:15,685 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:15,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:15,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488019872] [2022-11-16 12:45:15,686 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1488019872] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:15,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [904846570] [2022-11-16 12:45:15,686 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-16 12:45:15,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:15,687 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:15,688 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:15,690 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-16 12:45:16,053 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-11-16 12:45:16,053 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:45:16,057 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 99 conjunts are in the unsatisfiable core [2022-11-16 12:45:16,068 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:16,094 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:16,100 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:16,167 INFO L321 Elim1Store]: treesize reduction 20, result has 63.6 percent of original size [2022-11-16 12:45:16,167 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 40 [2022-11-16 12:45:16,240 INFO L321 Elim1Store]: treesize reduction 37, result has 32.7 percent of original size [2022-11-16 12:45:16,241 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 15 treesize of output 26 [2022-11-16 12:45:16,774 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 42 [2022-11-16 12:45:16,815 INFO L321 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-16 12:45:16,816 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 30 [2022-11-16 12:45:17,145 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 57 [2022-11-16 12:45:17,324 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:17,324 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 65 [2022-11-16 12:45:17,339 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-16 12:45:17,876 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2022-11-16 12:45:18,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:18,025 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 43 [2022-11-16 12:45:18,237 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 74 [2022-11-16 12:45:18,522 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 83 [2022-11-16 12:45:18,999 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2022-11-16 12:45:19,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:19,201 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 53 [2022-11-16 12:45:19,368 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:19,368 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:45:19,489 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1690 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1690) |c_~#queue~0.base|) .cse0) 4)))) (forall ((v_ArrVal_1690 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1690) |c_~#queue~0.base|) .cse0) 4)) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:45:19,732 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1690 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1690) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_1690 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1690) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:45:19,768 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1687 Int) (v_ArrVal_1690 (Array Int Int))) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1687) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1690) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_1687 Int) (v_ArrVal_1690 (Array Int Int))) (<= (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1687) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1690) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:45:37,158 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-16 12:45:37,159 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [904846570] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:45:37,159 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:45:37,159 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 16] total 40 [2022-11-16 12:45:37,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441712839] [2022-11-16 12:45:37,159 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:45:37,160 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-11-16 12:45:37,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:45:37,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-11-16 12:45:37,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=1235, Unknown=21, NotChecked=228, Total=1722 [2022-11-16 12:45:37,161 INFO L87 Difference]: Start difference. First operand 894 states and 2107 transitions. Second operand has 42 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:56,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:45:56,687 INFO L93 Difference]: Finished difference Result 933 states and 2188 transitions. [2022-11-16 12:45:56,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-11-16 12:45:56,688 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:45:56,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:45:56,690 INFO L225 Difference]: With dead ends: 933 [2022-11-16 12:45:56,691 INFO L226 Difference]: Without dead ends: 933 [2022-11-16 12:45:56,692 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 15 SyntacticMatches, 10 SemanticMatches, 60 ConstructedPredicates, 3 IntricatePredicates, 4 DeprecatedPredicates, 1025 ImplicationChecksByTransitivity, 38.1s TimeCoverageRelationStatistics Valid=578, Invalid=2833, Unknown=23, NotChecked=348, Total=3782 [2022-11-16 12:45:56,693 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 1 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 686 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 573 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 12:45:56,693 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 89 Invalid, 686 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 106 Invalid, 0 Unknown, 573 Unchecked, 0.3s Time] [2022-11-16 12:45:56,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 933 states. [2022-11-16 12:45:56,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 933 to 909. [2022-11-16 12:45:56,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 909 states, 899 states have (on average 2.378197997775306) internal successors, (2138), 908 states have internal predecessors, (2138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:56,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 909 states to 909 states and 2138 transitions. [2022-11-16 12:45:56,718 INFO L78 Accepts]: Start accepts. Automaton has 909 states and 2138 transitions. Word has length 22 [2022-11-16 12:45:56,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:45:56,719 INFO L495 AbstractCegarLoop]: Abstraction has 909 states and 2138 transitions. [2022-11-16 12:45:56,719 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:45:56,719 INFO L276 IsEmpty]: Start isEmpty. Operand 909 states and 2138 transitions. [2022-11-16 12:45:56,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:45:56,720 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:45:56,720 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:45:56,728 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-16 12:45:56,927 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-11-16 12:45:56,928 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:45:56,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:45:56,930 INFO L85 PathProgramCache]: Analyzing trace with hash -996813495, now seen corresponding path program 6 times [2022-11-16 12:45:56,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:45:56,930 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454390560] [2022-11-16 12:45:56,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:45:56,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:45:56,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:45:59,128 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:45:59,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:45:59,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454390560] [2022-11-16 12:45:59,129 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [454390560] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:45:59,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1644450920] [2022-11-16 12:45:59,129 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-16 12:45:59,129 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:45:59,130 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:45:59,130 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:45:59,133 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-16 12:45:59,629 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-11-16 12:45:59,629 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:45:59,632 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 81 conjunts are in the unsatisfiable core [2022-11-16 12:45:59,636 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:45:59,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:59,656 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:45:59,689 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:45:59,690 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 35 [2022-11-16 12:45:59,695 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2022-11-16 12:45:59,732 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:45:59,733 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:46:00,137 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:46:00,195 INFO L321 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2022-11-16 12:46:00,195 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 39 [2022-11-16 12:46:00,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:00,388 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:46:00,390 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2022-11-16 12:46:00,577 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:46:00,578 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-11-16 12:46:00,732 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-16 12:46:00,834 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:46:01,040 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:46:01,061 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:46:01,061 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:46:01,219 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:01,220 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:46:01,449 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 15 [2022-11-16 12:46:01,568 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:46:01,660 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:46:01,661 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:46:11,421 WARN L233 SmtUtils]: Spent 6.26s on a formula simplification that was a NOOP. DAG size: 47 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:11,833 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:46:11,833 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 127 treesize of output 91 [2022-11-16 12:46:11,854 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:46:11,855 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 142 treesize of output 144 [2022-11-16 12:46:11,877 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 85 [2022-11-16 12:46:11,887 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 105 [2022-11-16 12:46:11,923 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 6 [2022-11-16 12:46:11,948 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:46:11,948 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 100 treesize of output 96 [2022-11-16 12:46:12,179 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:46:12,179 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 124 treesize of output 88 [2022-11-16 12:46:12,185 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:46:12,190 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2022-11-16 12:46:12,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:12,202 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 40 [2022-11-16 12:46:14,282 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:46:14,283 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1644450920] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:46:14,283 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:46:14,283 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 12] total 33 [2022-11-16 12:46:14,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372920822] [2022-11-16 12:46:14,283 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:46:14,284 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-11-16 12:46:14,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:46:14,285 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-16 12:46:14,285 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=953, Unknown=18, NotChecked=0, Total=1190 [2022-11-16 12:46:14,285 INFO L87 Difference]: Start difference. First operand 909 states and 2138 transitions. Second operand has 35 states, 34 states have (on average 1.9411764705882353) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:46:23,718 WARN L233 SmtUtils]: Spent 6.34s on a formula simplification. DAG size of input: 64 DAG size of output: 59 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:46,186 WARN L233 SmtUtils]: Spent 8.21s on a formula simplification. DAG size of input: 55 DAG size of output: 52 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:46:47,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:46:47,960 INFO L93 Difference]: Finished difference Result 1371 states and 3227 transitions. [2022-11-16 12:46:47,961 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-11-16 12:46:47,961 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.9411764705882353) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:46:47,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:46:47,964 INFO L225 Difference]: With dead ends: 1371 [2022-11-16 12:46:47,965 INFO L226 Difference]: Without dead ends: 1371 [2022-11-16 12:46:47,966 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 24 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 612 ImplicationChecksByTransitivity, 45.9s TimeCoverageRelationStatistics Valid=372, Invalid=1568, Unknown=40, NotChecked=0, Total=1980 [2022-11-16 12:46:47,966 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 129 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 325 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 129 SdHoareTripleChecker+Valid, 185 SdHoareTripleChecker+Invalid, 1240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 914 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-16 12:46:47,967 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [129 Valid, 185 Invalid, 1240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 325 Invalid, 0 Unknown, 914 Unchecked, 0.8s Time] [2022-11-16 12:46:47,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2022-11-16 12:46:47,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1195. [2022-11-16 12:46:47,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1195 states, 1185 states have (on average 2.3966244725738397) internal successors, (2840), 1194 states have internal predecessors, (2840), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:46:48,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1195 states to 1195 states and 2840 transitions. [2022-11-16 12:46:48,002 INFO L78 Accepts]: Start accepts. Automaton has 1195 states and 2840 transitions. Word has length 22 [2022-11-16 12:46:48,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:46:48,003 INFO L495 AbstractCegarLoop]: Abstraction has 1195 states and 2840 transitions. [2022-11-16 12:46:48,003 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.9411764705882353) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:46:48,003 INFO L276 IsEmpty]: Start isEmpty. Operand 1195 states and 2840 transitions. [2022-11-16 12:46:48,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:46:48,004 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:46:48,005 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:46:48,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-16 12:46:48,217 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-11-16 12:46:48,218 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:46:48,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:46:48,218 INFO L85 PathProgramCache]: Analyzing trace with hash 393124167, now seen corresponding path program 7 times [2022-11-16 12:46:48,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:46:48,218 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248680763] [2022-11-16 12:46:48,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:46:48,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:46:48,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:46:50,473 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:46:50,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:46:50,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248680763] [2022-11-16 12:46:50,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [248680763] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:46:50,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1504040162] [2022-11-16 12:46:50,473 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-16 12:46:50,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:46:50,474 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:46:50,475 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:46:50,478 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-16 12:46:50,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:46:50,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 88 conjunts are in the unsatisfiable core [2022-11-16 12:46:50,725 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:46:50,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:50,752 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:50,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:50,786 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:46:50,786 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 36 [2022-11-16 12:46:50,819 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:46:50,819 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:46:51,215 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2022-11-16 12:46:51,486 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 37 [2022-11-16 12:46:52,029 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 43 [2022-11-16 12:46:52,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:52,238 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 71 [2022-11-16 12:46:52,443 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:52,444 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 71 [2022-11-16 12:46:52,724 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 88 [2022-11-16 12:46:53,113 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 139 [2022-11-16 12:46:53,786 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 112 [2022-11-16 12:46:54,071 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:46:54,071 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 207 treesize of output 209 [2022-11-16 12:46:54,367 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:46:54,367 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:46:54,491 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1926 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse0) 4)) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_1926 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse0) 4)))))) is different from false [2022-11-16 12:46:54,752 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1926 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_1926 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:46:54,789 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_1926 (Array Int Int)) (v_ArrVal_1922 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1922) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse4) 4)))) (forall ((v_ArrVal_1926 (Array Int Int)) (v_ArrVal_1922 Int)) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_1922) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse4) 4)) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:47:01,338 WARN L233 SmtUtils]: Spent 6.07s on a formula simplification that was a NOOP. DAG size: 40 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:47:02,592 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse4 (+ 84 |c_~#queue~0.offset|)) (.cse6 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse11 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse12 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse11 .cse12 (+ (select .cse11 .cse12) 1)))))) (and (forall ((v_ArrVal_1919 (Array Int Int)) (v_ArrVal_1918 (Array Int Int))) (let ((.cse1 (store (store .cse6 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_1918) |c_~#stored_elements~0.base| v_ArrVal_1919))) (let ((.cse5 (select .cse1 |c_~#queue~0.base|))) (let ((.cse0 (+ (* (select .cse5 .cse4) 4) |c_~#queue~0.offset|))) (or (not (<= 0 .cse0)) (forall ((v_ArrVal_1921 Int) (v_ArrVal_1926 (Array Int Int)) (v_ArrVal_1922 Int)) (<= (+ |c_~#queue~0.offset| (* (select (select (store (store .cse1 |c_~#queue~0.base| (let ((.cse2 (store .cse5 .cse0 v_ArrVal_1921))) (store (store .cse2 .cse3 v_ArrVal_1922) .cse4 (+ (select .cse2 .cse4) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse4) 4) 4) (select |c_#length| |c_~#queue~0.base|)))))))) (forall ((v_ArrVal_1919 (Array Int Int)) (v_ArrVal_1918 (Array Int Int))) (let ((.cse7 (store (store .cse6 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_1918) |c_~#stored_elements~0.base| v_ArrVal_1919))) (let ((.cse9 (select .cse7 |c_~#queue~0.base|))) (let ((.cse10 (+ (* (select .cse9 .cse4) 4) |c_~#queue~0.offset|))) (or (forall ((v_ArrVal_1921 Int) (v_ArrVal_1926 (Array Int Int)) (v_ArrVal_1922 Int)) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse9 .cse10 v_ArrVal_1921))) (store (store .cse8 .cse3 v_ArrVal_1922) .cse4 (+ (select .cse8 .cse4) 1)))) |c_~#stored_elements~0.base| v_ArrVal_1926) |c_~#queue~0.base|) .cse4) 4)))) (not (<= 0 .cse10))))))))) is different from false [2022-11-16 12:47:26,469 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-16 12:47:26,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1504040162] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:47:26,470 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:47:26,470 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 15] total 37 [2022-11-16 12:47:26,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886494267] [2022-11-16 12:47:26,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:47:26,471 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-11-16 12:47:26,471 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:47:26,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-11-16 12:47:26,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=997, Unknown=31, NotChecked=276, Total=1482 [2022-11-16 12:47:26,472 INFO L87 Difference]: Start difference. First operand 1195 states and 2840 transitions. Second operand has 39 states, 38 states have (on average 1.736842105263158) internal successors, (66), 38 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:47:44,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:47:44,060 INFO L93 Difference]: Finished difference Result 1292 states and 3166 transitions. [2022-11-16 12:47:44,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-16 12:47:44,066 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 1.736842105263158) internal successors, (66), 38 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:47:44,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:47:44,069 INFO L225 Difference]: With dead ends: 1292 [2022-11-16 12:47:44,069 INFO L226 Difference]: Without dead ends: 1292 [2022-11-16 12:47:44,070 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 17 SyntacticMatches, 11 SemanticMatches, 56 ConstructedPredicates, 4 IntricatePredicates, 2 DeprecatedPredicates, 597 ImplicationChecksByTransitivity, 51.1s TimeCoverageRelationStatistics Valid=450, Invalid=2397, Unknown=31, NotChecked=428, Total=3306 [2022-11-16 12:47:44,071 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 13 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 249 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 723 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 468 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 12:47:44,071 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 93 Invalid, 723 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 249 Invalid, 0 Unknown, 468 Unchecked, 0.7s Time] [2022-11-16 12:47:44,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1292 states. [2022-11-16 12:47:44,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1292 to 1223. [2022-11-16 12:47:44,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1223 states, 1213 states have (on average 2.4229183841714756) internal successors, (2939), 1222 states have internal predecessors, (2939), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:47:44,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1223 states to 1223 states and 2939 transitions. [2022-11-16 12:47:44,101 INFO L78 Accepts]: Start accepts. Automaton has 1223 states and 2939 transitions. Word has length 22 [2022-11-16 12:47:44,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:47:44,101 INFO L495 AbstractCegarLoop]: Abstraction has 1223 states and 2939 transitions. [2022-11-16 12:47:44,101 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 38 states have (on average 1.736842105263158) internal successors, (66), 38 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:47:44,101 INFO L276 IsEmpty]: Start isEmpty. Operand 1223 states and 2939 transitions. [2022-11-16 12:47:44,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:47:44,102 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:47:44,103 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:47:44,118 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-16 12:47:44,308 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-11-16 12:47:44,309 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:47:44,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:47:44,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1169925361, now seen corresponding path program 8 times [2022-11-16 12:47:44,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:47:44,309 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121202309] [2022-11-16 12:47:44,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:47:44,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:47:44,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:47:46,420 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:47:46,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:47:46,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121202309] [2022-11-16 12:47:46,421 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [121202309] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:47:46,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [842000760] [2022-11-16 12:47:46,421 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 12:47:46,421 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:47:46,422 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:47:46,423 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:47:46,425 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-16 12:47:46,695 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 12:47:46,696 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:47:46,699 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 93 conjunts are in the unsatisfiable core [2022-11-16 12:47:46,703 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:47:46,718 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:46,727 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:46,730 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:46,765 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:47:46,765 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 36 [2022-11-16 12:47:46,778 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2022-11-16 12:47:46,792 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:46,795 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:46,827 INFO L321 Elim1Store]: treesize reduction 20, result has 20.0 percent of original size [2022-11-16 12:47:46,827 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 19 [2022-11-16 12:47:47,291 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2022-11-16 12:47:47,536 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 37 [2022-11-16 12:47:48,139 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2022-11-16 12:47:48,349 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:48,350 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 47 [2022-11-16 12:47:48,672 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:48,673 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 54 [2022-11-16 12:47:48,970 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 56 [2022-11-16 12:47:49,428 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 54 [2022-11-16 12:47:50,222 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 60 [2022-11-16 12:47:50,570 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:47:50,570 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 105 [2022-11-16 12:47:50,840 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:47:50,840 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:47:50,957 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2046 (Array Int Int))) (<= (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse0) 4) 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_2046 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse0) 4)))))) is different from false [2022-11-16 12:47:51,212 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse2 .cse3 (+ (select .cse2 .cse3) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2046 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (forall ((v_ArrVal_2046 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))) is different from false [2022-11-16 12:47:51,269 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2042 Int) (v_ArrVal_2046 (Array Int Int))) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2042) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2042 Int) (v_ArrVal_2046 (Array Int Int))) (<= (+ (* (select (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2042) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:47:54,240 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2038 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| Int)) (let ((.cse0 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2038)) (.cse5 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| 4) |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| (select (select .cse0 |c_~#queue~0.base|) .cse1))) (forall ((v_ArrVal_2040 Int) (v_ArrVal_2042 Int) (v_ArrVal_2039 (Array Int Int)) (v_ArrVal_2046 (Array Int Int))) (<= (+ |c_~#queue~0.offset| (* (select (select (store (let ((.cse2 (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2039))) (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store (select .cse2 |c_~#queue~0.base|) .cse5 v_ArrVal_2040))) (store (store .cse3 .cse4 v_ArrVal_2042) .cse1 (+ (select .cse3 .cse1) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse1) 4) 4) (select |c_#length| |c_~#queue~0.base|))) (not (<= 0 .cse5))))) (forall ((v_ArrVal_2038 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| Int)) (let ((.cse9 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2038)) (.cse8 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| 4) |c_~#queue~0.offset|))) (or (forall ((v_ArrVal_2040 Int) (v_ArrVal_2042 Int) (v_ArrVal_2039 (Array Int Int)) (v_ArrVal_2046 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (let ((.cse6 (store .cse9 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2039))) (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store (select .cse6 |c_~#queue~0.base|) .cse8 v_ArrVal_2040))) (store (store .cse7 .cse4 v_ArrVal_2042) .cse1 (+ (select .cse7 .cse1) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse1) 4)))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| (select (select .cse9 |c_~#queue~0.base|) .cse1))) (not (<= 0 .cse8))))))) is different from false [2022-11-16 12:47:56,146 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse7 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse8 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse0 (+ (select .cse7 .cse8) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2040 Int) (v_ArrVal_2042 Int) (v_ArrVal_2039 (Array Int Int)) (v_ArrVal_2036 Int) (v_ArrVal_2038 (Array Int Int)) (v_ArrVal_2046 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| Int)) (let ((.cse5 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| 4) |c_~#queue~0.offset|)) (.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse7 .cse8 v_ArrVal_2036)) |c_~#stored_elements~0.base| v_ArrVal_2038))) (or (< .cse0 v_ArrVal_2036) (<= 0 (+ (* (select (select (store (let ((.cse1 (store .cse6 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2039))) (store .cse1 |c_~#queue~0.base| (let ((.cse2 (store (select .cse1 |c_~#queue~0.base|) .cse5 v_ArrVal_2040))) (store (store .cse2 .cse3 v_ArrVal_2042) .cse4 (+ (select .cse2 .cse4) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset|)) (not (<= 0 .cse5)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| (select (select .cse6 |c_~#queue~0.base|) .cse4)))))) (forall ((v_ArrVal_2040 Int) (v_ArrVal_2042 Int) (v_ArrVal_2039 (Array Int Int)) (v_ArrVal_2036 Int) (v_ArrVal_2038 (Array Int Int)) (v_ArrVal_2046 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| Int)) (let ((.cse11 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| 4) |c_~#queue~0.offset|)) (.cse12 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse7 .cse8 v_ArrVal_2036)) |c_~#stored_elements~0.base| v_ArrVal_2038))) (or (<= (+ (* (select (select (store (let ((.cse9 (store .cse12 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2039))) (store .cse9 |c_~#queue~0.base| (let ((.cse10 (store (select .cse9 |c_~#queue~0.base|) .cse11 v_ArrVal_2040))) (store (store .cse10 .cse3 v_ArrVal_2042) .cse4 (+ (select .cse10 .cse4) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2046) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|)) (< .cse0 v_ArrVal_2036) (not (<= 0 .cse11)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1399| (select (select .cse12 |c_~#queue~0.base|) .cse4))))))))) is different from false [2022-11-16 12:48:03,512 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 1 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-16 12:48:03,512 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [842000760] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:48:03,512 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:48:03,513 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 16] total 39 [2022-11-16 12:48:03,513 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542763276] [2022-11-16 12:48:03,513 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:48:03,513 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-11-16 12:48:03,513 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:48:03,514 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-11-16 12:48:03,515 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=1057, Unknown=26, NotChecked=360, Total=1640 [2022-11-16 12:48:03,515 INFO L87 Difference]: Start difference. First operand 1223 states and 2939 transitions. Second operand has 41 states, 40 states have (on average 1.65) internal successors, (66), 40 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:48:44,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:48:44,968 INFO L93 Difference]: Finished difference Result 1454 states and 3486 transitions. [2022-11-16 12:48:44,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-11-16 12:48:44,969 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 40 states have (on average 1.65) internal successors, (66), 40 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:48:44,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:48:44,971 INFO L225 Difference]: With dead ends: 1454 [2022-11-16 12:48:44,971 INFO L226 Difference]: Without dead ends: 1454 [2022-11-16 12:48:44,973 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 16 SyntacticMatches, 14 SemanticMatches, 55 ConstructedPredicates, 5 IntricatePredicates, 2 DeprecatedPredicates, 757 ImplicationChecksByTransitivity, 55.1s TimeCoverageRelationStatistics Valid=388, Invalid=2237, Unknown=47, NotChecked=520, Total=3192 [2022-11-16 12:48:44,974 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 48 mSDsluCounter, 154 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 163 SdHoareTripleChecker+Invalid, 658 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 503 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 12:48:44,974 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 163 Invalid, 658 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 503 Unchecked, 0.4s Time] [2022-11-16 12:48:44,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1454 states. [2022-11-16 12:48:45,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1454 to 1296. [2022-11-16 12:48:45,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1296 states, 1286 states have (on average 2.4222395023328147) internal successors, (3115), 1295 states have internal predecessors, (3115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:48:45,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 1296 states and 3115 transitions. [2022-11-16 12:48:45,009 INFO L78 Accepts]: Start accepts. Automaton has 1296 states and 3115 transitions. Word has length 22 [2022-11-16 12:48:45,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:48:45,009 INFO L495 AbstractCegarLoop]: Abstraction has 1296 states and 3115 transitions. [2022-11-16 12:48:45,009 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 40 states have (on average 1.65) internal successors, (66), 40 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:48:45,010 INFO L276 IsEmpty]: Start isEmpty. Operand 1296 states and 3115 transitions. [2022-11-16 12:48:45,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:48:45,011 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:48:45,011 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:48:45,018 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-16 12:48:45,218 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:48:45,218 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:48:45,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:48:45,218 INFO L85 PathProgramCache]: Analyzing trace with hash 411530449, now seen corresponding path program 9 times [2022-11-16 12:48:45,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:48:45,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085528997] [2022-11-16 12:48:45,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:48:45,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:48:45,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:48:47,391 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:48:47,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:48:47,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085528997] [2022-11-16 12:48:47,392 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1085528997] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:48:47,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1231702554] [2022-11-16 12:48:47,392 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 12:48:47,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:48:47,393 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:48:47,394 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:48:47,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-16 12:48:47,754 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-16 12:48:47,754 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:48:47,759 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 95 conjunts are in the unsatisfiable core [2022-11-16 12:48:47,765 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:48:47,781 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:48:47,787 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:48:47,821 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:48:47,821 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 36 [2022-11-16 12:48:47,856 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:48:47,856 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:48:48,225 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 36 [2022-11-16 12:48:48,390 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 57 [2022-11-16 12:48:48,837 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2022-11-16 12:48:48,938 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 43 [2022-11-16 12:48:49,126 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 49 [2022-11-16 12:48:49,370 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 83 [2022-11-16 12:48:49,496 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:48:49,497 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 83 [2022-11-16 12:48:49,903 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2022-11-16 12:48:50,038 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 53 [2022-11-16 12:48:50,166 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:48:50,166 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:48:50,245 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2166 (Array Int Int))) (<= 0 (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2166 (Array Int Int))) (<= (+ (* (select (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:48:50,266 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2166 (Array Int Int))) (<= 0 (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2166 (Array Int Int))) (<= (+ (* (select (select (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:49:04,585 WARN L233 SmtUtils]: Spent 10.18s on a formula simplification that was a NOOP. DAG size: 49 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:49:14,914 WARN L233 SmtUtils]: Spent 6.07s on a formula simplification that was a NOOP. DAG size: 51 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:49:41,819 WARN L233 SmtUtils]: Spent 7.57s on a formula simplification that was a NOOP. DAG size: 61 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:50:06,674 WARN L233 SmtUtils]: Spent 6.07s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:50:06,847 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 1 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:50:06,847 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1231702554] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:50:06,847 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:50:06,848 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 17] total 40 [2022-11-16 12:50:06,848 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [345374440] [2022-11-16 12:50:06,848 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:50:06,848 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-11-16 12:50:06,849 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:50:06,849 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-11-16 12:50:06,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=1247, Unknown=22, NotChecked=154, Total=1722 [2022-11-16 12:50:06,850 INFO L87 Difference]: Start difference. First operand 1296 states and 3115 transitions. Second operand has 42 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:50:22,411 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse10 (select |c_#length| |c_~#queue~0.base|)) (.cse8 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse6 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse7 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse0 (+ 84 |c_~#queue~0.offset|))) (and (let ((.cse15 (select .cse6 .cse8))) (or (not (<= 0 .cse0)) (let ((.cse5 (+ 88 |c_~#queue~0.offset|)) (.cse9 (+ .cse15 1))) (and (forall ((v_ArrVal_2161 Int) (v_ArrVal_2154 Int) (v_ArrVal_2158 (Array Int Int)) (v_ArrVal_2166 (Array Int Int)) (v_ArrVal_2163 (Array Int Int)) (v_ArrVal_2160 Int)) (<= (+ (* (select (select (store (let ((.cse1 (store (let ((.cse3 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse6 .cse7 v_ArrVal_2154) .cse8 .cse9)) |c_~#stored_elements~0.base| v_ArrVal_2158))) (store .cse3 |c_~#queue~0.base| (store (let ((.cse4 (select .cse3 |c_~#queue~0.base|))) (store .cse4 (+ (* (select .cse4 .cse0) 4) |c_~#queue~0.offset|) v_ArrVal_2160)) .cse5 v_ArrVal_2161))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2163))) (store .cse1 |c_~#queue~0.base| (let ((.cse2 (select .cse1 |c_~#queue~0.base|))) (store .cse2 .cse0 (+ (select .cse2 .cse0) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) .cse10)) (forall ((v_ArrVal_2161 Int) (v_ArrVal_2154 Int) (v_ArrVal_2158 (Array Int Int)) (v_ArrVal_2166 (Array Int Int)) (v_ArrVal_2163 (Array Int Int)) (v_ArrVal_2160 Int)) (<= 0 (+ (* (select (select (store (let ((.cse11 (store (let ((.cse13 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse6 .cse7 v_ArrVal_2154) .cse8 .cse9)) |c_~#stored_elements~0.base| v_ArrVal_2158))) (store .cse13 |c_~#queue~0.base| (store (let ((.cse14 (select .cse13 |c_~#queue~0.base|))) (store .cse14 (+ (* (select .cse14 .cse0) 4) |c_~#queue~0.offset|) v_ArrVal_2160)) .cse5 v_ArrVal_2161))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2163))) (store .cse11 |c_~#queue~0.base| (let ((.cse12 (select .cse11 |c_~#queue~0.base|))) (store .cse12 .cse0 (+ (select .cse12 .cse0) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))))) (= .cse15 20) (not (<= (+ 92 |c_~#queue~0.offset|) .cse10)))) (or (not (<= (+ 92 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (select |c_#length| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (not (<= 0 .cse8)) (and (forall ((v_ArrVal_2161 Int) (v_ArrVal_2166 (Array Int Int)) (v_ArrVal_2163 (Array Int Int))) (<= (+ (* (select (select (store (let ((.cse16 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse6 .cse7 v_ArrVal_2161)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2163))) (store .cse16 |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse17 (select .cse16 |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (store .cse17 .cse8 (+ (select .cse17 .cse8) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) .cse10)) (forall ((v_ArrVal_2161 Int) (v_ArrVal_2166 (Array Int Int)) (v_ArrVal_2163 (Array Int Int))) (<= 0 (+ (* (select (select (store (let ((.cse18 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse6 .cse7 v_ArrVal_2161)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2163))) (store .cse18 |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse19 (select .cse18 |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (store .cse19 .cse8 (+ (select .cse19 .cse8) 1))))) |c_~#stored_elements~0.base| v_ArrVal_2166) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))))))) is different from false [2022-11-16 12:50:34,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:50:34,738 INFO L93 Difference]: Finished difference Result 1347 states and 3225 transitions. [2022-11-16 12:50:34,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2022-11-16 12:50:34,739 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:50:34,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:50:34,741 INFO L225 Difference]: With dead ends: 1347 [2022-11-16 12:50:34,742 INFO L226 Difference]: Without dead ends: 1347 [2022-11-16 12:50:34,742 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 14 SyntacticMatches, 6 SemanticMatches, 51 ConstructedPredicates, 3 IntricatePredicates, 2 DeprecatedPredicates, 835 ImplicationChecksByTransitivity, 105.3s TimeCoverageRelationStatistics Valid=478, Invalid=1946, Unknown=38, NotChecked=294, Total=2756 [2022-11-16 12:50:34,743 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 23 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 707 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 506 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:50:34,743 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 89 Invalid, 707 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 197 Invalid, 0 Unknown, 506 Unchecked, 0.5s Time] [2022-11-16 12:50:34,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1347 states. [2022-11-16 12:50:34,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1347 to 1296. [2022-11-16 12:50:34,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1296 states, 1286 states have (on average 2.4222395023328147) internal successors, (3115), 1295 states have internal predecessors, (3115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:50:34,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 1296 states and 3115 transitions. [2022-11-16 12:50:34,769 INFO L78 Accepts]: Start accepts. Automaton has 1296 states and 3115 transitions. Word has length 22 [2022-11-16 12:50:34,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:50:34,769 INFO L495 AbstractCegarLoop]: Abstraction has 1296 states and 3115 transitions. [2022-11-16 12:50:34,770 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:50:34,770 INFO L276 IsEmpty]: Start isEmpty. Operand 1296 states and 3115 transitions. [2022-11-16 12:50:34,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:50:34,771 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:50:34,771 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:50:34,783 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-16 12:50:34,983 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:50:34,983 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:50:34,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:50:34,984 INFO L85 PathProgramCache]: Analyzing trace with hash 554228165, now seen corresponding path program 10 times [2022-11-16 12:50:34,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:50:34,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271284784] [2022-11-16 12:50:34,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:50:34,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:50:35,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:50:36,946 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:50:36,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:50:36,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [271284784] [2022-11-16 12:50:36,946 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [271284784] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:50:36,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1161818832] [2022-11-16 12:50:36,947 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 12:50:36,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:50:36,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:50:36,950 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:50:36,954 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-16 12:50:37,191 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 12:50:37,191 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:50:37,194 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 88 conjunts are in the unsatisfiable core [2022-11-16 12:50:37,198 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:50:37,212 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:37,218 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:37,220 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:37,257 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:50:37,257 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 36 [2022-11-16 12:50:37,274 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:37,278 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:50:37,286 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-16 12:50:41,684 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2022-11-16 12:50:41,933 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 37 [2022-11-16 12:50:42,407 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 43 [2022-11-16 12:50:42,593 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:42,594 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 71 [2022-11-16 12:50:44,862 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 80 [2022-11-16 12:50:45,187 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 78 [2022-11-16 12:50:45,511 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 75 [2022-11-16 12:50:45,814 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 79 [2022-11-16 12:50:46,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:46,013 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 88 [2022-11-16 12:50:46,194 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:50:46,194 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:50:46,413 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:50:46,413 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-11-16 12:50:46,433 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:50:46,433 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 45 [2022-11-16 12:50:46,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-16 12:50:46,473 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:50:46,473 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2022-11-16 12:50:46,477 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:50:46,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:50:46,482 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 17 [2022-11-16 12:51:09,542 WARN L233 SmtUtils]: Spent 10.05s on a formula simplification that was a NOOP. DAG size: 35 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:51:37,819 WARN L233 SmtUtils]: Spent 8.18s on a formula simplification that was a NOOP. DAG size: 49 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:51:53,227 WARN L233 SmtUtils]: Spent 5.95s on a formula simplification that was a NOOP. DAG size: 63 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 12:51:55,319 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse6 (select |c_#memory_int| |c_~#queue~0.base|)) (.cse2 (+ 84 |c_~#queue~0.offset|))) (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse0 (select .cse6 .cse2))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| Int)) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| .cse0)) (forall ((v_ArrVal_2273 Int)) (let ((.cse3 (store .cse6 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| 4)) v_ArrVal_2273))) (let ((.cse5 (select .cse3 .cse2))) (or (forall ((v_ArrVal_2275 Int) (v_ArrVal_2279 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1412| Int)) (let ((.cse1 (select (store (store |c_#memory_int| |c_~#queue~0.base| (store (store .cse3 .cse4 v_ArrVal_2275) .cse2 (+ .cse5 1))) |c_~#stored_elements~0.base| v_ArrVal_2279) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1412| (select .cse1 .cse2))) (forall ((v_ArrVal_2281 Int)) (<= 0 (+ (* (select (store .cse1 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1412| 4) |c_~#queue~0.offset|) v_ArrVal_2281) .cse2) 4) |c_~#queue~0.offset| 4)))))) (= .cse5 20))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| Int)) (or (forall ((v_ArrVal_2273 Int)) (let ((.cse9 (store .cse6 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| 4)) v_ArrVal_2273))) (let ((.cse7 (select .cse9 .cse2))) (or (= .cse7 20) (forall ((v_ArrVal_2275 Int) (v_ArrVal_2279 (Array Int Int)) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1412| Int)) (let ((.cse8 (select (store (store |c_#memory_int| |c_~#queue~0.base| (store (store .cse9 .cse4 v_ArrVal_2275) .cse2 (+ .cse7 1))) |c_~#stored_elements~0.base| v_ArrVal_2279) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1412| (select .cse8 .cse2))) (forall ((v_ArrVal_2281 Int)) (<= (+ (* (select (store .cse8 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1412| 4) |c_~#queue~0.offset|) v_ArrVal_2281) .cse2) 4) |c_~#queue~0.offset| 8) (select |c_#length| |c_~#queue~0.base|)))))))))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| .cse0)))) (or (not (= |c_~#queue~0.base| |c_~#stored_elements~0.base|)) (forall ((v_ArrVal_2273 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| Int)) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| .cse0)) (= (select (store .cse6 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1414| 4)) v_ArrVal_2273) .cse2) 20))))))) is different from false [2022-11-16 12:51:55,585 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 12:51:55,585 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1161818832] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:51:55,585 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:51:55,586 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 13] total 33 [2022-11-16 12:51:55,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879419892] [2022-11-16 12:51:55,586 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:51:55,586 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-11-16 12:51:55,586 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:51:55,587 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-16 12:51:55,587 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=906, Unknown=12, NotChecked=64, Total=1190 [2022-11-16 12:51:55,587 INFO L87 Difference]: Start difference. First operand 1296 states and 3115 transitions. Second operand has 35 states, 34 states have (on average 1.9411764705882353) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:52:02,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:52:02,775 INFO L93 Difference]: Finished difference Result 1403 states and 3358 transitions. [2022-11-16 12:52:02,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-16 12:52:02,777 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.9411764705882353) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:52:02,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:52:02,779 INFO L225 Difference]: With dead ends: 1403 [2022-11-16 12:52:02,779 INFO L226 Difference]: Without dead ends: 1403 [2022-11-16 12:52:02,780 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 19 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 494 ImplicationChecksByTransitivity, 83.4s TimeCoverageRelationStatistics Valid=256, Invalid=1068, Unknown=12, NotChecked=70, Total=1406 [2022-11-16 12:52:02,780 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 13 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 102 SdHoareTripleChecker+Invalid, 625 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 437 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:52:02,793 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 102 Invalid, 625 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 187 Invalid, 0 Unknown, 437 Unchecked, 0.5s Time] [2022-11-16 12:52:02,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1403 states. [2022-11-16 12:52:02,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1403 to 1333. [2022-11-16 12:52:02,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1333 states, 1323 states have (on average 2.4247921390778533) internal successors, (3208), 1332 states have internal predecessors, (3208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:52:02,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1333 states to 1333 states and 3208 transitions. [2022-11-16 12:52:02,823 INFO L78 Accepts]: Start accepts. Automaton has 1333 states and 3208 transitions. Word has length 22 [2022-11-16 12:52:02,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:52:02,823 INFO L495 AbstractCegarLoop]: Abstraction has 1333 states and 3208 transitions. [2022-11-16 12:52:02,824 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.9411764705882353) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:52:02,824 INFO L276 IsEmpty]: Start isEmpty. Operand 1333 states and 3208 transitions. [2022-11-16 12:52:02,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 12:52:02,828 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:52:02,828 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-16 12:52:02,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-11-16 12:52:03,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:52:03,035 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:52:03,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:52:03,036 INFO L85 PathProgramCache]: Analyzing trace with hash 556563395, now seen corresponding path program 11 times [2022-11-16 12:52:03,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:52:03,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787310985] [2022-11-16 12:52:03,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:52:03,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:52:03,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:52:05,722 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:52:05,722 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:52:05,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787310985] [2022-11-16 12:52:05,722 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1787310985] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:52:05,723 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [891103523] [2022-11-16 12:52:05,723 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-16 12:52:05,723 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:52:05,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:52:05,724 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:52:05,727 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-16 12:52:06,021 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-11-16 12:52:06,021 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:52:06,024 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 85 conjunts are in the unsatisfiable core [2022-11-16 12:52:06,028 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:52:06,045 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:06,050 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:06,109 INFO L321 Elim1Store]: treesize reduction 20, result has 63.0 percent of original size [2022-11-16 12:52:06,109 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 39 [2022-11-16 12:52:06,117 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 31 [2022-11-16 12:52:06,146 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-16 12:52:06,146 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-16 12:52:06,163 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-16 12:52:06,656 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:52:06,686 INFO L321 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-16 12:52:06,686 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 46 [2022-11-16 12:52:07,136 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:07,137 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2022-11-16 12:52:07,429 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 22 [2022-11-16 12:52:07,583 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:07,584 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2022-11-16 12:52:07,897 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:52:07,918 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:52:07,919 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 34 [2022-11-16 12:52:08,153 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:08,154 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2022-11-16 12:52:08,418 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 22 [2022-11-16 12:52:08,579 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:08,580 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2022-11-16 12:52:08,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:52:08,745 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2022-11-16 12:52:08,886 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:52:08,886 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:52:09,227 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:52:09,249 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))) is different from false [2022-11-16 12:52:11,623 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ (select .cse0 .cse2) 1)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2397 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2397) .cse2 .cse3)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse4) 4)))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2397) .cse2 .cse3)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse4) 4)) (select |c_#length| |c_~#queue~0.base|)))))) is different from false [2022-11-16 12:52:31,861 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse0 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse4 (select .cse0 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse0 |c_~#queue~0.base| (let ((.cse1 (store .cse4 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse1 .cse2 v_ArrVal_2397) .cse3 (+ (select .cse1 .cse3) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse4 .cse3))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse6 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse5 (select .cse6 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse5 .cse3))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse6 |c_~#queue~0.base| (let ((.cse7 (store .cse5 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse7 .cse2 v_ArrVal_2397) .cse3 (+ (select .cse7 .cse3) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse3) 4) |c_~#queue~0.offset|))))))))) is different from false [2022-11-16 12:52:31,903 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse5 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1))))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse2 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse0 (select .cse2 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse0 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse2 |c_~#queue~0.base| (let ((.cse3 (store .cse0 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse3 .cse4 v_ArrVal_2397) .cse1 (+ (select .cse3 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) (select |c_#length| |c_~#queue~0.base|))))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse7 (store .cse5 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse6 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse6 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse8 .cse4 v_ArrVal_2397) .cse1 (+ (select .cse8 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))))))) is different from false [2022-11-16 12:52:51,363 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 1 times theorem prover too weak. 0 trivial. 4 not checked. [2022-11-16 12:52:51,363 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [891103523] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:52:51,363 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:52:51,366 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 14, 16] total 41 [2022-11-16 12:52:51,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743164812] [2022-11-16 12:52:51,366 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:52:51,367 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-11-16 12:52:51,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:52:51,368 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-11-16 12:52:51,369 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=1133, Unknown=49, NotChecked=380, Total=1806 [2022-11-16 12:52:51,369 INFO L87 Difference]: Start difference. First operand 1333 states and 3208 transitions. Second operand has 43 states, 42 states have (on average 1.5714285714285714) internal successors, (66), 42 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:53:14,951 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse5 (select .cse0 .cse2))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (+ .cse5 1)) (.cse4 (+ 84 |c_~#queue~0.offset|)) (.cse10 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_2397 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2397) .cse2 .cse3)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse4) 4)))) (or (not (<= (+ 92 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (select |c_#length| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|))) (= .cse5 20) (let ((.cse9 (+ 88 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int)) (v_ArrVal_2390 Int)) (let ((.cse7 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2390) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse6 .cse4))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse6 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse8 .cse9 v_ArrVal_2397) .cse4 (+ (select .cse8 .cse4) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset| 4) .cse10)))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int)) (v_ArrVal_2390 Int)) (let ((.cse11 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2390) .cse2 .cse3)) |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse13 (select .cse11 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse11 |c_~#queue~0.base| (let ((.cse12 (store .cse13 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse12 .cse9 v_ArrVal_2397) .cse4 (+ (select .cse12 .cse4) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse4) 4) |c_~#queue~0.offset|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse13 .cse4)))))))))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_2397) .cse2 .cse3)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse4) 4)) .cse10)))))) is different from false [2022-11-16 12:53:15,004 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse7 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse9 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse0 (select .cse7 .cse9))) (let ((.cse8 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse10 (+ .cse0 1)) (.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse6 (select |c_#length| |c_~#queue~0.base|))) (and (or (= .cse0 20) (let ((.cse5 (+ 88 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int)) (v_ArrVal_2390 Int)) (let ((.cse3 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse7 .cse8 v_ArrVal_2390) .cse9 .cse10)) |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse1 (select .cse3 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse1 .cse2))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse3 |c_~#queue~0.base| (let ((.cse4 (store .cse1 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse4 .cse5 v_ArrVal_2397) .cse2 (+ (select .cse4 .cse2) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset| 4) .cse6)))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int)) (v_ArrVal_2390 Int)) (let ((.cse11 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse7 .cse8 v_ArrVal_2390) .cse9 .cse10)) |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse13 (select .cse11 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse11 |c_~#queue~0.base| (let ((.cse12 (store .cse13 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse12 .cse5 v_ArrVal_2397) .cse2 (+ (select .cse12 .cse2) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse2) 4) |c_~#queue~0.offset|))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse13 .cse2)))))))))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse7 .cse8 v_ArrVal_2397) .cse9 .cse10)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse2) 4)))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse7 .cse8 v_ArrVal_2397) .cse9 .cse10)) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse2) 4)) .cse6)))))) is different from false [2022-11-16 12:53:15,067 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse11 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse12 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse2 (select .cse11 .cse12))) (let ((.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse11 .cse12 (+ .cse2 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse7 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (or (= .cse2 20) (let ((.cse6 (+ 88 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse4 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse3 (select .cse4 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse3 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse4 |c_~#queue~0.base| (let ((.cse5 (store .cse3 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse5 .cse6 v_ArrVal_2397) .cse1 (+ (select .cse5 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse7)))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse9 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse8 (select .cse9 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse8 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse9 |c_~#queue~0.base| (let ((.cse10 (store .cse8 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse10 .cse6 v_ArrVal_2397) .cse1 (+ (select .cse10 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|)))))))))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse7)))))) is different from false [2022-11-16 12:53:15,090 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse5 (+ 88 |c_~#queue~0.offset|)) (.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse10 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse11 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (store .cse10 .cse11 (+ (select .cse10 .cse11) 1))))) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse6 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse3 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse2 (select .cse3 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse2 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse3 |c_~#queue~0.base| (let ((.cse4 (store .cse2 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse4 .cse5 v_ArrVal_2397) .cse1 (+ (select .cse4 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse6)))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse8 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse7 (select .cse8 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse7 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse8 |c_~#queue~0.base| (let ((.cse9 (store .cse7 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse9 .cse5 v_ArrVal_2397) .cse1 (+ (select .cse9 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse6)))) is different from false [2022-11-16 12:53:15,175 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse5 (+ 88 |c_~#queue~0.offset|)) (.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse6 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse3 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse2 (select .cse3 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse2 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse3 |c_~#queue~0.base| (let ((.cse4 (store .cse2 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse4 .cse5 v_ArrVal_2397) .cse1 (+ (select .cse4 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse6)))))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse8 (store .cse0 |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse7 (select .cse8 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse7 .cse1))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse8 |c_~#queue~0.base| (let ((.cse9 (store .cse7 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse9 .cse5 v_ArrVal_2397) .cse1 (+ (select .cse9 .cse1) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))))))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse6)))) is different from false [2022-11-16 12:53:15,201 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#length| |c_~#queue~0.base|)) (.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse0 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse1 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse4 (select .cse1 |c_~#queue~0.base|))) (or (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store .cse1 |c_~#queue~0.base| (let ((.cse2 (store .cse4 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse2 .cse3 v_ArrVal_2397) .cse0 (+ (select .cse2 .cse0) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) .cse5)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse4 .cse0))))))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset| 4) .cse5)) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int) (v_ArrVal_2394 (Array Int Int))) (let ((.cse7 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_2394))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| (select .cse6 .cse0))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store .cse7 |c_~#queue~0.base| (let ((.cse8 (store .cse6 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse8 .cse3 v_ArrVal_2397) .cse0 (+ (select .cse8 .cse0) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse0) 4) |c_~#queue~0.offset|))))))))) is different from false [2022-11-16 12:53:17,246 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse10 (select |c_#memory_int| |c_~#queue~0.base|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse4 (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|)) (.cse7 (select |c_#length| |c_~#queue~0.base|)) (.cse9 (+ 88 |c_~#queue~0.offset|)) (.cse11 (select .cse10 .cse5))) (and (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse0 (store .cse3 .cse4 v_ArrVal_2396))) (store (store .cse0 .cse1 v_ArrVal_2397) .cse2 (+ (select .cse0 .cse2) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse5) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (let ((.cse6 (store .cse3 .cse4 v_ArrVal_2396))) (store (store .cse6 .cse1 v_ArrVal_2397) .cse2 (+ (select .cse6 .cse2) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse5) 4) |c_~#queue~0.offset| 4) .cse7)) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int)) (or (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ |c_~#queue~0.offset| 4 (* 4 (select (select (store (store (store |c_#memory_int| |c_~#queue~0.base| (let ((.cse8 (store .cse10 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse8 .cse9 v_ArrVal_2397) .cse5 (+ (select .cse8 .cse5) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse5))) .cse7)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| .cse11)))) (forall ((|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| Int)) (or (forall ((v_ArrVal_2397 Int) (v_ArrVal_2396 Int) (v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ |c_~#queue~0.offset| (* 4 (select (select (store (store (store |c_#memory_int| |c_~#queue~0.base| (let ((.cse12 (store .cse10 (+ (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| 4) |c_~#queue~0.offset|) v_ArrVal_2396))) (store (store .cse12 .cse9 v_ArrVal_2397) .cse5 (+ (select .cse12 .cse5) 1)))) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse5))))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1418| .cse11))))))) is different from false [2022-11-16 12:53:17,283 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse5 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse2 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse4 .cse5 (+ (select .cse4 .cse5) 1)))) (.cse0 (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse4 .cse5 (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))) (.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse3 (select |c_#length| |c_~#queue~0.base|))) (and (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= 0 (+ (* (select (select (store (store .cse2 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset|))) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store .cse2 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse3)) (forall ((v_ArrVal_2402 (Array Int Int)) (v_ArrVal_2401 (Array Int Int))) (<= (+ (* (select (select (store (store .cse0 |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_2401) |c_~#stored_elements~0.base| v_ArrVal_2402) |c_~#queue~0.base|) .cse1) 4) |c_~#queue~0.offset| 4) .cse3))))) is different from false [2022-11-16 12:53:18,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:53:18,308 INFO L93 Difference]: Finished difference Result 2078 states and 4921 transitions. [2022-11-16 12:53:18,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-11-16 12:53:18,309 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.5714285714285714) internal successors, (66), 42 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-16 12:53:18,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:53:18,312 INFO L225 Difference]: With dead ends: 2078 [2022-11-16 12:53:18,313 INFO L226 Difference]: Without dead ends: 2078 [2022-11-16 12:53:18,314 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 19 SyntacticMatches, 16 SemanticMatches, 66 ConstructedPredicates, 13 IntricatePredicates, 1 DeprecatedPredicates, 939 ImplicationChecksByTransitivity, 66.4s TimeCoverageRelationStatistics Valid=532, Invalid=2412, Unknown=78, NotChecked=1534, Total=4556 [2022-11-16 12:53:18,314 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 546 mSDsluCounter, 311 mSDsCounter, 0 mSdLazyCounter, 1449 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 546 SdHoareTripleChecker+Valid, 326 SdHoareTripleChecker+Invalid, 4070 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 1449 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 2567 IncrementalHoareTripleChecker+Unchecked, 4.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:53:18,314 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [546 Valid, 326 Invalid, 4070 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 1449 Invalid, 0 Unknown, 2567 Unchecked, 4.5s Time] [2022-11-16 12:53:18,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2022-11-16 12:53:18,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 1193. [2022-11-16 12:53:18,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1193 states, 1183 states have (on average 2.394759087066779) internal successors, (2833), 1192 states have internal predecessors, (2833), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:53:18,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1193 states to 1193 states and 2833 transitions. [2022-11-16 12:53:18,348 INFO L78 Accepts]: Start accepts. Automaton has 1193 states and 2833 transitions. Word has length 22 [2022-11-16 12:53:18,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:53:18,349 INFO L495 AbstractCegarLoop]: Abstraction has 1193 states and 2833 transitions. [2022-11-16 12:53:18,349 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 42 states have (on average 1.5714285714285714) internal successors, (66), 42 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:53:18,349 INFO L276 IsEmpty]: Start isEmpty. Operand 1193 states and 2833 transitions. [2022-11-16 12:53:18,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-16 12:53:18,351 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:53:18,351 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 12:53:18,360 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-16 12:53:18,559 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:53:18,559 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:53:18,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:53:18,559 INFO L85 PathProgramCache]: Analyzing trace with hash 459879344, now seen corresponding path program 1 times [2022-11-16 12:53:18,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:53:18,559 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814786337] [2022-11-16 12:53:18,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:53:18,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:53:18,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:53:19,676 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-16 12:53:19,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:53:19,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814786337] [2022-11-16 12:53:19,676 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1814786337] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:53:19,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [722617192] [2022-11-16 12:53:19,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:53:19,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:53:19,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:53:19,678 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:53:19,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-16 12:53:19,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:53:19,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 447 conjuncts, 73 conjunts are in the unsatisfiable core [2022-11-16 12:53:19,968 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:53:19,980 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:19,985 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:19,987 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:20,020 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 12:53:20,020 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 35 [2022-11-16 12:53:20,027 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2022-11-16 12:53:20,043 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 50 [2022-11-16 12:53:20,296 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:53:20,321 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:53:20,321 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:53:20,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:20,452 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:53:20,621 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2022-11-16 12:53:20,706 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:20,707 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:53:20,850 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:53:20,873 INFO L321 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-16 12:53:20,873 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:53:21,035 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:21,036 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:53:21,216 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2022-11-16 12:53:21,299 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:53:21,300 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-16 12:53:21,482 INFO L321 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-16 12:53:21,482 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-16 12:53:21,578 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-16 12:53:21,588 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:53:21,588 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:53:21,962 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2531 Int) (v_ArrVal_2533 (Array Int Int)) (v_ArrVal_2535 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2531)) |c_~#stored_elements~0.base| v_ArrVal_2533) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (= (select (store .cse0 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| 4)) v_ArrVal_2535) .cse1) 20)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| (select .cse0 .cse1))) (not (<= v_ArrVal_2531 (+ |c_t1Thread1of1ForFork1_enqueue_#t~mem40#1| 1)))))) is different from false [2022-11-16 12:53:22,215 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2529 Int) (v_ArrVal_2531 Int) (v_ArrVal_2533 (Array Int Int)) (v_ArrVal_2535 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| Int)) (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse1 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse0 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2529) .cse1 v_ArrVal_2531)) |c_~#stored_elements~0.base| v_ArrVal_2533) |c_~#queue~0.base|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_2531) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| (select .cse2 .cse3))) (not (= (select (store .cse2 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| 4)) v_ArrVal_2535) .cse3) 20)))))) is different from false [2022-11-16 12:53:22,298 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2529 Int) (v_ArrVal_2531 Int) (v_ArrVal_2533 (Array Int Int)) (v_ArrVal_2535 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| Int) (v_ArrVal_2527 Int)) (let ((.cse2 (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2527)) (.cse3 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2529) .cse3 v_ArrVal_2531)) |c_~#stored_elements~0.base| v_ArrVal_2533) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| (select .cse0 .cse1))) (not (= (select (store .cse0 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| 4)) v_ArrVal_2535) .cse1) 20)) (< (+ (select .cse2 .cse3) 1) v_ArrVal_2531))))) is different from false [2022-11-16 12:53:29,280 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2529 Int) (v_ArrVal_2526 (Array Int Int)) (v_ArrVal_2531 Int) (v_ArrVal_2533 (Array Int Int)) (v_ArrVal_2524 Int) (v_ArrVal_2535 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| Int) (v_ArrVal_2527 Int)) (let ((.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_2524)) |c_~#stored_elements~0.base| v_ArrVal_2526))) (let ((.cse2 (select .cse6 |c_~#queue~0.base|))) (let ((.cse5 (store .cse2 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| 4)) v_ArrVal_2527)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse5 (+ 88 |c_~#queue~0.offset|) v_ArrVal_2529) .cse1 v_ArrVal_2531)) |c_~#stored_elements~0.base| v_ArrVal_2533) |c_~#queue~0.base|))) (or (not (= (select (store .cse0 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| 4)) v_ArrVal_2535) .cse1) 20)) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| (select .cse2 .cse1))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| (select .cse0 .cse1))) (< (+ (select .cse3 .cse4) 1) v_ArrVal_2524) (< (+ (select .cse5 .cse1) 1) v_ArrVal_2531)))))))) is different from false [2022-11-16 12:53:29,428 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2529 Int) (v_ArrVal_2526 (Array Int Int)) (v_ArrVal_2531 Int) (v_ArrVal_2533 (Array Int Int)) (v_ArrVal_2522 Int) (v_ArrVal_2524 Int) (v_ArrVal_2535 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| Int) (v_ArrVal_2527 Int)) (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|)) (.cse5 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse4 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2522) .cse5 v_ArrVal_2524)) |c_~#stored_elements~0.base| v_ArrVal_2526))) (let ((.cse3 (select .cse6 |c_~#queue~0.base|))) (let ((.cse0 (store .cse3 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| 4)) v_ArrVal_2527)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse0 (+ 88 |c_~#queue~0.offset|) v_ArrVal_2529) .cse1 v_ArrVal_2531)) |c_~#stored_elements~0.base| v_ArrVal_2533) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_2531) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| (select .cse2 .cse1))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| (select .cse3 .cse1))) (< (+ (select .cse4 .cse5) 1) v_ArrVal_2524) (not (= (select (store .cse2 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| 4)) v_ArrVal_2535) .cse1) 20))))))))) is different from false [2022-11-16 12:53:29,609 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2529 Int) (v_ArrVal_2526 (Array Int Int)) (v_ArrVal_2520 Int) (v_ArrVal_2531 Int) (v_ArrVal_2533 (Array Int Int)) (v_ArrVal_2522 Int) (v_ArrVal_2524 Int) (v_ArrVal_2535 Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| Int) (|v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| Int) (v_ArrVal_2527 Int)) (let ((.cse3 (store (select |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base|) (+ (* 4 |c_t1Thread1of1ForFork1_enqueue_#t~mem36#1|) |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2520)) (.cse4 (+ 84 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|))) (let ((.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork1_enqueue_~q#1.base| (store (store .cse3 (+ 88 |c_t1Thread1of1ForFork1_enqueue_~q#1.offset|) v_ArrVal_2522) .cse4 v_ArrVal_2524)) |c_~#stored_elements~0.base| v_ArrVal_2526))) (let ((.cse0 (select .cse6 |c_~#queue~0.base|))) (let ((.cse5 (store .cse0 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| 4)) v_ArrVal_2527)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse5 (+ 88 |c_~#queue~0.offset|) v_ArrVal_2529) .cse1 v_ArrVal_2531)) |c_~#stored_elements~0.base| v_ArrVal_2533) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1426| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| (select .cse2 .cse1))) (< (+ (select .cse3 .cse4) 1) v_ArrVal_2524) (not (= 20 (select (store .cse2 (+ |c_~#queue~0.offset| (* |v_t1Thread1of1ForFork1_enqueue_#t~mem36#1_1424| 4)) v_ArrVal_2535) .cse1))) (< (+ (select .cse5 .cse1) 1) v_ArrVal_2531)))))))) is different from false [2022-11-16 12:53:36,800 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 4 refuted. 1 times theorem prover too weak. 0 trivial. 13 not checked. [2022-11-16 12:53:36,800 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [722617192] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 12:53:36,800 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 12:53:36,801 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 16] total 36 [2022-11-16 12:53:36,801 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580275688] [2022-11-16 12:53:36,801 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 12:53:36,801 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-16 12:53:36,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-16 12:53:36,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-16 12:53:36,803 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=713, Unknown=34, NotChecked=378, Total=1332 [2022-11-16 12:53:36,803 INFO L87 Difference]: Start difference. First operand 1193 states and 2833 transitions. Second operand has 37 states, 37 states have (on average 2.2162162162162162) internal successors, (82), 36 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:53:56,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 12:53:56,589 INFO L93 Difference]: Finished difference Result 2449 states and 5774 transitions. [2022-11-16 12:53:56,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-11-16 12:53:56,590 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 2.2162162162162162) internal successors, (82), 36 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-16 12:53:56,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 12:53:56,593 INFO L225 Difference]: With dead ends: 2449 [2022-11-16 12:53:56,594 INFO L226 Difference]: Without dead ends: 2449 [2022-11-16 12:53:56,594 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 36 SyntacticMatches, 34 SemanticMatches, 58 ConstructedPredicates, 6 IntricatePredicates, 0 DeprecatedPredicates, 1226 ImplicationChecksByTransitivity, 33.5s TimeCoverageRelationStatistics Valid=726, Invalid=2122, Unknown=38, NotChecked=654, Total=3540 [2022-11-16 12:53:56,595 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 424 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 600 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 424 SdHoareTripleChecker+Valid, 153 SdHoareTripleChecker+Invalid, 2371 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 600 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1742 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-11-16 12:53:56,595 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [424 Valid, 153 Invalid, 2371 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 600 Invalid, 0 Unknown, 1742 Unchecked, 1.5s Time] [2022-11-16 12:53:56,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2449 states. [2022-11-16 12:53:56,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2449 to 1994. [2022-11-16 12:53:56,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1994 states, 1984 states have (on average 2.3775201612903225) internal successors, (4717), 1993 states have internal predecessors, (4717), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:53:56,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 1994 states and 4717 transitions. [2022-11-16 12:53:56,643 INFO L78 Accepts]: Start accepts. Automaton has 1994 states and 4717 transitions. Word has length 29 [2022-11-16 12:53:56,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 12:53:56,643 INFO L495 AbstractCegarLoop]: Abstraction has 1994 states and 4717 transitions. [2022-11-16 12:53:56,643 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 2.2162162162162162) internal successors, (82), 36 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 12:53:56,643 INFO L276 IsEmpty]: Start isEmpty. Operand 1994 states and 4717 transitions. [2022-11-16 12:53:56,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-16 12:53:56,646 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 12:53:56,646 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2022-11-16 12:53:56,659 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-16 12:53:56,858 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:53:56,859 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting t1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 101 more)] === [2022-11-16 12:53:56,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 12:53:56,859 INFO L85 PathProgramCache]: Analyzing trace with hash -1209612461, now seen corresponding path program 12 times [2022-11-16 12:53:56,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-16 12:53:56,859 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959789349] [2022-11-16 12:53:56,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 12:53:56,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 12:53:56,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 12:54:00,352 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:54:00,352 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-16 12:54:00,352 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959789349] [2022-11-16 12:54:00,352 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959789349] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 12:54:00,353 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1776307297] [2022-11-16 12:54:00,353 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-16 12:54:00,353 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 12:54:00,353 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 12:54:00,355 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 12:54:00,357 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4bc1d78f-f9cf-4e24-bbf5-5f9892b9a959/bin/uautomizer-tPACEb0tL8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-16 12:54:00,895 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-11-16 12:54:00,895 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 12:54:00,899 INFO L263 TraceCheckSpWp]: Trace formula consists of 454 conjuncts, 100 conjunts are in the unsatisfiable core [2022-11-16 12:54:00,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 12:54:00,917 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:00,960 INFO L321 Elim1Store]: treesize reduction 33, result has 25.0 percent of original size [2022-11-16 12:54:00,960 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 15 treesize of output 19 [2022-11-16 12:54:01,737 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 16 [2022-11-16 12:54:01,917 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:01,917 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 19 [2022-11-16 12:54:02,144 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:02,145 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 26 [2022-11-16 12:54:02,334 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:54:02,355 INFO L321 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-16 12:54:02,356 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 35 [2022-11-16 12:54:02,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:02,645 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2022-11-16 12:54:03,200 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 27 [2022-11-16 12:54:03,439 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:03,440 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 38 [2022-11-16 12:54:03,781 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 12:54:03,803 INFO L321 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-16 12:54:03,803 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 71 treesize of output 49 [2022-11-16 12:54:04,119 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:04,120 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 44 [2022-11-16 12:54:04,639 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 37 [2022-11-16 12:54:04,908 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 12:54:04,909 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2022-11-16 12:54:05,137 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 12:54:05,137 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 12:54:20,507 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:54:20,507 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 2374 treesize of output 1192 [2022-11-16 12:54:20,655 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 12:54:20,656 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 8259 treesize of output 8021 [2022-11-16 12:54:20,711 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8313 treesize of output 8061 [2022-11-16 12:54:20,796 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8597 treesize of output 8437 [2022-11-16 12:54:20,873 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8437 treesize of output 8309 [2022-11-16 12:54:20,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8757 treesize of output 8597 [2022-11-16 12:54:21,056 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8933 treesize of output 8677 [2022-11-16 12:54:21,122 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8965 treesize of output 8697 [2022-11-16 12:54:21,179 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8697 treesize of output 8569 [2022-11-16 12:54:21,240 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8873 treesize of output 8617 [2022-11-16 12:54:21,371 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3