./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/weaver/unroll-cond-2.wvr.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/weaver/unroll-cond-2.wvr.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 99c42ba3d1f6c70520bbcf0a3136609166f98fb21063bda215f7779ff0bb27ca --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 11:11:54,512 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 11:11:54,515 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 11:11:54,548 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 11:11:54,548 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 11:11:54,550 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 11:11:54,551 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 11:11:54,555 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 11:11:54,560 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 11:11:54,562 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 11:11:54,564 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 11:11:54,565 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 11:11:54,567 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 11:11:54,570 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 11:11:54,571 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 11:11:54,574 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 11:11:54,576 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 11:11:54,582 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 11:11:54,583 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 11:11:54,585 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 11:11:54,589 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 11:11:54,590 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 11:11:54,591 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 11:11:54,594 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 11:11:54,597 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 11:11:54,603 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 11:11:54,603 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 11:11:54,605 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 11:11:54,606 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 11:11:54,607 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 11:11:54,608 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 11:11:54,609 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 11:11:54,610 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 11:11:54,613 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 11:11:54,615 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 11:11:54,615 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 11:11:54,616 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 11:11:54,616 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 11:11:54,617 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 11:11:54,617 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 11:11:54,618 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 11:11:54,619 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-16 11:11:54,662 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 11:11:54,662 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 11:11:54,663 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 11:11:54,664 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 11:11:54,664 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 11:11:54,665 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 11:11:54,665 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 11:11:54,666 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 11:11:54,666 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 11:11:54,666 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 11:11:54,667 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 11:11:54,668 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 11:11:54,668 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 11:11:54,668 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 11:11:54,668 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 11:11:54,669 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-16 11:11:54,669 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-16 11:11:54,669 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-16 11:11:54,669 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 11:11:54,669 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 11:11:54,670 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 11:11:54,670 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 11:11:54,670 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 11:11:54,670 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 11:11:54,671 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 11:11:54,671 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 11:11:54,673 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 11:11:54,673 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 11:11:54,673 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-16 11:11:54,673 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 11:11:54,673 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 99c42ba3d1f6c70520bbcf0a3136609166f98fb21063bda215f7779ff0bb27ca [2022-11-16 11:11:54,970 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 11:11:55,006 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 11:11:55,030 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 11:11:55,031 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 11:11:55,033 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 11:11:55,035 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/weaver/unroll-cond-2.wvr.c [2022-11-16 11:11:55,100 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/77aa8e1b7/e1dff1ddceb543c48076004f01d41896/FLAG27248793a [2022-11-16 11:11:55,546 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 11:11:55,547 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/sv-benchmarks/c/weaver/unroll-cond-2.wvr.c [2022-11-16 11:11:55,557 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/77aa8e1b7/e1dff1ddceb543c48076004f01d41896/FLAG27248793a [2022-11-16 11:11:55,902 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/77aa8e1b7/e1dff1ddceb543c48076004f01d41896 [2022-11-16 11:11:55,904 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 11:11:55,906 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 11:11:55,911 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 11:11:55,911 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 11:11:55,914 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 11:11:55,915 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:11:55" (1/1) ... [2022-11-16 11:11:55,917 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3338e8fa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:11:55, skipping insertion in model container [2022-11-16 11:11:55,918 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:11:55" (1/1) ... [2022-11-16 11:11:55,925 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 11:11:55,948 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 11:11:56,205 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/sv-benchmarks/c/weaver/unroll-cond-2.wvr.c[2474,2487] [2022-11-16 11:11:56,219 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:11:56,238 ERROR L326 MainTranslator]: Unsupported Syntax: Found a cast between two array/pointer types of different sizes while using memory model HoenickeLindenmann_Original (while Not using bitvector translation) [2022-11-16 11:11:56,238 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieTranslatorObserver@3c2f3218 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:11:56, skipping insertion in model container [2022-11-16 11:11:56,239 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 11:11:56,239 INFO L184 ToolchainWalker]: Toolchain execution was canceled (user or tool) before executing de.uni_freiburg.informatik.ultimate.boogie.procedureinliner [2022-11-16 11:11:56,241 INFO L158 Benchmark]: Toolchain (without parser) took 334.09ms. Allocated memory is still 98.6MB. Free memory was 63.4MB in the beginning and 74.7MB in the end (delta: -11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-16 11:11:56,241 INFO L158 Benchmark]: CDTParser took 0.25ms. Allocated memory is still 98.6MB. Free memory is still 79.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 11:11:56,242 INFO L158 Benchmark]: CACSL2BoogieTranslator took 328.28ms. Allocated memory is still 98.6MB. Free memory was 63.2MB in the beginning and 74.7MB in the end (delta: -11.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-16 11:11:56,244 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25ms. Allocated memory is still 98.6MB. Free memory is still 79.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 328.28ms. Allocated memory is still 98.6MB. Free memory was 63.2MB in the beginning and 74.7MB in the end (delta: -11.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - UnsupportedSyntaxResult [Line: 100]: Unsupported Syntax Found a cast between two array/pointer types of different sizes while using memory model HoenickeLindenmann_Original (while Not using bitvector translation) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/weaver/unroll-cond-2.wvr.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 99c42ba3d1f6c70520bbcf0a3136609166f98fb21063bda215f7779ff0bb27ca --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 11:11:58,363 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 11:11:58,366 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 11:11:58,403 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 11:11:58,403 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 11:11:58,407 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 11:11:58,410 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 11:11:58,416 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 11:11:58,419 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 11:11:58,424 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 11:11:58,426 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 11:11:58,428 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 11:11:58,429 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 11:11:58,431 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 11:11:58,433 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 11:11:58,435 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 11:11:58,437 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 11:11:58,438 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 11:11:58,443 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 11:11:58,448 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 11:11:58,452 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 11:11:58,454 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 11:11:58,456 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 11:11:58,458 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 11:11:58,464 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 11:11:58,468 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 11:11:58,469 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 11:11:58,470 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 11:11:58,471 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 11:11:58,472 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 11:11:58,473 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 11:11:58,474 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 11:11:58,476 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 11:11:58,477 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 11:11:58,478 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 11:11:58,478 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 11:11:58,479 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 11:11:58,479 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 11:11:58,480 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 11:11:58,482 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 11:11:58,482 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 11:11:58,488 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2022-11-16 11:11:58,527 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 11:11:58,527 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 11:11:58,528 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 11:11:58,528 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 11:11:58,529 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 11:11:58,529 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 11:11:58,531 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 11:11:58,531 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 11:11:58,531 INFO L138 SettingsManager]: * Use SBE=true [2022-11-16 11:11:58,532 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 11:11:58,533 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 11:11:58,533 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-16 11:11:58,533 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 11:11:58,534 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 11:11:58,534 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 11:11:58,534 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-16 11:11:58,535 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-16 11:11:58,535 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-16 11:11:58,535 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 11:11:58,535 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 11:11:58,536 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-16 11:11:58,536 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-16 11:11:58,536 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 11:11:58,536 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 11:11:58,537 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 11:11:58,537 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 11:11:58,538 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 11:11:58,538 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 11:11:58,538 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 11:11:58,539 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 11:11:58,539 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-11-16 11:11:58,539 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-16 11:11:58,540 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-16 11:11:58,540 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 99c42ba3d1f6c70520bbcf0a3136609166f98fb21063bda215f7779ff0bb27ca [2022-11-16 11:11:58,946 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 11:11:58,979 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 11:11:58,982 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 11:11:58,983 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 11:11:58,986 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 11:11:58,987 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/../../sv-benchmarks/c/weaver/unroll-cond-2.wvr.c [2022-11-16 11:11:59,057 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/4603f6704/0433d89dcaa74310bb8394641bb69092/FLAGe9ad90fe6 [2022-11-16 11:11:59,557 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 11:11:59,558 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/sv-benchmarks/c/weaver/unroll-cond-2.wvr.c [2022-11-16 11:11:59,565 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/4603f6704/0433d89dcaa74310bb8394641bb69092/FLAGe9ad90fe6 [2022-11-16 11:11:59,948 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/data/4603f6704/0433d89dcaa74310bb8394641bb69092 [2022-11-16 11:11:59,951 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 11:11:59,952 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 11:11:59,953 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 11:11:59,954 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 11:11:59,966 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 11:11:59,967 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:11:59" (1/1) ... [2022-11-16 11:11:59,968 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@57a49a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:11:59, skipping insertion in model container [2022-11-16 11:11:59,973 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 11:11:59" (1/1) ... [2022-11-16 11:11:59,980 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 11:12:00,004 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 11:12:00,166 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/sv-benchmarks/c/weaver/unroll-cond-2.wvr.c[2474,2487] [2022-11-16 11:12:00,175 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:12:00,200 INFO L200 MainTranslator]: Restarting translation with changed settings: SettingsChange [mNewPreferredMemoryModel=HoenickeLindenmann_1ByteResolution] [2022-11-16 11:12:00,206 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 11:12:00,247 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/sv-benchmarks/c/weaver/unroll-cond-2.wvr.c[2474,2487] [2022-11-16 11:12:00,251 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:12:00,256 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 11:12:00,284 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/sv-benchmarks/c/weaver/unroll-cond-2.wvr.c[2474,2487] [2022-11-16 11:12:00,288 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 11:12:00,304 INFO L208 MainTranslator]: Completed translation [2022-11-16 11:12:00,304 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00 WrapperNode [2022-11-16 11:12:00,304 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 11:12:00,305 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 11:12:00,305 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 11:12:00,306 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 11:12:00,311 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,322 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,345 INFO L138 Inliner]: procedures = 26, calls = 33, calls flagged for inlining = 11, calls inlined = 11, statements flattened = 139 [2022-11-16 11:12:00,346 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 11:12:00,347 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 11:12:00,347 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 11:12:00,347 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 11:12:00,356 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,356 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,361 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,361 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,369 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,373 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,375 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,376 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,379 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 11:12:00,380 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 11:12:00,380 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 11:12:00,380 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 11:12:00,381 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (1/1) ... [2022-11-16 11:12:00,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 11:12:00,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/z3 [2022-11-16 11:12:00,411 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 11:12:00,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 11:12:00,458 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 11:12:00,458 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-11-16 11:12:00,458 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 11:12:00,460 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2022-11-16 11:12:00,461 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2022-11-16 11:12:00,461 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2022-11-16 11:12:00,462 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2022-11-16 11:12:00,462 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2022-11-16 11:12:00,462 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 11:12:00,462 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 11:12:00,462 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 11:12:00,462 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 11:12:00,463 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2022-11-16 11:12:00,464 WARN L209 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-11-16 11:12:00,608 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 11:12:00,611 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 11:12:01,123 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 11:12:01,132 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 11:12:01,132 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-11-16 11:12:01,134 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:12:01 BoogieIcfgContainer [2022-11-16 11:12:01,135 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 11:12:01,137 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 11:12:01,137 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 11:12:01,140 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 11:12:01,140 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 11:11:59" (1/3) ... [2022-11-16 11:12:01,141 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71062bd0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 11:12:01, skipping insertion in model container [2022-11-16 11:12:01,141 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 11:12:00" (2/3) ... [2022-11-16 11:12:01,142 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71062bd0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 11:12:01, skipping insertion in model container [2022-11-16 11:12:01,142 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 11:12:01" (3/3) ... [2022-11-16 11:12:01,143 INFO L112 eAbstractionObserver]: Analyzing ICFG unroll-cond-2.wvr.c [2022-11-16 11:12:01,163 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 11:12:01,164 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 20 error locations. [2022-11-16 11:12:01,164 INFO L515 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-11-16 11:12:01,343 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-11-16 11:12:01,389 INFO L115 etLargeBlockEncoding]: Petri net LBE is using semantic-based independence relation. [2022-11-16 11:12:01,407 INFO L131 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 191 places, 199 transitions, 414 flow [2022-11-16 11:12:01,410 INFO L113 LiptonReduction]: Starting Lipton reduction on Petri net that has 191 places, 199 transitions, 414 flow [2022-11-16 11:12:01,412 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 191 places, 199 transitions, 414 flow [2022-11-16 11:12:01,499 INFO L130 PetriNetUnfolder]: 15/197 cut-off events. [2022-11-16 11:12:01,499 INFO L131 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-11-16 11:12:01,505 INFO L83 FinitePrefix]: Finished finitePrefix Result has 206 conditions, 197 events. 15/197 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 319 event pairs, 0 based on Foata normal form. 0/162 useless extension candidates. Maximal degree in co-relation 109. Up to 2 conditions per place. [2022-11-16 11:12:01,509 INFO L119 LiptonReduction]: Number of co-enabled transitions 4156 [2022-11-16 11:12:28,948 INFO L134 LiptonReduction]: Checked pairs total: 4096 [2022-11-16 11:12:28,948 INFO L136 LiptonReduction]: Total number of compositions: 225 [2022-11-16 11:12:28,957 INFO L113 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 43 places, 39 transitions, 94 flow [2022-11-16 11:12:28,990 INFO L135 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 246 states, 158 states have (on average 3.911392405063291) internal successors, (618), 245 states have internal predecessors, (618), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:29,010 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 11:12:29,016 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@461942de, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 11:12:29,017 INFO L358 AbstractCegarLoop]: Starting to check reachability of 30 error locations. [2022-11-16 11:12:29,020 INFO L276 IsEmpty]: Start isEmpty. Operand has 246 states, 158 states have (on average 3.911392405063291) internal successors, (618), 245 states have internal predecessors, (618), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:29,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2022-11-16 11:12:29,025 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:29,026 INFO L195 NwaCegarLoop]: trace histogram [1, 1] [2022-11-16 11:12:29,027 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:29,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:29,033 INFO L85 PathProgramCache]: Analyzing trace with hash 25397, now seen corresponding path program 1 times [2022-11-16 11:12:29,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:29,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [119081028] [2022-11-16 11:12:29,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:29,048 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:29,049 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:29,052 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:29,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-16 11:12:29,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:29,132 INFO L263 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 11:12:29,136 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:29,246 INFO L321 Elim1Store]: treesize reduction 39, result has 40.0 percent of original size [2022-11-16 11:12:29,247 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 33 [2022-11-16 11:12:29,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:29,272 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:29,273 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:29,273 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [119081028] [2022-11-16 11:12:29,274 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [119081028] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:29,274 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:29,274 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:29,276 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395822430] [2022-11-16 11:12:29,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:29,295 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:29,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:29,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:29,335 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:29,338 INFO L87 Difference]: Start difference. First operand has 246 states, 158 states have (on average 3.911392405063291) internal successors, (618), 245 states have internal predecessors, (618), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:29,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:29,604 INFO L93 Difference]: Finished difference Result 220 states and 553 transitions. [2022-11-16 11:12:29,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:29,607 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2 [2022-11-16 11:12:29,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:29,619 INFO L225 Difference]: With dead ends: 220 [2022-11-16 11:12:29,619 INFO L226 Difference]: Without dead ends: 220 [2022-11-16 11:12:29,620 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:29,624 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 32 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:29,625 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 2 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 11:12:29,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2022-11-16 11:12:29,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 220. [2022-11-16 11:12:29,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 220 states, 145 states have (on average 3.8137931034482757) internal successors, (553), 219 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:29,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 553 transitions. [2022-11-16 11:12:29,696 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 553 transitions. Word has length 2 [2022-11-16 11:12:29,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:29,698 INFO L495 AbstractCegarLoop]: Abstraction has 220 states and 553 transitions. [2022-11-16 11:12:29,698 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:29,698 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 553 transitions. [2022-11-16 11:12:29,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2022-11-16 11:12:29,699 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:29,699 INFO L195 NwaCegarLoop]: trace histogram [1, 1] [2022-11-16 11:12:29,716 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:29,910 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:29,911 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:29,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:29,912 INFO L85 PathProgramCache]: Analyzing trace with hash 25398, now seen corresponding path program 1 times [2022-11-16 11:12:29,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:29,913 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [393864324] [2022-11-16 11:12:29,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:29,913 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:29,913 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:29,915 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:29,925 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-16 11:12:29,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:29,989 INFO L263 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 11:12:29,993 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:30,117 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:30,118 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:30,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:30,169 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:30,169 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:30,170 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [393864324] [2022-11-16 11:12:30,170 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [393864324] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:30,170 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:30,170 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:30,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238684937] [2022-11-16 11:12:30,170 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:30,171 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:30,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:30,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:30,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:30,173 INFO L87 Difference]: Start difference. First operand 220 states and 553 transitions. Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:30,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:30,610 INFO L93 Difference]: Finished difference Result 438 states and 1104 transitions. [2022-11-16 11:12:30,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:30,610 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2 [2022-11-16 11:12:30,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:30,614 INFO L225 Difference]: With dead ends: 438 [2022-11-16 11:12:30,615 INFO L226 Difference]: Without dead ends: 438 [2022-11-16 11:12:30,615 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:30,620 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 30 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:30,621 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 4 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-16 11:12:30,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states. [2022-11-16 11:12:30,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 221. [2022-11-16 11:12:30,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 146 states have (on average 3.815068493150685) internal successors, (557), 220 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:30,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 557 transitions. [2022-11-16 11:12:30,659 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 557 transitions. Word has length 2 [2022-11-16 11:12:30,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:30,659 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 557 transitions. [2022-11-16 11:12:30,660 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:30,660 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 557 transitions. [2022-11-16 11:12:30,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2022-11-16 11:12:30,660 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:30,660 INFO L195 NwaCegarLoop]: trace histogram [1, 1] [2022-11-16 11:12:30,682 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:30,876 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:30,876 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:30,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:30,877 INFO L85 PathProgramCache]: Analyzing trace with hash 25498, now seen corresponding path program 1 times [2022-11-16 11:12:30,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:30,878 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2043802808] [2022-11-16 11:12:30,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:30,878 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:30,878 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:30,881 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:30,888 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-16 11:12:30,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:30,968 INFO L263 TraceCheckSpWp]: Trace formula consists of 52 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:12:30,969 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:31,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:31,005 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:31,005 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:31,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2043802808] [2022-11-16 11:12:31,006 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2043802808] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:31,006 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:31,006 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:31,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914411340] [2022-11-16 11:12:31,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:31,007 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:31,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:31,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:31,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:31,011 INFO L87 Difference]: Start difference. First operand 221 states and 557 transitions. Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:31,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:31,272 INFO L93 Difference]: Finished difference Result 221 states and 554 transitions. [2022-11-16 11:12:31,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:31,273 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2 [2022-11-16 11:12:31,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:31,275 INFO L225 Difference]: With dead ends: 221 [2022-11-16 11:12:31,275 INFO L226 Difference]: Without dead ends: 221 [2022-11-16 11:12:31,275 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:31,277 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 0 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:31,277 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-16 11:12:31,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2022-11-16 11:12:31,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 221. [2022-11-16 11:12:31,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 146 states have (on average 3.7945205479452055) internal successors, (554), 220 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:31,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 554 transitions. [2022-11-16 11:12:31,306 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 554 transitions. Word has length 2 [2022-11-16 11:12:31,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:31,306 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 554 transitions. [2022-11-16 11:12:31,306 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:31,306 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 554 transitions. [2022-11-16 11:12:31,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-16 11:12:31,307 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:31,307 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-16 11:12:31,334 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:31,534 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:31,535 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:31,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:31,535 INFO L85 PathProgramCache]: Analyzing trace with hash 790633, now seen corresponding path program 1 times [2022-11-16 11:12:31,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:31,536 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1182949421] [2022-11-16 11:12:31,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:31,536 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:31,536 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:31,539 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:31,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-16 11:12:31,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:31,613 INFO L263 TraceCheckSpWp]: Trace formula consists of 57 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-16 11:12:31,614 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:31,724 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:31,724 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:31,793 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:31,793 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:32,050 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:32,051 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:32,051 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1182949421] [2022-11-16 11:12:32,051 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1182949421] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:32,051 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:32,051 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2] total 4 [2022-11-16 11:12:32,052 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980964239] [2022-11-16 11:12:32,052 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:32,052 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 11:12:32,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:32,053 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 11:12:32,053 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-11-16 11:12:32,053 INFO L87 Difference]: Start difference. First operand 221 states and 554 transitions. Second operand has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:32,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:32,971 INFO L93 Difference]: Finished difference Result 441 states and 1113 transitions. [2022-11-16 11:12:32,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 11:12:32,972 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-16 11:12:32,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:32,975 INFO L225 Difference]: With dead ends: 441 [2022-11-16 11:12:32,975 INFO L226 Difference]: Without dead ends: 441 [2022-11-16 11:12:32,976 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2022-11-16 11:12:32,977 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 93 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 93 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:32,977 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [93 Valid, 6 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-16 11:12:32,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2022-11-16 11:12:32,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 224. [2022-11-16 11:12:32,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 224 states, 149 states have (on average 3.7986577181208054) internal successors, (566), 223 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:32,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 566 transitions. [2022-11-16 11:12:32,991 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 566 transitions. Word has length 3 [2022-11-16 11:12:32,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:32,992 INFO L495 AbstractCegarLoop]: Abstraction has 224 states and 566 transitions. [2022-11-16 11:12:32,992 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:32,992 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 566 transitions. [2022-11-16 11:12:32,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-16 11:12:32,992 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:32,992 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-16 11:12:33,006 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Ended with exit code 0 [2022-11-16 11:12:33,204 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:33,204 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:33,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:33,205 INFO L85 PathProgramCache]: Analyzing trace with hash 790733, now seen corresponding path program 1 times [2022-11-16 11:12:33,205 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:33,205 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1727212358] [2022-11-16 11:12:33,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:33,205 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:33,205 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:33,206 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:33,209 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-16 11:12:33,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:33,299 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-16 11:12:33,301 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:33,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:12:33,396 INFO L321 Elim1Store]: treesize reduction 24, result has 44.2 percent of original size [2022-11-16 11:12:33,396 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 26 [2022-11-16 11:12:33,410 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-16 11:12:33,536 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:33,536 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:33,536 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:33,536 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1727212358] [2022-11-16 11:12:33,536 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1727212358] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:33,537 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:33,537 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:33,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534148700] [2022-11-16 11:12:33,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:33,537 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:33,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:33,538 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:33,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:33,538 INFO L87 Difference]: Start difference. First operand 224 states and 566 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:33,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:33,702 INFO L93 Difference]: Finished difference Result 223 states and 562 transitions. [2022-11-16 11:12:33,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:33,702 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-16 11:12:33,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:33,704 INFO L225 Difference]: With dead ends: 223 [2022-11-16 11:12:33,704 INFO L226 Difference]: Without dead ends: 223 [2022-11-16 11:12:33,705 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:33,705 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 0 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 29 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:33,706 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 29 Unchecked, 0.2s Time] [2022-11-16 11:12:33,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2022-11-16 11:12:33,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2022-11-16 11:12:33,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 223 states, 149 states have (on average 3.771812080536913) internal successors, (562), 222 states have internal predecessors, (562), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:33,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 562 transitions. [2022-11-16 11:12:33,722 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 562 transitions. Word has length 3 [2022-11-16 11:12:33,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:33,722 INFO L495 AbstractCegarLoop]: Abstraction has 223 states and 562 transitions. [2022-11-16 11:12:33,723 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:33,723 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 562 transitions. [2022-11-16 11:12:33,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-16 11:12:33,723 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:33,724 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-16 11:12:33,739 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:33,935 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:33,935 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:33,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:33,936 INFO L85 PathProgramCache]: Analyzing trace with hash 790734, now seen corresponding path program 1 times [2022-11-16 11:12:33,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:33,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [31804246] [2022-11-16 11:12:33,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:33,936 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:33,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:33,938 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:33,958 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-16 11:12:34,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:34,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 11:12:34,023 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:34,072 INFO L321 Elim1Store]: treesize reduction 50, result has 23.1 percent of original size [2022-11-16 11:12:34,075 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 22 treesize of output 29 [2022-11-16 11:12:34,127 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:34,128 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:34,128 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:34,128 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [31804246] [2022-11-16 11:12:34,128 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [31804246] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:34,129 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:34,129 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:34,129 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733033190] [2022-11-16 11:12:34,129 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:34,129 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:34,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:34,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:34,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:34,130 INFO L87 Difference]: Start difference. First operand 223 states and 562 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:34,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:34,293 INFO L93 Difference]: Finished difference Result 222 states and 558 transitions. [2022-11-16 11:12:34,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:34,293 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-16 11:12:34,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:34,295 INFO L225 Difference]: With dead ends: 222 [2022-11-16 11:12:34,296 INFO L226 Difference]: Without dead ends: 222 [2022-11-16 11:12:34,296 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:34,297 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 0 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 28 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:34,297 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 28 Unchecked, 0.2s Time] [2022-11-16 11:12:34,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2022-11-16 11:12:34,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 222. [2022-11-16 11:12:34,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 149 states have (on average 3.7449664429530203) internal successors, (558), 221 states have internal predecessors, (558), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:34,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 558 transitions. [2022-11-16 11:12:34,306 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 558 transitions. Word has length 3 [2022-11-16 11:12:34,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:34,306 INFO L495 AbstractCegarLoop]: Abstraction has 222 states and 558 transitions. [2022-11-16 11:12:34,306 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:34,306 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 558 transitions. [2022-11-16 11:12:34,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 11:12:34,307 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:34,307 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 11:12:34,323 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:34,518 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:34,519 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:34,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:34,519 INFO L85 PathProgramCache]: Analyzing trace with hash 759910916, now seen corresponding path program 1 times [2022-11-16 11:12:34,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:34,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [594908087] [2022-11-16 11:12:34,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:34,520 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:34,520 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:34,521 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:34,557 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-16 11:12:34,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:34,628 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-16 11:12:34,630 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:34,716 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:34,716 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:34,992 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:34,992 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:35,273 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:35,274 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:35,274 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [594908087] [2022-11-16 11:12:35,274 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [594908087] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:35,274 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:35,274 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 6 [2022-11-16 11:12:35,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243489824] [2022-11-16 11:12:35,274 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:35,275 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 11:12:35,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:35,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 11:12:35,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-16 11:12:35,275 INFO L87 Difference]: Start difference. First operand 222 states and 558 transitions. Second operand has 8 states, 7 states have (on average 1.4285714285714286) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:35,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:35,401 INFO L93 Difference]: Finished difference Result 228 states and 578 transitions. [2022-11-16 11:12:35,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 11:12:35,402 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.4285714285714286) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 11:12:35,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:35,403 INFO L225 Difference]: With dead ends: 228 [2022-11-16 11:12:35,403 INFO L226 Difference]: Without dead ends: 228 [2022-11-16 11:12:35,404 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-16 11:12:35,404 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:35,405 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 12 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 30 Unchecked, 0.1s Time] [2022-11-16 11:12:35,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2022-11-16 11:12:35,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 225. [2022-11-16 11:12:35,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 225 states, 152 states have (on average 3.736842105263158) internal successors, (568), 224 states have internal predecessors, (568), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:35,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 568 transitions. [2022-11-16 11:12:35,413 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 568 transitions. Word has length 5 [2022-11-16 11:12:35,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:35,414 INFO L495 AbstractCegarLoop]: Abstraction has 225 states and 568 transitions. [2022-11-16 11:12:35,414 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.4285714285714286) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:35,414 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 568 transitions. [2022-11-16 11:12:35,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 11:12:35,414 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:35,415 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 11:12:35,438 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:35,631 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:35,632 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:35,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:35,632 INFO L85 PathProgramCache]: Analyzing trace with hash 759910918, now seen corresponding path program 1 times [2022-11-16 11:12:35,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:35,632 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [297058586] [2022-11-16 11:12:35,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:35,632 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:35,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:35,633 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:35,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-16 11:12:35,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:35,728 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-16 11:12:35,729 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:35,769 INFO L321 Elim1Store]: treesize reduction 50, result has 23.1 percent of original size [2022-11-16 11:12:35,769 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 22 [2022-11-16 11:12:35,803 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:35,804 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:35,804 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:35,804 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [297058586] [2022-11-16 11:12:35,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [297058586] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:35,804 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:35,804 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:35,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038433512] [2022-11-16 11:12:35,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:35,805 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:35,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:35,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:35,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:35,806 INFO L87 Difference]: Start difference. First operand 225 states and 568 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:35,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:35,976 INFO L93 Difference]: Finished difference Result 212 states and 540 transitions. [2022-11-16 11:12:35,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:35,976 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 11:12:35,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:35,978 INFO L225 Difference]: With dead ends: 212 [2022-11-16 11:12:35,978 INFO L226 Difference]: Without dead ends: 212 [2022-11-16 11:12:35,978 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:35,979 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 25 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:35,979 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 2 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 11:12:35,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2022-11-16 11:12:35,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 212. [2022-11-16 11:12:35,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 212 states, 148 states have (on average 3.6486486486486487) internal successors, (540), 211 states have internal predecessors, (540), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:35,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 540 transitions. [2022-11-16 11:12:35,987 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 540 transitions. Word has length 5 [2022-11-16 11:12:35,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:35,987 INFO L495 AbstractCegarLoop]: Abstraction has 212 states and 540 transitions. [2022-11-16 11:12:35,988 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:35,988 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 540 transitions. [2022-11-16 11:12:35,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-16 11:12:35,988 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:35,988 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-16 11:12:36,006 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:36,189 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:36,189 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:36,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:36,190 INFO L85 PathProgramCache]: Analyzing trace with hash 2082395431, now seen corresponding path program 1 times [2022-11-16 11:12:36,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:36,190 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [23238131] [2022-11-16 11:12:36,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:36,190 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:36,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:36,191 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:36,196 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-16 11:12:36,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:36,272 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:12:36,274 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:36,324 INFO L321 Elim1Store]: treesize reduction 39, result has 40.0 percent of original size [2022-11-16 11:12:36,325 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 33 [2022-11-16 11:12:36,359 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:36,359 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:36,359 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:36,359 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [23238131] [2022-11-16 11:12:36,359 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [23238131] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:36,359 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:36,359 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 11:12:36,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203001755] [2022-11-16 11:12:36,360 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:36,360 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 11:12:36,360 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:36,360 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 11:12:36,361 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 11:12:36,361 INFO L87 Difference]: Start difference. First operand 212 states and 540 transitions. Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:36,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:36,567 INFO L93 Difference]: Finished difference Result 139 states and 345 transitions. [2022-11-16 11:12:36,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 11:12:36,568 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-16 11:12:36,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:36,569 INFO L225 Difference]: With dead ends: 139 [2022-11-16 11:12:36,569 INFO L226 Difference]: Without dead ends: 139 [2022-11-16 11:12:36,569 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:12:36,570 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 44 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:36,570 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 2 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 11:12:36,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2022-11-16 11:12:36,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2022-11-16 11:12:36,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 108 states have (on average 3.1944444444444446) internal successors, (345), 138 states have internal predecessors, (345), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:36,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 345 transitions. [2022-11-16 11:12:36,575 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 345 transitions. Word has length 6 [2022-11-16 11:12:36,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:36,576 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 345 transitions. [2022-11-16 11:12:36,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:36,576 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 345 transitions. [2022-11-16 11:12:36,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-16 11:12:36,576 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:36,576 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-16 11:12:36,614 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:36,799 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:36,799 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:36,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:36,800 INFO L85 PathProgramCache]: Analyzing trace with hash 2082395433, now seen corresponding path program 1 times [2022-11-16 11:12:36,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:36,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [348329078] [2022-11-16 11:12:36,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:36,800 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:36,801 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:36,802 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:36,848 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-16 11:12:36,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:36,896 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 11:12:36,897 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:36,981 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:36,982 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:37,164 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2022-11-16 11:12:37,272 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:37,272 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:37,272 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [348329078] [2022-11-16 11:12:37,272 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [348329078] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:37,272 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:37,272 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 6 [2022-11-16 11:12:37,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807997267] [2022-11-16 11:12:37,272 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:37,273 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 11:12:37,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:37,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 11:12:37,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2022-11-16 11:12:37,273 INFO L87 Difference]: Start difference. First operand 139 states and 345 transitions. Second operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:38,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:38,259 INFO L93 Difference]: Finished difference Result 313 states and 776 transitions. [2022-11-16 11:12:38,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 11:12:38,259 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-16 11:12:38,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:38,261 INFO L225 Difference]: With dead ends: 313 [2022-11-16 11:12:38,261 INFO L226 Difference]: Without dead ends: 313 [2022-11-16 11:12:38,262 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2022-11-16 11:12:38,262 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 182 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:38,263 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 8 Invalid, 119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-11-16 11:12:38,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2022-11-16 11:12:38,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 166. [2022-11-16 11:12:38,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 135 states have (on average 3.2814814814814817) internal successors, (443), 165 states have internal predecessors, (443), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:38,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 443 transitions. [2022-11-16 11:12:38,270 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 443 transitions. Word has length 6 [2022-11-16 11:12:38,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:38,270 INFO L495 AbstractCegarLoop]: Abstraction has 166 states and 443 transitions. [2022-11-16 11:12:38,271 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:38,271 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 443 transitions. [2022-11-16 11:12:38,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-16 11:12:38,271 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:38,271 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1] [2022-11-16 11:12:38,292 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:38,483 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:38,483 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:38,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:38,484 INFO L85 PathProgramCache]: Analyzing trace with hash 2082183158, now seen corresponding path program 2 times [2022-11-16 11:12:38,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:38,484 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1002317248] [2022-11-16 11:12:38,485 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:12:38,485 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:38,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:38,486 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:38,513 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-16 11:12:38,576 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:12:38,577 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:12:38,580 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-16 11:12:38,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:38,661 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:38,661 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:38,846 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:38,846 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:39,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:39,573 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:39,574 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1002317248] [2022-11-16 11:12:39,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1002317248] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:39,574 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:39,574 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 10 [2022-11-16 11:12:39,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483602315] [2022-11-16 11:12:39,574 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:39,574 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-16 11:12:39,574 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:39,575 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-16 11:12:39,575 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2022-11-16 11:12:39,575 INFO L87 Difference]: Start difference. First operand 166 states and 443 transitions. Second operand has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:44,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:44,168 INFO L93 Difference]: Finished difference Result 1413 states and 3847 transitions. [2022-11-16 11:12:44,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 11:12:44,169 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-16 11:12:44,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:44,178 INFO L225 Difference]: With dead ends: 1413 [2022-11-16 11:12:44,178 INFO L226 Difference]: Without dead ends: 1413 [2022-11-16 11:12:44,178 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2022-11-16 11:12:44,179 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 460 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 460 SdHoareTripleChecker+Valid, 48 SdHoareTripleChecker+Invalid, 559 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:44,180 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [460 Valid, 48 Invalid, 559 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2022-11-16 11:12:44,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1413 states. [2022-11-16 11:12:44,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1413 to 172. [2022-11-16 11:12:44,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 141 states have (on average 3.226950354609929) internal successors, (455), 171 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:44,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 455 transitions. [2022-11-16 11:12:44,201 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 455 transitions. Word has length 6 [2022-11-16 11:12:44,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:44,201 INFO L495 AbstractCegarLoop]: Abstraction has 172 states and 455 transitions. [2022-11-16 11:12:44,201 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:44,201 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 455 transitions. [2022-11-16 11:12:44,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 11:12:44,202 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:44,202 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:44,219 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:44,414 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:44,414 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:44,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:44,414 INFO L85 PathProgramCache]: Analyzing trace with hash 129968283, now seen corresponding path program 1 times [2022-11-16 11:12:44,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:44,415 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1912364504] [2022-11-16 11:12:44,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:44,415 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:44,415 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:44,416 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:44,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-16 11:12:44,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:44,506 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 11:12:44,507 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:44,538 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:44,538 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:44,538 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:44,539 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1912364504] [2022-11-16 11:12:44,539 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1912364504] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:44,539 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:44,539 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 11:12:44,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613367102] [2022-11-16 11:12:44,539 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:44,540 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:44,540 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:44,540 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:44,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:44,540 INFO L87 Difference]: Start difference. First operand 172 states and 455 transitions. Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:44,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:44,682 INFO L93 Difference]: Finished difference Result 142 states and 359 transitions. [2022-11-16 11:12:44,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:44,682 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 11:12:44,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:44,683 INFO L225 Difference]: With dead ends: 142 [2022-11-16 11:12:44,683 INFO L226 Difference]: Without dead ends: 142 [2022-11-16 11:12:44,683 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:44,684 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 20 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:44,685 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 2 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 11:12:44,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-11-16 11:12:44,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2022-11-16 11:12:44,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 119 states have (on average 3.0168067226890756) internal successors, (359), 141 states have internal predecessors, (359), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:44,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 359 transitions. [2022-11-16 11:12:44,690 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 359 transitions. Word has length 7 [2022-11-16 11:12:44,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:44,690 INFO L495 AbstractCegarLoop]: Abstraction has 142 states and 359 transitions. [2022-11-16 11:12:44,690 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:44,691 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 359 transitions. [2022-11-16 11:12:44,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 11:12:44,692 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:44,692 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:44,709 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:44,904 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:44,904 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:44,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:44,905 INFO L85 PathProgramCache]: Analyzing trace with hash 129968281, now seen corresponding path program 1 times [2022-11-16 11:12:44,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:44,905 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1213056925] [2022-11-16 11:12:44,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:44,905 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:44,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:44,907 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:44,926 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-16 11:12:45,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:45,005 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 11:12:45,006 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:45,053 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:45,053 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:45,053 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:45,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1213056925] [2022-11-16 11:12:45,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1213056925] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:45,054 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:45,054 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 11:12:45,054 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457607511] [2022-11-16 11:12:45,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:45,054 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 11:12:45,054 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:45,054 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 11:12:45,055 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 11:12:45,055 INFO L87 Difference]: Start difference. First operand 142 states and 359 transitions. Second operand has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:45,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:45,204 INFO L93 Difference]: Finished difference Result 112 states and 263 transitions. [2022-11-16 11:12:45,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:45,205 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 11:12:45,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:45,206 INFO L225 Difference]: With dead ends: 112 [2022-11-16 11:12:45,206 INFO L226 Difference]: Without dead ends: 112 [2022-11-16 11:12:45,206 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-16 11:12:45,207 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 41 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:45,208 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 2 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 11:12:45,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-11-16 11:12:45,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2022-11-16 11:12:45,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 97 states have (on average 2.711340206185567) internal successors, (263), 111 states have internal predecessors, (263), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:45,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 263 transitions. [2022-11-16 11:12:45,212 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 263 transitions. Word has length 7 [2022-11-16 11:12:45,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:45,213 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 263 transitions. [2022-11-16 11:12:45,213 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:45,213 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 263 transitions. [2022-11-16 11:12:45,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 11:12:45,214 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:45,214 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:45,226 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:45,425 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:45,425 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:45,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:45,426 INFO L85 PathProgramCache]: Analyzing trace with hash 129749692, now seen corresponding path program 1 times [2022-11-16 11:12:45,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:45,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [397582026] [2022-11-16 11:12:45,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:45,426 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:45,427 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:45,428 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:45,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-16 11:12:45,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:45,544 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-16 11:12:45,546 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:45,622 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:45,622 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:45,791 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:45,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:46,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:12:46,678 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:46,678 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [397582026] [2022-11-16 11:12:46,678 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [397582026] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:46,678 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:46,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 6 [2022-11-16 11:12:46,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338391283] [2022-11-16 11:12:46,678 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:46,679 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 11:12:46,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:46,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 11:12:46,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-11-16 11:12:46,679 INFO L87 Difference]: Start difference. First operand 112 states and 263 transitions. Second operand has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:47,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:47,333 INFO L93 Difference]: Finished difference Result 201 states and 508 transitions. [2022-11-16 11:12:47,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 11:12:47,334 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 11:12:47,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:47,335 INFO L225 Difference]: With dead ends: 201 [2022-11-16 11:12:47,335 INFO L226 Difference]: Without dead ends: 201 [2022-11-16 11:12:47,335 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:12:47,336 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 77 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 77 SdHoareTripleChecker+Valid, 14 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 96 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:47,336 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [77 Valid, 14 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 56 Invalid, 0 Unknown, 96 Unchecked, 0.3s Time] [2022-11-16 11:12:47,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2022-11-16 11:12:47,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 159. [2022-11-16 11:12:47,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 144 states have (on average 2.888888888888889) internal successors, (416), 158 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:47,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 416 transitions. [2022-11-16 11:12:47,343 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 416 transitions. Word has length 7 [2022-11-16 11:12:47,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:47,343 INFO L495 AbstractCegarLoop]: Abstraction has 159 states and 416 transitions. [2022-11-16 11:12:47,343 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:47,344 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 416 transitions. [2022-11-16 11:12:47,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 11:12:47,344 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:47,344 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:47,358 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Ended with exit code 0 [2022-11-16 11:12:47,556 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:47,556 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:47,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:47,556 INFO L85 PathProgramCache]: Analyzing trace with hash 129749645, now seen corresponding path program 1 times [2022-11-16 11:12:47,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:47,556 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1758409048] [2022-11-16 11:12:47,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:47,557 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:47,557 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:47,558 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:47,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-16 11:12:47,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:47,685 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-16 11:12:47,686 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:47,765 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:47,765 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:48,034 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:48,035 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:48,336 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:48,336 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:48,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1758409048] [2022-11-16 11:12:48,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1758409048] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:48,337 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:48,337 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 6 [2022-11-16 11:12:48,337 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791100528] [2022-11-16 11:12:48,337 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:48,337 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 11:12:48,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:48,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 11:12:48,338 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-16 11:12:48,338 INFO L87 Difference]: Start difference. First operand 159 states and 416 transitions. Second operand has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:48,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:48,720 INFO L93 Difference]: Finished difference Result 158 states and 412 transitions. [2022-11-16 11:12:48,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 11:12:48,721 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 11:12:48,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:48,722 INFO L225 Difference]: With dead ends: 158 [2022-11-16 11:12:48,722 INFO L226 Difference]: Without dead ends: 158 [2022-11-16 11:12:48,723 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-11-16 11:12:48,723 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 20 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 33 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:48,724 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 13 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 45 Invalid, 0 Unknown, 33 Unchecked, 0.3s Time] [2022-11-16 11:12:48,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-11-16 11:12:48,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 157. [2022-11-16 11:12:48,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 142 states have (on average 2.880281690140845) internal successors, (409), 156 states have internal predecessors, (409), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:48,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 409 transitions. [2022-11-16 11:12:48,729 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 409 transitions. Word has length 7 [2022-11-16 11:12:48,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:48,730 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 409 transitions. [2022-11-16 11:12:48,730 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:48,730 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 409 transitions. [2022-11-16 11:12:48,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 11:12:48,731 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:48,731 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:48,743 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:48,942 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:48,943 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:48,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:48,943 INFO L85 PathProgramCache]: Analyzing trace with hash 129747940, now seen corresponding path program 1 times [2022-11-16 11:12:48,943 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:48,943 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1948729151] [2022-11-16 11:12:48,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:48,944 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:48,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:48,946 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:48,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-16 11:12:49,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:49,039 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-16 11:12:49,040 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:49,118 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:49,118 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:49,400 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:49,400 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:49,684 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:49,684 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:49,684 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1948729151] [2022-11-16 11:12:49,684 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1948729151] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:49,684 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:49,684 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 6 [2022-11-16 11:12:49,685 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280673169] [2022-11-16 11:12:49,685 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:49,685 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-16 11:12:49,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:49,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-16 11:12:49,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-16 11:12:49,686 INFO L87 Difference]: Start difference. First operand 157 states and 409 transitions. Second operand has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:50,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:50,085 INFO L93 Difference]: Finished difference Result 160 states and 414 transitions. [2022-11-16 11:12:50,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 11:12:50,086 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 11:12:50,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:50,087 INFO L225 Difference]: With dead ends: 160 [2022-11-16 11:12:50,087 INFO L226 Difference]: Without dead ends: 160 [2022-11-16 11:12:50,087 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-11-16 11:12:50,088 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 20 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 44 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 44 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 33 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:50,088 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 13 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 44 Invalid, 0 Unknown, 33 Unchecked, 0.3s Time] [2022-11-16 11:12:50,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2022-11-16 11:12:50,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2022-11-16 11:12:50,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 145 states have (on average 2.8551724137931034) internal successors, (414), 159 states have internal predecessors, (414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:50,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 414 transitions. [2022-11-16 11:12:50,093 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 414 transitions. Word has length 7 [2022-11-16 11:12:50,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:50,093 INFO L495 AbstractCegarLoop]: Abstraction has 160 states and 414 transitions. [2022-11-16 11:12:50,094 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:50,094 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 414 transitions. [2022-11-16 11:12:50,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 11:12:50,094 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:50,094 INFO L195 NwaCegarLoop]: trace histogram [3, 1, 1, 1, 1] [2022-11-16 11:12:50,111 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Ended with exit code 0 [2022-11-16 11:12:50,306 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:50,307 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:50,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:50,307 INFO L85 PathProgramCache]: Analyzing trace with hash 123178916, now seen corresponding path program 2 times [2022-11-16 11:12:50,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:50,308 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [18847650] [2022-11-16 11:12:50,308 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:12:50,308 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:50,308 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:50,309 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:50,317 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-16 11:12:50,403 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-16 11:12:50,403 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:12:50,405 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-16 11:12:50,407 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:50,424 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:12:50,426 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:12:50,450 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-16 11:12:50,451 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 20 [2022-11-16 11:12:50,457 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-11-16 11:12:50,501 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-16 11:12:50,501 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:50,501 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:50,501 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [18847650] [2022-11-16 11:12:50,501 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [18847650] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:50,502 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:50,502 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-11-16 11:12:50,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058260054] [2022-11-16 11:12:50,502 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:50,502 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 11:12:50,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:50,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 11:12:50,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:50,503 INFO L87 Difference]: Start difference. First operand 160 states and 414 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:50,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:50,644 INFO L93 Difference]: Finished difference Result 147 states and 385 transitions. [2022-11-16 11:12:50,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 11:12:50,645 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-16 11:12:50,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:50,647 INFO L225 Difference]: With dead ends: 147 [2022-11-16 11:12:50,647 INFO L226 Difference]: Without dead ends: 147 [2022-11-16 11:12:50,647 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 11:12:50,649 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 18 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:50,649 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 2 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 11:12:50,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2022-11-16 11:12:50,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 144. [2022-11-16 11:12:50,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 135 states have (on average 2.814814814814815) internal successors, (380), 143 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:50,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 380 transitions. [2022-11-16 11:12:50,654 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 380 transitions. Word has length 7 [2022-11-16 11:12:50,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:50,654 INFO L495 AbstractCegarLoop]: Abstraction has 144 states and 380 transitions. [2022-11-16 11:12:50,655 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:50,655 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 380 transitions. [2022-11-16 11:12:50,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 11:12:50,661 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:50,662 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:50,672 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:50,867 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:50,867 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting thread2Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:50,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:50,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1680239751, now seen corresponding path program 1 times [2022-11-16 11:12:50,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:50,868 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [833419828] [2022-11-16 11:12:50,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:50,868 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:50,868 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:50,871 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:50,872 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-16 11:12:50,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:50,979 INFO L263 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-16 11:12:50,980 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:51,110 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:51,110 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:51,329 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2022-11-16 11:12:51,589 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:51,589 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:51,589 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [833419828] [2022-11-16 11:12:51,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [833419828] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:51,589 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:51,589 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 8 [2022-11-16 11:12:51,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034801606] [2022-11-16 11:12:51,589 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:51,590 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:12:51,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:51,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:12:51,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:12:51,591 INFO L87 Difference]: Start difference. First operand 144 states and 380 transitions. Second operand has 10 states, 9 states have (on average 2.0) internal successors, (18), 9 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:53,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:53,131 INFO L93 Difference]: Finished difference Result 215 states and 626 transitions. [2022-11-16 11:12:53,132 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 11:12:53,132 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.0) internal successors, (18), 9 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 11:12:53,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:53,133 INFO L225 Difference]: With dead ends: 215 [2022-11-16 11:12:53,133 INFO L226 Difference]: Without dead ends: 215 [2022-11-16 11:12:53,133 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2022-11-16 11:12:53,134 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 132 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 192 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 132 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 199 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 192 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:53,134 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [132 Valid, 20 Invalid, 199 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 192 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-16 11:12:53,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2022-11-16 11:12:53,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 162. [2022-11-16 11:12:53,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 153 states have (on average 3.045751633986928) internal successors, (466), 161 states have internal predecessors, (466), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:53,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 466 transitions. [2022-11-16 11:12:53,139 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 466 transitions. Word has length 9 [2022-11-16 11:12:53,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:53,139 INFO L495 AbstractCegarLoop]: Abstraction has 162 states and 466 transitions. [2022-11-16 11:12:53,140 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.0) internal successors, (18), 9 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:53,140 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 466 transitions. [2022-11-16 11:12:53,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 11:12:53,140 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:53,140 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:53,157 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Ended with exit code 0 [2022-11-16 11:12:53,352 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:53,352 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting thread2Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:53,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:53,352 INFO L85 PathProgramCache]: Analyzing trace with hash -1680239738, now seen corresponding path program 1 times [2022-11-16 11:12:53,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:53,353 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1828842243] [2022-11-16 11:12:53,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:12:53,353 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:53,353 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:53,354 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:53,359 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2022-11-16 11:12:53,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:12:53,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-16 11:12:53,478 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:53,565 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:53,565 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:53,820 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:53,820 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:12:55,281 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:55,282 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:55,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1828842243] [2022-11-16 11:12:55,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1828842243] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:12:55,282 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:12:55,282 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 8 [2022-11-16 11:12:55,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309574081] [2022-11-16 11:12:55,282 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:12:55,283 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:12:55,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:55,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:12:55,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:12:55,283 INFO L87 Difference]: Start difference. First operand 162 states and 466 transitions. Second operand has 10 states, 9 states have (on average 2.0) internal successors, (18), 9 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:57,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:57,752 INFO L93 Difference]: Finished difference Result 177 states and 511 transitions. [2022-11-16 11:12:57,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-16 11:12:57,753 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.0) internal successors, (18), 9 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 11:12:57,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:57,754 INFO L225 Difference]: With dead ends: 177 [2022-11-16 11:12:57,755 INFO L226 Difference]: Without dead ends: 177 [2022-11-16 11:12:57,755 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2022-11-16 11:12:57,755 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 11 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 101 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 50 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:57,756 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 26 Invalid, 101 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 51 Invalid, 0 Unknown, 50 Unchecked, 0.2s Time] [2022-11-16 11:12:57,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2022-11-16 11:12:57,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 171. [2022-11-16 11:12:57,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 162 states have (on average 3.0308641975308643) internal successors, (491), 170 states have internal predecessors, (491), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:57,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 491 transitions. [2022-11-16 11:12:57,761 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 491 transitions. Word has length 9 [2022-11-16 11:12:57,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:57,761 INFO L495 AbstractCegarLoop]: Abstraction has 171 states and 491 transitions. [2022-11-16 11:12:57,761 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.0) internal successors, (18), 9 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:57,761 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 491 transitions. [2022-11-16 11:12:57,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-16 11:12:57,761 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:57,761 INFO L195 NwaCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1] [2022-11-16 11:12:57,780 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (20)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:57,962 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:57,962 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:57,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:57,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1884346276, now seen corresponding path program 2 times [2022-11-16 11:12:57,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:57,963 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1314357637] [2022-11-16 11:12:57,963 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:12:57,963 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:57,963 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:57,964 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:57,969 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-16 11:12:58,051 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-16 11:12:58,051 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:12:58,053 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-16 11:12:58,054 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:58,133 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:58,133 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:58,279 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-16 11:12:58,280 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:12:58,280 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:12:58,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1314357637] [2022-11-16 11:12:58,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1314357637] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:12:58,280 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:12:58,280 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-16 11:12:58,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021009909] [2022-11-16 11:12:58,280 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:12:58,281 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 11:12:58,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:12:58,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 11:12:58,281 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 11:12:58,282 INFO L87 Difference]: Start difference. First operand 171 states and 491 transitions. Second operand has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:58,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:12:58,529 INFO L93 Difference]: Finished difference Result 125 states and 338 transitions. [2022-11-16 11:12:58,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 11:12:58,529 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-16 11:12:58,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:12:58,530 INFO L225 Difference]: With dead ends: 125 [2022-11-16 11:12:58,530 INFO L226 Difference]: Without dead ends: 125 [2022-11-16 11:12:58,530 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:12:58,531 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 27 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:12:58,531 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 2 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 11:12:58,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2022-11-16 11:12:58,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 46. [2022-11-16 11:12:58,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 44 states have (on average 2.159090909090909) internal successors, (95), 45 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:58,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 95 transitions. [2022-11-16 11:12:58,534 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 95 transitions. Word has length 9 [2022-11-16 11:12:58,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:12:58,534 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 95 transitions. [2022-11-16 11:12:58,534 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:12:58,534 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 95 transitions. [2022-11-16 11:12:58,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-16 11:12:58,534 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:12:58,534 INFO L195 NwaCegarLoop]: trace histogram [10, 1, 1] [2022-11-16 11:12:58,547 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-16 11:12:58,743 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:58,743 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:12:58,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:12:58,744 INFO L85 PathProgramCache]: Analyzing trace with hash 271037206, now seen corresponding path program 3 times [2022-11-16 11:12:58,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:12:58,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [406672159] [2022-11-16 11:12:58,744 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:12:58,744 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:12:58,744 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:12:58,745 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:12:58,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-16 11:12:58,945 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-16 11:12:58,946 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:12:58,953 INFO L263 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-16 11:12:58,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:12:59,039 INFO L321 Elim1Store]: treesize reduction 37, result has 37.3 percent of original size [2022-11-16 11:12:59,040 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 29 [2022-11-16 11:12:59,557 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:12:59,557 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:13:02,608 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:13:02,608 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:13:02,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [406672159] [2022-11-16 11:13:02,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [406672159] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:13:02,608 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:13:02,609 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 22 [2022-11-16 11:13:02,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766891647] [2022-11-16 11:13:02,609 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:13:02,609 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-16 11:13:02,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:13:02,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-16 11:13:02,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2022-11-16 11:13:02,610 INFO L87 Difference]: Start difference. First operand 46 states and 95 transitions. Second operand has 24 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:22,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:13:22,783 INFO L93 Difference]: Finished difference Result 718 states and 1559 transitions. [2022-11-16 11:13:22,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-16 11:13:22,784 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-11-16 11:13:22,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:13:22,791 INFO L225 Difference]: With dead ends: 718 [2022-11-16 11:13:22,792 INFO L226 Difference]: Without dead ends: 718 [2022-11-16 11:13:22,792 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 16.3s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2022-11-16 11:13:22,793 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 1710 mSDsluCounter, 220 mSDsCounter, 0 mSdLazyCounter, 1717 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1710 SdHoareTripleChecker+Valid, 240 SdHoareTripleChecker+Invalid, 1739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 1717 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.8s IncrementalHoareTripleChecker+Time [2022-11-16 11:13:22,793 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1710 Valid, 240 Invalid, 1739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 1717 Invalid, 0 Unknown, 0 Unchecked, 6.8s Time] [2022-11-16 11:13:22,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2022-11-16 11:13:22,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 58. [2022-11-16 11:13:22,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 56 states have (on average 2.125) internal successors, (119), 57 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:22,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 119 transitions. [2022-11-16 11:13:22,800 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 119 transitions. Word has length 12 [2022-11-16 11:13:22,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:13:22,801 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 119 transitions. [2022-11-16 11:13:22,802 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:22,802 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 119 transitions. [2022-11-16 11:13:22,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 11:13:22,802 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:13:22,802 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:13:22,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-16 11:13:23,015 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:23,016 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:13:23,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:13:23,016 INFO L85 PathProgramCache]: Analyzing trace with hash 713463347, now seen corresponding path program 1 times [2022-11-16 11:13:23,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:13:23,016 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1063274529] [2022-11-16 11:13:23,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:13:23,017 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:23,017 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:13:23,018 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:13:23,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-16 11:13:23,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:13:23,130 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:13:23,132 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:13:23,210 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 9 [2022-11-16 11:13:31,393 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:31,393 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:13:31,393 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:13:31,394 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1063274529] [2022-11-16 11:13:31,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1063274529] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:13:31,394 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:13:31,394 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:13:31,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863743706] [2022-11-16 11:13:31,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:13:31,395 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 11:13:31,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:13:31,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:13:31,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:13:31,396 INFO L87 Difference]: Start difference. First operand 58 states and 119 transitions. Second operand has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:31,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:13:31,571 INFO L93 Difference]: Finished difference Result 92 states and 190 transitions. [2022-11-16 11:13:31,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 11:13:31,572 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 11:13:31,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:13:31,572 INFO L225 Difference]: With dead ends: 92 [2022-11-16 11:13:31,573 INFO L226 Difference]: Without dead ends: 87 [2022-11-16 11:13:31,573 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 8.1s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2022-11-16 11:13:31,574 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 27 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 45 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:13:31,574 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 7 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 45 Unchecked, 0.2s Time] [2022-11-16 11:13:31,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-11-16 11:13:31,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 64. [2022-11-16 11:13:31,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 62 states have (on average 2.129032258064516) internal successors, (132), 63 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:31,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 132 transitions. [2022-11-16 11:13:31,577 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 132 transitions. Word has length 15 [2022-11-16 11:13:31,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:13:31,577 INFO L495 AbstractCegarLoop]: Abstraction has 64 states and 132 transitions. [2022-11-16 11:13:31,577 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:31,578 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 132 transitions. [2022-11-16 11:13:31,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 11:13:31,578 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:13:31,578 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:13:31,591 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (23)] Forceful destruction successful, exit code 0 [2022-11-16 11:13:31,790 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:31,790 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:13:31,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:13:31,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1828076129, now seen corresponding path program 2 times [2022-11-16 11:13:31,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:13:31,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [498161976] [2022-11-16 11:13:31,791 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:13:31,791 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:31,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:13:31,792 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:13:31,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (24)] Waiting until timeout for monitored process [2022-11-16 11:13:31,887 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-16 11:13:31,887 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:13:31,891 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:13:31,892 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:13:31,984 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 9 [2022-11-16 11:13:35,698 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:35,699 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:13:35,699 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:13:35,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [498161976] [2022-11-16 11:13:35,699 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [498161976] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:13:35,699 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:13:35,700 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:13:35,700 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1378240597] [2022-11-16 11:13:35,700 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:13:35,700 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 11:13:35,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:13:35,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:13:35,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:13:35,701 INFO L87 Difference]: Start difference. First operand 64 states and 132 transitions. Second operand has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:35,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:13:35,895 INFO L93 Difference]: Finished difference Result 92 states and 188 transitions. [2022-11-16 11:13:35,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:13:35,896 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 11:13:35,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:13:35,897 INFO L225 Difference]: With dead ends: 92 [2022-11-16 11:13:35,897 INFO L226 Difference]: Without dead ends: 87 [2022-11-16 11:13:35,897 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:13:35,898 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 15 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 35 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:13:35,899 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 7 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 50 Invalid, 0 Unknown, 35 Unchecked, 0.2s Time] [2022-11-16 11:13:35,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-11-16 11:13:35,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 70. [2022-11-16 11:13:35,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 68 states have (on average 2.264705882352941) internal successors, (154), 69 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:35,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 154 transitions. [2022-11-16 11:13:35,902 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 154 transitions. Word has length 15 [2022-11-16 11:13:35,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:13:35,902 INFO L495 AbstractCegarLoop]: Abstraction has 70 states and 154 transitions. [2022-11-16 11:13:35,902 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:35,902 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 154 transitions. [2022-11-16 11:13:35,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 11:13:35,903 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:13:35,903 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:13:35,910 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (24)] Ended with exit code 0 [2022-11-16 11:13:36,106 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:36,107 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:13:36,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:13:36,107 INFO L85 PathProgramCache]: Analyzing trace with hash 416674547, now seen corresponding path program 3 times [2022-11-16 11:13:36,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:13:36,107 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1723782498] [2022-11-16 11:13:36,107 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:13:36,107 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:36,107 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:13:36,108 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:13:36,109 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (25)] Waiting until timeout for monitored process [2022-11-16 11:13:36,208 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2022-11-16 11:13:36,208 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:13:36,212 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:13:36,213 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:13:36,337 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 11:13:36,337 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 114 treesize of output 92 [2022-11-16 11:13:36,342 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 90 [2022-11-16 11:13:36,347 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 88 [2022-11-16 11:13:36,381 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:36,381 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 11:13:36,381 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:13:36,382 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1723782498] [2022-11-16 11:13:36,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1723782498] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 11:13:36,382 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 11:13:36,382 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 11:13:36,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743630554] [2022-11-16 11:13:36,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:13:36,383 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 11:13:36,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:13:36,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 11:13:36,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 11:13:36,384 INFO L87 Difference]: Start difference. First operand 70 states and 154 transitions. Second operand has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:36,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:13:36,654 INFO L93 Difference]: Finished difference Result 85 states and 178 transitions. [2022-11-16 11:13:36,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 11:13:36,654 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-16 11:13:36,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:13:36,655 INFO L225 Difference]: With dead ends: 85 [2022-11-16 11:13:36,655 INFO L226 Difference]: Without dead ends: 80 [2022-11-16 11:13:36,655 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2022-11-16 11:13:36,656 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 18 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:13:36,656 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 10 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-16 11:13:36,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-16 11:13:36,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2022-11-16 11:13:36,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 78 states have (on average 2.1794871794871793) internal successors, (170), 79 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:36,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 170 transitions. [2022-11-16 11:13:36,659 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 170 transitions. Word has length 15 [2022-11-16 11:13:36,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:13:36,659 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 170 transitions. [2022-11-16 11:13:36,659 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:36,659 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 170 transitions. [2022-11-16 11:13:36,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:13:36,660 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:13:36,660 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:13:36,669 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (25)] Ended with exit code 0 [2022-11-16 11:13:36,860 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:36,860 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:13:36,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:13:36,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1946875860, now seen corresponding path program 1 times [2022-11-16 11:13:36,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:13:36,861 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [625722865] [2022-11-16 11:13:36,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:13:36,861 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:36,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:13:36,862 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:13:36,863 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (26)] Waiting until timeout for monitored process [2022-11-16 11:13:36,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:13:36,996 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 11:13:36,998 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:13:37,086 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 11:13:37,113 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 11:13:37,209 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 11:13:37,209 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 63 treesize of output 19 [2022-11-16 11:13:37,263 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:37,263 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:13:39,533 INFO L321 Elim1Store]: treesize reduction 168, result has 22.6 percent of original size [2022-11-16 11:13:39,533 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 221 treesize of output 199 [2022-11-16 11:13:39,550 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 139 [2022-11-16 11:13:39,570 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 139 treesize of output 137 [2022-11-16 11:13:41,592 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:41,592 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:13:41,592 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [625722865] [2022-11-16 11:13:41,592 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [625722865] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:13:41,592 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:13:41,592 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 8 [2022-11-16 11:13:41,593 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [925755018] [2022-11-16 11:13:41,593 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:13:41,593 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:13:41,593 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:13:41,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:13:41,594 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=59, Unknown=1, NotChecked=0, Total=90 [2022-11-16 11:13:41,594 INFO L87 Difference]: Start difference. First operand 80 states and 170 transitions. Second operand has 10 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:43,785 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-16 11:13:43,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:13:43,846 INFO L93 Difference]: Finished difference Result 92 states and 184 transitions. [2022-11-16 11:13:43,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 11:13:43,847 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:13:43,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:13:43,848 INFO L225 Difference]: With dead ends: 92 [2022-11-16 11:13:43,848 INFO L226 Difference]: Without dead ends: 83 [2022-11-16 11:13:43,848 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=30, Invalid=59, Unknown=1, NotChecked=0, Total=90 [2022-11-16 11:13:43,848 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 20 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 0 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 15 SdHoareTripleChecker+Invalid, 103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 22 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:13:43,848 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 15 Invalid, 103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 80 Invalid, 1 Unknown, 22 Unchecked, 2.2s Time] [2022-11-16 11:13:43,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-16 11:13:43,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 82. [2022-11-16 11:13:43,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 80 states have (on average 2.1625) internal successors, (173), 81 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:43,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 173 transitions. [2022-11-16 11:13:43,851 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 173 transitions. Word has length 16 [2022-11-16 11:13:43,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:13:43,851 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 173 transitions. [2022-11-16 11:13:43,852 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:43,852 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 173 transitions. [2022-11-16 11:13:43,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:13:43,852 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:13:43,852 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:13:43,864 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (26)] Forceful destruction successful, exit code 0 [2022-11-16 11:13:44,064 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:44,064 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:13:44,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:13:44,065 INFO L85 PathProgramCache]: Analyzing trace with hash 1731032122, now seen corresponding path program 2 times [2022-11-16 11:13:44,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:13:44,065 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [859259500] [2022-11-16 11:13:44,066 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:13:44,066 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:13:44,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:13:44,067 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:13:44,074 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (27)] Waiting until timeout for monitored process [2022-11-16 11:13:44,203 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:13:44,203 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:13:44,208 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-16 11:13:44,210 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:13:44,385 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 19 [2022-11-16 11:13:44,482 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:44,482 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:13:46,625 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:13:46,634 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:13:47,327 INFO L321 Elim1Store]: treesize reduction 168, result has 22.6 percent of original size [2022-11-16 11:13:47,328 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 169 treesize of output 113 [2022-11-16 11:13:50,599 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:13:50,599 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:13:50,600 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [859259500] [2022-11-16 11:13:50,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [859259500] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:13:50,600 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:13:50,600 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:13:50,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733501684] [2022-11-16 11:13:50,600 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:13:50,601 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:13:50,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:13:50,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:13:50,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=123, Unknown=1, NotChecked=0, Total=182 [2022-11-16 11:13:50,602 INFO L87 Difference]: Start difference. First operand 82 states and 173 transitions. Second operand has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:13:53,600 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-16 11:13:55,605 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-16 11:13:57,609 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-16 11:14:00,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:14:00,320 INFO L93 Difference]: Finished difference Result 140 states and 304 transitions. [2022-11-16 11:14:00,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 11:14:00,322 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:14:00,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:14:00,322 INFO L225 Difference]: With dead ends: 140 [2022-11-16 11:14:00,322 INFO L226 Difference]: Without dead ends: 130 [2022-11-16 11:14:00,322 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=82, Invalid=188, Unknown=2, NotChecked=0, Total=272 [2022-11-16 11:14:00,323 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 91 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 8 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 127 IncrementalHoareTripleChecker+Unchecked, 6.9s IncrementalHoareTripleChecker+Time [2022-11-16 11:14:00,323 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [91 Valid, 12 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 177 Invalid, 3 Unknown, 127 Unchecked, 6.9s Time] [2022-11-16 11:14:00,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-16 11:14:00,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 88. [2022-11-16 11:14:00,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 86 states have (on average 2.3255813953488373) internal successors, (200), 87 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:00,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 200 transitions. [2022-11-16 11:14:00,327 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 200 transitions. Word has length 16 [2022-11-16 11:14:00,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:14:00,327 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 200 transitions. [2022-11-16 11:14:00,327 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:00,327 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 200 transitions. [2022-11-16 11:14:00,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:14:00,328 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:14:00,335 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:14:00,347 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (27)] Forceful destruction successful, exit code 0 [2022-11-16 11:14:00,547 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:00,547 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:14:00,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:14:00,548 INFO L85 PathProgramCache]: Analyzing trace with hash -1844683259, now seen corresponding path program 1 times [2022-11-16 11:14:00,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:14:00,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2062759486] [2022-11-16 11:14:00,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:14:00,548 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:00,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:14:00,549 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:14:00,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (28)] Waiting until timeout for monitored process [2022-11-16 11:14:00,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:14:00,676 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:14:00,677 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:14:00,785 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:00,785 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:14:00,956 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:00,956 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:14:00,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2062759486] [2022-11-16 11:14:00,956 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2062759486] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:14:00,956 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:14:00,956 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:14:00,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136405612] [2022-11-16 11:14:00,956 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:14:00,957 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:14:00,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:14:00,957 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:14:00,957 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:14:00,957 INFO L87 Difference]: Start difference. First operand 88 states and 200 transitions. Second operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:01,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:14:01,451 INFO L93 Difference]: Finished difference Result 112 states and 257 transitions. [2022-11-16 11:14:01,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 11:14:01,452 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:14:01,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:14:01,453 INFO L225 Difference]: With dead ends: 112 [2022-11-16 11:14:01,453 INFO L226 Difference]: Without dead ends: 112 [2022-11-16 11:14:01,453 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2022-11-16 11:14:01,454 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 37 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 11:14:01,454 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 11 Invalid, 185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 146 Invalid, 0 Unknown, 36 Unchecked, 0.4s Time] [2022-11-16 11:14:01,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-11-16 11:14:01,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 100. [2022-11-16 11:14:01,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 98 states have (on average 2.2551020408163267) internal successors, (221), 99 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:01,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 221 transitions. [2022-11-16 11:14:01,457 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 221 transitions. Word has length 16 [2022-11-16 11:14:01,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:14:01,458 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 221 transitions. [2022-11-16 11:14:01,458 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:01,458 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 221 transitions. [2022-11-16 11:14:01,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:14:01,459 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:14:01,459 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:14:01,475 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (28)] Forceful destruction successful, exit code 0 [2022-11-16 11:14:01,670 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:01,670 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:14:01,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:14:01,671 INFO L85 PathProgramCache]: Analyzing trace with hash -2126388887, now seen corresponding path program 2 times [2022-11-16 11:14:01,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:14:01,671 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [744812126] [2022-11-16 11:14:01,671 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:14:01,671 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:01,671 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:14:01,672 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:14:01,673 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (29)] Waiting until timeout for monitored process [2022-11-16 11:14:01,816 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:14:01,817 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:14:01,822 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:14:01,823 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:14:01,889 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:01,889 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:14:02,109 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:02,109 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:14:02,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [744812126] [2022-11-16 11:14:02,109 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [744812126] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:14:02,109 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:14:02,109 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:14:02,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194578112] [2022-11-16 11:14:02,110 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:14:02,110 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:14:02,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:14:02,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:14:02,110 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:14:02,111 INFO L87 Difference]: Start difference. First operand 100 states and 221 transitions. Second operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:02,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:14:02,652 INFO L93 Difference]: Finished difference Result 130 states and 309 transitions. [2022-11-16 11:14:02,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 11:14:02,653 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:14:02,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:14:02,654 INFO L225 Difference]: With dead ends: 130 [2022-11-16 11:14:02,654 INFO L226 Difference]: Without dead ends: 130 [2022-11-16 11:14:02,654 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2022-11-16 11:14:02,655 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 49 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 88 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-16 11:14:02,655 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [49 Valid, 9 Invalid, 233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 144 Invalid, 0 Unknown, 88 Unchecked, 0.4s Time] [2022-11-16 11:14:02,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-11-16 11:14:02,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 104. [2022-11-16 11:14:02,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 102 states have (on average 2.343137254901961) internal successors, (239), 103 states have internal predecessors, (239), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:02,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 239 transitions. [2022-11-16 11:14:02,659 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 239 transitions. Word has length 16 [2022-11-16 11:14:02,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:14:02,659 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 239 transitions. [2022-11-16 11:14:02,659 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:02,660 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 239 transitions. [2022-11-16 11:14:02,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:14:02,660 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:14:02,660 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:14:02,672 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (29)] Ended with exit code 0 [2022-11-16 11:14:02,872 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:02,872 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:14:02,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:14:02,872 INFO L85 PathProgramCache]: Analyzing trace with hash -2098769019, now seen corresponding path program 3 times [2022-11-16 11:14:02,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:14:02,873 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1461493650] [2022-11-16 11:14:02,873 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:14:02,873 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:02,873 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:14:02,874 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:14:02,880 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (30)] Waiting until timeout for monitored process [2022-11-16 11:14:03,011 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 11:14:03,011 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:14:03,016 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:14:03,017 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:14:03,094 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:03,094 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:14:03,141 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 58 [2022-11-16 11:14:03,149 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 56 [2022-11-16 11:14:03,219 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:03,220 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:14:03,220 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1461493650] [2022-11-16 11:14:03,220 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1461493650] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:14:03,220 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:14:03,220 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:14:03,220 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149271725] [2022-11-16 11:14:03,220 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:14:03,220 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:14:03,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:14:03,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:14:03,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:14:03,221 INFO L87 Difference]: Start difference. First operand 104 states and 239 transitions. Second operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:03,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:14:03,893 INFO L93 Difference]: Finished difference Result 188 states and 445 transitions. [2022-11-16 11:14:03,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 11:14:03,894 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:14:03,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:14:03,895 INFO L225 Difference]: With dead ends: 188 [2022-11-16 11:14:03,895 INFO L226 Difference]: Without dead ends: 188 [2022-11-16 11:14:03,895 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2022-11-16 11:14:03,896 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 66 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 243 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 289 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 243 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 44 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 11:14:03,896 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 23 Invalid, 289 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 243 Invalid, 0 Unknown, 44 Unchecked, 0.6s Time] [2022-11-16 11:14:03,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2022-11-16 11:14:03,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 110. [2022-11-16 11:14:03,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 108 states have (on average 2.3703703703703702) internal successors, (256), 109 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:03,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 256 transitions. [2022-11-16 11:14:03,901 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 256 transitions. Word has length 16 [2022-11-16 11:14:03,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:14:03,901 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 256 transitions. [2022-11-16 11:14:03,902 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:03,902 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 256 transitions. [2022-11-16 11:14:03,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:14:03,902 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:14:03,903 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:14:03,918 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (30)] Forceful destruction successful, exit code 0 [2022-11-16 11:14:04,114 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:04,114 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:14:04,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:14:04,115 INFO L85 PathProgramCache]: Analyzing trace with hash -345341199, now seen corresponding path program 4 times [2022-11-16 11:14:04,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:14:04,115 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1895824135] [2022-11-16 11:14:04,115 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 11:14:04,115 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:04,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:14:04,116 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:14:04,122 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (31)] Waiting until timeout for monitored process [2022-11-16 11:14:04,267 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 11:14:04,267 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:14:04,272 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:14:04,273 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:14:04,368 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:04,368 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:14:04,403 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 58 [2022-11-16 11:14:04,408 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 56 [2022-11-16 11:14:04,538 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:14:04,538 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:14:04,538 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1895824135] [2022-11-16 11:14:04,538 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1895824135] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:14:04,538 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:14:04,538 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:14:04,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2100829291] [2022-11-16 11:14:04,539 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:14:04,539 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:14:04,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:14:04,539 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:14:04,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:14:04,540 INFO L87 Difference]: Start difference. First operand 110 states and 256 transitions. Second operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:05,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:14:05,063 INFO L93 Difference]: Finished difference Result 172 states and 405 transitions. [2022-11-16 11:14:05,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 11:14:05,064 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:14:05,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:14:05,065 INFO L225 Difference]: With dead ends: 172 [2022-11-16 11:14:05,065 INFO L226 Difference]: Without dead ends: 172 [2022-11-16 11:14:05,065 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2022-11-16 11:14:05,066 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 48 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 191 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 351 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 191 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 160 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 11:14:05,066 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 13 Invalid, 351 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 191 Invalid, 0 Unknown, 160 Unchecked, 0.5s Time] [2022-11-16 11:14:05,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2022-11-16 11:14:05,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 110. [2022-11-16 11:14:05,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 108 states have (on average 2.3703703703703702) internal successors, (256), 109 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:05,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 256 transitions. [2022-11-16 11:14:05,069 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 256 transitions. Word has length 16 [2022-11-16 11:14:05,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:14:05,070 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 256 transitions. [2022-11-16 11:14:05,070 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:14:05,070 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 256 transitions. [2022-11-16 11:14:05,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:14:05,070 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:14:05,070 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:14:05,081 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (31)] Ended with exit code 0 [2022-11-16 11:14:05,274 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:05,274 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:14:05,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:14:05,275 INFO L85 PathProgramCache]: Analyzing trace with hash 1899409477, now seen corresponding path program 5 times [2022-11-16 11:14:05,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:14:05,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1832324799] [2022-11-16 11:14:05,275 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-16 11:14:05,275 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:14:05,275 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:14:05,276 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:14:05,277 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (32)] Waiting until timeout for monitored process [2022-11-16 11:14:05,414 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:14:05,414 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:14:05,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-16 11:14:05,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:14:06,152 INFO L321 Elim1Store]: treesize reduction 456, result has 5.2 percent of original size [2022-11-16 11:14:06,153 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 12 select indices, 12 select index equivalence classes, 6 disjoint index pairs (out of 66 index pairs), introduced 20 new quantified variables, introduced 66 case distinctions, treesize of input 1681 treesize of output 303 [2022-11-16 11:14:06,166 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2022-11-16 11:14:06,172 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2022-11-16 11:14:06,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:14:06,252 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:14:06,338 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:14:06,344 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:14:08,345 INFO L321 Elim1Store]: treesize reduction 498, result has 21.3 percent of original size [2022-11-16 11:14:08,346 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 20 new quantified variables, introduced 66 case distinctions, treesize of input 2006 treesize of output 338 [2022-11-16 11:14:38,345 WARN L855 $PredicateComparison]: unable to prove that (or (not (bvsge c_~x2~0 (_ bv0 32))) (not (bvslt c_~x2~0 c_~size~0)) (let ((.cse4 (bvmul c_~x2~0 (_ bv4 32)))) (let ((.cse150 (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse331 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse331 c_~size~0)) (not (bvsge .cse331 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse331) .cse4)))))) (and (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse3 (bvmul (_ bv4 32) .cse0))) (or (not (bvslt .cse0 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse2 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse1 (bvmul .cse2 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse1) (bvadd c_~f~0.offset (_ bv4 32) .cse1))) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse2 c_~size~0)) (= .cse3 .cse1) (not (bvsge .cse2 (_ bv0 32))) (= .cse4 .cse1))))) (not (bvsge .cse0 (_ bv0 32))) (= .cse3 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse5 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse5 c_~size~0)) (not (bvsge .cse5 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse5) .cse4) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse6 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse9 (bvmul (_ bv4 32) .cse6))) (or (not (bvslt .cse6 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse8 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse7 (bvmul (_ bv4 32) .cse8))) (or (not (bvule (bvadd c_~f~0.offset .cse7) (bvadd c_~f~0.offset (_ bv4 32) .cse7))) (not (bvslt .cse8 c_~size~0)) (= .cse9 .cse7))))) (not (bvsge .cse6 (_ bv0 32))) (= .cse9 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse10 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse11 (bvmul (_ bv4 32) .cse10))) (or (not (bvslt .cse10 c_~size~0)) (not (bvsge .cse10 (_ bv0 32))) (= .cse11 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse13 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse12 (bvmul .cse13 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse12) (bvadd c_~f~0.offset (_ bv4 32) .cse12))) (not (bvslt .cse13 c_~size~0)) (= .cse11 .cse12) (not (bvsge .cse13 (_ bv0 32))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse14 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse17 (bvmul (_ bv4 32) .cse14))) (or (not (bvslt .cse14 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse16 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse15 (bvmul (_ bv4 32) .cse16))) (or (not (bvule (bvadd c_~f~0.offset .cse15) (bvadd c_~f~0.offset (_ bv4 32) .cse15))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse16 c_~size~0)) (= .cse17 .cse15) (= .cse15 .cse4))))) (not (bvsge .cse14 (_ bv0 32))) (= .cse17 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse20 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse18 (concat (concat .cse20 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse18 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse19 (concat (concat .cse20 v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse4 (bvmul (_ bv4 32) .cse19)) (= c_~x1~0 .cse19)))) (not (bvsge .cse18 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse18) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse21 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse21 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse21 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse21) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse23 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse22 (concat (concat .cse23 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse22 c_~size~0)) (not (bvsge .cse22 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse22) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse23 v_arrayElimCell_81) v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse25 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse24 (concat .cse25 v_arrayElimCell_78))) (or (not (bvslt .cse24 c_~size~0)) (not (bvsge .cse24 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse24) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (= c_~x1~0 (concat .cse25 v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse26 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse26 c_~size~0)) (not (bvsge .cse26 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse27 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse27 c_~x1~0) (= .cse4 (bvmul .cse27 (_ bv4 32)))))) (= (bvmul (_ bv4 32) .cse26) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse32 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse28 (concat (concat .cse32 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse31 (bvmul (_ bv4 32) .cse28))) (or (not (bvslt .cse28 c_~size~0)) (not (bvsge .cse28 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse30 (concat (concat .cse32 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse29 (bvmul (_ bv4 32) .cse30))) (or (not (bvule (bvadd c_~f~0.offset .cse29) (bvadd c_~f~0.offset (_ bv4 32) .cse29))) (= .cse4 .cse29) (not (bvslt .cse30 c_~size~0)) (= .cse31 .cse29))))) (= .cse31 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse37 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse33 (concat (concat .cse37 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse35 (bvmul (_ bv4 32) .cse33))) (or (not (bvslt .cse33 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse34 (concat (concat .cse37 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse36 (bvmul (_ bv4 32) .cse34))) (or (not (bvslt .cse34 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse35 .cse36) (= .cse4 .cse36) (not (bvule (bvadd c_~f~0.offset .cse36) (bvadd c_~f~0.offset (_ bv4 32) .cse36))))))) (not (bvsge .cse33 (_ bv0 32))) (= .cse35 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse42 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse38 (concat (concat .cse42 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse39 (bvmul (_ bv4 32) .cse38))) (or (not (bvslt .cse38 c_~size~0)) (not (bvsge .cse38 (_ bv0 32))) (= .cse39 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse40 (concat (concat .cse42 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse41 (bvmul (_ bv4 32) .cse40))) (or (not (bvslt .cse40 c_~size~0)) (= .cse39 .cse41) (= .cse4 .cse41) (not (bvule (bvadd c_~f~0.offset .cse41) (bvadd c_~f~0.offset (_ bv4 32) .cse41)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse48 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse43 (concat (concat .cse48 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse45 (bvmul (_ bv4 32) .cse43))) (or (not (bvslt .cse43 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse47 (concat .cse48 v_arrayElimCell_81))) (let ((.cse44 (concat .cse47 v_arrayElimCell_70))) (let ((.cse46 (bvmul (_ bv4 32) .cse44))) (or (not (bvslt .cse44 c_~size~0)) (= .cse45 .cse46) (= .cse4 .cse46) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat .cse47 v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse46) (bvadd c_~f~0.offset (_ bv4 32) .cse46)))))))) (not (bvsge .cse43 (_ bv0 32))) (= .cse45 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse53 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse49 (concat (concat .cse53 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse51 (bvmul (_ bv4 32) .cse49))) (or (not (bvslt .cse49 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse50 (concat (concat .cse53 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse52 (bvmul (_ bv4 32) .cse50))) (or (not (bvslt .cse50 c_~size~0)) (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse51 .cse52) (= .cse4 .cse52) (not (bvule (bvadd c_~f~0.offset .cse52) (bvadd c_~f~0.offset (_ bv4 32) .cse52))))))) (not (bvsge .cse49 (_ bv0 32))) (= .cse51 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse58 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse54 (concat (concat .cse58 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse56 (bvmul (_ bv4 32) .cse54))) (or (not (bvslt .cse54 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse55 (concat (concat .cse58 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse57 (bvmul (_ bv4 32) .cse55))) (or (not (bvslt .cse55 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse56 .cse57) (= .cse4 .cse57) (not (bvule (bvadd c_~f~0.offset .cse57) (bvadd c_~f~0.offset (_ bv4 32) .cse57))))))) (not (bvsge .cse54 (_ bv0 32))) (= .cse56 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse59 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse60 (bvmul (_ bv4 32) .cse59))) (or (not (bvslt .cse59 c_~size~0)) (not (bvsge .cse59 (_ bv0 32))) (= .cse60 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse62 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse61 (bvmul (_ bv4 32) .cse62))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse61) (bvadd c_~f~0.offset (_ bv4 32) .cse61))) (not (bvslt .cse62 c_~size~0)) (= .cse60 .cse61) (= .cse61 .cse4))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse63 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse66 (bvmul (_ bv4 32) .cse63))) (or (not (bvslt .cse63 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse64 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse65 (bvmul (_ bv4 32) .cse64))) (or (not (bvsge .cse64 (_ bv0 32))) (= .cse65 .cse4) (not (bvule (bvadd c_~f~0.offset .cse65) (bvadd c_~f~0.offset .cse65 (_ bv4 32)))) (not (bvslt .cse64 c_~size~0)) (= .cse66 .cse65))))) (not (bvsge .cse63 (_ bv0 32))) (= .cse66 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse67 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse70 (bvmul (_ bv4 32) .cse67))) (or (not (bvslt .cse67 c_~size~0)) (not (bvsge .cse67 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse68 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse69 (bvmul (_ bv4 32) .cse68))) (or (not (bvslt .cse68 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse69) (bvadd c_~f~0.offset (_ bv4 32) .cse69))) (not (bvsge .cse68 (_ bv0 32))) (= .cse4 .cse69) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (= .cse70 .cse69))))) (= .cse70 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse71 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse74 (bvmul (_ bv4 32) .cse71))) (or (not (bvslt .cse71 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse72 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse73 (bvmul (_ bv4 32) .cse72))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse72 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse73) (bvadd c_~f~0.offset (_ bv4 32) .cse73))) (not (bvsge .cse72 (_ bv0 32))) (= .cse4 .cse73) (= .cse74 .cse73))))) (not (bvsge .cse71 (_ bv0 32))) (= .cse74 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse75 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse75 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse75 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse75) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse76 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse76 c_~size~0)) (not (bvsge .cse76 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse76) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse77 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse80 (bvmul (_ bv4 32) .cse77))) (or (not (bvslt .cse77 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse79 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse78 (bvmul .cse79 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse78) (bvadd c_~f~0.offset (_ bv4 32) .cse78))) (not (bvslt .cse79 c_~size~0)) (= .cse80 .cse78) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvsge .cse79 (_ bv0 32))) (= .cse4 .cse78))))) (not (bvsge .cse77 (_ bv0 32))) (= .cse80 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse81 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse81 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse82 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= (bvmul (_ bv4 32) .cse82) .cse4) (= c_~x1~0 .cse82)))) (not (bvsge .cse81 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse81) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse83 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse83 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse83 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse83) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse84 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse87 (bvmul (_ bv4 32) .cse84))) (or (not (bvslt .cse84 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse86 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse85 (bvmul (_ bv4 32) .cse86))) (or (not (bvule (bvadd c_~f~0.offset .cse85) (bvadd c_~f~0.offset (_ bv4 32) .cse85))) (not (bvslt .cse86 c_~size~0)) (= .cse87 .cse85) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse85 .cse4))))) (not (bvsge .cse84 (_ bv0 32))) (= .cse87 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse88 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse91 (bvmul (_ bv4 32) .cse88))) (or (not (bvslt .cse88 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse89 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse90 (bvmul (_ bv4 32) .cse89))) (or (not (bvsge .cse89 (_ bv0 32))) (not (bvule (bvadd c_~f~0.offset .cse90) (bvadd c_~f~0.offset .cse90 (_ bv4 32)))) (not (bvslt .cse89 c_~size~0)) (= .cse91 .cse90))))) (not (bvsge .cse88 (_ bv0 32))) (= .cse91 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse92 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse95 (bvmul (_ bv4 32) .cse92))) (or (not (bvslt .cse92 c_~size~0)) (not (bvsge .cse92 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse94 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse93 (bvmul (_ bv4 32) .cse94))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse93) (bvadd c_~f~0.offset (_ bv4 32) .cse93))) (not (bvslt .cse94 c_~size~0)) (= .cse95 .cse93) (= .cse93 .cse4))))) (= .cse95 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse100 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse96 (concat (concat .cse100 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse97 (bvmul (_ bv4 32) .cse96))) (or (not (bvslt .cse96 c_~size~0)) (not (bvsge .cse96 (_ bv0 32))) (= .cse97 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse98 (concat (concat .cse100 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse99 (bvmul (_ bv4 32) .cse98))) (or (not (bvslt .cse98 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse97 .cse99) (= .cse4 .cse99) (not (bvule (bvadd c_~f~0.offset .cse99) (bvadd c_~f~0.offset (_ bv4 32) .cse99)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse101 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse101 c_~size~0)) (not (bvsge .cse101 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse101) .cse4) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse102 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse102 c_~x1~0) (= .cse4 (bvmul .cse102 (_ bv4 32))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse107 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse103 (concat (concat .cse107 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse106 (bvmul (_ bv4 32) .cse103))) (or (not (bvslt .cse103 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse105 (concat (concat .cse107 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse104 (bvmul (_ bv4 32) .cse105))) (or (not (bvule (bvadd c_~f~0.offset .cse104) (bvadd c_~f~0.offset (_ bv4 32) .cse104))) (not (bvslt .cse105 c_~size~0)) (= .cse106 .cse104))))) (not (bvsge .cse103 (_ bv0 32))) (= .cse106 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse108 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse108 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse109 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= c_~x1~0 .cse109) (= .cse4 (bvmul (_ bv4 32) .cse109))))) (not (bvsge .cse108 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse108) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse110 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse114 (bvmul (_ bv4 32) .cse110))) (or (not (bvslt .cse110 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse111 (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse113 (concat .cse111 v_arrayElimCell_70))) (let ((.cse112 (bvmul (_ bv4 32) .cse113))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse111 v_arrayElimCell_77))) (not (bvule (bvadd c_~f~0.offset .cse112) (bvadd c_~f~0.offset (_ bv4 32) .cse112))) (not (bvslt .cse113 c_~size~0)) (= .cse114 .cse112) (= .cse112 .cse4)))))) (not (bvsge .cse110 (_ bv0 32))) (= .cse114 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse119 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse115 (concat (concat .cse119 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse117 (bvmul (_ bv4 32) .cse115))) (or (not (bvslt .cse115 c_~size~0)) (not (bvsge .cse115 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse116 (concat (concat .cse119 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse118 (bvmul (_ bv4 32) .cse116))) (or (not (bvslt .cse116 c_~size~0)) (= .cse117 .cse118) (not (bvule (bvadd c_~f~0.offset .cse118) (bvadd c_~f~0.offset (_ bv4 32) .cse118))))))) (= .cse117 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse120 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse123 (bvmul (_ bv4 32) .cse120))) (or (not (bvslt .cse120 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse121 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse122 (bvmul (_ bv4 32) .cse121))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse121 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse122) (bvadd c_~f~0.offset (_ bv4 32) .cse122))) (not (bvsge .cse121 (_ bv0 32))) (= .cse4 .cse122) (= .cse123 .cse122))))) (not (bvsge .cse120 (_ bv0 32))) (= .cse123 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse124 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse127 (bvmul (_ bv4 32) .cse124))) (or (not (bvslt .cse124 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse126 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse125 (bvmul (_ bv4 32) .cse126))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvule (bvadd c_~f~0.offset .cse125) (bvadd c_~f~0.offset (_ bv4 32) .cse125))) (not (bvslt .cse126 c_~size~0)) (= .cse127 .cse125) (= .cse125 .cse4))))) (not (bvsge .cse124 (_ bv0 32))) (= .cse127 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse128 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse128 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse128 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse128) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse130 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse129 (concat (concat .cse130 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse129 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse130 v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse129 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse129) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse131 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse132 (bvmul (_ bv4 32) .cse131))) (or (not (bvslt .cse131 c_~size~0)) (not (bvsge .cse131 (_ bv0 32))) (= .cse132 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse133 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse134 (bvmul (_ bv4 32) .cse133))) (or (not (bvslt .cse133 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse134) (bvadd c_~f~0.offset (_ bv4 32) .cse134))) (not (bvsge .cse133 (_ bv0 32))) (= .cse4 .cse134) (= .cse132 .cse134))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse135 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse135 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse135 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse135) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse140 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse136 (concat (concat .cse140 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse138 (bvmul (_ bv4 32) .cse136))) (or (not (bvslt .cse136 c_~size~0)) (not (bvsge .cse136 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse137 (concat (concat .cse140 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse139 (bvmul (_ bv4 32) .cse137))) (or (not (bvslt .cse137 c_~size~0)) (= .cse138 .cse139) (= .cse4 .cse139) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd c_~f~0.offset .cse139) (bvadd c_~f~0.offset (_ bv4 32) .cse139))))))) (= .cse138 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse141 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse144 (bvmul (_ bv4 32) .cse141))) (or (not (bvslt .cse141 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse142 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse143 (bvmul (_ bv4 32) .cse142))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse142 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse143) (bvadd c_~f~0.offset (_ bv4 32) .cse143))) (not (bvsge .cse142 (_ bv0 32))) (= .cse4 .cse143) (= .cse144 .cse143))))) (not (bvsge .cse141 (_ bv0 32))) (= .cse144 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse145 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse149 (bvmul (_ bv4 32) .cse145))) (or (not (bvslt .cse145 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse147 (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse146 (concat .cse147 v_arrayElimCell_70))) (let ((.cse148 (bvmul (_ bv4 32) .cse146))) (or (not (bvslt .cse146 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse147 v_arrayElimCell_77))) (not (bvule (bvadd c_~f~0.offset .cse148) (bvadd c_~f~0.offset (_ bv4 32) .cse148))) (not (bvsge .cse146 (_ bv0 32))) (= .cse4 .cse148) (= .cse149 .cse148)))))) (not (bvsge .cse145 (_ bv0 32))) (= .cse149 .cse4))))) (or .cse150 (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse151 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse4 (bvmul (_ bv4 32) .cse151)) (= c_~x1~0 .cse151))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse152 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse155 (bvmul (_ bv4 32) .cse152))) (or (not (bvslt .cse152 c_~size~0)) (not (bvsge .cse152 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse154 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse153 (bvmul (_ bv4 32) .cse154))) (or (not (bvule (bvadd c_~f~0.offset .cse153) (bvadd c_~f~0.offset (_ bv4 32) .cse153))) (not (bvslt .cse154 c_~size~0)) (= .cse155 .cse153) (= .cse153 .cse4))))) (= .cse155 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse156 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse160 (bvmul (_ bv4 32) .cse156))) (or (not (bvslt .cse156 c_~size~0)) (not (bvsge .cse156 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse159 (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81))) (let ((.cse158 (concat .cse159 v_arrayElimCell_70))) (let ((.cse157 (bvmul .cse158 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse157) (bvadd c_~f~0.offset (_ bv4 32) .cse157))) (not (bvslt .cse158 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse159 v_arrayElimCell_77))) (= .cse160 .cse157) (not (bvsge .cse158 (_ bv0 32))) (= .cse4 .cse157)))))) (= .cse160 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse164 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse161 (concat (concat .cse164 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse165 (bvmul (_ bv4 32) .cse161))) (or (not (bvslt .cse161 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse163 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse162 (bvmul (_ bv4 32) .cse163))) (or (not (bvule (bvadd c_~f~0.offset .cse162) (bvadd c_~f~0.offset (_ bv4 32) .cse162))) (not (bvslt .cse163 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse164 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse165 .cse162) (= .cse162 .cse4))))) (not (bvsge .cse161 (_ bv0 32))) (= .cse165 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse166 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse167 (bvmul (_ bv4 32) .cse166))) (or (not (bvslt .cse166 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse169 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse168 (bvmul (_ bv4 32) .cse169))) (or (= .cse167 .cse168) (not (bvslt .cse169 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse168) (bvadd c_~f~0.offset (_ bv4 32) .cse168))) (not (bvsge .cse169 (_ bv0 32))))))) (not (bvsge .cse166 (_ bv0 32))) (= .cse167 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse170 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse173 (bvmul (_ bv4 32) .cse170))) (or (not (bvslt .cse170 c_~size~0)) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse172 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse171 (bvmul (_ bv4 32) .cse172))) (or (not (bvule (bvadd c_~f~0.offset .cse171) (bvadd c_~f~0.offset (_ bv4 32) .cse171))) (not (bvslt .cse172 c_~size~0)) (not (bvsge .cse172 (_ bv0 32))) (= .cse173 .cse171))))) (not (bvsge .cse170 (_ bv0 32))) (= .cse173 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse174 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse174 c_~size~0)) (= .cse174 c_~x1~0) (not (bvsge .cse174 (_ bv0 32)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse175 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse178 (bvmul (_ bv4 32) .cse175))) (or (not (bvslt .cse175 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse177 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse176 (bvmul .cse177 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse176) (bvadd c_~f~0.offset (_ bv4 32) .cse176))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse177 c_~size~0)) (= .cse178 .cse176) (not (bvsge .cse177 (_ bv0 32))) (= .cse4 .cse176))))) (not (bvsge .cse175 (_ bv0 32))) (= .cse178 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse179 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse182 (bvmul (_ bv4 32) .cse179))) (or (not (bvslt .cse179 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse181 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse180 (bvmul .cse181 (_ bv4 32)))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd c_~f~0.offset .cse180) (bvadd c_~f~0.offset (_ bv4 32) .cse180))) (not (bvslt .cse181 c_~size~0)) (= .cse182 .cse180) (not (bvsge .cse181 (_ bv0 32))) (= .cse4 .cse180))))) (not (bvsge .cse179 (_ bv0 32))) (= .cse182 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse183 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse186 (bvmul (_ bv4 32) .cse183))) (or (not (bvslt .cse183 c_~size~0)) (not (bvsge .cse183 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse185 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse184 (bvmul .cse185 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse184) (bvadd c_~f~0.offset (_ bv4 32) .cse184))) (not (bvslt .cse185 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse186 .cse184) (not (bvsge .cse185 (_ bv0 32))) (= .cse4 .cse184))))) (= .cse186 .cse4))))) (or (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) .cse150) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse187 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse190 (bvmul (_ bv4 32) .cse187))) (or (not (bvslt .cse187 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse188 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse189 (bvmul (_ bv4 32) .cse188))) (or (not (bvslt .cse188 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse189) (bvadd c_~f~0.offset (_ bv4 32) .cse189))) (not (bvsge .cse188 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse4 .cse189) (= .cse190 .cse189))))) (not (bvsge .cse187 (_ bv0 32))) (= .cse190 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse191 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse194 (bvmul (_ bv4 32) .cse191))) (or (not (bvslt .cse191 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse192 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse193 (bvmul (_ bv4 32) .cse192))) (or (not (bvslt .cse192 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse193) (bvadd c_~f~0.offset (_ bv4 32) .cse193))) (not (bvsge .cse192 (_ bv0 32))) (= .cse194 .cse193))))) (not (bvsge .cse191 (_ bv0 32))) (= .cse194 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse198 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse196 (bvmul (_ bv4 32) .cse198))) (or (forall ((v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse197 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse195 (bvmul (_ bv4 32) .cse197))) (or (not (bvule (bvadd c_~f~0.offset .cse195) (bvadd c_~f~0.offset (_ bv4 32) .cse195))) (= .cse196 .cse195) (not (bvslt .cse197 c_~size~0)))))) (not (bvslt .cse198 c_~size~0)) (not (bvsge .cse198 (_ bv0 32))) (= .cse196 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse199 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse199 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse199 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse199) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse204 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse200 (concat (concat .cse204 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse202 (bvmul (_ bv4 32) .cse200))) (or (not (bvslt .cse200 c_~size~0)) (not (bvsge .cse200 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse201 (concat (concat .cse204 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse203 (bvmul (_ bv4 32) .cse201))) (or (not (bvslt .cse201 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse202 .cse203) (= .cse4 .cse203) (not (bvule (bvadd c_~f~0.offset .cse203) (bvadd c_~f~0.offset (_ bv4 32) .cse203))))))) (= .cse202 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse205 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse208 (bvmul (_ bv4 32) .cse205))) (or (not (bvslt .cse205 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse207 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse206 (bvmul (_ bv4 32) .cse207))) (or (not (bvule (bvadd c_~f~0.offset .cse206) (bvadd c_~f~0.offset (_ bv4 32) .cse206))) (not (bvsge .cse207 (_ bv0 32))) (not (bvslt .cse207 c_~size~0)) (= .cse208 .cse206))))) (not (bvsge .cse205 (_ bv0 32))) (= .cse208 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse209 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse212 (bvmul (_ bv4 32) .cse209))) (or (not (bvslt .cse209 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse211 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse210 (bvmul (_ bv4 32) .cse211))) (or (not (bvule (bvadd c_~f~0.offset .cse210) (bvadd c_~f~0.offset (_ bv4 32) .cse210))) (not (bvslt .cse211 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (= .cse212 .cse210) (= .cse210 .cse4))))) (not (bvsge .cse209 (_ bv0 32))) (= .cse212 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse216 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse213 (concat (concat .cse216 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse213 c_~size~0)) (not (bvsge .cse213 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse213) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse215 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse214 (bvmul (_ bv4 32) .cse215))) (or (not (bvule (bvadd c_~f~0.offset .cse214) (bvadd c_~f~0.offset (_ bv4 32) .cse214))) (not (bvslt .cse215 c_~size~0)) (= c_~x1~0 (concat (concat .cse216 v_arrayElimCell_81) v_arrayElimCell_78)) (= .cse214 .cse4))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse221 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse217 (concat .cse221 v_arrayElimCell_78))) (let ((.cse218 (bvmul (_ bv4 32) .cse217))) (or (not (bvslt .cse217 c_~size~0)) (not (bvsge .cse217 (_ bv0 32))) (= .cse218 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (let ((.cse220 (concat .cse221 v_arrayElimCell_70))) (let ((.cse219 (bvmul (_ bv4 32) .cse220))) (or (= .cse218 .cse219) (not (bvslt .cse220 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse219) (bvadd c_~f~0.offset (_ bv4 32) .cse219)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse222 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse225 (bvmul (_ bv4 32) .cse222))) (or (not (bvslt .cse222 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse223 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse224 (bvmul (_ bv4 32) .cse223))) (or (not (bvslt .cse223 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse224) (bvadd c_~f~0.offset (_ bv4 32) .cse224))) (not (bvsge .cse223 (_ bv0 32))) (= .cse4 .cse224) (= .cse225 .cse224) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)))))) (not (bvsge .cse222 (_ bv0 32))) (= .cse225 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse226 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse228 (bvmul (_ bv4 32) .cse226))) (or (not (bvslt .cse226 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse229 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse227 (bvmul (_ bv4 32) .cse229))) (or (not (bvule (bvadd c_~f~0.offset .cse227) (bvadd c_~f~0.offset (_ bv4 32) .cse227))) (= .cse228 .cse227) (not (bvslt .cse229 c_~size~0)))))) (not (bvsge .cse226 (_ bv0 32))) (= .cse228 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse233 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse232 (bvmul (_ bv4 32) .cse233))) (or (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse230 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse231 (bvmul (_ bv4 32) .cse230))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse230 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse231) (bvadd c_~f~0.offset (_ bv4 32) .cse231))) (not (bvsge .cse230 (_ bv0 32))) (= .cse4 .cse231) (= .cse232 .cse231))))) (not (bvslt .cse233 c_~size~0)) (not (bvsge .cse233 (_ bv0 32))) (= .cse232 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse234 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse236 (bvmul (_ bv4 32) .cse234))) (or (not (bvslt .cse234 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse235 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse237 (bvmul (_ bv4 32) .cse235))) (or (not (bvslt .cse235 c_~size~0)) (= .cse236 .cse237) (not (bvule (bvadd c_~f~0.offset .cse237) (bvadd c_~f~0.offset (_ bv4 32) .cse237))) (not (bvsge .cse235 (_ bv0 32))))))) (not (bvsge .cse234 (_ bv0 32))) (= .cse236 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse238 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse239 (bvmul (_ bv4 32) .cse238))) (or (not (bvslt .cse238 c_~size~0)) (not (bvsge .cse238 (_ bv0 32))) (= .cse239 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse240 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse241 (bvmul (_ bv4 32) .cse240))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvslt .cse240 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse241) (bvadd c_~f~0.offset (_ bv4 32) .cse241))) (not (bvsge .cse240 (_ bv0 32))) (= .cse4 .cse241) (= .cse239 .cse241))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse242 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse244 (bvmul (_ bv4 32) .cse242))) (or (not (bvslt .cse242 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse243 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse245 (bvmul .cse243 (_ bv4 32)))) (or (not (bvslt .cse243 c_~size~0)) (= .cse244 .cse245) (= .cse4 .cse245) (not (bvule (bvadd c_~f~0.offset .cse245) (bvadd c_~f~0.offset (_ bv4 32) .cse245))))))) (not (bvsge .cse242 (_ bv0 32))) (= .cse244 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse246 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse246 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse246 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse246) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse251 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse247 (concat (concat .cse251 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse248 (bvmul (_ bv4 32) .cse247))) (or (not (bvslt .cse247 c_~size~0)) (not (bvsge .cse247 (_ bv0 32))) (= .cse248 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse250 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse249 (bvmul .cse250 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse249) (bvadd c_~f~0.offset (_ bv4 32) .cse249))) (not (bvslt .cse250 c_~size~0)) (= .cse248 .cse249) (not (bvsge .cse250 (_ bv0 32))) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse251 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse4 .cse249)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse252 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse255 (bvmul (_ bv4 32) .cse252))) (or (not (bvslt .cse252 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse253 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse254 (bvmul (_ bv4 32) .cse253))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse253 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse254) (bvadd c_~f~0.offset (_ bv4 32) .cse254))) (not (bvsge .cse253 (_ bv0 32))) (= .cse4 .cse254) (= .cse255 .cse254))))) (not (bvsge .cse252 (_ bv0 32))) (= .cse255 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse256 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse257 (bvmul (_ bv4 32) .cse256))) (or (not (bvslt .cse256 c_~size~0)) (not (bvsge .cse256 (_ bv0 32))) (= .cse257 .cse4) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse259 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse258 (bvmul (_ bv4 32) .cse259))) (or (not (bvule (bvadd c_~f~0.offset .cse258) (bvadd c_~f~0.offset (_ bv4 32) .cse258))) (not (bvsge .cse259 (_ bv0 32))) (not (bvslt .cse259 c_~size~0)) (= .cse257 .cse258) (= .cse4 .cse258))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse264 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse260 (concat (concat .cse264 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse260 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse263 (concat .cse264 v_arrayElimCell_81))) (let ((.cse261 (concat .cse263 v_arrayElimCell_70))) (let ((.cse262 (bvmul (_ bv4 32) .cse261))) (or (not (bvslt .cse261 c_~size~0)) (= .cse4 .cse262) (not (bvule (bvadd c_~f~0.offset .cse262) (bvadd c_~f~0.offset (_ bv4 32) .cse262))) (= c_~x1~0 (concat .cse263 v_arrayElimCell_78))))))) (not (bvsge .cse260 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse260) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse265 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse268 (bvmul (_ bv4 32) .cse265))) (or (not (bvslt .cse265 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse266 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse267 (bvmul (_ bv4 32) .cse266))) (or (not (bvslt .cse266 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse267) (bvadd c_~f~0.offset (_ bv4 32) .cse267))) (not (bvsge .cse266 (_ bv0 32))) (= .cse4 .cse267) (= .cse268 .cse267))))) (not (bvsge .cse265 (_ bv0 32))) (= .cse268 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse269 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse269 c_~size~0)) (not (bvsge .cse269 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse269) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse270 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse273 (bvmul (_ bv4 32) .cse270))) (or (not (bvslt .cse270 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse271 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse272 (bvmul (_ bv4 32) .cse271))) (or (not (bvslt .cse271 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse272) (bvadd c_~f~0.offset (_ bv4 32) .cse272))) (not (bvsge .cse271 (_ bv0 32))) (= .cse4 .cse272) (= .cse273 .cse272) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))))))) (not (bvsge .cse270 (_ bv0 32))) (= .cse273 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse278 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse274 (concat (concat .cse278 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse275 (bvmul (_ bv4 32) .cse274))) (or (not (bvslt .cse274 c_~size~0)) (not (bvsge .cse274 (_ bv0 32))) (= .cse275 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse277 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse276 (bvmul .cse277 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse276) (bvadd c_~f~0.offset (_ bv4 32) .cse276))) (not (bvslt .cse277 c_~size~0)) (= .cse275 .cse276) (not (bvsge .cse277 (_ bv0 32))) (= .cse4 .cse276) (= c_~x1~0 (concat (concat .cse278 v_arrayElimCell_81) v_arrayElimCell_78))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse279 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse281 (bvmul (_ bv4 32) .cse279))) (or (not (bvslt .cse279 c_~size~0)) (not (bvsge .cse279 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse280 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse282 (bvmul .cse280 (_ bv4 32)))) (or (not (bvslt .cse280 c_~size~0)) (= .cse281 .cse282) (not (bvule (bvadd c_~f~0.offset .cse282) (bvadd c_~f~0.offset (_ bv4 32) .cse282))))))) (= .cse281 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse287 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse283 (concat (concat .cse287 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse286 (bvmul (_ bv4 32) .cse283))) (or (not (bvslt .cse283 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse284 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse285 (bvmul (_ bv4 32) .cse284))) (or (not (bvslt .cse284 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse285) (bvadd c_~f~0.offset (_ bv4 32) .cse285))) (not (bvsge .cse284 (_ bv0 32))) (= .cse4 .cse285) (= .cse286 .cse285) (= c_~x1~0 (concat (concat .cse287 v_arrayElimCell_81) v_arrayElimCell_78)))))) (not (bvsge .cse283 (_ bv0 32))) (= .cse286 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse288 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse291 (bvmul (_ bv4 32) .cse288))) (or (not (bvslt .cse288 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse290 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse289 (bvmul .cse290 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse289) (bvadd c_~f~0.offset (_ bv4 32) .cse289))) (not (bvslt .cse290 c_~size~0)) (= .cse291 .cse289) (not (bvsge .cse290 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse4 .cse289))))) (not (bvsge .cse288 (_ bv0 32))) (= .cse291 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse292 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse293 (bvmul (_ bv4 32) .cse292))) (or (not (bvslt .cse292 c_~size~0)) (not (bvsge .cse292 (_ bv0 32))) (= .cse293 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse295 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse294 (bvmul .cse295 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse294) (bvadd c_~f~0.offset (_ bv4 32) .cse294))) (not (bvslt .cse295 c_~size~0)) (= .cse293 .cse294) (not (bvsge .cse295 (_ bv0 32))) (= .cse4 .cse294))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse300 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse296 (concat (concat .cse300 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse297 (bvmul (_ bv4 32) .cse296))) (or (not (bvslt .cse296 c_~size~0)) (not (bvsge .cse296 (_ bv0 32))) (= .cse297 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse298 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse299 (bvmul (_ bv4 32) .cse298))) (or (not (bvslt .cse298 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse299) (bvadd c_~f~0.offset (_ bv4 32) .cse299))) (not (bvsge .cse298 (_ bv0 32))) (= .cse4 .cse299) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse300 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse297 .cse299)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse301 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse304 (bvmul (_ bv4 32) .cse301))) (or (not (bvslt .cse301 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse303 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse302 (bvmul (_ bv4 32) .cse303))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd c_~f~0.offset .cse302) (bvadd c_~f~0.offset (_ bv4 32) .cse302))) (not (bvslt .cse303 c_~size~0)) (= .cse304 .cse302) (= .cse302 .cse4))))) (not (bvsge .cse301 (_ bv0 32))) (= .cse304 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse305 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse306 (bvmul (_ bv4 32) .cse305))) (or (not (bvslt .cse305 c_~size~0)) (not (bvsge .cse305 (_ bv0 32))) (= .cse306 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse308 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse307 (bvmul (_ bv4 32) .cse308))) (or (not (bvule (bvadd c_~f~0.offset .cse307) (bvadd c_~f~0.offset (_ bv4 32) .cse307))) (not (bvslt .cse308 c_~size~0)) (= .cse306 .cse307) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse307 .cse4))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse309 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse312 (bvmul (_ bv4 32) .cse309))) (or (not (bvslt .cse309 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse311 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse310 (bvmul .cse311 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse310) (bvadd c_~f~0.offset (_ bv4 32) .cse310))) (not (bvslt .cse311 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse312 .cse310) (not (bvsge .cse311 (_ bv0 32))) (= .cse4 .cse310))))) (not (bvsge .cse309 (_ bv0 32))) (= .cse312 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse313 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse316 (bvmul (_ bv4 32) .cse313))) (or (not (bvslt .cse313 c_~size~0)) (not (bvsge .cse313 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse315 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse314 (bvmul (_ bv4 32) .cse315))) (or (not (bvule (bvadd c_~f~0.offset .cse314) (bvadd c_~f~0.offset (_ bv4 32) .cse314))) (not (bvslt .cse315 c_~size~0)) (= .cse316 .cse314) (not (bvsge .cse315 (_ bv0 32))))))) (= .cse316 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse317 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse320 (bvmul (_ bv4 32) .cse317))) (or (not (bvslt .cse317 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse319 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse318 (bvmul (_ bv4 32) .cse319))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse318) (bvadd c_~f~0.offset (_ bv4 32) .cse318))) (not (bvslt .cse319 c_~size~0)) (= .cse320 .cse318) (= .cse318 .cse4))))) (not (bvsge .cse317 (_ bv0 32))) (= .cse320 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse321 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse321 c_~size~0)) (not (bvsge .cse321 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse321) .cse4) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse324 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse322 (concat (concat .cse324 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse322 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse323 (concat (concat .cse324 v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse323) (= .cse4 (bvmul (_ bv4 32) .cse323))))) (not (bvsge .cse322 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse322) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse325 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse328 (bvmul (_ bv4 32) .cse325))) (or (not (bvslt .cse325 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse326 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse327 (bvmul (_ bv4 32) .cse326))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse326 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse327) (bvadd c_~f~0.offset (_ bv4 32) .cse327))) (not (bvsge .cse326 (_ bv0 32))) (= .cse4 .cse327) (= .cse328 .cse327))))) (not (bvsge .cse325 (_ bv0 32))) (= .cse328 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse329 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse329 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse330 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse330) (= (bvmul (_ bv4 32) .cse330) .cse4)))) (not (bvsge .cse329 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse329) .cse4)))))))) is different from true [2022-11-16 11:15:25,829 WARN L855 $PredicateComparison]: unable to prove that (or (not (bvsge c_~x2~0 (_ bv0 32))) (let ((.cse1 (bvmul c_~x2~0 (_ bv4 32)))) (let ((.cse142 (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse331 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse331 c_~size~0)) (not (bvsge .cse331 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse331) .cse1)))))) (and (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse0 c_~size~0)) (not (bvsge .cse0 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse0) .cse1) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse3 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse6 (concat (concat .cse3 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse4 (bvmul (_ bv4 32) .cse6))) (or (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse2 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse5 (bvmul (_ bv4 32) .cse2))) (or (not (bvslt .cse2 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse3 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse4 .cse5) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse5) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse5))) (= .cse5 .cse1))))) (not (bvslt .cse6 c_~size~0)) (not (bvsge .cse6 (_ bv0 32))) (= .cse4 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse7 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse10 (bvmul (_ bv4 32) .cse7))) (or (not (bvslt .cse7 c_~size~0)) (not (bvsge .cse7 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse8 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse9 (bvmul (_ bv4 32) .cse8))) (or (not (bvsge .cse8 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse9) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse9))) (not (bvslt .cse8 c_~size~0)) (= .cse10 .cse9) (= .cse1 .cse9))))) (= .cse10 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse11 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse14 (bvmul (_ bv4 32) .cse11))) (or (not (bvslt .cse11 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse12 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse13 (bvmul (_ bv4 32) .cse12))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse12 c_~size~0)) (not (bvsge .cse12 (_ bv0 32))) (= .cse1 .cse13) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse13) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse13))) (= .cse14 .cse13))))) (not (bvsge .cse11 (_ bv0 32))) (= .cse14 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse15 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse18 (bvmul (_ bv4 32) .cse15))) (or (not (bvslt .cse15 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse16 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse17 (bvmul .cse16 (_ bv4 32)))) (or (not (bvslt .cse16 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse17) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse17))) (= .cse18 .cse17) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvsge .cse16 (_ bv0 32))) (= .cse1 .cse17))))) (not (bvsge .cse15 (_ bv0 32))) (= .cse18 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse23 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse19 (concat (concat .cse23 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse21 (bvmul (_ bv4 32) .cse19))) (or (not (bvslt .cse19 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse20 (concat (concat .cse23 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse22 (bvmul (_ bv4 32) .cse20))) (or (not (bvslt .cse20 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse21 .cse22) (= .cse1 .cse22) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse22) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse22))))))) (not (bvsge .cse19 (_ bv0 32))) (= .cse21 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse26 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse24 (concat (concat .cse26 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse24 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse25 (concat (concat .cse26 v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse1 (bvmul (_ bv4 32) .cse25)) (= c_~x1~0 .cse25)))) (not (bvsge .cse24 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse24) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse27 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse27 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse27 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse27) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse29 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse28 (concat (concat .cse29 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse28 c_~size~0)) (not (bvsge .cse28 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse28) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse29 v_arrayElimCell_81) v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse31 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse30 (concat .cse31 v_arrayElimCell_78))) (or (not (bvslt .cse30 c_~size~0)) (not (bvsge .cse30 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse30) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (= c_~x1~0 (concat .cse31 v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse32 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse32 c_~size~0)) (not (bvsge .cse32 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse33 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse33 c_~x1~0) (= .cse1 (bvmul .cse33 (_ bv4 32)))))) (= (bvmul (_ bv4 32) .cse32) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse34 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse35 (bvmul (_ bv4 32) .cse34))) (or (not (bvslt .cse34 c_~size~0)) (not (bvsge .cse34 (_ bv0 32))) (= .cse35 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse37 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse36 (bvmul (_ bv4 32) .cse37))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse36) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse36))) (= .cse35 .cse36) (not (bvslt .cse37 c_~size~0)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse38 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse41 (bvmul (_ bv4 32) .cse38))) (or (not (bvslt .cse38 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse39 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse40 (bvmul (_ bv4 32) .cse39))) (or (not (bvslt .cse39 c_~size~0)) (not (bvsge .cse39 (_ bv0 32))) (= .cse1 .cse40) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse40) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse40))) (= .cse41 .cse40) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)))))) (not (bvsge .cse38 (_ bv0 32))) (= .cse41 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse42 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse45 (bvmul (_ bv4 32) .cse42))) (or (not (bvslt .cse42 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse43 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse44 (bvmul (_ bv4 32) .cse43))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse43 c_~size~0)) (not (bvsge .cse43 (_ bv0 32))) (= .cse1 .cse44) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse44) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse44))) (= .cse45 .cse44))))) (not (bvsge .cse42 (_ bv0 32))) (= .cse45 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse46 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse49 (bvmul (_ bv4 32) .cse46))) (or (not (bvslt .cse46 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse47 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse48 (bvmul .cse47 (_ bv4 32)))) (or (not (bvslt .cse47 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse48) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse48))) (= .cse49 .cse48) (= .cse1 .cse48))))) (not (bvsge .cse46 (_ bv0 32))) (= .cse49 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse50 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse52 (bvmul (_ bv4 32) .cse50))) (or (not (bvslt .cse50 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse51 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse53 (bvmul (_ bv4 32) .cse51))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse51 c_~size~0)) (= .cse52 .cse53) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse53) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse53))) (= .cse53 .cse1))))) (not (bvsge .cse50 (_ bv0 32))) (= .cse52 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse57 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse54 (concat (concat .cse57 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse58 (bvmul (_ bv4 32) .cse54))) (or (not (bvslt .cse54 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse55 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse56 (bvmul (_ bv4 32) .cse55))) (or (not (bvslt .cse55 c_~size~0)) (not (bvsge .cse55 (_ bv0 32))) (= .cse1 .cse56) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse56) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse56))) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse57 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse58 .cse56))))) (not (bvsge .cse54 (_ bv0 32))) (= .cse58 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse59 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse61 (bvmul (_ bv4 32) .cse59))) (or (not (bvslt .cse59 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse60 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse62 (bvmul (_ bv4 32) .cse60))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvslt .cse60 c_~size~0)) (= .cse61 .cse62) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse62) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse62))) (= .cse62 .cse1))))) (not (bvsge .cse59 (_ bv0 32))) (= .cse61 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse63 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse63 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse63 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse63) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse64 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse65 (bvmul (_ bv4 32) .cse64))) (or (not (bvslt .cse64 c_~size~0)) (not (bvsge .cse64 (_ bv0 32))) (= .cse65 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse66 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse67 (bvmul (_ bv4 32) .cse66))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse66 c_~size~0)) (= .cse65 .cse67) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse67) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse67))) (= .cse67 .cse1))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse68 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse71 (bvmul (_ bv4 32) .cse68))) (or (not (bvslt .cse68 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse69 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse70 (bvmul .cse69 (_ bv4 32)))) (or (not (bvslt .cse69 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse70) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse70))) (= .cse71 .cse70) (not (bvsge .cse69 (_ bv0 32))) (= .cse1 .cse70))))) (not (bvsge .cse68 (_ bv0 32))) (= .cse71 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse72 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse72 c_~size~0)) (not (bvsge .cse72 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse72) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse77 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse73 (concat (concat .cse77 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse76 (bvmul (_ bv4 32) .cse73))) (or (not (bvslt .cse73 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse74 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse75 (bvmul .cse74 (_ bv4 32)))) (or (not (bvslt .cse74 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse75) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse75))) (= .cse76 .cse75) (not (bvsge .cse74 (_ bv0 32))) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse77 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse1 .cse75))))) (not (bvsge .cse73 (_ bv0 32))) (= .cse76 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse78 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse81 (bvmul (_ bv4 32) .cse78))) (or (not (bvslt .cse78 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse79 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse80 (bvmul (_ bv4 32) .cse79))) (or (not (bvsge .cse79 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse80) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse80 (_ bv4 32)))) (not (bvslt .cse79 c_~size~0)) (= .cse81 .cse80))))) (not (bvsge .cse78 (_ bv0 32))) (= .cse81 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse82 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse82 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse83 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= (bvmul (_ bv4 32) .cse83) .cse1) (= c_~x1~0 .cse83)))) (not (bvsge .cse82 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse82) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse84 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse84 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse84 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse84) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse85 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse85 c_~size~0)) (not (bvsge .cse85 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse85) .cse1) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse86 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse86 c_~x1~0) (= .cse1 (bvmul .cse86 (_ bv4 32))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse87 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse88 (bvmul (_ bv4 32) .cse87))) (or (not (bvslt .cse87 c_~size~0)) (not (bvsge .cse87 (_ bv0 32))) (= .cse88 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse89 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse90 (bvmul (_ bv4 32) .cse89))) (or (not (bvslt .cse89 c_~size~0)) (= .cse88 .cse90) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse90) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse90))) (= .cse90 .cse1))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse91 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse93 (bvmul (_ bv4 32) .cse91))) (or (not (bvslt .cse91 c_~size~0)) (not (bvsge .cse91 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse92 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse94 (bvmul (_ bv4 32) .cse92))) (or (not (bvslt .cse92 c_~size~0)) (= .cse93 .cse94) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse94) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse94))))))) (= .cse93 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse95 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse98 (bvmul (_ bv4 32) .cse95))) (or (not (bvslt .cse95 c_~size~0)) (not (bvsge .cse95 (_ bv0 32))) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse96 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse97 (bvmul (_ bv4 32) .cse96))) (or (not (bvslt .cse96 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse97) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse97))) (not (bvsge .cse96 (_ bv0 32))) (= .cse98 .cse97))))) (= .cse98 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse103 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse99 (concat (concat .cse103 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse102 (bvmul (_ bv4 32) .cse99))) (or (not (bvslt .cse99 c_~size~0)) (not (bvsge .cse99 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse101 (concat (concat .cse103 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse100 (bvmul (_ bv4 32) .cse101))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse100) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse100))) (not (bvslt .cse101 c_~size~0)) (= .cse102 .cse100))))) (= .cse102 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse104 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse104 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse105 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= c_~x1~0 .cse105) (= .cse1 (bvmul (_ bv4 32) .cse105))))) (not (bvsge .cse104 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse104) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse106 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse107 (bvmul (_ bv4 32) .cse106))) (or (not (bvslt .cse106 c_~size~0)) (not (bvsge .cse106 (_ bv0 32))) (= .cse107 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse108 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse109 (bvmul .cse108 (_ bv4 32)))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse108 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse109) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse109))) (= .cse107 .cse109) (not (bvsge .cse108 (_ bv0 32))) (= .cse1 .cse109))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse110 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse113 (bvmul (_ bv4 32) .cse110))) (or (not (bvslt .cse110 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse111 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse112 (bvmul (_ bv4 32) .cse111))) (or (not (bvsge .cse111 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse112) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse112))) (not (bvslt .cse111 c_~size~0)) (= .cse113 .cse112))))) (not (bvsge .cse110 (_ bv0 32))) (= .cse113 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse114 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse117 (bvmul (_ bv4 32) .cse114))) (or (not (bvslt .cse114 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse115 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse116 (bvmul .cse115 (_ bv4 32)))) (or (not (bvslt .cse115 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse116) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse116))) (= .cse117 .cse116) (not (bvsge .cse115 (_ bv0 32))) (= .cse1 .cse116))))) (not (bvsge .cse114 (_ bv0 32))) (= .cse117 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse118 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse118 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse118 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse118) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse119 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse122 (bvmul (_ bv4 32) .cse119))) (or (not (bvslt .cse119 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse121 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse120 (bvmul (_ bv4 32) .cse121))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse120) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse120))) (not (bvslt .cse121 c_~size~0)) (= .cse122 .cse120) (not (bvsge .cse121 (_ bv0 32))))))) (not (bvsge .cse119 (_ bv0 32))) (= .cse122 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse124 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse123 (concat (concat .cse124 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse123 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse124 v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse123 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse123) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse125 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse127 (bvmul (_ bv4 32) .cse125))) (or (not (bvslt .cse125 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse128 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse126 (bvmul (_ bv4 32) .cse128))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse126) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse126))) (= .cse127 .cse126) (not (bvslt .cse128 c_~size~0)))))) (not (bvsge .cse125 (_ bv0 32))) (= .cse127 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse129 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse129 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse129 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse129) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse130 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse133 (bvmul (_ bv4 32) .cse130))) (or (not (bvslt .cse130 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse131 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse132 (bvmul .cse131 (_ bv4 32)))) (or (not (bvslt .cse131 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse132) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse132))) (= .cse133 .cse132) (not (bvsge .cse131 (_ bv0 32))) (= .cse1 .cse132))))) (not (bvsge .cse130 (_ bv0 32))) (= .cse133 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse134 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse137 (bvmul (_ bv4 32) .cse134))) (or (not (bvslt .cse134 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse135 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse136 (bvmul (_ bv4 32) .cse135))) (or (not (bvslt .cse135 c_~size~0)) (not (bvsge .cse135 (_ bv0 32))) (= .cse1 .cse136) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse136) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse136))) (= .cse137 .cse136))))) (not (bvsge .cse134 (_ bv0 32))) (= .cse137 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse138 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse140 (bvmul (_ bv4 32) .cse138))) (or (not (bvslt .cse138 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse139 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse141 (bvmul (_ bv4 32) .cse139))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse139 c_~size~0)) (= .cse140 .cse141) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse141) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse141))) (= .cse141 .cse1))))) (not (bvsge .cse138 (_ bv0 32))) (= .cse140 .cse1))))) (or .cse142 (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse143 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse1 (bvmul (_ bv4 32) .cse143)) (= c_~x1~0 .cse143))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse148 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse144 (concat (concat .cse148 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse146 (bvmul (_ bv4 32) .cse144))) (or (not (bvslt .cse144 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse145 (concat (concat .cse148 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse147 (bvmul (_ bv4 32) .cse145))) (or (not (bvslt .cse145 c_~size~0)) (= .cse146 .cse147) (= .cse1 .cse147) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse147) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse147))))))) (not (bvsge .cse144 (_ bv0 32))) (= .cse146 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse152 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse150 (bvmul (_ bv4 32) .cse152))) (or (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse149 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse151 (bvmul (_ bv4 32) .cse149))) (or (not (bvslt .cse149 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (= .cse150 .cse151) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse151) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse151))) (= .cse151 .cse1))))) (not (bvslt .cse152 c_~size~0)) (not (bvsge .cse152 (_ bv0 32))) (= .cse150 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse153 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse156 (bvmul (_ bv4 32) .cse153))) (or (not (bvslt .cse153 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse154 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse155 (bvmul (_ bv4 32) .cse154))) (or (not (bvslt .cse154 c_~size~0)) (not (bvsge .cse154 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse155) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse155))) (= .cse156 .cse155))))) (not (bvsge .cse153 (_ bv0 32))) (= .cse156 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse161 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse157 (concat (concat .cse161 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse160 (bvmul (_ bv4 32) .cse157))) (or (not (bvslt .cse157 c_~size~0)) (not (bvsge .cse157 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse158 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse159 (bvmul (_ bv4 32) .cse158))) (or (not (bvslt .cse158 c_~size~0)) (not (bvsge .cse158 (_ bv0 32))) (= .cse1 .cse159) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse159) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse159))) (= .cse160 .cse159) (= c_~x1~0 (concat (concat .cse161 v_arrayElimCell_81) v_arrayElimCell_78)))))) (= .cse160 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse162 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse162 c_~size~0)) (= .cse162 c_~x1~0) (not (bvsge .cse162 (_ bv0 32)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse163 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse164 (bvmul (_ bv4 32) .cse163))) (or (not (bvslt .cse163 c_~size~0)) (not (bvsge .cse163 (_ bv0 32))) (= .cse164 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse165 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse166 (bvmul (_ bv4 32) .cse165))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse165 c_~size~0)) (= .cse164 .cse166) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse166) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse166))) (= .cse166 .cse1))))))))) (or (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) .cse142) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse167 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse168 (bvmul (_ bv4 32) .cse167))) (or (not (bvslt .cse167 c_~size~0)) (not (bvsge .cse167 (_ bv0 32))) (= .cse168 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse170 (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse169 (concat .cse170 v_arrayElimCell_70))) (let ((.cse171 (bvmul (_ bv4 32) .cse169))) (or (not (bvslt .cse169 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse170 v_arrayElimCell_77))) (not (bvsge .cse169 (_ bv0 32))) (= .cse1 .cse171) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse171) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse171))) (= .cse168 .cse171)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse176 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse172 (concat (concat .cse176 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse173 (bvmul (_ bv4 32) .cse172))) (or (not (bvslt .cse172 c_~size~0)) (not (bvsge .cse172 (_ bv0 32))) (= .cse173 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse174 (concat (concat .cse176 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse175 (bvmul (_ bv4 32) .cse174))) (or (not (bvslt .cse174 c_~size~0)) (= .cse173 .cse175) (= .cse1 .cse175) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse175) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse175)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse181 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse177 (concat (concat .cse181 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse179 (bvmul (_ bv4 32) .cse177))) (or (not (bvslt .cse177 c_~size~0)) (not (bvsge .cse177 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse178 (concat (concat .cse181 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse180 (bvmul (_ bv4 32) .cse178))) (or (not (bvslt .cse178 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse179 .cse180) (= .cse1 .cse180) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse180) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse180))))))) (= .cse179 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse182 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse184 (bvmul (_ bv4 32) .cse182))) (or (not (bvslt .cse182 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse185 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse183 (bvmul (_ bv4 32) .cse185))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse183) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse183))) (= .cse184 .cse183) (not (bvslt .cse185 c_~size~0)) (not (bvsge .cse185 (_ bv0 32))))))) (not (bvsge .cse182 (_ bv0 32))) (= .cse184 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse186 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse189 (bvmul (_ bv4 32) .cse186))) (or (not (bvslt .cse186 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse187 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse188 (bvmul (_ bv4 32) .cse187))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse187 c_~size~0)) (not (bvsge .cse187 (_ bv0 32))) (= .cse1 .cse188) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse188) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse188))) (= .cse189 .cse188))))) (not (bvsge .cse186 (_ bv0 32))) (= .cse189 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse190 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse190 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse190 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse190) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse191 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse192 (bvmul (_ bv4 32) .cse191))) (or (not (bvslt .cse191 c_~size~0)) (not (bvsge .cse191 (_ bv0 32))) (= .cse192 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse193 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse194 (bvmul .cse193 (_ bv4 32)))) (or (not (bvslt .cse193 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse194) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse194))) (= .cse192 .cse194) (not (bvsge .cse193 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse1 .cse194))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse199 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse195 (concat (concat .cse199 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse195 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse198 (concat .cse199 v_arrayElimCell_81))) (let ((.cse196 (concat .cse198 v_arrayElimCell_70))) (let ((.cse197 (bvmul (_ bv4 32) .cse196))) (or (not (bvslt .cse196 c_~size~0)) (= .cse1 .cse197) (= c_~x1~0 (concat .cse198 v_arrayElimCell_78)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse197) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse197)))))))) (not (bvsge .cse195 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse195) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse200 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse204 (bvmul (_ bv4 32) .cse200))) (or (not (bvslt .cse200 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse202 (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81))) (let ((.cse201 (concat .cse202 v_arrayElimCell_70))) (let ((.cse203 (bvmul .cse201 (_ bv4 32)))) (or (not (bvslt .cse201 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse202 v_arrayElimCell_77))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse203) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse203))) (= .cse204 .cse203) (not (bvsge .cse201 (_ bv0 32))) (= .cse1 .cse203)))))) (not (bvsge .cse200 (_ bv0 32))) (= .cse204 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse209 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse205 (concat (concat .cse209 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse207 (bvmul (_ bv4 32) .cse205))) (or (not (bvslt .cse205 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse206 (concat (concat .cse209 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse208 (bvmul (_ bv4 32) .cse206))) (or (not (bvslt .cse206 c_~size~0)) (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse207 .cse208) (= .cse1 .cse208) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse208) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse208))))))) (not (bvsge .cse205 (_ bv0 32))) (= .cse207 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse210 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse213 (bvmul (_ bv4 32) .cse210))) (or (not (bvslt .cse210 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse211 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse212 (bvmul .cse211 (_ bv4 32)))) (or (not (bvslt .cse211 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse212) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse212))) (= .cse213 .cse212) (not (bvsge .cse211 (_ bv0 32))))))) (not (bvsge .cse210 (_ bv0 32))) (= .cse213 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse214 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse216 (bvmul (_ bv4 32) .cse214))) (or (not (bvslt .cse214 c_~size~0)) (not (bvsge .cse214 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse215 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse217 (bvmul (_ bv4 32) .cse215))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse215 c_~size~0)) (= .cse216 .cse217) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse217) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse217))) (= .cse217 .cse1))))) (= .cse216 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse221 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse218 (concat (concat .cse221 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse218 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse219 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse220 (bvmul (_ bv4 32) .cse219))) (or (not (bvslt .cse219 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse220) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse220))) (= c_~x1~0 (concat (concat .cse221 v_arrayElimCell_81) v_arrayElimCell_78)) (= .cse220 .cse1))))) (not (bvsge .cse218 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse218) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse222 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse225 (bvmul (_ bv4 32) .cse222))) (or (not (bvslt .cse222 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse223 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse224 (bvmul (_ bv4 32) .cse223))) (or (not (bvslt .cse223 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvsge .cse223 (_ bv0 32))) (= .cse1 .cse224) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse224) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse224))) (= .cse225 .cse224))))) (not (bvsge .cse222 (_ bv0 32))) (= .cse225 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse226 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse229 (bvmul (_ bv4 32) .cse226))) (or (not (bvslt .cse226 c_~size~0)) (not (bvsge .cse226 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse227 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse228 (bvmul (_ bv4 32) .cse227))) (or (not (bvslt .cse227 c_~size~0)) (not (bvsge .cse227 (_ bv0 32))) (= .cse1 .cse228) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse228) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse228))) (= .cse229 .cse228) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))))))) (= .cse229 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse230 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse232 (bvmul (_ bv4 32) .cse230))) (or (not (bvslt .cse230 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse231 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse233 (bvmul (_ bv4 32) .cse231))) (or (not (bvslt .cse231 c_~size~0)) (= .cse232 .cse233) (not (bvsge .cse231 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse233) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse233))))))) (not (bvsge .cse230 (_ bv0 32))) (= .cse232 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse234 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse235 (bvmul (_ bv4 32) .cse234))) (or (not (bvslt .cse234 c_~size~0)) (not (bvsge .cse234 (_ bv0 32))) (= .cse235 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse236 (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse237 (concat .cse236 v_arrayElimCell_70))) (let ((.cse238 (bvmul (_ bv4 32) .cse237))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse236 v_arrayElimCell_77))) (not (bvslt .cse237 c_~size~0)) (= .cse235 .cse238) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse238) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse238))) (= .cse238 .cse1)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse239 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse242 (bvmul (_ bv4 32) .cse239))) (or (not (bvslt .cse239 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse240 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse241 (bvmul (_ bv4 32) .cse240))) (or (not (bvslt .cse240 c_~size~0)) (not (bvsge .cse240 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse1 .cse241) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse241) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse241))) (= .cse242 .cse241))))) (not (bvsge .cse239 (_ bv0 32))) (= .cse242 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse243 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse243 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse243 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse243) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse244 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse247 (bvmul (_ bv4 32) .cse244))) (or (not (bvslt .cse244 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse245 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse246 (bvmul (_ bv4 32) .cse245))) (or (not (bvslt .cse245 c_~size~0)) (not (bvsge .cse245 (_ bv0 32))) (= .cse1 .cse246) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse246) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse246))) (= .cse247 .cse246))))) (not (bvsge .cse244 (_ bv0 32))) (= .cse247 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse253 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse248 (concat (concat .cse253 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse250 (bvmul (_ bv4 32) .cse248))) (or (not (bvslt .cse248 c_~size~0)) (not (bvsge .cse248 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse252 (concat .cse253 v_arrayElimCell_81))) (let ((.cse249 (concat .cse252 v_arrayElimCell_70))) (let ((.cse251 (bvmul (_ bv4 32) .cse249))) (or (not (bvslt .cse249 c_~size~0)) (= .cse250 .cse251) (= .cse1 .cse251) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat .cse252 v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse251) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse251)))))))) (= .cse250 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse254 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse257 (bvmul (_ bv4 32) .cse254))) (or (not (bvslt .cse254 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse255 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse256 (bvmul .cse255 (_ bv4 32)))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse255 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse256) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse256))) (= .cse257 .cse256) (not (bvsge .cse255 (_ bv0 32))) (= .cse1 .cse256))))) (not (bvsge .cse254 (_ bv0 32))) (= .cse257 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse262 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse258 (concat (concat .cse262 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse260 (bvmul (_ bv4 32) .cse258))) (or (not (bvslt .cse258 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse259 (concat (concat .cse262 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse261 (bvmul (_ bv4 32) .cse259))) (or (not (bvslt .cse259 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse260 .cse261) (= .cse1 .cse261) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse261) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse261))))))) (not (bvsge .cse258 (_ bv0 32))) (= .cse260 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse263 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse266 (bvmul (_ bv4 32) .cse263))) (or (not (bvslt .cse263 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse264 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse265 (bvmul .cse264 (_ bv4 32)))) (or (not (bvslt .cse264 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse265) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse265))) (= .cse266 .cse265))))) (not (bvsge .cse263 (_ bv0 32))) (= .cse266 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse271 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse267 (concat .cse271 v_arrayElimCell_78))) (let ((.cse268 (bvmul (_ bv4 32) .cse267))) (or (not (bvslt .cse267 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (let ((.cse270 (concat .cse271 v_arrayElimCell_70))) (let ((.cse269 (bvmul (_ bv4 32) .cse270))) (or (= .cse268 .cse269) (not (bvslt .cse270 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse269) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse269))))))) (not (bvsge .cse267 (_ bv0 32))) (= .cse268 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse272 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse273 (bvmul (_ bv4 32) .cse272))) (or (not (bvslt .cse272 c_~size~0)) (not (bvsge .cse272 (_ bv0 32))) (= .cse273 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse274 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse275 (bvmul .cse274 (_ bv4 32)))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse274 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse275) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse275))) (= .cse273 .cse275) (not (bvsge .cse274 (_ bv0 32))) (= .cse1 .cse275))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse280 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse276 (concat (concat .cse280 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse277 (bvmul (_ bv4 32) .cse276))) (or (not (bvslt .cse276 c_~size~0)) (not (bvsge .cse276 (_ bv0 32))) (= .cse277 .cse1) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse279 (concat (concat .cse280 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse278 (bvmul (_ bv4 32) .cse279))) (or (= .cse1 .cse278) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse278) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse278))) (not (bvslt .cse279 c_~size~0)) (= .cse277 .cse278)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse281 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse281 c_~size~0)) (not (bvsge .cse281 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse281) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse282 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse285 (bvmul (_ bv4 32) .cse282))) (or (not (bvslt .cse282 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse283 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse284 (bvmul (_ bv4 32) .cse283))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvslt .cse283 c_~size~0)) (not (bvsge .cse283 (_ bv0 32))) (= .cse1 .cse284) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse284) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse284))) (= .cse285 .cse284))))) (not (bvsge .cse282 (_ bv0 32))) (= .cse285 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse286 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse289 (bvmul (_ bv4 32) .cse286))) (or (not (bvslt .cse286 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse287 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse288 (bvmul (_ bv4 32) .cse287))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse287 c_~size~0)) (not (bvsge .cse287 (_ bv0 32))) (= .cse1 .cse288) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse288) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse288))) (= .cse289 .cse288))))) (not (bvsge .cse286 (_ bv0 32))) (= .cse289 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse294 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse290 (concat (concat .cse294 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse292 (bvmul (_ bv4 32) .cse290))) (or (not (bvslt .cse290 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse291 (concat (concat .cse294 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse293 (bvmul (_ bv4 32) .cse291))) (or (not (bvslt .cse291 c_~size~0)) (= .cse292 .cse293) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse293) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse293))))))) (not (bvsge .cse290 (_ bv0 32))) (= .cse292 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse295 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse297 (bvmul (_ bv4 32) .cse295))) (or (not (bvslt .cse295 c_~size~0)) (not (bvsge .cse295 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse296 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse298 (bvmul (_ bv4 32) .cse296))) (or (not (bvslt .cse296 c_~size~0)) (= .cse297 .cse298) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse298) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse298))) (= .cse298 .cse1))))) (= .cse297 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse303 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse299 (concat (concat .cse303 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse301 (bvmul (_ bv4 32) .cse299))) (or (not (bvslt .cse299 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse300 (concat (concat .cse303 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse302 (bvmul (_ bv4 32) .cse300))) (or (not (bvslt .cse300 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse301 .cse302) (= .cse1 .cse302) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse302) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse302))))))) (not (bvsge .cse299 (_ bv0 32))) (= .cse301 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse308 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse304 (concat (concat .cse308 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse307 (bvmul (_ bv4 32) .cse304))) (or (not (bvslt .cse304 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse305 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse306 (bvmul .cse305 (_ bv4 32)))) (or (not (bvslt .cse305 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse306) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse306))) (= .cse307 .cse306) (not (bvsge .cse305 (_ bv0 32))) (= .cse1 .cse306) (= c_~x1~0 (concat (concat .cse308 v_arrayElimCell_81) v_arrayElimCell_78)))))) (not (bvsge .cse304 (_ bv0 32))) (= .cse307 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse309 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse309 c_~size~0)) (not (bvsge .cse309 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse309) .cse1) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse310 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse313 (bvmul (_ bv4 32) .cse310))) (or (not (bvslt .cse310 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse311 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse312 (bvmul (_ bv4 32) .cse311))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse311 c_~size~0)) (not (bvsge .cse311 (_ bv0 32))) (= .cse1 .cse312) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse312) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse312))) (= .cse313 .cse312))))) (not (bvsge .cse310 (_ bv0 32))) (= .cse313 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse316 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse314 (concat (concat .cse316 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse314 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse315 (concat (concat .cse316 v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse315) (= .cse1 (bvmul (_ bv4 32) .cse315))))) (not (bvsge .cse314 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse314) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse317 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse317 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse318 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse318) (= (bvmul (_ bv4 32) .cse318) .cse1)))) (not (bvsge .cse317 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse317) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse319 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse322 (bvmul (_ bv4 32) .cse319))) (or (not (bvslt .cse319 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse320 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse321 (bvmul (_ bv4 32) .cse320))) (or (not (bvsge .cse320 (_ bv0 32))) (= .cse321 .cse1) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse321) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse321 (_ bv4 32)))) (not (bvslt .cse320 c_~size~0)) (= .cse322 .cse321))))) (not (bvsge .cse319 (_ bv0 32))) (= .cse322 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse323 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse326 (bvmul (_ bv4 32) .cse323))) (or (not (bvslt .cse323 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse324 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse325 (bvmul (_ bv4 32) .cse324))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse324 c_~size~0)) (not (bvsge .cse324 (_ bv0 32))) (= .cse1 .cse325) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse325) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse325))) (= .cse326 .cse325))))) (not (bvsge .cse323 (_ bv0 32))) (= .cse326 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse327 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse329 (bvmul (_ bv4 32) .cse327))) (or (not (bvslt .cse327 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse328 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse330 (bvmul (_ bv4 32) .cse328))) (or (not (bvslt .cse328 c_~size~0)) (= .cse329 .cse330) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse330) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse330))) (= .cse330 .cse1))))) (not (bvsge .cse327 (_ bv0 32))) (= .cse329 .cse1)))))))) (bvslt |c_ULTIMATE.start_create_fresh_int_array_~i~2#1| |c_ULTIMATE.start_create_fresh_int_array_~size#1|) (not (bvslt c_~x2~0 c_~size~0))) is different from true [2022-11-16 11:15:58,218 WARN L233 SmtUtils]: Spent 13.51s on a formula simplification. DAG size of input: 626 DAG size of output: 28 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 11:15:58,228 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-16 11:15:58,229 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:15:58,229 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1832324799] [2022-11-16 11:15:58,229 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1832324799] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:15:58,229 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:15:58,229 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 10 [2022-11-16 11:15:58,230 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2143035962] [2022-11-16 11:15:58,230 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:15:58,230 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-16 11:15:58,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:15:58,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-16 11:15:58,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=59, Unknown=5, NotChecked=34, Total=132 [2022-11-16 11:15:58,231 INFO L87 Difference]: Start difference. First operand 110 states and 256 transitions. Second operand has 12 states, 11 states have (on average 2.909090909090909) internal successors, (32), 11 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:00,427 WARN L855 $PredicateComparison]: unable to prove that (and (= |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv0 32)) (or (not (bvsge c_~x2~0 (_ bv0 32))) (let ((.cse1 (bvmul c_~x2~0 (_ bv4 32)))) (let ((.cse142 (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse331 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse331 c_~size~0)) (not (bvsge .cse331 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse331) .cse1)))))) (and (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse0 c_~size~0)) (not (bvsge .cse0 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse0) .cse1) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse3 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse6 (concat (concat .cse3 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse4 (bvmul (_ bv4 32) .cse6))) (or (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse2 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse5 (bvmul (_ bv4 32) .cse2))) (or (not (bvslt .cse2 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse3 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse4 .cse5) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse5) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse5))) (= .cse5 .cse1))))) (not (bvslt .cse6 c_~size~0)) (not (bvsge .cse6 (_ bv0 32))) (= .cse4 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse7 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse10 (bvmul (_ bv4 32) .cse7))) (or (not (bvslt .cse7 c_~size~0)) (not (bvsge .cse7 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse8 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse9 (bvmul (_ bv4 32) .cse8))) (or (not (bvsge .cse8 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse9) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse9))) (not (bvslt .cse8 c_~size~0)) (= .cse10 .cse9) (= .cse1 .cse9))))) (= .cse10 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse11 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse14 (bvmul (_ bv4 32) .cse11))) (or (not (bvslt .cse11 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse12 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse13 (bvmul (_ bv4 32) .cse12))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse12 c_~size~0)) (not (bvsge .cse12 (_ bv0 32))) (= .cse1 .cse13) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse13) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse13))) (= .cse14 .cse13))))) (not (bvsge .cse11 (_ bv0 32))) (= .cse14 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse15 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse18 (bvmul (_ bv4 32) .cse15))) (or (not (bvslt .cse15 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse16 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse17 (bvmul .cse16 (_ bv4 32)))) (or (not (bvslt .cse16 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse17) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse17))) (= .cse18 .cse17) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvsge .cse16 (_ bv0 32))) (= .cse1 .cse17))))) (not (bvsge .cse15 (_ bv0 32))) (= .cse18 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse23 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse19 (concat (concat .cse23 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse21 (bvmul (_ bv4 32) .cse19))) (or (not (bvslt .cse19 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse20 (concat (concat .cse23 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse22 (bvmul (_ bv4 32) .cse20))) (or (not (bvslt .cse20 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse21 .cse22) (= .cse1 .cse22) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse22) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse22))))))) (not (bvsge .cse19 (_ bv0 32))) (= .cse21 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse26 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse24 (concat (concat .cse26 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse24 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse25 (concat (concat .cse26 v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse1 (bvmul (_ bv4 32) .cse25)) (= c_~x1~0 .cse25)))) (not (bvsge .cse24 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse24) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse27 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse27 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse27 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse27) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse29 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse28 (concat (concat .cse29 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse28 c_~size~0)) (not (bvsge .cse28 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse28) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse29 v_arrayElimCell_81) v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse31 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse30 (concat .cse31 v_arrayElimCell_78))) (or (not (bvslt .cse30 c_~size~0)) (not (bvsge .cse30 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse30) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (= c_~x1~0 (concat .cse31 v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse32 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse32 c_~size~0)) (not (bvsge .cse32 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse33 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse33 c_~x1~0) (= .cse1 (bvmul .cse33 (_ bv4 32)))))) (= (bvmul (_ bv4 32) .cse32) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse34 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse35 (bvmul (_ bv4 32) .cse34))) (or (not (bvslt .cse34 c_~size~0)) (not (bvsge .cse34 (_ bv0 32))) (= .cse35 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse37 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse36 (bvmul (_ bv4 32) .cse37))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse36) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse36))) (= .cse35 .cse36) (not (bvslt .cse37 c_~size~0)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse38 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse41 (bvmul (_ bv4 32) .cse38))) (or (not (bvslt .cse38 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse39 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse40 (bvmul (_ bv4 32) .cse39))) (or (not (bvslt .cse39 c_~size~0)) (not (bvsge .cse39 (_ bv0 32))) (= .cse1 .cse40) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse40) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse40))) (= .cse41 .cse40) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)))))) (not (bvsge .cse38 (_ bv0 32))) (= .cse41 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse42 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse45 (bvmul (_ bv4 32) .cse42))) (or (not (bvslt .cse42 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse43 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse44 (bvmul (_ bv4 32) .cse43))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse43 c_~size~0)) (not (bvsge .cse43 (_ bv0 32))) (= .cse1 .cse44) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse44) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse44))) (= .cse45 .cse44))))) (not (bvsge .cse42 (_ bv0 32))) (= .cse45 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse46 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse49 (bvmul (_ bv4 32) .cse46))) (or (not (bvslt .cse46 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse47 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse48 (bvmul .cse47 (_ bv4 32)))) (or (not (bvslt .cse47 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse48) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse48))) (= .cse49 .cse48) (= .cse1 .cse48))))) (not (bvsge .cse46 (_ bv0 32))) (= .cse49 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse50 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse52 (bvmul (_ bv4 32) .cse50))) (or (not (bvslt .cse50 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse51 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse53 (bvmul (_ bv4 32) .cse51))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse51 c_~size~0)) (= .cse52 .cse53) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse53) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse53))) (= .cse53 .cse1))))) (not (bvsge .cse50 (_ bv0 32))) (= .cse52 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse57 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse54 (concat (concat .cse57 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse58 (bvmul (_ bv4 32) .cse54))) (or (not (bvslt .cse54 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse55 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse56 (bvmul (_ bv4 32) .cse55))) (or (not (bvslt .cse55 c_~size~0)) (not (bvsge .cse55 (_ bv0 32))) (= .cse1 .cse56) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse56) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse56))) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse57 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse58 .cse56))))) (not (bvsge .cse54 (_ bv0 32))) (= .cse58 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse59 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse61 (bvmul (_ bv4 32) .cse59))) (or (not (bvslt .cse59 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse60 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse62 (bvmul (_ bv4 32) .cse60))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvslt .cse60 c_~size~0)) (= .cse61 .cse62) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse62) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse62))) (= .cse62 .cse1))))) (not (bvsge .cse59 (_ bv0 32))) (= .cse61 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse63 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse63 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse63 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse63) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse64 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse65 (bvmul (_ bv4 32) .cse64))) (or (not (bvslt .cse64 c_~size~0)) (not (bvsge .cse64 (_ bv0 32))) (= .cse65 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse66 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse67 (bvmul (_ bv4 32) .cse66))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse66 c_~size~0)) (= .cse65 .cse67) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse67) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse67))) (= .cse67 .cse1))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse68 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse71 (bvmul (_ bv4 32) .cse68))) (or (not (bvslt .cse68 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse69 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse70 (bvmul .cse69 (_ bv4 32)))) (or (not (bvslt .cse69 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse70) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse70))) (= .cse71 .cse70) (not (bvsge .cse69 (_ bv0 32))) (= .cse1 .cse70))))) (not (bvsge .cse68 (_ bv0 32))) (= .cse71 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse72 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse72 c_~size~0)) (not (bvsge .cse72 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse72) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse77 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse73 (concat (concat .cse77 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse76 (bvmul (_ bv4 32) .cse73))) (or (not (bvslt .cse73 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse74 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse75 (bvmul .cse74 (_ bv4 32)))) (or (not (bvslt .cse74 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse75) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse75))) (= .cse76 .cse75) (not (bvsge .cse74 (_ bv0 32))) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse77 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse1 .cse75))))) (not (bvsge .cse73 (_ bv0 32))) (= .cse76 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse78 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse81 (bvmul (_ bv4 32) .cse78))) (or (not (bvslt .cse78 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse79 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse80 (bvmul (_ bv4 32) .cse79))) (or (not (bvsge .cse79 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse80) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse80 (_ bv4 32)))) (not (bvslt .cse79 c_~size~0)) (= .cse81 .cse80))))) (not (bvsge .cse78 (_ bv0 32))) (= .cse81 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse82 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse82 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse83 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= (bvmul (_ bv4 32) .cse83) .cse1) (= c_~x1~0 .cse83)))) (not (bvsge .cse82 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse82) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse84 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse84 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse84 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse84) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse85 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse85 c_~size~0)) (not (bvsge .cse85 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse85) .cse1) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse86 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse86 c_~x1~0) (= .cse1 (bvmul .cse86 (_ bv4 32))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse87 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse88 (bvmul (_ bv4 32) .cse87))) (or (not (bvslt .cse87 c_~size~0)) (not (bvsge .cse87 (_ bv0 32))) (= .cse88 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse89 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse90 (bvmul (_ bv4 32) .cse89))) (or (not (bvslt .cse89 c_~size~0)) (= .cse88 .cse90) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse90) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse90))) (= .cse90 .cse1))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse91 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse93 (bvmul (_ bv4 32) .cse91))) (or (not (bvslt .cse91 c_~size~0)) (not (bvsge .cse91 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse92 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse94 (bvmul (_ bv4 32) .cse92))) (or (not (bvslt .cse92 c_~size~0)) (= .cse93 .cse94) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse94) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse94))))))) (= .cse93 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse95 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse98 (bvmul (_ bv4 32) .cse95))) (or (not (bvslt .cse95 c_~size~0)) (not (bvsge .cse95 (_ bv0 32))) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse96 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse97 (bvmul (_ bv4 32) .cse96))) (or (not (bvslt .cse96 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse97) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse97))) (not (bvsge .cse96 (_ bv0 32))) (= .cse98 .cse97))))) (= .cse98 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse103 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse99 (concat (concat .cse103 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse102 (bvmul (_ bv4 32) .cse99))) (or (not (bvslt .cse99 c_~size~0)) (not (bvsge .cse99 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse101 (concat (concat .cse103 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse100 (bvmul (_ bv4 32) .cse101))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse100) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse100))) (not (bvslt .cse101 c_~size~0)) (= .cse102 .cse100))))) (= .cse102 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse104 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse104 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse105 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= c_~x1~0 .cse105) (= .cse1 (bvmul (_ bv4 32) .cse105))))) (not (bvsge .cse104 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse104) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse106 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse107 (bvmul (_ bv4 32) .cse106))) (or (not (bvslt .cse106 c_~size~0)) (not (bvsge .cse106 (_ bv0 32))) (= .cse107 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse108 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse109 (bvmul .cse108 (_ bv4 32)))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse108 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse109) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse109))) (= .cse107 .cse109) (not (bvsge .cse108 (_ bv0 32))) (= .cse1 .cse109))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse110 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse113 (bvmul (_ bv4 32) .cse110))) (or (not (bvslt .cse110 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse111 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse112 (bvmul (_ bv4 32) .cse111))) (or (not (bvsge .cse111 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse112) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse112))) (not (bvslt .cse111 c_~size~0)) (= .cse113 .cse112))))) (not (bvsge .cse110 (_ bv0 32))) (= .cse113 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse114 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse117 (bvmul (_ bv4 32) .cse114))) (or (not (bvslt .cse114 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse115 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse116 (bvmul .cse115 (_ bv4 32)))) (or (not (bvslt .cse115 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse116) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse116))) (= .cse117 .cse116) (not (bvsge .cse115 (_ bv0 32))) (= .cse1 .cse116))))) (not (bvsge .cse114 (_ bv0 32))) (= .cse117 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse118 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse118 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse118 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse118) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse119 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse122 (bvmul (_ bv4 32) .cse119))) (or (not (bvslt .cse119 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse121 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse120 (bvmul (_ bv4 32) .cse121))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse120) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse120))) (not (bvslt .cse121 c_~size~0)) (= .cse122 .cse120) (not (bvsge .cse121 (_ bv0 32))))))) (not (bvsge .cse119 (_ bv0 32))) (= .cse122 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse124 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse123 (concat (concat .cse124 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse123 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse124 v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse123 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse123) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse125 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse127 (bvmul (_ bv4 32) .cse125))) (or (not (bvslt .cse125 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse128 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse126 (bvmul (_ bv4 32) .cse128))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse126) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse126))) (= .cse127 .cse126) (not (bvslt .cse128 c_~size~0)))))) (not (bvsge .cse125 (_ bv0 32))) (= .cse127 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse129 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse129 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse129 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse129) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse130 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse133 (bvmul (_ bv4 32) .cse130))) (or (not (bvslt .cse130 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse131 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse132 (bvmul .cse131 (_ bv4 32)))) (or (not (bvslt .cse131 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse132) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse132))) (= .cse133 .cse132) (not (bvsge .cse131 (_ bv0 32))) (= .cse1 .cse132))))) (not (bvsge .cse130 (_ bv0 32))) (= .cse133 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse134 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse137 (bvmul (_ bv4 32) .cse134))) (or (not (bvslt .cse134 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse135 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse136 (bvmul (_ bv4 32) .cse135))) (or (not (bvslt .cse135 c_~size~0)) (not (bvsge .cse135 (_ bv0 32))) (= .cse1 .cse136) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse136) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse136))) (= .cse137 .cse136))))) (not (bvsge .cse134 (_ bv0 32))) (= .cse137 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse138 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse140 (bvmul (_ bv4 32) .cse138))) (or (not (bvslt .cse138 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse139 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse141 (bvmul (_ bv4 32) .cse139))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse139 c_~size~0)) (= .cse140 .cse141) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse141) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse141))) (= .cse141 .cse1))))) (not (bvsge .cse138 (_ bv0 32))) (= .cse140 .cse1))))) (or .cse142 (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse143 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse1 (bvmul (_ bv4 32) .cse143)) (= c_~x1~0 .cse143))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse148 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse144 (concat (concat .cse148 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse146 (bvmul (_ bv4 32) .cse144))) (or (not (bvslt .cse144 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse145 (concat (concat .cse148 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse147 (bvmul (_ bv4 32) .cse145))) (or (not (bvslt .cse145 c_~size~0)) (= .cse146 .cse147) (= .cse1 .cse147) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse147) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse147))))))) (not (bvsge .cse144 (_ bv0 32))) (= .cse146 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse152 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse150 (bvmul (_ bv4 32) .cse152))) (or (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse149 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse151 (bvmul (_ bv4 32) .cse149))) (or (not (bvslt .cse149 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (= .cse150 .cse151) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse151) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse151))) (= .cse151 .cse1))))) (not (bvslt .cse152 c_~size~0)) (not (bvsge .cse152 (_ bv0 32))) (= .cse150 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse153 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse156 (bvmul (_ bv4 32) .cse153))) (or (not (bvslt .cse153 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse154 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse155 (bvmul (_ bv4 32) .cse154))) (or (not (bvslt .cse154 c_~size~0)) (not (bvsge .cse154 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse155) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse155))) (= .cse156 .cse155))))) (not (bvsge .cse153 (_ bv0 32))) (= .cse156 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse161 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse157 (concat (concat .cse161 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse160 (bvmul (_ bv4 32) .cse157))) (or (not (bvslt .cse157 c_~size~0)) (not (bvsge .cse157 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse158 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse159 (bvmul (_ bv4 32) .cse158))) (or (not (bvslt .cse158 c_~size~0)) (not (bvsge .cse158 (_ bv0 32))) (= .cse1 .cse159) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse159) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse159))) (= .cse160 .cse159) (= c_~x1~0 (concat (concat .cse161 v_arrayElimCell_81) v_arrayElimCell_78)))))) (= .cse160 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse162 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse162 c_~size~0)) (= .cse162 c_~x1~0) (not (bvsge .cse162 (_ bv0 32)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse163 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse164 (bvmul (_ bv4 32) .cse163))) (or (not (bvslt .cse163 c_~size~0)) (not (bvsge .cse163 (_ bv0 32))) (= .cse164 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse165 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse166 (bvmul (_ bv4 32) .cse165))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse165 c_~size~0)) (= .cse164 .cse166) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse166) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse166))) (= .cse166 .cse1))))))))) (or (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) .cse142) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse167 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse168 (bvmul (_ bv4 32) .cse167))) (or (not (bvslt .cse167 c_~size~0)) (not (bvsge .cse167 (_ bv0 32))) (= .cse168 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse170 (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse169 (concat .cse170 v_arrayElimCell_70))) (let ((.cse171 (bvmul (_ bv4 32) .cse169))) (or (not (bvslt .cse169 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse170 v_arrayElimCell_77))) (not (bvsge .cse169 (_ bv0 32))) (= .cse1 .cse171) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse171) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse171))) (= .cse168 .cse171)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse176 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse172 (concat (concat .cse176 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse173 (bvmul (_ bv4 32) .cse172))) (or (not (bvslt .cse172 c_~size~0)) (not (bvsge .cse172 (_ bv0 32))) (= .cse173 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse174 (concat (concat .cse176 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse175 (bvmul (_ bv4 32) .cse174))) (or (not (bvslt .cse174 c_~size~0)) (= .cse173 .cse175) (= .cse1 .cse175) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse175) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse175)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse181 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse177 (concat (concat .cse181 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse179 (bvmul (_ bv4 32) .cse177))) (or (not (bvslt .cse177 c_~size~0)) (not (bvsge .cse177 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse178 (concat (concat .cse181 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse180 (bvmul (_ bv4 32) .cse178))) (or (not (bvslt .cse178 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse179 .cse180) (= .cse1 .cse180) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse180) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse180))))))) (= .cse179 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse182 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse184 (bvmul (_ bv4 32) .cse182))) (or (not (bvslt .cse182 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse185 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse183 (bvmul (_ bv4 32) .cse185))) (or (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse183) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse183))) (= .cse184 .cse183) (not (bvslt .cse185 c_~size~0)) (not (bvsge .cse185 (_ bv0 32))))))) (not (bvsge .cse182 (_ bv0 32))) (= .cse184 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse186 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse189 (bvmul (_ bv4 32) .cse186))) (or (not (bvslt .cse186 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse187 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse188 (bvmul (_ bv4 32) .cse187))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse187 c_~size~0)) (not (bvsge .cse187 (_ bv0 32))) (= .cse1 .cse188) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse188) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse188))) (= .cse189 .cse188))))) (not (bvsge .cse186 (_ bv0 32))) (= .cse189 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse190 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse190 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse190 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse190) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse191 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse192 (bvmul (_ bv4 32) .cse191))) (or (not (bvslt .cse191 c_~size~0)) (not (bvsge .cse191 (_ bv0 32))) (= .cse192 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse193 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse194 (bvmul .cse193 (_ bv4 32)))) (or (not (bvslt .cse193 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse194) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse194))) (= .cse192 .cse194) (not (bvsge .cse193 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse1 .cse194))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse199 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse195 (concat (concat .cse199 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse195 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse198 (concat .cse199 v_arrayElimCell_81))) (let ((.cse196 (concat .cse198 v_arrayElimCell_70))) (let ((.cse197 (bvmul (_ bv4 32) .cse196))) (or (not (bvslt .cse196 c_~size~0)) (= .cse1 .cse197) (= c_~x1~0 (concat .cse198 v_arrayElimCell_78)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse197) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse197)))))))) (not (bvsge .cse195 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse195) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse200 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse204 (bvmul (_ bv4 32) .cse200))) (or (not (bvslt .cse200 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse202 (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81))) (let ((.cse201 (concat .cse202 v_arrayElimCell_70))) (let ((.cse203 (bvmul .cse201 (_ bv4 32)))) (or (not (bvslt .cse201 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse202 v_arrayElimCell_77))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse203) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse203))) (= .cse204 .cse203) (not (bvsge .cse201 (_ bv0 32))) (= .cse1 .cse203)))))) (not (bvsge .cse200 (_ bv0 32))) (= .cse204 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse209 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse205 (concat (concat .cse209 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse207 (bvmul (_ bv4 32) .cse205))) (or (not (bvslt .cse205 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse206 (concat (concat .cse209 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse208 (bvmul (_ bv4 32) .cse206))) (or (not (bvslt .cse206 c_~size~0)) (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse207 .cse208) (= .cse1 .cse208) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse208) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse208))))))) (not (bvsge .cse205 (_ bv0 32))) (= .cse207 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse210 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse213 (bvmul (_ bv4 32) .cse210))) (or (not (bvslt .cse210 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse211 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse212 (bvmul .cse211 (_ bv4 32)))) (or (not (bvslt .cse211 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse212) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse212))) (= .cse213 .cse212) (not (bvsge .cse211 (_ bv0 32))))))) (not (bvsge .cse210 (_ bv0 32))) (= .cse213 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse214 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse216 (bvmul (_ bv4 32) .cse214))) (or (not (bvslt .cse214 c_~size~0)) (not (bvsge .cse214 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse215 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse217 (bvmul (_ bv4 32) .cse215))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse215 c_~size~0)) (= .cse216 .cse217) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse217) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse217))) (= .cse217 .cse1))))) (= .cse216 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse221 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse218 (concat (concat .cse221 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse218 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse219 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse220 (bvmul (_ bv4 32) .cse219))) (or (not (bvslt .cse219 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse220) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse220))) (= c_~x1~0 (concat (concat .cse221 v_arrayElimCell_81) v_arrayElimCell_78)) (= .cse220 .cse1))))) (not (bvsge .cse218 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse218) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse222 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse225 (bvmul (_ bv4 32) .cse222))) (or (not (bvslt .cse222 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse223 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse224 (bvmul (_ bv4 32) .cse223))) (or (not (bvslt .cse223 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvsge .cse223 (_ bv0 32))) (= .cse1 .cse224) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse224) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse224))) (= .cse225 .cse224))))) (not (bvsge .cse222 (_ bv0 32))) (= .cse225 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse226 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse229 (bvmul (_ bv4 32) .cse226))) (or (not (bvslt .cse226 c_~size~0)) (not (bvsge .cse226 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse227 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse228 (bvmul (_ bv4 32) .cse227))) (or (not (bvslt .cse227 c_~size~0)) (not (bvsge .cse227 (_ bv0 32))) (= .cse1 .cse228) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse228) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse228))) (= .cse229 .cse228) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))))))) (= .cse229 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse230 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse232 (bvmul (_ bv4 32) .cse230))) (or (not (bvslt .cse230 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse231 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse233 (bvmul (_ bv4 32) .cse231))) (or (not (bvslt .cse231 c_~size~0)) (= .cse232 .cse233) (not (bvsge .cse231 (_ bv0 32))) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse233) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse233))))))) (not (bvsge .cse230 (_ bv0 32))) (= .cse232 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse234 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse235 (bvmul (_ bv4 32) .cse234))) (or (not (bvslt .cse234 c_~size~0)) (not (bvsge .cse234 (_ bv0 32))) (= .cse235 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse236 (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse237 (concat .cse236 v_arrayElimCell_70))) (let ((.cse238 (bvmul (_ bv4 32) .cse237))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse236 v_arrayElimCell_77))) (not (bvslt .cse237 c_~size~0)) (= .cse235 .cse238) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse238) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse238))) (= .cse238 .cse1)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse239 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse242 (bvmul (_ bv4 32) .cse239))) (or (not (bvslt .cse239 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse240 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse241 (bvmul (_ bv4 32) .cse240))) (or (not (bvslt .cse240 c_~size~0)) (not (bvsge .cse240 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse1 .cse241) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse241) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse241))) (= .cse242 .cse241))))) (not (bvsge .cse239 (_ bv0 32))) (= .cse242 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse243 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse243 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse243 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse243) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse244 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse247 (bvmul (_ bv4 32) .cse244))) (or (not (bvslt .cse244 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse245 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse246 (bvmul (_ bv4 32) .cse245))) (or (not (bvslt .cse245 c_~size~0)) (not (bvsge .cse245 (_ bv0 32))) (= .cse1 .cse246) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse246) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse246))) (= .cse247 .cse246))))) (not (bvsge .cse244 (_ bv0 32))) (= .cse247 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse253 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse248 (concat (concat .cse253 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse250 (bvmul (_ bv4 32) .cse248))) (or (not (bvslt .cse248 c_~size~0)) (not (bvsge .cse248 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse252 (concat .cse253 v_arrayElimCell_81))) (let ((.cse249 (concat .cse252 v_arrayElimCell_70))) (let ((.cse251 (bvmul (_ bv4 32) .cse249))) (or (not (bvslt .cse249 c_~size~0)) (= .cse250 .cse251) (= .cse1 .cse251) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat .cse252 v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse251) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse251)))))))) (= .cse250 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse254 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse257 (bvmul (_ bv4 32) .cse254))) (or (not (bvslt .cse254 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse255 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse256 (bvmul .cse255 (_ bv4 32)))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse255 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse256) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse256))) (= .cse257 .cse256) (not (bvsge .cse255 (_ bv0 32))) (= .cse1 .cse256))))) (not (bvsge .cse254 (_ bv0 32))) (= .cse257 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse262 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse258 (concat (concat .cse262 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse260 (bvmul (_ bv4 32) .cse258))) (or (not (bvslt .cse258 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse259 (concat (concat .cse262 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse261 (bvmul (_ bv4 32) .cse259))) (or (not (bvslt .cse259 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse260 .cse261) (= .cse1 .cse261) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse261) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse261))))))) (not (bvsge .cse258 (_ bv0 32))) (= .cse260 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse263 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse266 (bvmul (_ bv4 32) .cse263))) (or (not (bvslt .cse263 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse264 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse265 (bvmul .cse264 (_ bv4 32)))) (or (not (bvslt .cse264 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse265) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse265))) (= .cse266 .cse265))))) (not (bvsge .cse263 (_ bv0 32))) (= .cse266 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse271 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse267 (concat .cse271 v_arrayElimCell_78))) (let ((.cse268 (bvmul (_ bv4 32) .cse267))) (or (not (bvslt .cse267 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (let ((.cse270 (concat .cse271 v_arrayElimCell_70))) (let ((.cse269 (bvmul (_ bv4 32) .cse270))) (or (= .cse268 .cse269) (not (bvslt .cse270 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse269) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse269))))))) (not (bvsge .cse267 (_ bv0 32))) (= .cse268 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse272 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse273 (bvmul (_ bv4 32) .cse272))) (or (not (bvslt .cse272 c_~size~0)) (not (bvsge .cse272 (_ bv0 32))) (= .cse273 .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse274 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse275 (bvmul .cse274 (_ bv4 32)))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse274 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse275) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse275))) (= .cse273 .cse275) (not (bvsge .cse274 (_ bv0 32))) (= .cse1 .cse275))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse280 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse276 (concat (concat .cse280 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse277 (bvmul (_ bv4 32) .cse276))) (or (not (bvslt .cse276 c_~size~0)) (not (bvsge .cse276 (_ bv0 32))) (= .cse277 .cse1) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse279 (concat (concat .cse280 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse278 (bvmul (_ bv4 32) .cse279))) (or (= .cse1 .cse278) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse278) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse278))) (not (bvslt .cse279 c_~size~0)) (= .cse277 .cse278)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse281 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse281 c_~size~0)) (not (bvsge .cse281 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse281) .cse1) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse282 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse285 (bvmul (_ bv4 32) .cse282))) (or (not (bvslt .cse282 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse283 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse284 (bvmul (_ bv4 32) .cse283))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvslt .cse283 c_~size~0)) (not (bvsge .cse283 (_ bv0 32))) (= .cse1 .cse284) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse284) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse284))) (= .cse285 .cse284))))) (not (bvsge .cse282 (_ bv0 32))) (= .cse285 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse286 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse289 (bvmul (_ bv4 32) .cse286))) (or (not (bvslt .cse286 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse287 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse288 (bvmul (_ bv4 32) .cse287))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse287 c_~size~0)) (not (bvsge .cse287 (_ bv0 32))) (= .cse1 .cse288) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse288) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse288))) (= .cse289 .cse288))))) (not (bvsge .cse286 (_ bv0 32))) (= .cse289 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse294 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse290 (concat (concat .cse294 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse292 (bvmul (_ bv4 32) .cse290))) (or (not (bvslt .cse290 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse291 (concat (concat .cse294 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse293 (bvmul (_ bv4 32) .cse291))) (or (not (bvslt .cse291 c_~size~0)) (= .cse292 .cse293) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse293) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse293))))))) (not (bvsge .cse290 (_ bv0 32))) (= .cse292 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse295 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse297 (bvmul (_ bv4 32) .cse295))) (or (not (bvslt .cse295 c_~size~0)) (not (bvsge .cse295 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse296 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse298 (bvmul (_ bv4 32) .cse296))) (or (not (bvslt .cse296 c_~size~0)) (= .cse297 .cse298) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse298) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse298))) (= .cse298 .cse1))))) (= .cse297 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse303 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse299 (concat (concat .cse303 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse301 (bvmul (_ bv4 32) .cse299))) (or (not (bvslt .cse299 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse300 (concat (concat .cse303 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse302 (bvmul (_ bv4 32) .cse300))) (or (not (bvslt .cse300 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse301 .cse302) (= .cse1 .cse302) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse302) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse302))))))) (not (bvsge .cse299 (_ bv0 32))) (= .cse301 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse308 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse304 (concat (concat .cse308 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse307 (bvmul (_ bv4 32) .cse304))) (or (not (bvslt .cse304 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse305 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse306 (bvmul .cse305 (_ bv4 32)))) (or (not (bvslt .cse305 c_~size~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse306) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse306))) (= .cse307 .cse306) (not (bvsge .cse305 (_ bv0 32))) (= .cse1 .cse306) (= c_~x1~0 (concat (concat .cse308 v_arrayElimCell_81) v_arrayElimCell_78)))))) (not (bvsge .cse304 (_ bv0 32))) (= .cse307 .cse1)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse309 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse309 c_~size~0)) (not (bvsge .cse309 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse309) .cse1) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse310 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse313 (bvmul (_ bv4 32) .cse310))) (or (not (bvslt .cse310 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse311 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse312 (bvmul (_ bv4 32) .cse311))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse311 c_~size~0)) (not (bvsge .cse311 (_ bv0 32))) (= .cse1 .cse312) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse312) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse312))) (= .cse313 .cse312))))) (not (bvsge .cse310 (_ bv0 32))) (= .cse313 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse316 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse314 (concat (concat .cse316 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse314 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse315 (concat (concat .cse316 v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse315) (= .cse1 (bvmul (_ bv4 32) .cse315))))) (not (bvsge .cse314 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse314) .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse317 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse317 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse318 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse318) (= (bvmul (_ bv4 32) .cse318) .cse1)))) (not (bvsge .cse317 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse317) .cse1)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse319 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse322 (bvmul (_ bv4 32) .cse319))) (or (not (bvslt .cse319 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse320 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse321 (bvmul (_ bv4 32) .cse320))) (or (not (bvsge .cse320 (_ bv0 32))) (= .cse321 .cse1) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse321) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse321 (_ bv4 32)))) (not (bvslt .cse320 c_~size~0)) (= .cse322 .cse321))))) (not (bvsge .cse319 (_ bv0 32))) (= .cse322 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse323 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse326 (bvmul (_ bv4 32) .cse323))) (or (not (bvslt .cse323 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse324 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse325 (bvmul (_ bv4 32) .cse324))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse324 c_~size~0)) (not (bvsge .cse324 (_ bv0 32))) (= .cse1 .cse325) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse325) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse325))) (= .cse326 .cse325))))) (not (bvsge .cse323 (_ bv0 32))) (= .cse326 .cse1))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse327 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse329 (bvmul (_ bv4 32) .cse327))) (or (not (bvslt .cse327 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse328 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse330 (bvmul (_ bv4 32) .cse328))) (or (not (bvslt .cse328 c_~size~0)) (= .cse329 .cse330) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvule (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| .cse330) (bvadd |c_ULTIMATE.start_create_fresh_int_array_~arr~0#1.offset| (_ bv4 32) .cse330))) (= .cse330 .cse1))))) (not (bvsge .cse327 (_ bv0 32))) (= .cse329 .cse1)))))))) (bvslt |c_ULTIMATE.start_create_fresh_int_array_~i~2#1| |c_ULTIMATE.start_create_fresh_int_array_~size#1|) (not (bvslt c_~x2~0 c_~size~0))) (= c_~x2~0 (_ bv0 32)) (= |c_ULTIMATE.start_create_fresh_int_array_~i~2#1| (_ bv1 32)) (= c_~x1~0 (_ bv0 32)) (= c_~size~0 |c_ULTIMATE.start_create_fresh_int_array_~size#1|) (bvsgt c_~size~0 (_ bv0 32)) (bvule |c_ULTIMATE.start_create_fresh_int_array_~size#1| (_ bv1073741823 32))) is different from true [2022-11-16 11:16:02,637 WARN L855 $PredicateComparison]: unable to prove that (and (or (not (bvsge c_~x2~0 (_ bv0 32))) (not (bvslt c_~x2~0 c_~size~0)) (let ((.cse4 (bvmul c_~x2~0 (_ bv4 32)))) (let ((.cse150 (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse331 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse331 c_~size~0)) (not (bvsge .cse331 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse331) .cse4)))))) (and (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse3 (bvmul (_ bv4 32) .cse0))) (or (not (bvslt .cse0 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse2 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse1 (bvmul .cse2 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse1) (bvadd c_~f~0.offset (_ bv4 32) .cse1))) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse2 c_~size~0)) (= .cse3 .cse1) (not (bvsge .cse2 (_ bv0 32))) (= .cse4 .cse1))))) (not (bvsge .cse0 (_ bv0 32))) (= .cse3 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse5 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse5 c_~size~0)) (not (bvsge .cse5 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse5) .cse4) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse6 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse9 (bvmul (_ bv4 32) .cse6))) (or (not (bvslt .cse6 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse8 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse7 (bvmul (_ bv4 32) .cse8))) (or (not (bvule (bvadd c_~f~0.offset .cse7) (bvadd c_~f~0.offset (_ bv4 32) .cse7))) (not (bvslt .cse8 c_~size~0)) (= .cse9 .cse7))))) (not (bvsge .cse6 (_ bv0 32))) (= .cse9 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse10 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse11 (bvmul (_ bv4 32) .cse10))) (or (not (bvslt .cse10 c_~size~0)) (not (bvsge .cse10 (_ bv0 32))) (= .cse11 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse13 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse12 (bvmul .cse13 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse12) (bvadd c_~f~0.offset (_ bv4 32) .cse12))) (not (bvslt .cse13 c_~size~0)) (= .cse11 .cse12) (not (bvsge .cse13 (_ bv0 32))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse14 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse17 (bvmul (_ bv4 32) .cse14))) (or (not (bvslt .cse14 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse16 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse15 (bvmul (_ bv4 32) .cse16))) (or (not (bvule (bvadd c_~f~0.offset .cse15) (bvadd c_~f~0.offset (_ bv4 32) .cse15))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse16 c_~size~0)) (= .cse17 .cse15) (= .cse15 .cse4))))) (not (bvsge .cse14 (_ bv0 32))) (= .cse17 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse20 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse18 (concat (concat .cse20 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse18 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse19 (concat (concat .cse20 v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse4 (bvmul (_ bv4 32) .cse19)) (= c_~x1~0 .cse19)))) (not (bvsge .cse18 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse18) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse21 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse21 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse21 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse21) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse23 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse22 (concat (concat .cse23 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse22 c_~size~0)) (not (bvsge .cse22 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse22) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse23 v_arrayElimCell_81) v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse25 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse24 (concat .cse25 v_arrayElimCell_78))) (or (not (bvslt .cse24 c_~size~0)) (not (bvsge .cse24 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse24) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (= c_~x1~0 (concat .cse25 v_arrayElimCell_70))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse26 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse26 c_~size~0)) (not (bvsge .cse26 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse27 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse27 c_~x1~0) (= .cse4 (bvmul .cse27 (_ bv4 32)))))) (= (bvmul (_ bv4 32) .cse26) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse32 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse28 (concat (concat .cse32 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse31 (bvmul (_ bv4 32) .cse28))) (or (not (bvslt .cse28 c_~size~0)) (not (bvsge .cse28 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse30 (concat (concat .cse32 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse29 (bvmul (_ bv4 32) .cse30))) (or (not (bvule (bvadd c_~f~0.offset .cse29) (bvadd c_~f~0.offset (_ bv4 32) .cse29))) (= .cse4 .cse29) (not (bvslt .cse30 c_~size~0)) (= .cse31 .cse29))))) (= .cse31 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse37 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse33 (concat (concat .cse37 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse35 (bvmul (_ bv4 32) .cse33))) (or (not (bvslt .cse33 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse34 (concat (concat .cse37 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse36 (bvmul (_ bv4 32) .cse34))) (or (not (bvslt .cse34 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse35 .cse36) (= .cse4 .cse36) (not (bvule (bvadd c_~f~0.offset .cse36) (bvadd c_~f~0.offset (_ bv4 32) .cse36))))))) (not (bvsge .cse33 (_ bv0 32))) (= .cse35 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse42 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse38 (concat (concat .cse42 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse39 (bvmul (_ bv4 32) .cse38))) (or (not (bvslt .cse38 c_~size~0)) (not (bvsge .cse38 (_ bv0 32))) (= .cse39 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse40 (concat (concat .cse42 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse41 (bvmul (_ bv4 32) .cse40))) (or (not (bvslt .cse40 c_~size~0)) (= .cse39 .cse41) (= .cse4 .cse41) (not (bvule (bvadd c_~f~0.offset .cse41) (bvadd c_~f~0.offset (_ bv4 32) .cse41)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse48 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse43 (concat (concat .cse48 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse45 (bvmul (_ bv4 32) .cse43))) (or (not (bvslt .cse43 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse47 (concat .cse48 v_arrayElimCell_81))) (let ((.cse44 (concat .cse47 v_arrayElimCell_70))) (let ((.cse46 (bvmul (_ bv4 32) .cse44))) (or (not (bvslt .cse44 c_~size~0)) (= .cse45 .cse46) (= .cse4 .cse46) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat .cse47 v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse46) (bvadd c_~f~0.offset (_ bv4 32) .cse46)))))))) (not (bvsge .cse43 (_ bv0 32))) (= .cse45 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse53 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse49 (concat (concat .cse53 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse51 (bvmul (_ bv4 32) .cse49))) (or (not (bvslt .cse49 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse50 (concat (concat .cse53 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse52 (bvmul (_ bv4 32) .cse50))) (or (not (bvslt .cse50 c_~size~0)) (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse51 .cse52) (= .cse4 .cse52) (not (bvule (bvadd c_~f~0.offset .cse52) (bvadd c_~f~0.offset (_ bv4 32) .cse52))))))) (not (bvsge .cse49 (_ bv0 32))) (= .cse51 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse58 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse54 (concat (concat .cse58 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse56 (bvmul (_ bv4 32) .cse54))) (or (not (bvslt .cse54 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse55 (concat (concat .cse58 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse57 (bvmul (_ bv4 32) .cse55))) (or (not (bvslt .cse55 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse56 .cse57) (= .cse4 .cse57) (not (bvule (bvadd c_~f~0.offset .cse57) (bvadd c_~f~0.offset (_ bv4 32) .cse57))))))) (not (bvsge .cse54 (_ bv0 32))) (= .cse56 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse59 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse60 (bvmul (_ bv4 32) .cse59))) (or (not (bvslt .cse59 c_~size~0)) (not (bvsge .cse59 (_ bv0 32))) (= .cse60 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse62 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse61 (bvmul (_ bv4 32) .cse62))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse61) (bvadd c_~f~0.offset (_ bv4 32) .cse61))) (not (bvslt .cse62 c_~size~0)) (= .cse60 .cse61) (= .cse61 .cse4))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse63 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse66 (bvmul (_ bv4 32) .cse63))) (or (not (bvslt .cse63 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse64 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse65 (bvmul (_ bv4 32) .cse64))) (or (not (bvsge .cse64 (_ bv0 32))) (= .cse65 .cse4) (not (bvule (bvadd c_~f~0.offset .cse65) (bvadd c_~f~0.offset .cse65 (_ bv4 32)))) (not (bvslt .cse64 c_~size~0)) (= .cse66 .cse65))))) (not (bvsge .cse63 (_ bv0 32))) (= .cse66 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse67 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse70 (bvmul (_ bv4 32) .cse67))) (or (not (bvslt .cse67 c_~size~0)) (not (bvsge .cse67 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse68 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse69 (bvmul (_ bv4 32) .cse68))) (or (not (bvslt .cse68 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse69) (bvadd c_~f~0.offset (_ bv4 32) .cse69))) (not (bvsge .cse68 (_ bv0 32))) (= .cse4 .cse69) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (= .cse70 .cse69))))) (= .cse70 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse71 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse74 (bvmul (_ bv4 32) .cse71))) (or (not (bvslt .cse71 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse72 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse73 (bvmul (_ bv4 32) .cse72))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse72 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse73) (bvadd c_~f~0.offset (_ bv4 32) .cse73))) (not (bvsge .cse72 (_ bv0 32))) (= .cse4 .cse73) (= .cse74 .cse73))))) (not (bvsge .cse71 (_ bv0 32))) (= .cse74 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse75 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse75 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse75 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse75) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse76 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse76 c_~size~0)) (not (bvsge .cse76 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse76) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse77 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse80 (bvmul (_ bv4 32) .cse77))) (or (not (bvslt .cse77 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse79 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse78 (bvmul .cse79 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse78) (bvadd c_~f~0.offset (_ bv4 32) .cse78))) (not (bvslt .cse79 c_~size~0)) (= .cse80 .cse78) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvsge .cse79 (_ bv0 32))) (= .cse4 .cse78))))) (not (bvsge .cse77 (_ bv0 32))) (= .cse80 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse81 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse81 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse82 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= (bvmul (_ bv4 32) .cse82) .cse4) (= c_~x1~0 .cse82)))) (not (bvsge .cse81 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse81) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse83 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse83 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse83 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse83) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse84 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse87 (bvmul (_ bv4 32) .cse84))) (or (not (bvslt .cse84 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse86 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse85 (bvmul (_ bv4 32) .cse86))) (or (not (bvule (bvadd c_~f~0.offset .cse85) (bvadd c_~f~0.offset (_ bv4 32) .cse85))) (not (bvslt .cse86 c_~size~0)) (= .cse87 .cse85) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse85 .cse4))))) (not (bvsge .cse84 (_ bv0 32))) (= .cse87 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse88 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse91 (bvmul (_ bv4 32) .cse88))) (or (not (bvslt .cse88 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse89 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse90 (bvmul (_ bv4 32) .cse89))) (or (not (bvsge .cse89 (_ bv0 32))) (not (bvule (bvadd c_~f~0.offset .cse90) (bvadd c_~f~0.offset .cse90 (_ bv4 32)))) (not (bvslt .cse89 c_~size~0)) (= .cse91 .cse90))))) (not (bvsge .cse88 (_ bv0 32))) (= .cse91 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse92 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse95 (bvmul (_ bv4 32) .cse92))) (or (not (bvslt .cse92 c_~size~0)) (not (bvsge .cse92 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse94 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse93 (bvmul (_ bv4 32) .cse94))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse93) (bvadd c_~f~0.offset (_ bv4 32) .cse93))) (not (bvslt .cse94 c_~size~0)) (= .cse95 .cse93) (= .cse93 .cse4))))) (= .cse95 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse100 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse96 (concat (concat .cse100 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse97 (bvmul (_ bv4 32) .cse96))) (or (not (bvslt .cse96 c_~size~0)) (not (bvsge .cse96 (_ bv0 32))) (= .cse97 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse98 (concat (concat .cse100 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse99 (bvmul (_ bv4 32) .cse98))) (or (not (bvslt .cse98 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse97 .cse99) (= .cse4 .cse99) (not (bvule (bvadd c_~f~0.offset .cse99) (bvadd c_~f~0.offset (_ bv4 32) .cse99)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse101 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse101 c_~size~0)) (not (bvsge .cse101 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse101) .cse4) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse102 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= .cse102 c_~x1~0) (= .cse4 (bvmul .cse102 (_ bv4 32))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse107 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse103 (concat (concat .cse107 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse106 (bvmul (_ bv4 32) .cse103))) (or (not (bvslt .cse103 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse105 (concat (concat .cse107 v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse104 (bvmul (_ bv4 32) .cse105))) (or (not (bvule (bvadd c_~f~0.offset .cse104) (bvadd c_~f~0.offset (_ bv4 32) .cse104))) (not (bvslt .cse105 c_~size~0)) (= .cse106 .cse104))))) (not (bvsge .cse103 (_ bv0 32))) (= .cse106 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse108 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse108 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse109 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (or (= c_~x1~0 .cse109) (= .cse4 (bvmul (_ bv4 32) .cse109))))) (not (bvsge .cse108 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse108) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse110 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse114 (bvmul (_ bv4 32) .cse110))) (or (not (bvslt .cse110 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse111 (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse113 (concat .cse111 v_arrayElimCell_70))) (let ((.cse112 (bvmul (_ bv4 32) .cse113))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse111 v_arrayElimCell_77))) (not (bvule (bvadd c_~f~0.offset .cse112) (bvadd c_~f~0.offset (_ bv4 32) .cse112))) (not (bvslt .cse113 c_~size~0)) (= .cse114 .cse112) (= .cse112 .cse4)))))) (not (bvsge .cse110 (_ bv0 32))) (= .cse114 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse119 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse115 (concat (concat .cse119 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse117 (bvmul (_ bv4 32) .cse115))) (or (not (bvslt .cse115 c_~size~0)) (not (bvsge .cse115 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse116 (concat (concat .cse119 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse118 (bvmul (_ bv4 32) .cse116))) (or (not (bvslt .cse116 c_~size~0)) (= .cse117 .cse118) (not (bvule (bvadd c_~f~0.offset .cse118) (bvadd c_~f~0.offset (_ bv4 32) .cse118))))))) (= .cse117 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse120 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse123 (bvmul (_ bv4 32) .cse120))) (or (not (bvslt .cse120 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse121 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse122 (bvmul (_ bv4 32) .cse121))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse121 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse122) (bvadd c_~f~0.offset (_ bv4 32) .cse122))) (not (bvsge .cse121 (_ bv0 32))) (= .cse4 .cse122) (= .cse123 .cse122))))) (not (bvsge .cse120 (_ bv0 32))) (= .cse123 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse124 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse127 (bvmul (_ bv4 32) .cse124))) (or (not (bvslt .cse124 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse126 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse125 (bvmul (_ bv4 32) .cse126))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvule (bvadd c_~f~0.offset .cse125) (bvadd c_~f~0.offset (_ bv4 32) .cse125))) (not (bvslt .cse126 c_~size~0)) (= .cse127 .cse125) (= .cse125 .cse4))))) (not (bvsge .cse124 (_ bv0 32))) (= .cse127 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse128 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse128 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse128 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse128) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse130 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse129 (concat (concat .cse130 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse129 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8))) (= c_~x1~0 (concat (concat .cse130 v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse129 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse129) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse131 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse132 (bvmul (_ bv4 32) .cse131))) (or (not (bvslt .cse131 c_~size~0)) (not (bvsge .cse131 (_ bv0 32))) (= .cse132 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse133 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse134 (bvmul (_ bv4 32) .cse133))) (or (not (bvslt .cse133 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse134) (bvadd c_~f~0.offset (_ bv4 32) .cse134))) (not (bvsge .cse133 (_ bv0 32))) (= .cse4 .cse134) (= .cse132 .cse134))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse135 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse135 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70) c_~x1~0)) (not (bvsge .cse135 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse135) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse140 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse136 (concat (concat .cse140 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse138 (bvmul (_ bv4 32) .cse136))) (or (not (bvslt .cse136 c_~size~0)) (not (bvsge .cse136 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse137 (concat (concat .cse140 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse139 (bvmul (_ bv4 32) .cse137))) (or (not (bvslt .cse137 c_~size~0)) (= .cse138 .cse139) (= .cse4 .cse139) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd c_~f~0.offset .cse139) (bvadd c_~f~0.offset (_ bv4 32) .cse139))))))) (= .cse138 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse141 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse144 (bvmul (_ bv4 32) .cse141))) (or (not (bvslt .cse141 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse142 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse143 (bvmul (_ bv4 32) .cse142))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse142 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse143) (bvadd c_~f~0.offset (_ bv4 32) .cse143))) (not (bvsge .cse142 (_ bv0 32))) (= .cse4 .cse143) (= .cse144 .cse143))))) (not (bvsge .cse141 (_ bv0 32))) (= .cse144 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse145 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse149 (bvmul (_ bv4 32) .cse145))) (or (not (bvslt .cse145 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse147 (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81))) (let ((.cse146 (concat .cse147 v_arrayElimCell_70))) (let ((.cse148 (bvmul (_ bv4 32) .cse146))) (or (not (bvslt .cse146 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse147 v_arrayElimCell_77))) (not (bvule (bvadd c_~f~0.offset .cse148) (bvadd c_~f~0.offset (_ bv4 32) .cse148))) (not (bvsge .cse146 (_ bv0 32))) (= .cse4 .cse148) (= .cse149 .cse148)))))) (not (bvsge .cse145 (_ bv0 32))) (= .cse149 .cse4))))) (or .cse150 (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse151 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= .cse4 (bvmul (_ bv4 32) .cse151)) (= c_~x1~0 .cse151))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse152 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse155 (bvmul (_ bv4 32) .cse152))) (or (not (bvslt .cse152 c_~size~0)) (not (bvsge .cse152 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse154 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse153 (bvmul (_ bv4 32) .cse154))) (or (not (bvule (bvadd c_~f~0.offset .cse153) (bvadd c_~f~0.offset (_ bv4 32) .cse153))) (not (bvslt .cse154 c_~size~0)) (= .cse155 .cse153) (= .cse153 .cse4))))) (= .cse155 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse156 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse160 (bvmul (_ bv4 32) .cse156))) (or (not (bvslt .cse156 c_~size~0)) (not (bvsge .cse156 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse159 (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81))) (let ((.cse158 (concat .cse159 v_arrayElimCell_70))) (let ((.cse157 (bvmul .cse158 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse157) (bvadd c_~f~0.offset (_ bv4 32) .cse157))) (not (bvslt .cse158 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat .cse159 v_arrayElimCell_77))) (= .cse160 .cse157) (not (bvsge .cse158 (_ bv0 32))) (= .cse4 .cse157)))))) (= .cse160 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse164 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse161 (concat (concat .cse164 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse165 (bvmul (_ bv4 32) .cse161))) (or (not (bvslt .cse161 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse163 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse162 (bvmul (_ bv4 32) .cse163))) (or (not (bvule (bvadd c_~f~0.offset .cse162) (bvadd c_~f~0.offset (_ bv4 32) .cse162))) (not (bvslt .cse163 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse164 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse165 .cse162) (= .cse162 .cse4))))) (not (bvsge .cse161 (_ bv0 32))) (= .cse165 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse166 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse167 (bvmul (_ bv4 32) .cse166))) (or (not (bvslt .cse166 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse169 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse168 (bvmul (_ bv4 32) .cse169))) (or (= .cse167 .cse168) (not (bvslt .cse169 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse168) (bvadd c_~f~0.offset (_ bv4 32) .cse168))) (not (bvsge .cse169 (_ bv0 32))))))) (not (bvsge .cse166 (_ bv0 32))) (= .cse167 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse170 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse173 (bvmul (_ bv4 32) .cse170))) (or (not (bvslt .cse170 c_~size~0)) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse172 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse171 (bvmul (_ bv4 32) .cse172))) (or (not (bvule (bvadd c_~f~0.offset .cse171) (bvadd c_~f~0.offset (_ bv4 32) .cse171))) (not (bvslt .cse172 c_~size~0)) (not (bvsge .cse172 (_ bv0 32))) (= .cse173 .cse171))))) (not (bvsge .cse170 (_ bv0 32))) (= .cse173 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse174 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse174 c_~size~0)) (= .cse174 c_~x1~0) (not (bvsge .cse174 (_ bv0 32)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse175 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse178 (bvmul (_ bv4 32) .cse175))) (or (not (bvslt .cse175 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse177 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse176 (bvmul .cse177 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse176) (bvadd c_~f~0.offset (_ bv4 32) .cse176))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse177 c_~size~0)) (= .cse178 .cse176) (not (bvsge .cse177 (_ bv0 32))) (= .cse4 .cse176))))) (not (bvsge .cse175 (_ bv0 32))) (= .cse178 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse179 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse182 (bvmul (_ bv4 32) .cse179))) (or (not (bvslt .cse179 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse181 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse180 (bvmul .cse181 (_ bv4 32)))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd c_~f~0.offset .cse180) (bvadd c_~f~0.offset (_ bv4 32) .cse180))) (not (bvslt .cse181 c_~size~0)) (= .cse182 .cse180) (not (bvsge .cse181 (_ bv0 32))) (= .cse4 .cse180))))) (not (bvsge .cse179 (_ bv0 32))) (= .cse182 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse183 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse186 (bvmul (_ bv4 32) .cse183))) (or (not (bvslt .cse183 c_~size~0)) (not (bvsge .cse183 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse185 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse184 (bvmul .cse185 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse184) (bvadd c_~f~0.offset (_ bv4 32) .cse184))) (not (bvslt .cse185 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse186 .cse184) (not (bvsge .cse185 (_ bv0 32))) (= .cse4 .cse184))))) (= .cse186 .cse4))))) (or (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) .cse150) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse187 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse190 (bvmul (_ bv4 32) .cse187))) (or (not (bvslt .cse187 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse188 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse189 (bvmul (_ bv4 32) .cse188))) (or (not (bvslt .cse188 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse189) (bvadd c_~f~0.offset (_ bv4 32) .cse189))) (not (bvsge .cse188 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse4 .cse189) (= .cse190 .cse189))))) (not (bvsge .cse187 (_ bv0 32))) (= .cse190 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse191 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse194 (bvmul (_ bv4 32) .cse191))) (or (not (bvslt .cse191 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse192 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse193 (bvmul (_ bv4 32) .cse192))) (or (not (bvslt .cse192 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse193) (bvadd c_~f~0.offset (_ bv4 32) .cse193))) (not (bvsge .cse192 (_ bv0 32))) (= .cse194 .cse193))))) (not (bvsge .cse191 (_ bv0 32))) (= .cse194 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse198 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse196 (bvmul (_ bv4 32) .cse198))) (or (forall ((v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse197 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse195 (bvmul (_ bv4 32) .cse197))) (or (not (bvule (bvadd c_~f~0.offset .cse195) (bvadd c_~f~0.offset (_ bv4 32) .cse195))) (= .cse196 .cse195) (not (bvslt .cse197 c_~size~0)))))) (not (bvslt .cse198 c_~size~0)) (not (bvsge .cse198 (_ bv0 32))) (= .cse196 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse199 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse199 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvsge .cse199 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse199) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse204 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse200 (concat (concat .cse204 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse202 (bvmul (_ bv4 32) .cse200))) (or (not (bvslt .cse200 c_~size~0)) (not (bvsge .cse200 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse201 (concat (concat .cse204 v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse203 (bvmul (_ bv4 32) .cse201))) (or (not (bvslt .cse201 c_~size~0)) (forall ((v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77))) (= .cse202 .cse203) (= .cse4 .cse203) (not (bvule (bvadd c_~f~0.offset .cse203) (bvadd c_~f~0.offset (_ bv4 32) .cse203))))))) (= .cse202 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse205 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse208 (bvmul (_ bv4 32) .cse205))) (or (not (bvslt .cse205 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse207 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse206 (bvmul (_ bv4 32) .cse207))) (or (not (bvule (bvadd c_~f~0.offset .cse206) (bvadd c_~f~0.offset (_ bv4 32) .cse206))) (not (bvsge .cse207 (_ bv0 32))) (not (bvslt .cse207 c_~size~0)) (= .cse208 .cse206))))) (not (bvsge .cse205 (_ bv0 32))) (= .cse208 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse209 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse212 (bvmul (_ bv4 32) .cse209))) (or (not (bvslt .cse209 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse211 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse210 (bvmul (_ bv4 32) .cse211))) (or (not (bvule (bvadd c_~f~0.offset .cse210) (bvadd c_~f~0.offset (_ bv4 32) .cse210))) (not (bvslt .cse211 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70) c_~x1~0)) (= .cse212 .cse210) (= .cse210 .cse4))))) (not (bvsge .cse209 (_ bv0 32))) (= .cse212 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse216 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse213 (concat (concat .cse216 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse213 c_~size~0)) (not (bvsge .cse213 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse213) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse215 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse214 (bvmul (_ bv4 32) .cse215))) (or (not (bvule (bvadd c_~f~0.offset .cse214) (bvadd c_~f~0.offset (_ bv4 32) .cse214))) (not (bvslt .cse215 c_~size~0)) (= c_~x1~0 (concat (concat .cse216 v_arrayElimCell_81) v_arrayElimCell_78)) (= .cse214 .cse4))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse221 (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79))) (let ((.cse217 (concat .cse221 v_arrayElimCell_78))) (let ((.cse218 (bvmul (_ bv4 32) .cse217))) (or (not (bvslt .cse217 c_~size~0)) (not (bvsge .cse217 (_ bv0 32))) (= .cse218 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8))) (let ((.cse220 (concat .cse221 v_arrayElimCell_70))) (let ((.cse219 (bvmul (_ bv4 32) .cse220))) (or (= .cse218 .cse219) (not (bvslt .cse220 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse219) (bvadd c_~f~0.offset (_ bv4 32) .cse219)))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse222 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse225 (bvmul (_ bv4 32) .cse222))) (or (not (bvslt .cse222 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse223 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse224 (bvmul (_ bv4 32) .cse223))) (or (not (bvslt .cse223 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse224) (bvadd c_~f~0.offset (_ bv4 32) .cse224))) (not (bvsge .cse223 (_ bv0 32))) (= .cse4 .cse224) (= .cse225 .cse224) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)))))) (not (bvsge .cse222 (_ bv0 32))) (= .cse225 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse226 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse228 (bvmul (_ bv4 32) .cse226))) (or (not (bvslt .cse226 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse229 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse227 (bvmul (_ bv4 32) .cse229))) (or (not (bvule (bvadd c_~f~0.offset .cse227) (bvadd c_~f~0.offset (_ bv4 32) .cse227))) (= .cse228 .cse227) (not (bvslt .cse229 c_~size~0)))))) (not (bvsge .cse226 (_ bv0 32))) (= .cse228 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse233 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse232 (bvmul (_ bv4 32) .cse233))) (or (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse230 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse231 (bvmul (_ bv4 32) .cse230))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvslt .cse230 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse231) (bvadd c_~f~0.offset (_ bv4 32) .cse231))) (not (bvsge .cse230 (_ bv0 32))) (= .cse4 .cse231) (= .cse232 .cse231))))) (not (bvslt .cse233 c_~size~0)) (not (bvsge .cse233 (_ bv0 32))) (= .cse232 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse234 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse236 (bvmul (_ bv4 32) .cse234))) (or (not (bvslt .cse234 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse235 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse237 (bvmul (_ bv4 32) .cse235))) (or (not (bvslt .cse235 c_~size~0)) (= .cse236 .cse237) (not (bvule (bvadd c_~f~0.offset .cse237) (bvadd c_~f~0.offset (_ bv4 32) .cse237))) (not (bvsge .cse235 (_ bv0 32))))))) (not (bvsge .cse234 (_ bv0 32))) (= .cse236 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse238 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse239 (bvmul (_ bv4 32) .cse238))) (or (not (bvslt .cse238 c_~size~0)) (not (bvsge .cse238 (_ bv0 32))) (= .cse239 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse240 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse241 (bvmul (_ bv4 32) .cse240))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (not (bvslt .cse240 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse241) (bvadd c_~f~0.offset (_ bv4 32) .cse241))) (not (bvsge .cse240 (_ bv0 32))) (= .cse4 .cse241) (= .cse239 .cse241))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse242 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse244 (bvmul (_ bv4 32) .cse242))) (or (not (bvslt .cse242 c_~size~0)) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse243 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse245 (bvmul .cse243 (_ bv4 32)))) (or (not (bvslt .cse243 c_~size~0)) (= .cse244 .cse245) (= .cse4 .cse245) (not (bvule (bvadd c_~f~0.offset .cse245) (bvadd c_~f~0.offset (_ bv4 32) .cse245))))))) (not (bvsge .cse242 (_ bv0 32))) (= .cse244 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse246 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse246 c_~size~0)) (forall ((v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_78))) (not (bvsge .cse246 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse246) .cse4)))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse251 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse247 (concat (concat .cse251 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse248 (bvmul (_ bv4 32) .cse247))) (or (not (bvslt .cse247 c_~size~0)) (not (bvsge .cse247 (_ bv0 32))) (= .cse248 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse250 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse249 (bvmul .cse250 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse249) (bvadd c_~f~0.offset (_ bv4 32) .cse249))) (not (bvslt .cse250 c_~size~0)) (= .cse248 .cse249) (not (bvsge .cse250 (_ bv0 32))) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse251 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse4 .cse249)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse252 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse255 (bvmul (_ bv4 32) .cse252))) (or (not (bvslt .cse252 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse253 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse254 (bvmul (_ bv4 32) .cse253))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvslt .cse253 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse254) (bvadd c_~f~0.offset (_ bv4 32) .cse254))) (not (bvsge .cse253 (_ bv0 32))) (= .cse4 .cse254) (= .cse255 .cse254))))) (not (bvsge .cse252 (_ bv0 32))) (= .cse255 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse256 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse257 (bvmul (_ bv4 32) .cse256))) (or (not (bvslt .cse256 c_~size~0)) (not (bvsge .cse256 (_ bv0 32))) (= .cse257 .cse4) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse259 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse258 (bvmul (_ bv4 32) .cse259))) (or (not (bvule (bvadd c_~f~0.offset .cse258) (bvadd c_~f~0.offset (_ bv4 32) .cse258))) (not (bvsge .cse259 (_ bv0 32))) (not (bvslt .cse259 c_~size~0)) (= .cse257 .cse258) (= .cse4 .cse258))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse264 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse260 (concat (concat .cse264 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse260 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse263 (concat .cse264 v_arrayElimCell_81))) (let ((.cse261 (concat .cse263 v_arrayElimCell_70))) (let ((.cse262 (bvmul (_ bv4 32) .cse261))) (or (not (bvslt .cse261 c_~size~0)) (= .cse4 .cse262) (not (bvule (bvadd c_~f~0.offset .cse262) (bvadd c_~f~0.offset (_ bv4 32) .cse262))) (= c_~x1~0 (concat .cse263 v_arrayElimCell_78))))))) (not (bvsge .cse260 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse260) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse265 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse268 (bvmul (_ bv4 32) .cse265))) (or (not (bvslt .cse265 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse266 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse267 (bvmul (_ bv4 32) .cse266))) (or (not (bvslt .cse266 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse267) (bvadd c_~f~0.offset (_ bv4 32) .cse267))) (not (bvsge .cse266 (_ bv0 32))) (= .cse4 .cse267) (= .cse268 .cse267))))) (not (bvsge .cse265 (_ bv0 32))) (= .cse268 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse269 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse269 c_~size~0)) (not (bvsge .cse269 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse269) .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse270 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse273 (bvmul (_ bv4 32) .cse270))) (or (not (bvslt .cse270 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse271 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse272 (bvmul (_ bv4 32) .cse271))) (or (not (bvslt .cse271 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse272) (bvadd c_~f~0.offset (_ bv4 32) .cse272))) (not (bvsge .cse271 (_ bv0 32))) (= .cse4 .cse272) (= .cse273 .cse272) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))))))) (not (bvsge .cse270 (_ bv0 32))) (= .cse273 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse278 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse274 (concat (concat .cse278 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse275 (bvmul (_ bv4 32) .cse274))) (or (not (bvslt .cse274 c_~size~0)) (not (bvsge .cse274 (_ bv0 32))) (= .cse275 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse277 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse276 (bvmul .cse277 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse276) (bvadd c_~f~0.offset (_ bv4 32) .cse276))) (not (bvslt .cse277 c_~size~0)) (= .cse275 .cse276) (not (bvsge .cse277 (_ bv0 32))) (= .cse4 .cse276) (= c_~x1~0 (concat (concat .cse278 v_arrayElimCell_81) v_arrayElimCell_78))))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse279 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse281 (bvmul (_ bv4 32) .cse279))) (or (not (bvslt .cse279 c_~size~0)) (not (bvsge .cse279 (_ bv0 32))) (forall ((v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse280 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_78))) (let ((.cse282 (bvmul .cse280 (_ bv4 32)))) (or (not (bvslt .cse280 c_~size~0)) (= .cse281 .cse282) (not (bvule (bvadd c_~f~0.offset .cse282) (bvadd c_~f~0.offset (_ bv4 32) .cse282))))))) (= .cse281 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse287 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse283 (concat (concat .cse287 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse286 (bvmul (_ bv4 32) .cse283))) (or (not (bvslt .cse283 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse284 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse285 (bvmul (_ bv4 32) .cse284))) (or (not (bvslt .cse284 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse285) (bvadd c_~f~0.offset (_ bv4 32) .cse285))) (not (bvsge .cse284 (_ bv0 32))) (= .cse4 .cse285) (= .cse286 .cse285) (= c_~x1~0 (concat (concat .cse287 v_arrayElimCell_81) v_arrayElimCell_78)))))) (not (bvsge .cse283 (_ bv0 32))) (= .cse286 .cse4)))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse288 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse291 (bvmul (_ bv4 32) .cse288))) (or (not (bvslt .cse288 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse290 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse289 (bvmul .cse290 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse289) (bvadd c_~f~0.offset (_ bv4 32) .cse289))) (not (bvslt .cse290 c_~size~0)) (= .cse291 .cse289) (not (bvsge .cse290 (_ bv0 32))) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse4 .cse289))))) (not (bvsge .cse288 (_ bv0 32))) (= .cse291 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse292 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse293 (bvmul (_ bv4 32) .cse292))) (or (not (bvslt .cse292 c_~size~0)) (not (bvsge .cse292 (_ bv0 32))) (= .cse293 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse295 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse294 (bvmul .cse295 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse294) (bvadd c_~f~0.offset (_ bv4 32) .cse294))) (not (bvslt .cse295 c_~size~0)) (= .cse293 .cse294) (not (bvsge .cse295 (_ bv0 32))) (= .cse4 .cse294))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse300 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse296 (concat (concat .cse300 v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse297 (bvmul (_ bv4 32) .cse296))) (or (not (bvslt .cse296 c_~size~0)) (not (bvsge .cse296 (_ bv0 32))) (= .cse297 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse298 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse299 (bvmul (_ bv4 32) .cse298))) (or (not (bvslt .cse298 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse299) (bvadd c_~f~0.offset (_ bv4 32) .cse299))) (not (bvsge .cse298 (_ bv0 32))) (= .cse4 .cse299) (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= (concat (concat .cse300 v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (= .cse297 .cse299)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse301 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse304 (bvmul (_ bv4 32) .cse301))) (or (not (bvslt .cse301 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse303 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse302 (bvmul (_ bv4 32) .cse303))) (or (forall ((v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (not (bvule (bvadd c_~f~0.offset .cse302) (bvadd c_~f~0.offset (_ bv4 32) .cse302))) (not (bvslt .cse303 c_~size~0)) (= .cse304 .cse302) (= .cse302 .cse4))))) (not (bvsge .cse301 (_ bv0 32))) (= .cse304 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse305 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse306 (bvmul (_ bv4 32) .cse305))) (or (not (bvslt .cse305 c_~size~0)) (not (bvsge .cse305 (_ bv0 32))) (= .cse306 .cse4) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse308 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse307 (bvmul (_ bv4 32) .cse308))) (or (not (bvule (bvadd c_~f~0.offset .cse307) (bvadd c_~f~0.offset (_ bv4 32) .cse307))) (not (bvslt .cse308 c_~size~0)) (= .cse306 .cse307) (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_78))) (= .cse307 .cse4))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse309 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse312 (bvmul (_ bv4 32) .cse309))) (or (not (bvslt .cse309 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse311 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse310 (bvmul .cse311 (_ bv4 32)))) (or (not (bvule (bvadd c_~f~0.offset .cse310) (bvadd c_~f~0.offset (_ bv4 32) .cse310))) (not (bvslt .cse311 c_~size~0)) (forall ((v_arrayElimCell_76 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_78) c_~x1~0)) (= .cse312 .cse310) (not (bvsge .cse311 (_ bv0 32))) (= .cse4 .cse310))))) (not (bvsge .cse309 (_ bv0 32))) (= .cse312 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse313 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse316 (bvmul (_ bv4 32) .cse313))) (or (not (bvslt .cse313 c_~size~0)) (not (bvsge .cse313 (_ bv0 32))) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse315 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_79) v_arrayElimCell_70))) (let ((.cse314 (bvmul (_ bv4 32) .cse315))) (or (not (bvule (bvadd c_~f~0.offset .cse314) (bvadd c_~f~0.offset (_ bv4 32) .cse314))) (not (bvslt .cse315 c_~size~0)) (= .cse316 .cse314) (not (bvsge .cse315 (_ bv0 32))))))) (= .cse316 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse317 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse320 (bvmul (_ bv4 32) .cse317))) (or (not (bvslt .cse317 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse319 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse318 (bvmul (_ bv4 32) .cse319))) (or (forall ((v_arrayElimCell_76 (_ BitVec 8)) (v_arrayElimCell_77 (_ BitVec 8)) (v_arrayElimCell_80 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_76 v_arrayElimCell_80) v_arrayElimCell_81) v_arrayElimCell_77) c_~x1~0)) (not (bvule (bvadd c_~f~0.offset .cse318) (bvadd c_~f~0.offset (_ bv4 32) .cse318))) (not (bvslt .cse319 c_~size~0)) (= .cse320 .cse318) (= .cse318 .cse4))))) (not (bvsge .cse317 (_ bv0 32))) (= .cse320 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse321 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse321 c_~size~0)) (not (bvsge .cse321 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse321) .cse4) (forall ((v_arrayElimCell_74 (_ BitVec 8))) (= (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78) c_~x1~0))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse324 (concat v_arrayElimCell_71 v_arrayElimCell_75))) (let ((.cse322 (concat (concat .cse324 v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse322 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8))) (let ((.cse323 (concat (concat .cse324 v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse323) (= .cse4 (bvmul (_ bv4 32) .cse323))))) (not (bvsge .cse322 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse322) .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse325 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (let ((.cse328 (bvmul (_ bv4 32) .cse325))) (or (not (bvslt .cse325 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8)) (v_arrayElimCell_74 (_ BitVec 8))) (let ((.cse326 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (let ((.cse327 (bvmul (_ bv4 32) .cse326))) (or (forall ((v_arrayElimCell_77 (_ BitVec 8))) (= c_~x1~0 (concat (concat (concat v_arrayElimCell_74 v_arrayElimCell_75) v_arrayElimCell_81) v_arrayElimCell_77))) (not (bvslt .cse326 c_~size~0)) (not (bvule (bvadd c_~f~0.offset .cse327) (bvadd c_~f~0.offset (_ bv4 32) .cse327))) (not (bvsge .cse326 (_ bv0 32))) (= .cse4 .cse327) (= .cse328 .cse327))))) (not (bvsge .cse325 (_ bv0 32))) (= .cse328 .cse4))))) (forall ((v_arrayElimCell_75 (_ BitVec 8)) (v_arrayElimCell_78 (_ BitVec 8)) (v_arrayElimCell_79 (_ BitVec 8)) (v_arrayElimCell_71 (_ BitVec 8))) (let ((.cse329 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_75) v_arrayElimCell_79) v_arrayElimCell_78))) (or (not (bvslt .cse329 c_~size~0)) (forall ((v_arrayElimCell_70 (_ BitVec 8)) (v_arrayElimCell_81 (_ BitVec 8)) (v_arrayElimCell_72 (_ BitVec 8))) (let ((.cse330 (concat (concat (concat v_arrayElimCell_71 v_arrayElimCell_72) v_arrayElimCell_81) v_arrayElimCell_70))) (or (= c_~x1~0 .cse330) (= (bvmul (_ bv4 32) .cse330) .cse4)))) (not (bvsge .cse329 (_ bv0 32))) (= (bvmul (_ bv4 32) .cse329) .cse4)))))))) (not (bvslt (_ bv1 32) c_~size~0)) (= c_~x2~0 (_ bv0 32)) (= c_~x1~0 (_ bv0 32)) (bvsgt c_~size~0 (_ bv0 32)) (= c_~f~0.offset (_ bv0 32))) is different from true [2022-11-16 11:16:02,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:02,826 INFO L93 Difference]: Finished difference Result 165 states and 395 transitions. [2022-11-16 11:16:02,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 11:16:02,827 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.909090909090909) internal successors, (32), 11 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:02,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:02,829 INFO L225 Difference]: With dead ends: 165 [2022-11-16 11:16:02,829 INFO L226 Difference]: Without dead ends: 154 [2022-11-16 11:16:02,829 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 32.8s TimeCoverageRelationStatistics Valid=38, Invalid=61, Unknown=7, NotChecked=76, Total=182 [2022-11-16 11:16:02,830 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 23 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 15 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 94 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:02,830 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 15 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 41 Invalid, 0 Unknown, 94 Unchecked, 0.2s Time] [2022-11-16 11:16:02,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-11-16 11:16:02,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 133. [2022-11-16 11:16:02,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 131 states have (on average 2.49618320610687) internal successors, (327), 132 states have internal predecessors, (327), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:02,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 327 transitions. [2022-11-16 11:16:02,833 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 327 transitions. Word has length 16 [2022-11-16 11:16:02,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:02,833 INFO L495 AbstractCegarLoop]: Abstraction has 133 states and 327 transitions. [2022-11-16 11:16:02,834 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.909090909090909) internal successors, (32), 11 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:02,834 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 327 transitions. [2022-11-16 11:16:02,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:02,834 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:02,835 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:02,844 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (32)] Ended with exit code 0 [2022-11-16 11:16:03,042 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:03,043 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:03,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:03,043 INFO L85 PathProgramCache]: Analyzing trace with hash 477229730, now seen corresponding path program 3 times [2022-11-16 11:16:03,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:03,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1608653364] [2022-11-16 11:16:03,044 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:16:03,044 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:03,044 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:03,045 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:03,058 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (33)] Waiting until timeout for monitored process [2022-11-16 11:16:03,202 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 11:16:03,202 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:03,207 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-16 11:16:03,208 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:03,546 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 19 [2022-11-16 11:16:03,624 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:03,624 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:05,703 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:16:05,711 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:16:06,784 INFO L321 Elim1Store]: treesize reduction 168, result has 22.6 percent of original size [2022-11-16 11:16:06,784 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 169 treesize of output 113 [2022-11-16 11:16:09,954 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:09,955 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:09,955 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1608653364] [2022-11-16 11:16:09,955 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1608653364] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:09,955 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:09,955 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:16:09,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257126646] [2022-11-16 11:16:09,955 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:09,955 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:16:09,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:09,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:16:09,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=124, Unknown=1, NotChecked=0, Total=182 [2022-11-16 11:16:09,957 INFO L87 Difference]: Start difference. First operand 133 states and 327 transitions. Second operand has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:12,756 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-16 11:16:15,132 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-16 11:16:20,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:20,347 INFO L93 Difference]: Finished difference Result 190 states and 437 transitions. [2022-11-16 11:16:20,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-16 11:16:20,349 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:20,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:20,350 INFO L225 Difference]: With dead ends: 190 [2022-11-16 11:16:20,351 INFO L226 Difference]: Without dead ends: 176 [2022-11-16 11:16:20,351 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=118, Invalid=259, Unknown=3, NotChecked=0, Total=380 [2022-11-16 11:16:20,351 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 97 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 8 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 87 IncrementalHoareTripleChecker+Unchecked, 5.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:20,352 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [97 Valid, 12 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 187 Invalid, 2 Unknown, 87 Unchecked, 5.3s Time] [2022-11-16 11:16:20,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2022-11-16 11:16:20,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 137. [2022-11-16 11:16:20,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 135 states have (on average 2.5407407407407407) internal successors, (343), 136 states have internal predecessors, (343), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:20,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 343 transitions. [2022-11-16 11:16:20,356 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 343 transitions. Word has length 16 [2022-11-16 11:16:20,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:20,356 INFO L495 AbstractCegarLoop]: Abstraction has 137 states and 343 transitions. [2022-11-16 11:16:20,357 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:20,357 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 343 transitions. [2022-11-16 11:16:20,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:20,357 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:20,358 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:20,370 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (33)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:20,569 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:20,570 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:20,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:20,570 INFO L85 PathProgramCache]: Analyzing trace with hash -1048269031, now seen corresponding path program 6 times [2022-11-16 11:16:20,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:20,571 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1362105969] [2022-11-16 11:16:20,571 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-16 11:16:20,571 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:20,571 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:20,572 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:20,573 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (34)] Waiting until timeout for monitored process [2022-11-16 11:16:20,716 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 2 check-sat command(s) [2022-11-16 11:16:20,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:20,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:16:20,722 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:20,866 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:20,866 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:21,178 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:21,178 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:21,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1362105969] [2022-11-16 11:16:21,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1362105969] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:21,179 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:21,179 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2022-11-16 11:16:21,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111998091] [2022-11-16 11:16:21,179 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:21,179 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-16 11:16:21,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:21,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-16 11:16:21,180 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-16 11:16:21,180 INFO L87 Difference]: Start difference. First operand 137 states and 343 transitions. Second operand has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:22,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:22,319 INFO L93 Difference]: Finished difference Result 181 states and 436 transitions. [2022-11-16 11:16:22,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 11:16:22,320 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:22,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:22,322 INFO L225 Difference]: With dead ends: 181 [2022-11-16 11:16:22,322 INFO L226 Difference]: Without dead ends: 181 [2022-11-16 11:16:22,322 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 24 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=52, Invalid=104, Unknown=0, NotChecked=0, Total=156 [2022-11-16 11:16:22,323 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 41 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 155 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 177 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 155 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:22,323 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 6 Invalid, 177 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 155 Invalid, 0 Unknown, 19 Unchecked, 0.7s Time] [2022-11-16 11:16:22,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2022-11-16 11:16:22,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 137. [2022-11-16 11:16:22,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 135 states have (on average 2.5407407407407407) internal successors, (343), 136 states have internal predecessors, (343), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:22,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 343 transitions. [2022-11-16 11:16:22,327 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 343 transitions. Word has length 16 [2022-11-16 11:16:22,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:22,328 INFO L495 AbstractCegarLoop]: Abstraction has 137 states and 343 transitions. [2022-11-16 11:16:22,328 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:22,328 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 343 transitions. [2022-11-16 11:16:22,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:22,329 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:22,329 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:22,341 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (34)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:22,540 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:22,540 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:22,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:22,541 INFO L85 PathProgramCache]: Analyzing trace with hash 720241961, now seen corresponding path program 7 times [2022-11-16 11:16:22,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:22,541 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1994757056] [2022-11-16 11:16:22,541 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-16 11:16:22,541 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:22,541 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:22,543 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:22,544 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (35)] Waiting until timeout for monitored process [2022-11-16 11:16:22,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:16:22,695 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:16:22,696 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:22,829 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:22,830 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:22,868 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 58 [2022-11-16 11:16:22,874 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 56 [2022-11-16 11:16:23,312 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:23,312 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:23,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1994757056] [2022-11-16 11:16:23,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1994757056] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:23,313 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:23,313 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2022-11-16 11:16:23,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141691870] [2022-11-16 11:16:23,313 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:23,313 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-16 11:16:23,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:23,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-16 11:16:23,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-11-16 11:16:23,314 INFO L87 Difference]: Start difference. First operand 137 states and 343 transitions. Second operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 9 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:23,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:23,877 INFO L93 Difference]: Finished difference Result 211 states and 495 transitions. [2022-11-16 11:16:23,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 11:16:23,879 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 9 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:23,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:23,879 INFO L225 Difference]: With dead ends: 211 [2022-11-16 11:16:23,879 INFO L226 Difference]: Without dead ends: 211 [2022-11-16 11:16:23,879 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:16:23,880 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 56 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 98 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:23,880 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 6 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 144 Invalid, 0 Unknown, 98 Unchecked, 0.5s Time] [2022-11-16 11:16:23,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2022-11-16 11:16:23,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 139. [2022-11-16 11:16:23,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 137 states have (on average 2.5693430656934306) internal successors, (352), 138 states have internal predecessors, (352), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:23,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 352 transitions. [2022-11-16 11:16:23,884 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 352 transitions. Word has length 16 [2022-11-16 11:16:23,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:23,885 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 352 transitions. [2022-11-16 11:16:23,885 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 9 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:23,885 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 352 transitions. [2022-11-16 11:16:23,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:23,886 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:23,886 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:23,896 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (35)] Ended with exit code 0 [2022-11-16 11:16:24,095 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:24,095 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:24,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:24,095 INFO L85 PathProgramCache]: Analyzing trace with hash -997042964, now seen corresponding path program 4 times [2022-11-16 11:16:24,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:24,095 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2026861946] [2022-11-16 11:16:24,096 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 11:16:24,096 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:24,096 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:24,097 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:24,099 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (36)] Waiting until timeout for monitored process [2022-11-16 11:16:24,243 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 11:16:24,244 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:24,248 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 11:16:24,249 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:24,476 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 11:16:24,477 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 148 treesize of output 104 [2022-11-16 11:16:24,484 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 92 [2022-11-16 11:16:24,491 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 90 [2022-11-16 11:16:24,598 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:24,598 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:26,683 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:16:26,690 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:16:27,411 INFO L321 Elim1Store]: treesize reduction 210, result has 3.2 percent of original size [2022-11-16 11:16:27,411 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 6 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 85 treesize of output 23 [2022-11-16 11:16:27,630 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:27,630 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:27,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2026861946] [2022-11-16 11:16:27,630 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2026861946] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-16 11:16:27,630 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 11:16:27,630 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 8 [2022-11-16 11:16:27,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841367648] [2022-11-16 11:16:27,631 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 11:16:27,631 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 11:16:27,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:27,631 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 11:16:27,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=62, Unknown=1, NotChecked=0, Total=90 [2022-11-16 11:16:27,632 INFO L87 Difference]: Start difference. First operand 139 states and 352 transitions. Second operand has 6 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:31,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:31,333 INFO L93 Difference]: Finished difference Result 186 states and 456 transitions. [2022-11-16 11:16:31,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 11:16:31,335 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:31,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:31,336 INFO L225 Difference]: With dead ends: 186 [2022-11-16 11:16:31,336 INFO L226 Difference]: Without dead ends: 181 [2022-11-16 11:16:31,337 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=37, Invalid=93, Unknown=2, NotChecked=0, Total=132 [2022-11-16 11:16:31,337 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 31 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 14 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:31,337 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 14 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 141 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-16 11:16:31,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2022-11-16 11:16:31,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 142. [2022-11-16 11:16:31,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 140 states have (on average 2.585714285714286) internal successors, (362), 141 states have internal predecessors, (362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:31,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 362 transitions. [2022-11-16 11:16:31,340 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 362 transitions. Word has length 16 [2022-11-16 11:16:31,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:31,340 INFO L495 AbstractCegarLoop]: Abstraction has 142 states and 362 transitions. [2022-11-16 11:16:31,340 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:31,340 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 362 transitions. [2022-11-16 11:16:31,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:31,341 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:31,341 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:31,352 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (36)] Ended with exit code 0 [2022-11-16 11:16:31,541 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:31,541 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:31,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:31,542 INFO L85 PathProgramCache]: Analyzing trace with hash -75016763, now seen corresponding path program 8 times [2022-11-16 11:16:31,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:31,542 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [622761089] [2022-11-16 11:16:31,542 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:16:31,542 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:31,542 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:31,543 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:31,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (37)] Waiting until timeout for monitored process [2022-11-16 11:16:31,693 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:16:31,693 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:31,698 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:16:31,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:31,812 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:31,812 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:31,993 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:31,993 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:31,993 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [622761089] [2022-11-16 11:16:31,993 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [622761089] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:31,993 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:31,993 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2022-11-16 11:16:31,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653639165] [2022-11-16 11:16:31,994 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:31,994 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-16 11:16:31,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:31,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-16 11:16:31,995 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-11-16 11:16:31,995 INFO L87 Difference]: Start difference. First operand 142 states and 362 transitions. Second operand has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:32,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:32,957 INFO L93 Difference]: Finished difference Result 193 states and 461 transitions. [2022-11-16 11:16:32,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 11:16:32,958 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:32,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:32,959 INFO L225 Difference]: With dead ends: 193 [2022-11-16 11:16:32,959 INFO L226 Difference]: Without dead ends: 193 [2022-11-16 11:16:32,960 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2022-11-16 11:16:32,960 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 52 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 202 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 202 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:32,960 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [52 Valid, 12 Invalid, 206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 202 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-11-16 11:16:32,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2022-11-16 11:16:32,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 147. [2022-11-16 11:16:32,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 145 states have (on average 2.5517241379310347) internal successors, (370), 146 states have internal predecessors, (370), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:32,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 370 transitions. [2022-11-16 11:16:32,965 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 370 transitions. Word has length 16 [2022-11-16 11:16:32,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:32,965 INFO L495 AbstractCegarLoop]: Abstraction has 147 states and 370 transitions. [2022-11-16 11:16:32,965 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:32,965 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 370 transitions. [2022-11-16 11:16:32,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:32,966 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:32,966 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:32,979 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (37)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:33,178 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:33,178 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:33,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:33,179 INFO L85 PathProgramCache]: Analyzing trace with hash 1081453181, now seen corresponding path program 9 times [2022-11-16 11:16:33,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:33,179 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1037588734] [2022-11-16 11:16:33,179 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:16:33,180 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:33,180 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:33,180 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:33,182 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (38)] Waiting until timeout for monitored process [2022-11-16 11:16:33,328 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 11:16:33,328 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:33,333 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 11:16:33,334 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:33,446 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:33,446 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:33,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:33,656 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:33,656 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1037588734] [2022-11-16 11:16:33,656 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1037588734] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:33,656 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:33,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:16:33,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134593897] [2022-11-16 11:16:33,657 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:33,657 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:16:33,657 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:33,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:16:33,658 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:16:33,658 INFO L87 Difference]: Start difference. First operand 147 states and 370 transitions. Second operand has 10 states, 10 states have (on average 2.2) internal successors, (22), 10 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:34,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:34,385 INFO L93 Difference]: Finished difference Result 240 states and 609 transitions. [2022-11-16 11:16:34,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 11:16:34,386 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.2) internal successors, (22), 10 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:34,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:34,387 INFO L225 Difference]: With dead ends: 240 [2022-11-16 11:16:34,387 INFO L226 Difference]: Without dead ends: 234 [2022-11-16 11:16:34,387 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=52, Invalid=104, Unknown=0, NotChecked=0, Total=156 [2022-11-16 11:16:34,388 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 33 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 16 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 109 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:34,388 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 16 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 157 Invalid, 0 Unknown, 109 Unchecked, 0.6s Time] [2022-11-16 11:16:34,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2022-11-16 11:16:34,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 148. [2022-11-16 11:16:34,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 146 states have (on average 2.5342465753424657) internal successors, (370), 147 states have internal predecessors, (370), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:34,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 370 transitions. [2022-11-16 11:16:34,393 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 370 transitions. Word has length 16 [2022-11-16 11:16:34,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:34,393 INFO L495 AbstractCegarLoop]: Abstraction has 148 states and 370 transitions. [2022-11-16 11:16:34,394 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.2) internal successors, (22), 10 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:34,394 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 370 transitions. [2022-11-16 11:16:34,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 11:16:34,394 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:34,395 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:34,412 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (38)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:34,607 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:34,607 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:34,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:34,608 INFO L85 PathProgramCache]: Analyzing trace with hash 1692422778, now seen corresponding path program 5 times [2022-11-16 11:16:34,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:34,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1768032543] [2022-11-16 11:16:34,609 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-16 11:16:34,609 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:34,609 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:34,610 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:34,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (39)] Waiting until timeout for monitored process [2022-11-16 11:16:34,817 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:16:34,818 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:34,824 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-16 11:16:34,826 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:34,838 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-11-16 11:16:35,039 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 34 [2022-11-16 11:16:35,210 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-16 11:16:35,210 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 129 treesize of output 97 [2022-11-16 11:16:35,220 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 85 [2022-11-16 11:16:35,226 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 83 [2022-11-16 11:16:35,326 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:35,326 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:37,409 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:16:37,417 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:16:38,932 INFO L321 Elim1Store]: treesize reduction 168, result has 22.6 percent of original size [2022-11-16 11:16:38,932 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 6 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 172 treesize of output 115 [2022-11-16 11:16:38,949 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 19 [2022-11-16 11:16:39,775 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:39,775 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:39,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1768032543] [2022-11-16 11:16:39,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1768032543] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:39,775 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:39,776 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:16:39,776 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618455425] [2022-11-16 11:16:39,776 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:39,776 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:16:39,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:39,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:16:39,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=141, Unknown=2, NotChecked=0, Total=182 [2022-11-16 11:16:39,777 INFO L87 Difference]: Start difference. First operand 148 states and 370 transitions. Second operand has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:40,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:40,851 INFO L93 Difference]: Finished difference Result 190 states and 460 transitions. [2022-11-16 11:16:40,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-16 11:16:40,853 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-16 11:16:40,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:40,854 INFO L225 Difference]: With dead ends: 190 [2022-11-16 11:16:40,854 INFO L226 Difference]: Without dead ends: 185 [2022-11-16 11:16:40,854 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=71, Invalid=233, Unknown=2, NotChecked=0, Total=306 [2022-11-16 11:16:40,855 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 82 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 142 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:40,855 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [82 Valid, 19 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 130 Invalid, 0 Unknown, 142 Unchecked, 0.6s Time] [2022-11-16 11:16:40,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-11-16 11:16:40,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 150. [2022-11-16 11:16:40,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 148 states have (on average 2.527027027027027) internal successors, (374), 149 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:40,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 374 transitions. [2022-11-16 11:16:40,860 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 374 transitions. Word has length 16 [2022-11-16 11:16:40,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:40,860 INFO L495 AbstractCegarLoop]: Abstraction has 150 states and 374 transitions. [2022-11-16 11:16:40,861 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:40,861 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 374 transitions. [2022-11-16 11:16:40,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-16 11:16:40,861 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:40,862 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:40,879 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (39)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:41,074 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:41,074 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:41,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:41,074 INFO L85 PathProgramCache]: Analyzing trace with hash 1481954643, now seen corresponding path program 6 times [2022-11-16 11:16:41,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:41,075 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [468684114] [2022-11-16 11:16:41,075 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-16 11:16:41,075 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:41,075 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:41,076 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:41,078 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (40)] Waiting until timeout for monitored process [2022-11-16 11:16:41,242 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 2 check-sat command(s) [2022-11-16 11:16:41,242 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:41,249 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-16 11:16:41,250 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:41,590 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 11:16:41,604 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-16 11:16:41,894 INFO L321 Elim1Store]: treesize reduction 164, result has 7.3 percent of original size [2022-11-16 11:16:41,894 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 6 disjoint index pairs (out of 28 index pairs), introduced 12 new quantified variables, introduced 28 case distinctions, treesize of input 207 treesize of output 103 [2022-11-16 11:16:42,088 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:16:42,088 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:44,207 INFO L321 Elim1Store]: treesize reduction 522, result has 22.4 percent of original size [2022-11-16 11:16:44,207 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 16 new quantified variables, introduced 66 case distinctions, treesize of input 475 treesize of output 380 [2022-11-16 11:16:44,235 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 139 [2022-11-16 11:16:44,255 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 139 treesize of output 137 [2022-11-16 11:16:51,709 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:16:51,709 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:51,709 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [468684114] [2022-11-16 11:16:51,709 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [468684114] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:51,710 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:51,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:16:51,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317924208] [2022-11-16 11:16:51,710 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:51,710 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:16:51,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:51,711 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:16:51,711 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=137, Unknown=1, NotChecked=0, Total=182 [2022-11-16 11:16:51,711 INFO L87 Difference]: Start difference. First operand 150 states and 374 transitions. Second operand has 14 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 13 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:53,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:53,618 INFO L93 Difference]: Finished difference Result 312 states and 763 transitions. [2022-11-16 11:16:53,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 11:16:53,619 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 13 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-11-16 11:16:53,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:53,621 INFO L225 Difference]: With dead ends: 312 [2022-11-16 11:16:53,621 INFO L226 Difference]: Without dead ends: 177 [2022-11-16 11:16:53,621 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=89, Invalid=216, Unknown=1, NotChecked=0, Total=306 [2022-11-16 11:16:53,622 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 95 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 180 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 95 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 368 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 169 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:53,622 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [95 Valid, 40 Invalid, 368 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 180 Invalid, 0 Unknown, 169 Unchecked, 1.5s Time] [2022-11-16 11:16:53,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2022-11-16 11:16:53,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 155. [2022-11-16 11:16:53,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 153 states have (on average 2.3856209150326797) internal successors, (365), 154 states have internal predecessors, (365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:53,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 365 transitions. [2022-11-16 11:16:53,626 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 365 transitions. Word has length 17 [2022-11-16 11:16:53,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:53,626 INFO L495 AbstractCegarLoop]: Abstraction has 155 states and 365 transitions. [2022-11-16 11:16:53,626 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 13 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:53,627 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 365 transitions. [2022-11-16 11:16:53,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-16 11:16:53,627 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:53,627 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:53,645 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (40)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:53,840 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:53,840 INFO L420 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:53,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:53,841 INFO L85 PathProgramCache]: Analyzing trace with hash -1585990579, now seen corresponding path program 7 times [2022-11-16 11:16:53,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:53,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1785102357] [2022-11-16 11:16:53,841 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-16 11:16:53,841 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:53,841 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:53,843 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:53,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (41)] Waiting until timeout for monitored process [2022-11-16 11:16:53,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:16:53,991 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:16:53,992 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:54,152 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:54,152 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:54,392 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:54,392 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:54,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1785102357] [2022-11-16 11:16:54,393 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1785102357] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:54,393 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:54,393 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:16:54,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883433480] [2022-11-16 11:16:54,393 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:54,393 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:16:54,393 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:54,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:16:54,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:16:54,394 INFO L87 Difference]: Start difference. First operand 155 states and 365 transitions. Second operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:55,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:55,900 INFO L93 Difference]: Finished difference Result 281 states and 630 transitions. [2022-11-16 11:16:55,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-16 11:16:55,901 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-11-16 11:16:55,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:55,902 INFO L225 Difference]: With dead ends: 281 [2022-11-16 11:16:55,902 INFO L226 Difference]: Without dead ends: 269 [2022-11-16 11:16:55,903 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=87, Invalid=219, Unknown=0, NotChecked=0, Total=306 [2022-11-16 11:16:55,903 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 105 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:55,904 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 21 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-11-16 11:16:55,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2022-11-16 11:16:55,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 179. [2022-11-16 11:16:55,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 177 states have (on average 2.5028248587570623) internal successors, (443), 178 states have internal predecessors, (443), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:55,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 443 transitions. [2022-11-16 11:16:55,908 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 443 transitions. Word has length 17 [2022-11-16 11:16:55,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:55,909 INFO L495 AbstractCegarLoop]: Abstraction has 179 states and 443 transitions. [2022-11-16 11:16:55,909 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:55,909 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 443 transitions. [2022-11-16 11:16:55,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-16 11:16:55,910 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:55,910 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:55,922 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (41)] Ended with exit code 0 [2022-11-16 11:16:56,118 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:56,119 INFO L420 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:56,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:56,119 INFO L85 PathProgramCache]: Analyzing trace with hash -802651457, now seen corresponding path program 8 times [2022-11-16 11:16:56,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:56,120 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1693706853] [2022-11-16 11:16:56,120 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:16:56,120 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:56,120 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:56,121 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:56,126 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (42)] Waiting until timeout for monitored process [2022-11-16 11:16:56,279 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:16:56,279 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:56,285 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:16:56,286 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:56,454 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:56,454 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:56,792 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:56,792 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:56,792 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1693706853] [2022-11-16 11:16:56,792 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1693706853] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:56,792 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:56,792 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:16:56,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1909114736] [2022-11-16 11:16:56,793 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:16:56,793 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:16:56,793 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:16:56,793 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:16:56,793 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:16:56,794 INFO L87 Difference]: Start difference. First operand 179 states and 443 transitions. Second operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:59,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:16:59,070 INFO L93 Difference]: Finished difference Result 313 states and 694 transitions. [2022-11-16 11:16:59,071 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-16 11:16:59,071 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-11-16 11:16:59,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:16:59,073 INFO L225 Difference]: With dead ends: 313 [2022-11-16 11:16:59,073 INFO L226 Difference]: Without dead ends: 311 [2022-11-16 11:16:59,073 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=92, Invalid=288, Unknown=0, NotChecked=0, Total=380 [2022-11-16 11:16:59,073 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 90 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 369 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 386 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 369 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-11-16 11:16:59,074 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [90 Valid, 18 Invalid, 386 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 369 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-11-16 11:16:59,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2022-11-16 11:16:59,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 181. [2022-11-16 11:16:59,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 179 states have (on average 2.536312849162011) internal successors, (454), 180 states have internal predecessors, (454), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:59,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 454 transitions. [2022-11-16 11:16:59,079 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 454 transitions. Word has length 17 [2022-11-16 11:16:59,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:16:59,080 INFO L495 AbstractCegarLoop]: Abstraction has 181 states and 454 transitions. [2022-11-16 11:16:59,080 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:16:59,080 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 454 transitions. [2022-11-16 11:16:59,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-16 11:16:59,081 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:16:59,081 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:16:59,098 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (42)] Forceful destruction successful, exit code 0 [2022-11-16 11:16:59,293 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 42 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:59,294 INFO L420 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:16:59,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:16:59,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1663904571, now seen corresponding path program 9 times [2022-11-16 11:16:59,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:16:59,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [503405773] [2022-11-16 11:16:59,294 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:16:59,294 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:16:59,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:16:59,295 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:16:59,296 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (43)] Waiting until timeout for monitored process [2022-11-16 11:16:59,455 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 11:16:59,455 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:16:59,461 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:16:59,462 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:16:59,623 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:59,623 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:16:59,999 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:16:59,999 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:16:59,999 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [503405773] [2022-11-16 11:16:59,999 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [503405773] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:16:59,999 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:16:59,999 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-11-16 11:16:59,999 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1529854243] [2022-11-16 11:16:59,999 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:17:00,000 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-16 11:17:00,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:17:00,000 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-16 11:17:00,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-11-16 11:17:00,000 INFO L87 Difference]: Start difference. First operand 181 states and 454 transitions. Second operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:17:01,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:17:01,376 INFO L93 Difference]: Finished difference Result 233 states and 542 transitions. [2022-11-16 11:17:01,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-16 11:17:01,377 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-11-16 11:17:01,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:17:01,378 INFO L225 Difference]: With dead ends: 233 [2022-11-16 11:17:01,379 INFO L226 Difference]: Without dead ends: 213 [2022-11-16 11:17:01,379 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2022-11-16 11:17:01,379 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 60 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-16 11:17:01,380 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 24 Invalid, 327 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-16 11:17:01,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2022-11-16 11:17:01,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 179. [2022-11-16 11:17:01,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 177 states have (on average 2.5084745762711864) internal successors, (444), 178 states have internal predecessors, (444), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:17:01,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 444 transitions. [2022-11-16 11:17:01,385 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 444 transitions. Word has length 17 [2022-11-16 11:17:01,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:17:01,385 INFO L495 AbstractCegarLoop]: Abstraction has 179 states and 444 transitions. [2022-11-16 11:17:01,385 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:17:01,385 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 444 transitions. [2022-11-16 11:17:01,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-16 11:17:01,386 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:17:01,386 INFO L195 NwaCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:17:01,404 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (43)] Forceful destruction successful, exit code 0 [2022-11-16 11:17:01,598 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 43 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:17:01,599 INFO L420 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:17:01,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:17:01,599 INFO L85 PathProgramCache]: Analyzing trace with hash 2107161134, now seen corresponding path program 10 times [2022-11-16 11:17:01,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:17:01,599 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1880453086] [2022-11-16 11:17:01,599 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 11:17:01,599 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:17:01,599 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:17:01,600 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:17:01,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (44)] Waiting until timeout for monitored process [2022-11-16 11:17:01,756 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 11:17:01,756 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:17:01,762 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-16 11:17:01,763 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:17:01,966 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:17:01,966 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:17:02,355 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:17:02,355 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:17:02,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1880453086] [2022-11-16 11:17:02,356 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1880453086] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:17:02,356 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:17:02,356 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2022-11-16 11:17:02,356 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853770792] [2022-11-16 11:17:02,356 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:17:02,356 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:17:02,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:17:02,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:17:02,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=131, Unknown=0, NotChecked=0, Total=182 [2022-11-16 11:17:02,357 INFO L87 Difference]: Start difference. First operand 179 states and 444 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 14 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:17:05,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:17:05,001 INFO L93 Difference]: Finished difference Result 525 states and 1161 transitions. [2022-11-16 11:17:05,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-16 11:17:05,003 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 14 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-16 11:17:05,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:17:05,004 INFO L225 Difference]: With dead ends: 525 [2022-11-16 11:17:05,004 INFO L226 Difference]: Without dead ends: 473 [2022-11-16 11:17:05,005 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=188, Invalid=514, Unknown=0, NotChecked=0, Total=702 [2022-11-16 11:17:05,005 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 202 mSDsluCounter, 23 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 687 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 129 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-16 11:17:05,005 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 29 Invalid, 687 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 552 Invalid, 0 Unknown, 129 Unchecked, 1.7s Time] [2022-11-16 11:17:05,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 473 states. [2022-11-16 11:17:05,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 473 to 210. [2022-11-16 11:17:05,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 208 states have (on average 2.5865384615384617) internal successors, (538), 209 states have internal predecessors, (538), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:17:05,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 538 transitions. [2022-11-16 11:17:05,013 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 538 transitions. Word has length 18 [2022-11-16 11:17:05,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:17:05,014 INFO L495 AbstractCegarLoop]: Abstraction has 210 states and 538 transitions. [2022-11-16 11:17:05,014 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 14 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:17:05,014 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 538 transitions. [2022-11-16 11:17:05,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-16 11:17:05,015 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:17:05,015 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:17:05,027 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (44)] Ended with exit code 0 [2022-11-16 11:17:05,227 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 44 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:17:05,227 INFO L420 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:17:05,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:17:05,228 INFO L85 PathProgramCache]: Analyzing trace with hash 592813905, now seen corresponding path program 1 times [2022-11-16 11:17:05,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:17:05,228 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1205510708] [2022-11-16 11:17:05,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 11:17:05,228 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:17:05,228 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:17:05,229 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:17:05,230 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (45)] Waiting until timeout for monitored process [2022-11-16 11:17:05,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 11:17:05,457 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-16 11:17:05,459 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:17:06,322 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:17:06,323 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:17:06,326 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:17:06,327 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:17:06,329 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:17:06,331 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:17:06,332 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:17:06,899 INFO L321 Elim1Store]: treesize reduction 824, result has 4.3 percent of original size [2022-11-16 11:17:06,900 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 6 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 1720 treesize of output 324 [2022-11-16 11:17:06,929 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2022-11-16 11:17:06,937 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2022-11-16 11:17:07,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:17:07,028 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:17:07,110 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:17:07,117 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:17:12,703 INFO L321 Elim1Store]: treesize reduction 972, result has 22.7 percent of original size [2022-11-16 11:17:12,704 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 0 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 2088 treesize of output 500 [2022-11-16 11:19:10,106 WARN L233 SmtUtils]: Spent 37.08s on a formula simplification. DAG size of input: 1533 DAG size of output: 36 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 11:19:10,798 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:19:10,798 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:19:10,798 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1205510708] [2022-11-16 11:19:10,798 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1205510708] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:19:10,798 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:19:10,798 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:19:10,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2425146] [2022-11-16 11:19:10,799 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:19:10,799 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:19:10,799 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:19:10,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:19:10,800 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=131, Unknown=5, NotChecked=0, Total=182 [2022-11-16 11:19:10,800 INFO L87 Difference]: Start difference. First operand 210 states and 538 transitions. Second operand has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:19:12,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:19:12,466 INFO L93 Difference]: Finished difference Result 287 states and 747 transitions. [2022-11-16 11:19:12,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 11:19:12,467 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-16 11:19:12,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:19:12,468 INFO L225 Difference]: With dead ends: 287 [2022-11-16 11:19:12,468 INFO L226 Difference]: Without dead ends: 282 [2022-11-16 11:19:12,468 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 57.6s TimeCoverageRelationStatistics Valid=74, Invalid=227, Unknown=5, NotChecked=0, Total=306 [2022-11-16 11:19:12,468 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 34 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 100 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 11:19:12,469 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 25 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 61 Invalid, 0 Unknown, 100 Unchecked, 0.5s Time] [2022-11-16 11:19:12,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2022-11-16 11:19:12,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 261. [2022-11-16 11:19:12,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 261 states, 259 states have (on average 2.687258687258687) internal successors, (696), 260 states have internal predecessors, (696), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:19:12,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 696 transitions. [2022-11-16 11:19:12,474 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 696 transitions. Word has length 18 [2022-11-16 11:19:12,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:19:12,475 INFO L495 AbstractCegarLoop]: Abstraction has 261 states and 696 transitions. [2022-11-16 11:19:12,475 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:19:12,475 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 696 transitions. [2022-11-16 11:19:12,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-16 11:19:12,476 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:19:12,477 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:19:12,491 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (45)] Ended with exit code 0 [2022-11-16 11:19:12,687 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:19:12,687 INFO L420 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:19:12,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:19:12,687 INFO L85 PathProgramCache]: Analyzing trace with hash 787647045, now seen corresponding path program 2 times [2022-11-16 11:19:12,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:19:12,688 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [140461098] [2022-11-16 11:19:12,688 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 11:19:12,688 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:19:12,688 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:19:12,689 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:19:12,693 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (46)] Waiting until timeout for monitored process [2022-11-16 11:19:12,892 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:19:12,892 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:19:12,900 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-16 11:19:12,901 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:19:13,945 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:19:13,948 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:19:13,951 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:19:13,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:19:13,955 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:19:13,959 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:19:13,960 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:19:13,963 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:19:13,964 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:19:13,965 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:19:14,558 INFO L321 Elim1Store]: treesize reduction 824, result has 4.3 percent of original size [2022-11-16 11:19:14,558 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 6 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 1720 treesize of output 324 [2022-11-16 11:19:14,584 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2022-11-16 11:19:14,593 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2022-11-16 11:19:14,707 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:19:14,707 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:19:14,797 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:19:14,806 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:19:21,196 INFO L321 Elim1Store]: treesize reduction 972, result has 22.7 percent of original size [2022-11-16 11:19:21,197 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 0 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 2088 treesize of output 500 [2022-11-16 11:21:16,430 WARN L233 SmtUtils]: Spent 30.56s on a formula simplification. DAG size of input: 1674 DAG size of output: 37 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 11:21:17,127 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:21:17,127 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:21:17,127 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [140461098] [2022-11-16 11:21:17,128 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [140461098] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:21:17,128 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:21:17,128 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:21:17,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689680441] [2022-11-16 11:21:17,128 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:21:17,128 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:21:17,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:21:17,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:21:17,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=132, Unknown=4, NotChecked=0, Total=182 [2022-11-16 11:21:17,129 INFO L87 Difference]: Start difference. First operand 261 states and 696 transitions. Second operand has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:21:18,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:21:18,196 INFO L93 Difference]: Finished difference Result 324 states and 861 transitions. [2022-11-16 11:21:18,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 11:21:18,198 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-16 11:21:18,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:21:18,199 INFO L225 Difference]: With dead ends: 324 [2022-11-16 11:21:18,199 INFO L226 Difference]: Without dead ends: 321 [2022-11-16 11:21:18,199 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 46.8s TimeCoverageRelationStatistics Valid=61, Invalid=175, Unknown=4, NotChecked=0, Total=240 [2022-11-16 11:21:18,200 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 7 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 95 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 11:21:18,200 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 27 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 41 Invalid, 0 Unknown, 95 Unchecked, 0.3s Time] [2022-11-16 11:21:18,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2022-11-16 11:21:18,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 296. [2022-11-16 11:21:18,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 296 states, 294 states have (on average 2.748299319727891) internal successors, (808), 295 states have internal predecessors, (808), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:21:18,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 808 transitions. [2022-11-16 11:21:18,207 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 808 transitions. Word has length 18 [2022-11-16 11:21:18,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:21:18,208 INFO L495 AbstractCegarLoop]: Abstraction has 296 states and 808 transitions. [2022-11-16 11:21:18,208 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:21:18,208 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 808 transitions. [2022-11-16 11:21:18,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-16 11:21:18,209 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:21:18,209 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:21:18,227 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (46)] Forceful destruction successful, exit code 0 [2022-11-16 11:21:18,422 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 46 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:21:18,422 INFO L420 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:21:18,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:21:18,423 INFO L85 PathProgramCache]: Analyzing trace with hash 793701345, now seen corresponding path program 3 times [2022-11-16 11:21:18,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:21:18,423 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [983823339] [2022-11-16 11:21:18,423 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 11:21:18,423 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:21:18,424 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:21:18,424 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:21:18,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (47)] Waiting until timeout for monitored process [2022-11-16 11:21:18,690 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 11:21:18,690 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:21:18,701 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-16 11:21:18,703 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:21:19,668 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:21:19,671 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:21:19,675 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:21:19,678 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:21:19,679 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:21:19,682 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:21:19,685 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:21:19,689 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:21:19,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:21:19,691 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:21:20,315 INFO L321 Elim1Store]: treesize reduction 824, result has 4.3 percent of original size [2022-11-16 11:21:20,316 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 6 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 1720 treesize of output 324 [2022-11-16 11:21:20,337 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2022-11-16 11:21:20,346 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2022-11-16 11:21:20,483 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:21:20,483 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:21:20,578 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:21:20,586 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:21:26,889 INFO L321 Elim1Store]: treesize reduction 972, result has 22.7 percent of original size [2022-11-16 11:21:26,890 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 0 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 2088 treesize of output 500 [2022-11-16 11:23:19,969 WARN L233 SmtUtils]: Spent 28.44s on a formula simplification. DAG size of input: 1437 DAG size of output: 36 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 11:23:20,676 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:23:20,676 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:23:20,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [983823339] [2022-11-16 11:23:20,676 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [983823339] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:23:20,676 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:23:20,677 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:23:20,677 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [713715566] [2022-11-16 11:23:20,677 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:23:20,677 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:23:20,677 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:23:20,677 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:23:20,677 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=131, Unknown=5, NotChecked=0, Total=182 [2022-11-16 11:23:20,678 INFO L87 Difference]: Start difference. First operand 296 states and 808 transitions. Second operand has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:23:22,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:23:22,377 INFO L93 Difference]: Finished difference Result 337 states and 900 transitions. [2022-11-16 11:23:22,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-16 11:23:22,380 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-16 11:23:22,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:23:22,382 INFO L225 Difference]: With dead ends: 337 [2022-11-16 11:23:22,382 INFO L226 Difference]: Without dead ends: 325 [2022-11-16 11:23:22,382 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 47.2s TimeCoverageRelationStatistics Valid=88, Invalid=249, Unknown=5, NotChecked=0, Total=342 [2022-11-16 11:23:22,383 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 20 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 223 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 139 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 11:23:22,383 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 33 Invalid, 223 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 83 Invalid, 0 Unknown, 139 Unchecked, 0.6s Time] [2022-11-16 11:23:22,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2022-11-16 11:23:22,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 257. [2022-11-16 11:23:22,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 257 states, 255 states have (on average 2.6941176470588237) internal successors, (687), 256 states have internal predecessors, (687), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:23:22,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 687 transitions. [2022-11-16 11:23:22,388 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 687 transitions. Word has length 18 [2022-11-16 11:23:22,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:23:22,388 INFO L495 AbstractCegarLoop]: Abstraction has 257 states and 687 transitions. [2022-11-16 11:23:22,389 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:23:22,389 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 687 transitions. [2022-11-16 11:23:22,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-16 11:23:22,390 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:23:22,390 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:23:22,402 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (47)] Ended with exit code 0 [2022-11-16 11:23:22,602 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 47 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:23:22,602 INFO L420 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:23:22,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:23:22,602 INFO L85 PathProgramCache]: Analyzing trace with hash -1397126447, now seen corresponding path program 4 times [2022-11-16 11:23:22,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:23:22,603 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2023959705] [2022-11-16 11:23:22,603 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-16 11:23:22,603 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:23:22,603 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:23:22,604 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:23:22,606 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (48)] Waiting until timeout for monitored process [2022-11-16 11:23:22,793 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-16 11:23:22,793 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:23:22,801 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-16 11:23:22,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:23:23,714 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:23:23,718 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:23:23,722 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:23:23,724 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:23:23,725 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:23:23,729 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:23:23,733 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:23:23,735 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:23:23,737 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:23:24,421 INFO L321 Elim1Store]: treesize reduction 824, result has 4.3 percent of original size [2022-11-16 11:23:24,421 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 6 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 1720 treesize of output 324 [2022-11-16 11:23:24,444 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2022-11-16 11:23:24,454 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2022-11-16 11:23:24,632 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:23:24,632 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:23:24,731 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:23:24,739 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:23:31,331 INFO L321 Elim1Store]: treesize reduction 972, result has 22.7 percent of original size [2022-11-16 11:23:31,332 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 0 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 2088 treesize of output 500 [2022-11-16 11:25:51,747 WARN L233 SmtUtils]: Spent 1.01m on a formula simplification. DAG size of input: 1680 DAG size of output: 33 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 11:25:52,509 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-16 11:25:52,509 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-16 11:25:52,509 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2023959705] [2022-11-16 11:25:52,509 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2023959705] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 11:25:52,509 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-16 11:25:52,509 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 12 [2022-11-16 11:25:52,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430629053] [2022-11-16 11:25:52,509 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-16 11:25:52,510 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 11:25:52,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-16 11:25:52,510 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 11:25:52,510 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=133, Unknown=3, NotChecked=0, Total=182 [2022-11-16 11:25:52,510 INFO L87 Difference]: Start difference. First operand 257 states and 687 transitions. Second operand has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:25:53,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 11:25:53,912 INFO L93 Difference]: Finished difference Result 312 states and 836 transitions. [2022-11-16 11:25:53,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-16 11:25:53,913 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-16 11:25:53,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 11:25:53,916 INFO L225 Difference]: With dead ends: 312 [2022-11-16 11:25:53,916 INFO L226 Difference]: Without dead ends: 308 [2022-11-16 11:25:53,916 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 78.5s TimeCoverageRelationStatistics Valid=74, Invalid=229, Unknown=3, NotChecked=0, Total=306 [2022-11-16 11:25:53,919 INFO L413 NwaCegarLoop]: 3 mSDtfsCounter, 5 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 120 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 49 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 11:25:53,919 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 24 Invalid, 120 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 49 Unchecked, 0.5s Time] [2022-11-16 11:25:53,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2022-11-16 11:25:53,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 288. [2022-11-16 11:25:53,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 288 states, 286 states have (on average 2.762237762237762) internal successors, (790), 287 states have internal predecessors, (790), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:25:53,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 790 transitions. [2022-11-16 11:25:53,926 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 790 transitions. Word has length 18 [2022-11-16 11:25:53,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 11:25:53,927 INFO L495 AbstractCegarLoop]: Abstraction has 288 states and 790 transitions. [2022-11-16 11:25:53,927 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.769230769230769) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 11:25:53,927 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 790 transitions. [2022-11-16 11:25:53,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-16 11:25:53,928 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 11:25:53,928 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 11:25:53,946 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (48)] Forceful destruction successful, exit code 0 [2022-11-16 11:25:54,128 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 48 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:25:54,129 INFO L420 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_LEAK === [thread1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, thread2Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 27 more)] === [2022-11-16 11:25:54,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 11:25:54,129 INFO L85 PathProgramCache]: Analyzing trace with hash -1596226427, now seen corresponding path program 5 times [2022-11-16 11:25:54,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-16 11:25:54,129 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [705826331] [2022-11-16 11:25:54,129 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-16 11:25:54,129 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 11:25:54,129 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat [2022-11-16 11:25:54,130 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 11:25:54,131 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81ad0d8a-d6c9-4faa-b703-418bc786b051/bin/uautomizer-tPACEb0tL8/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (49)] Waiting until timeout for monitored process [2022-11-16 11:25:54,416 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 11:25:54,416 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 11:25:54,426 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-16 11:25:54,428 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 11:25:55,799 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,802 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,803 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:25:55,806 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,809 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,813 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,816 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,819 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,820 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:25:55,824 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-16 11:25:55,825 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:25:55,826 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-16 11:25:56,491 INFO L321 Elim1Store]: treesize reduction 824, result has 4.3 percent of original size [2022-11-16 11:25:56,492 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 6 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 1720 treesize of output 324 [2022-11-16 11:25:56,517 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2022-11-16 11:25:56,528 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2022-11-16 11:25:56,674 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 11:25:56,675 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 11:25:56,779 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 174 [2022-11-16 11:25:56,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 172 [2022-11-16 11:26:03,621 WARN L233 SmtUtils]: Spent 5.00s on a formula simplification. DAG size of input: 471 DAG size of output: 135 (called from [L 318] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.arrays.Elim1Store.elim1) [2022-11-16 11:26:03,622 INFO L321 Elim1Store]: treesize reduction 972, result has 22.7 percent of original size [2022-11-16 11:26:03,623 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 16 select indices, 16 select index equivalence classes, 0 disjoint index pairs (out of 120 index pairs), introduced 24 new quantified variables, introduced 120 case distinctions, treesize of input 2088 treesize of output 500