./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:12:43,824 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:12:43,826 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:12:43,847 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:12:43,847 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:12:43,848 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:12:43,850 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:12:43,851 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:12:43,853 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:12:43,854 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:12:43,855 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:12:43,856 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:12:43,857 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:12:43,858 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:12:43,859 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:12:43,860 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:12:43,861 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:12:43,862 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:12:43,864 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:12:43,865 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:12:43,867 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:12:43,868 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:12:43,869 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:12:43,870 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:12:43,874 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:12:43,874 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:12:43,875 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:12:43,876 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:12:43,876 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:12:43,877 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:12:43,877 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:12:43,878 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:12:43,879 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:12:43,880 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:12:43,881 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:12:43,881 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:12:43,882 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:12:43,883 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:12:43,883 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:12:43,884 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:12:43,885 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:12:43,886 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-11-18 20:12:43,907 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:12:43,907 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:12:43,908 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:12:43,908 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:12:43,909 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:12:43,909 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:12:43,909 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:12:43,910 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 20:12:43,910 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 20:12:43,910 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 20:12:43,910 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 20:12:43,911 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 20:12:43,911 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 20:12:43,911 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:12:43,911 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:12:43,912 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:12:43,912 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:12:43,912 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 20:12:43,912 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 20:12:43,912 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 20:12:43,913 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:12:43,913 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 20:12:43,913 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:12:43,913 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 20:12:43,914 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:12:43,914 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:12:43,914 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:12:43,914 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:12:43,915 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 20:12:43,916 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 [2022-11-18 20:12:44,197 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:12:44,223 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:12:44,226 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:12:44,227 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:12:44,231 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:12:44,232 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2022-11-18 20:12:44,321 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/data/0d0b6e9d6/4155c7dcb2514ea3abf3783f7dc2e883/FLAGc5d88d113 [2022-11-18 20:12:44,969 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:12:44,970 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2022-11-18 20:12:44,994 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/data/0d0b6e9d6/4155c7dcb2514ea3abf3783f7dc2e883/FLAGc5d88d113 [2022-11-18 20:12:45,313 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/data/0d0b6e9d6/4155c7dcb2514ea3abf3783f7dc2e883 [2022-11-18 20:12:45,315 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:12:45,317 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:12:45,318 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:12:45,318 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:12:45,322 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:12:45,323 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,324 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@699caf54 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45, skipping insertion in model container [2022-11-18 20:12:45,324 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,332 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:12:45,361 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:12:45,662 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:12:45,676 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:12:45,742 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:12:45,767 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:12:45,768 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45 WrapperNode [2022-11-18 20:12:45,768 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:12:45,769 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:12:45,770 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:12:45,770 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:12:45,778 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,789 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,810 INFO L138 Inliner]: procedures = 110, calls = 24, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 68 [2022-11-18 20:12:45,810 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:12:45,811 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:12:45,811 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:12:45,812 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:12:45,821 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,822 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,825 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,825 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,829 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,833 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,834 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,836 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,838 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:12:45,839 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:12:45,839 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:12:45,839 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:12:45,840 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (1/1) ... [2022-11-18 20:12:45,848 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:45,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:45,874 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:45,889 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 20:12:45,926 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 20:12:45,927 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 20:12:45,927 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:12:45,927 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:12:45,927 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:12:45,927 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:12:46,102 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:12:46,104 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:12:46,364 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:12:46,369 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:12:46,370 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 20:12:46,371 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:12:46 BoogieIcfgContainer [2022-11-18 20:12:46,372 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:12:46,373 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 20:12:46,373 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 20:12:46,383 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 20:12:46,384 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:12:46,384 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 08:12:45" (1/3) ... [2022-11-18 20:12:46,385 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@78ad8d6a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:12:46, skipping insertion in model container [2022-11-18 20:12:46,385 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:12:46,385 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:12:45" (2/3) ... [2022-11-18 20:12:46,386 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@78ad8d6a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:12:46, skipping insertion in model container [2022-11-18 20:12:46,386 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:12:46,386 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:12:46" (3/3) ... [2022-11-18 20:12:46,387 INFO L332 chiAutomizerObserver]: Analyzing ICFG GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2022-11-18 20:12:46,464 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 20:12:46,465 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 20:12:46,465 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 20:12:46,465 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 20:12:46,465 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 20:12:46,466 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 20:12:46,466 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 20:12:46,466 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 20:12:46,471 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:46,490 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:46,490 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:12:46,491 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:12:46,496 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-18 20:12:46,496 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 20:12:46,497 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 20:12:46,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:46,500 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:46,501 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:12:46,501 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:12:46,501 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-18 20:12:46,501 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 20:12:46,510 INFO L748 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 12#L552true assume !main_#t~short9#1; 2#L552-2true assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 8#L556-2true [2022-11-18 20:12:46,510 INFO L750 eck$LassoCheckResult]: Loop: 8#L556-2true call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 11#L555-1true assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7#L556true assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 8#L556-2true [2022-11-18 20:12:46,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:46,522 INFO L85 PathProgramCache]: Analyzing trace with hash 925671, now seen corresponding path program 1 times [2022-11-18 20:12:46,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:46,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145996376] [2022-11-18 20:12:46,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:46,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:46,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:46,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:46,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:46,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145996376] [2022-11-18 20:12:46,822 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1145996376] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:12:46,823 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:12:46,824 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:12:46,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427705218] [2022-11-18 20:12:46,826 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:12:46,832 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:12:46,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:46,835 INFO L85 PathProgramCache]: Analyzing trace with hash 45842, now seen corresponding path program 1 times [2022-11-18 20:12:46,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:46,836 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609777983] [2022-11-18 20:12:46,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:46,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:46,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:46,875 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:46,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:46,924 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:47,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:47,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:12:47,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:12:47,192 INFO L87 Difference]: Start difference. First operand has 12 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:47,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:47,213 INFO L93 Difference]: Finished difference Result 13 states and 16 transitions. [2022-11-18 20:12:47,215 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 16 transitions. [2022-11-18 20:12:47,216 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:47,219 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 7 states and 8 transitions. [2022-11-18 20:12:47,220 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:12:47,220 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:12:47,221 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2022-11-18 20:12:47,221 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:12:47,221 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-11-18 20:12:47,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2022-11-18 20:12:47,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2022-11-18 20:12:47,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:47,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2022-11-18 20:12:47,246 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-11-18 20:12:47,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:12:47,250 INFO L428 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-11-18 20:12:47,251 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 20:12:47,251 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2022-11-18 20:12:47,251 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:47,252 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:12:47,252 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:12:47,252 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-18 20:12:47,252 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 20:12:47,253 INFO L748 eck$LassoCheckResult]: Stem: 36#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 37#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 40#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 34#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 35#L556-2 [2022-11-18 20:12:47,253 INFO L750 eck$LassoCheckResult]: Loop: 35#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 39#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 38#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 35#L556-2 [2022-11-18 20:12:47,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:47,253 INFO L85 PathProgramCache]: Analyzing trace with hash 925609, now seen corresponding path program 1 times [2022-11-18 20:12:47,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:47,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919404159] [2022-11-18 20:12:47,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:47,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:47,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:47,286 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:47,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:47,311 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:47,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:47,312 INFO L85 PathProgramCache]: Analyzing trace with hash 45842, now seen corresponding path program 2 times [2022-11-18 20:12:47,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:47,312 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997397851] [2022-11-18 20:12:47,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:47,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:47,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:47,323 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:47,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:47,334 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:47,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:47,339 INFO L85 PathProgramCache]: Analyzing trace with hash 1805029994, now seen corresponding path program 1 times [2022-11-18 20:12:47,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:47,340 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706982987] [2022-11-18 20:12:47,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:47,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:47,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:47,425 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:47,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:47,475 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:48,726 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:12:48,727 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:12:48,727 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:12:48,727 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:12:48,727 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 20:12:48,727 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:48,728 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:12:48,728 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:12:48,728 INFO L133 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration2_Lasso [2022-11-18 20:12:48,728 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:12:48,728 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:12:48,747 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,774 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,777 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,781 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,783 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,785 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,788 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,790 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,793 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,796 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,798 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,801 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,803 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,806 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,808 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,811 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,813 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,815 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,817 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:48,820 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:49,482 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:50,040 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 20:12:50,045 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 20:12:50,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,047 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,055 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,065 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,075 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-18 20:12:50,077 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,078 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,078 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,078 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,079 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,080 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,081 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,091 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,099 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,100 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,104 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,107 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,120 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,120 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,120 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,120 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,120 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,120 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-18 20:12:50,126 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,127 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,140 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,145 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,146 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,147 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,149 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-18 20:12:50,151 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,162 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,163 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,163 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,163 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,167 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,167 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,178 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,183 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,183 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,184 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,185 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,195 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,208 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-18 20:12:50,209 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,209 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,209 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,209 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,209 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,210 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,211 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,220 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,233 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,234 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,234 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,235 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,248 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,261 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-18 20:12:50,261 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,261 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,262 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,262 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,262 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,263 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,263 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,277 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,280 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,280 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,281 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,282 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,283 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-18 20:12:50,284 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,294 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,295 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,295 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,295 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,298 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,298 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,303 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,306 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,306 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,306 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,308 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,315 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-18 20:12:50,323 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,333 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,333 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,334 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,334 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,334 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,335 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,335 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,342 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,351 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-11-18 20:12:50,351 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,351 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,352 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-18 20:12:50,363 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,373 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,373 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,373 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,373 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,376 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,376 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,380 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,391 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,391 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,392 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,393 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,395 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-18 20:12:50,396 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,408 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,408 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,408 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,409 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2022-11-18 20:12:50,409 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,413 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2022-11-18 20:12:50,413 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,422 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,427 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2022-11-18 20:12:50,427 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,428 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,429 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,435 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-18 20:12:50,436 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,446 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,446 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,446 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,447 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,447 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,447 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,447 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,451 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,454 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,455 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,455 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,456 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-18 20:12:50,459 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,469 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,469 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,469 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,470 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,470 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,470 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,470 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,473 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,480 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,480 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,480 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,481 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,483 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-18 20:12:50,484 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,494 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,494 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,494 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,494 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,495 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,495 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,495 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,522 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,525 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,526 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,526 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,527 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,530 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-18 20:12:50,531 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,541 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,541 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,541 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,541 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,544 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,544 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,566 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,575 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,576 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,593 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,605 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,605 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,605 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,605 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,609 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,609 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,610 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-18 20:12:50,620 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,628 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,628 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,629 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,630 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,638 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,650 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,650 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,651 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,651 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,651 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,652 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,652 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,655 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-18 20:12:50,655 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,659 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,659 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,659 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,663 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,671 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,683 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,683 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,684 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,684 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,684 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,684 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,684 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-18 20:12:50,690 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,698 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,698 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,702 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,718 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-11-18 20:12:50,718 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,731 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,731 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,731 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,731 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,731 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,732 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,732 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,741 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,749 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,751 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,760 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,772 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,772 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:50,772 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,772 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,772 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,773 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:50,773 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:50,774 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-11-18 20:12:50,793 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,800 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,800 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,800 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,801 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,809 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-11-18 20:12:50,809 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,819 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,819 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,819 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,819 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,821 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,821 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,838 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,843 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,843 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,844 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,845 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-11-18 20:12:50,847 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,857 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,857 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,857 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,857 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,861 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,861 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,886 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,892 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,894 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-11-18 20:12:50,897 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,907 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,907 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,907 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,907 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,911 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,911 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,946 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,950 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2022-11-18 20:12:50,950 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,950 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,951 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,955 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:50,967 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:50,967 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:50,968 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:50,968 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:50,970 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:50,970 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:50,974 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2022-11-18 20:12:50,981 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:50,987 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:50,987 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:50,987 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:50,988 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:50,995 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:51,007 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:51,008 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:51,008 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:51,008 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:51,010 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2022-11-18 20:12:51,012 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:51,012 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:51,030 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:51,040 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:51,041 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:51,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:51,042 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:51,046 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:51,046 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2022-11-18 20:12:51,058 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:51,058 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:51,058 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:51,058 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:51,065 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:51,065 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:51,094 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:51,102 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:51,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:51,103 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:51,104 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:51,108 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:51,120 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:51,120 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:51,121 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2022-11-18 20:12:51,121 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:51,126 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2022-11-18 20:12:51,149 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2022-11-18 20:12:51,149 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2022-11-18 20:12:51,184 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 20:12:51,277 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2022-11-18 20:12:51,277 INFO L444 ModelExtractionUtils]: 4 out of 21 variables were initially zero. Simplification set additionally 14 variables to zero. [2022-11-18 20:12:51,278 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:51,279 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:51,295 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:51,308 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 20:12:51,319 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2022-11-18 20:12:51,345 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2022-11-18 20:12:51,345 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 20:12:51,345 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_1, v_rep(select (select #memory_int ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1) = -1*v_rep(select (select #memory_int ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_1 + 1*v_rep(select (select #memory_int ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1 Supporting invariants [] [2022-11-18 20:12:51,354 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:51,481 INFO L156 tatePredicateManager]: 24 out of 24 supporting invariants were superfluous and have been removed [2022-11-18 20:12:51,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:51,538 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:51,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:51,562 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:12:51,563 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:51,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:51,589 INFO L263 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-18 20:12:51,590 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:51,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:51,621 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 20:12:51,622 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:51,661 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 7 states and 8 transitions. cyclomatic complexity: 2. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 13 states and 16 transitions. Complement of second has 7 states. [2022-11-18 20:12:51,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 20:12:51,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:51,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 7 transitions. [2022-11-18 20:12:51,666 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 7 transitions. Stem has 4 letters. Loop has 3 letters. [2022-11-18 20:12:51,667 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:12:51,667 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 7 transitions. Stem has 7 letters. Loop has 3 letters. [2022-11-18 20:12:51,667 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:12:51,667 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 7 transitions. Stem has 4 letters. Loop has 6 letters. [2022-11-18 20:12:51,668 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:12:51,668 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 16 transitions. [2022-11-18 20:12:51,669 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:51,669 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 16 transitions. [2022-11-18 20:12:51,669 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2022-11-18 20:12:51,670 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 20:12:51,670 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 16 transitions. [2022-11-18 20:12:51,670 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:12:51,670 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 16 transitions. [2022-11-18 20:12:51,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 16 transitions. [2022-11-18 20:12:51,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-11-18 20:12:51,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 12 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:51,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 16 transitions. [2022-11-18 20:12:51,673 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13 states and 16 transitions. [2022-11-18 20:12:51,673 INFO L428 stractBuchiCegarLoop]: Abstraction has 13 states and 16 transitions. [2022-11-18 20:12:51,673 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 20:12:51,673 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 16 transitions. [2022-11-18 20:12:51,674 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:51,674 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:12:51,674 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:12:51,674 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:51,675 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 20:12:51,675 INFO L748 eck$LassoCheckResult]: Stem: 196#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 197#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 205#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 194#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 195#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 204#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 198#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 199#L556-2 [2022-11-18 20:12:51,675 INFO L750 eck$LassoCheckResult]: Loop: 199#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 202#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 206#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 199#L556-2 [2022-11-18 20:12:51,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:51,676 INFO L85 PathProgramCache]: Analyzing trace with hash 1805029996, now seen corresponding path program 1 times [2022-11-18 20:12:51,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:51,676 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161079567] [2022-11-18 20:12:51,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:51,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:51,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:51,741 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:51,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:51,780 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:51,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:51,781 INFO L85 PathProgramCache]: Analyzing trace with hash 45842, now seen corresponding path program 3 times [2022-11-18 20:12:51,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:51,781 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588744329] [2022-11-18 20:12:51,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:51,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:51,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:51,788 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:51,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:51,794 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:51,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:51,795 INFO L85 PathProgramCache]: Analyzing trace with hash 658080967, now seen corresponding path program 1 times [2022-11-18 20:12:51,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:51,796 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285993667] [2022-11-18 20:12:51,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:51,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:51,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:51,823 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:51,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:51,847 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:53,480 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:12:53,480 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:12:53,480 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:12:53,481 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:12:53,481 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 20:12:53,481 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:53,481 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:12:53,481 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:12:53,481 INFO L133 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration3_Lasso [2022-11-18 20:12:53,481 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:12:53,481 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:12:53,508 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,511 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,514 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,520 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,523 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,525 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,528 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,530 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,533 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,535 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,538 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,541 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:53,544 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,188 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,204 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,207 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,210 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,212 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,214 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,217 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,220 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:12:54,749 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 20:12:54,749 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 20:12:54,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:54,749 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:54,753 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:54,761 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2022-11-18 20:12:54,762 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:54,772 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:54,772 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:54,772 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:54,772 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:54,772 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:54,773 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:54,773 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:54,774 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:54,776 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2022-11-18 20:12:54,777 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:54,777 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:54,778 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:54,781 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2022-11-18 20:12:54,783 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:54,792 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:54,793 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:54,793 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:54,793 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:54,795 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:54,795 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:54,822 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:54,830 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:54,831 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:54,831 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:54,832 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:54,839 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:54,852 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:54,852 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:54,852 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:54,852 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:54,852 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:54,853 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:54,853 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:54,854 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2022-11-18 20:12:54,874 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:54,883 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:54,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:54,883 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:54,884 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:54,887 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2022-11-18 20:12:54,887 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:54,899 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:54,899 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:54,899 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:54,899 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:54,900 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:54,900 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:54,900 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:54,909 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:54,917 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:54,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:54,918 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:54,919 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:54,922 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:54,935 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:54,935 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:54,935 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:54,935 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:54,936 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2022-11-18 20:12:54,937 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:54,937 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:54,954 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:54,963 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:54,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:54,963 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:54,964 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:54,968 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:54,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2022-11-18 20:12:54,981 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:54,981 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:54,982 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:54,982 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2022-11-18 20:12:54,982 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:54,983 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2022-11-18 20:12:54,983 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:55,002 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,011 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,011 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,011 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,012 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,016 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,027 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2022-11-18 20:12:55,028 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,028 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:55,029 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,029 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,029 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,029 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:55,029 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:55,038 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,041 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,042 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,042 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,045 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,049 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2022-11-18 20:12:55,059 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,059 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,059 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,060 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,061 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:55,061 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:55,073 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,079 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,080 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,087 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,099 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,099 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:55,100 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,100 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,100 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,100 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:55,100 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:55,102 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2022-11-18 20:12:55,113 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,139 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,140 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2022-11-18 20:12:55,144 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,153 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,154 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:55,154 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,154 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,154 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,154 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:55,155 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:55,156 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,160 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2022-11-18 20:12:55,165 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,174 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,174 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:55,175 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,175 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,175 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,175 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:55,175 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:55,176 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,179 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2022-11-18 20:12:55,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,183 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,184 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2022-11-18 20:12:55,184 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,194 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,194 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:12:55,194 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,194 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,195 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,195 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:12:55,195 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:12:55,196 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,203 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,203 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,204 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,207 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2022-11-18 20:12:55,208 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,218 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,218 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,218 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,218 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,221 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:55,221 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:55,246 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,259 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,260 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,261 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2022-11-18 20:12:55,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,278 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,279 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,279 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,279 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,281 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:55,282 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:55,298 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,308 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,309 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,310 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,315 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,327 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,328 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,328 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,328 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,329 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2022-11-18 20:12:55,333 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:55,333 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:55,354 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,358 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,358 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,359 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,363 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,375 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,375 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,375 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,375 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,377 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:55,377 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:55,378 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2022-11-18 20:12:55,394 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,398 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,400 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,403 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2022-11-18 20:12:55,404 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,414 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,414 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,415 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:12:55,415 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,429 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:12:55,429 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:12:55,453 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:12:55,457 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,459 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,464 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:12:55,478 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:12:55,478 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:12:55,478 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2022-11-18 20:12:55,478 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:12:55,479 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2022-11-18 20:12:55,493 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2022-11-18 20:12:55,493 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2022-11-18 20:12:55,525 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 20:12:55,564 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2022-11-18 20:12:55,564 INFO L444 ModelExtractionUtils]: 7 out of 21 variables were initially zero. Simplification set additionally 11 variables to zero. [2022-11-18 20:12:55,564 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:12:55,565 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:55,567 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:12:55,571 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 20:12:55,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2022-11-18 20:12:55,584 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2022-11-18 20:12:55,584 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 20:12:55,584 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_2, v_rep(select (select #memory_int ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2) = 1*v_rep(select (select #memory_int ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_2 - 1*v_rep(select (select #memory_int ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2 Supporting invariants [] [2022-11-18 20:12:55,587 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,699 INFO L156 tatePredicateManager]: 24 out of 24 supporting invariants were superfluous and have been removed [2022-11-18 20:12:55,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:55,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:55,747 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:12:55,748 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:55,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:55,767 INFO L263 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-18 20:12:55,767 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:55,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:55,798 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 20:12:55,798 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 13 states and 16 transitions. cyclomatic complexity: 5 Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:55,823 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 13 states and 16 transitions. cyclomatic complexity: 5. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 19 states and 24 transitions. Complement of second has 7 states. [2022-11-18 20:12:55,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 20:12:55,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:55,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2022-11-18 20:12:55,826 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 7 letters. Loop has 3 letters. [2022-11-18 20:12:55,826 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:12:55,827 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 10 letters. Loop has 3 letters. [2022-11-18 20:12:55,827 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:12:55,827 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 7 letters. Loop has 6 letters. [2022-11-18 20:12:55,827 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:12:55,828 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 24 transitions. [2022-11-18 20:12:55,833 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:55,833 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 24 transitions. [2022-11-18 20:12:55,834 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2022-11-18 20:12:55,835 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2022-11-18 20:12:55,835 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 24 transitions. [2022-11-18 20:12:55,835 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:12:55,836 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2022-11-18 20:12:55,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 24 transitions. [2022-11-18 20:12:55,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-11-18 20:12:55,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:55,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2022-11-18 20:12:55,842 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2022-11-18 20:12:55,842 INFO L428 stractBuchiCegarLoop]: Abstraction has 19 states and 24 transitions. [2022-11-18 20:12:55,842 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 20:12:55,842 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 24 transitions. [2022-11-18 20:12:55,843 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-18 20:12:55,843 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:12:55,843 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:12:55,844 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1] [2022-11-18 20:12:55,844 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 20:12:55,844 INFO L748 eck$LassoCheckResult]: Stem: 377#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 378#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 386#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 375#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 376#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 390#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 388#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 387#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 385#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 379#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 380#L556-2 [2022-11-18 20:12:55,845 INFO L750 eck$LassoCheckResult]: Loop: 380#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 383#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 389#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 380#L556-2 [2022-11-18 20:12:55,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:55,845 INFO L85 PathProgramCache]: Analyzing trace with hash 658080969, now seen corresponding path program 2 times [2022-11-18 20:12:55,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:55,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915016286] [2022-11-18 20:12:55,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:55,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:55,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:56,344 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:56,435 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:56,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:56,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915016286] [2022-11-18 20:12:56,436 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1915016286] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:56,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2080285405] [2022-11-18 20:12:56,437 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:12:56,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:56,437 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:56,439 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:12:56,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2022-11-18 20:12:56,553 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:12:56,554 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:12:56,555 INFO L263 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 25 conjunts are in the unsatisfiable core [2022-11-18 20:12:56,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:56,641 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:12:56,641 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:12:56,679 INFO L321 Elim1Store]: treesize reduction 26, result has 42.2 percent of original size [2022-11-18 20:12:56,680 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 74 [2022-11-18 20:12:56,689 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:12:56,703 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-18 20:12:56,758 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:12:56,760 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 9 [2022-11-18 20:12:56,763 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:12:57,173 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-18 20:12:57,174 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-18 20:12:57,202 INFO L321 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2022-11-18 20:12:57,202 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 79 treesize of output 74 [2022-11-18 20:12:57,223 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:12:57,244 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2022-11-18 20:12:57,271 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 20:12:57,306 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-11-18 20:12:57,323 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:57,323 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:12:57,504 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:57,504 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2080285405] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:12:57,504 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:12:57,504 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 14 [2022-11-18 20:12:57,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451262773] [2022-11-18 20:12:57,505 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:12:57,505 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:12:57,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:57,506 INFO L85 PathProgramCache]: Analyzing trace with hash 45842, now seen corresponding path program 4 times [2022-11-18 20:12:57,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:57,506 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650440805] [2022-11-18 20:12:57,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:57,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:57,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:57,519 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:57,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:57,532 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:12:57,651 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:57,652 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-18 20:12:57,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=160, Unknown=6, NotChecked=0, Total=210 [2022-11-18 20:12:57,652 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. cyclomatic complexity: 8 Second operand has 15 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 15 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:57,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:57,733 INFO L93 Difference]: Finished difference Result 26 states and 30 transitions. [2022-11-18 20:12:57,734 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 30 transitions. [2022-11-18 20:12:57,734 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2022-11-18 20:12:57,735 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 24 states and 28 transitions. [2022-11-18 20:12:57,735 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2022-11-18 20:12:57,735 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-11-18 20:12:57,735 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 28 transitions. [2022-11-18 20:12:57,735 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:12:57,735 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 28 transitions. [2022-11-18 20:12:57,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 28 transitions. [2022-11-18 20:12:57,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 22. [2022-11-18 20:12:57,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.1818181818181819) internal successors, (26), 21 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:57,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2022-11-18 20:12:57,737 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 26 transitions. [2022-11-18 20:12:57,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 20:12:57,741 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 26 transitions. [2022-11-18 20:12:57,741 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 20:12:57,741 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 26 transitions. [2022-11-18 20:12:57,741 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2022-11-18 20:12:57,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:12:57,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:12:57,743 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1] [2022-11-18 20:12:57,744 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1] [2022-11-18 20:12:57,744 INFO L748 eck$LassoCheckResult]: Stem: 496#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 497#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 505#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 494#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 495#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 508#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 507#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 506#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 503#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 500#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 501#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 504#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 498#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 499#L556-2 [2022-11-18 20:12:57,745 INFO L750 eck$LassoCheckResult]: Loop: 499#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 502#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 512#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 513#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 515#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 514#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 499#L556-2 [2022-11-18 20:12:57,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:57,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1635602290, now seen corresponding path program 2 times [2022-11-18 20:12:57,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:57,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138506322] [2022-11-18 20:12:57,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:57,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:57,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:58,489 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:58,490 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:58,490 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138506322] [2022-11-18 20:12:58,490 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [138506322] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:58,490 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1397649814] [2022-11-18 20:12:58,490 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:12:58,490 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:58,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:58,494 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:12:58,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2022-11-18 20:12:58,609 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:12:58,609 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:12:58,611 INFO L263 TraceCheckSpWp]: Trace formula consists of 210 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-18 20:12:58,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:58,654 INFO L321 Elim1Store]: treesize reduction 13, result has 58.1 percent of original size [2022-11-18 20:12:58,654 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 54 [2022-11-18 20:12:58,681 INFO L321 Elim1Store]: treesize reduction 35, result has 34.0 percent of original size [2022-11-18 20:12:58,682 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 71 [2022-11-18 20:12:58,693 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:12:58,713 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-18 20:12:58,727 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 25 [2022-11-18 20:12:58,748 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:12:58,754 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:12:58,773 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:12:58,778 INFO L321 Elim1Store]: treesize reduction 4, result has 55.6 percent of original size [2022-11-18 20:12:58,779 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 20:12:58,913 INFO L321 Elim1Store]: treesize reduction 36, result has 46.3 percent of original size [2022-11-18 20:12:58,913 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 38 treesize of output 48 [2022-11-18 20:12:58,954 INFO L321 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-11-18 20:12:58,955 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:12:59,053 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 33 [2022-11-18 20:12:59,246 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 42 [2022-11-18 20:12:59,347 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 22 [2022-11-18 20:12:59,377 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:59,377 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:12:59,883 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:12:59,883 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1397649814] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:12:59,883 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:12:59,884 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 25 [2022-11-18 20:12:59,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826998004] [2022-11-18 20:12:59,884 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:12:59,884 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:12:59,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:59,885 INFO L85 PathProgramCache]: Analyzing trace with hash 1365695075, now seen corresponding path program 1 times [2022-11-18 20:12:59,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:59,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610980325] [2022-11-18 20:12:59,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:59,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:59,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:59,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:12:59,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:12:59,902 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:13:00,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:00,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-11-18 20:13:00,104 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=546, Unknown=0, NotChecked=0, Total=650 [2022-11-18 20:13:00,104 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. cyclomatic complexity: 7 Second operand has 26 states, 25 states have (on average 1.44) internal successors, (36), 26 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:00,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:00,655 INFO L93 Difference]: Finished difference Result 47 states and 52 transitions. [2022-11-18 20:13:00,655 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 52 transitions. [2022-11-18 20:13:00,656 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:00,656 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 43 states and 48 transitions. [2022-11-18 20:13:00,657 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2022-11-18 20:13:00,657 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2022-11-18 20:13:00,657 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 48 transitions. [2022-11-18 20:13:00,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:13:00,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 48 transitions. [2022-11-18 20:13:00,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 48 transitions. [2022-11-18 20:13:00,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 28. [2022-11-18 20:13:00,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:00,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-11-18 20:13:00,659 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-18 20:13:00,659 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 20:13:00,660 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-18 20:13:00,660 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 20:13:00,660 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-11-18 20:13:00,660 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:00,661 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:13:00,661 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:13:00,661 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 2, 2, 1, 1, 1, 1] [2022-11-18 20:13:00,661 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:13:00,661 INFO L748 eck$LassoCheckResult]: Stem: 688#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 689#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 696#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 686#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 687#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 694#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 690#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 691#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 713#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 712#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 711#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 709#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 710#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 708#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 707#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 706#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 701#L556-2 [2022-11-18 20:13:00,661 INFO L750 eck$LassoCheckResult]: Loop: 701#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 704#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 697#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 698#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 705#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 703#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 700#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 702#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 699#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 701#L556-2 [2022-11-18 20:13:00,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:00,662 INFO L85 PathProgramCache]: Analyzing trace with hash 176108201, now seen corresponding path program 3 times [2022-11-18 20:13:00,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:00,662 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155178699] [2022-11-18 20:13:00,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:00,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:00,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:01,652 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:01,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:01,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155178699] [2022-11-18 20:13:01,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155178699] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:01,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [157620893] [2022-11-18 20:13:01,653 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:13:01,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:01,653 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:01,659 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:01,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2022-11-18 20:13:01,771 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-18 20:13:01,771 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:13:01,773 INFO L263 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-18 20:13:01,779 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:01,820 INFO L321 Elim1Store]: treesize reduction 13, result has 58.1 percent of original size [2022-11-18 20:13:01,820 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 54 [2022-11-18 20:13:01,827 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 31 [2022-11-18 20:13:01,854 INFO L321 Elim1Store]: treesize reduction 34, result has 34.6 percent of original size [2022-11-18 20:13:01,855 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 70 [2022-11-18 20:13:01,873 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-18 20:13:01,887 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 20:13:01,893 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:13:01,919 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 63 [2022-11-18 20:13:01,928 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:13:01,929 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2022-11-18 20:13:01,948 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 3 [2022-11-18 20:13:01,966 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:13:01,979 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:13:01,980 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:13:02,113 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-18 20:13:02,114 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:13:02,126 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:02,126 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 32 [2022-11-18 20:13:02,263 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:02,264 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 41 [2022-11-18 20:13:02,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2022-11-18 20:13:02,373 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:02,373 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 34 [2022-11-18 20:13:02,564 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:02,565 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 72 treesize of output 46 [2022-11-18 20:13:02,673 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-18 20:13:02,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 24 [2022-11-18 20:13:02,679 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 20:13:02,679 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:03,621 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:03,621 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [157620893] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:13:03,621 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:13:03,621 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 11] total 29 [2022-11-18 20:13:03,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177438417] [2022-11-18 20:13:03,622 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:03,622 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:13:03,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:03,623 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 2 times [2022-11-18 20:13:03,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:03,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124361583] [2022-11-18 20:13:03,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:03,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:03,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:03,640 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:13:03,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:03,660 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:13:04,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:04,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-11-18 20:13:04,207 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=758, Unknown=8, NotChecked=0, Total=870 [2022-11-18 20:13:04,207 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 30 states, 29 states have (on average 1.5172413793103448) internal successors, (44), 30 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:04,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:04,827 INFO L93 Difference]: Finished difference Result 44 states and 49 transitions. [2022-11-18 20:13:04,827 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 44 states and 49 transitions. [2022-11-18 20:13:04,828 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:04,828 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 44 states to 33 states and 37 transitions. [2022-11-18 20:13:04,829 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-18 20:13:04,829 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-18 20:13:04,829 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 37 transitions. [2022-11-18 20:13:04,829 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:13:04,829 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33 states and 37 transitions. [2022-11-18 20:13:04,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 37 transitions. [2022-11-18 20:13:04,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 28. [2022-11-18 20:13:04,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1071428571428572) internal successors, (31), 27 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:04,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2022-11-18 20:13:04,832 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2022-11-18 20:13:04,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:13:04,833 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2022-11-18 20:13:04,833 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 20:13:04,833 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 31 transitions. [2022-11-18 20:13:04,834 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:04,834 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:13:04,834 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:13:04,835 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 3, 2, 1, 1, 1, 1] [2022-11-18 20:13:04,835 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:13:04,835 INFO L748 eck$LassoCheckResult]: Stem: 899#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 900#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 907#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 897#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 898#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 905#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 903#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 904#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 906#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 901#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 902#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 924#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 923#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 922#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 920#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 921#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 919#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 916#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 917#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 913#L556-2 [2022-11-18 20:13:04,835 INFO L750 eck$LassoCheckResult]: Loop: 913#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 908#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 909#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 910#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 918#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 915#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 912#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 914#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 911#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 913#L556-2 [2022-11-18 20:13:04,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:04,836 INFO L85 PathProgramCache]: Analyzing trace with hash -1816884246, now seen corresponding path program 4 times [2022-11-18 20:13:04,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:04,836 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116074447] [2022-11-18 20:13:04,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:04,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:04,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:05,805 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:05,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:05,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116074447] [2022-11-18 20:13:05,805 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1116074447] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:05,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [743189215] [2022-11-18 20:13:05,805 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:13:05,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:05,806 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:05,811 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:05,826 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2022-11-18 20:13:05,919 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:13:05,919 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:13:05,921 INFO L263 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 46 conjunts are in the unsatisfiable core [2022-11-18 20:13:05,925 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:05,941 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 14 [2022-11-18 20:13:05,944 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:13:05,956 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 20:13:05,956 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 20:13:06,053 INFO L321 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-18 20:13:06,054 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 31 [2022-11-18 20:13:06,085 INFO L321 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-11-18 20:13:06,085 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:13:06,215 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2022-11-18 20:13:06,222 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2022-11-18 20:13:06,299 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2022-11-18 20:13:06,511 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 42 [2022-11-18 20:13:06,664 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 41 [2022-11-18 20:13:06,769 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 23 [2022-11-18 20:13:06,806 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:06,806 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:07,255 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:13:07,255 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 42 [2022-11-18 20:13:07,906 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:07,907 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [743189215] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:13:07,907 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:13:07,907 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 34 [2022-11-18 20:13:07,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255585855] [2022-11-18 20:13:07,907 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:07,908 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:13:07,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:07,908 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 3 times [2022-11-18 20:13:07,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:07,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328096822] [2022-11-18 20:13:07,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:07,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:07,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:07,944 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:13:07,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:07,953 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:13:08,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:08,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-18 20:13:08,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=1019, Unknown=22, NotChecked=0, Total=1190 [2022-11-18 20:13:08,504 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. cyclomatic complexity: 6 Second operand has 35 states, 34 states have (on average 1.588235294117647) internal successors, (54), 35 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:09,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:09,706 INFO L93 Difference]: Finished difference Result 51 states and 55 transitions. [2022-11-18 20:13:09,706 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 55 transitions. [2022-11-18 20:13:09,707 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:09,707 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 49 states and 53 transitions. [2022-11-18 20:13:09,707 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 30 [2022-11-18 20:13:09,708 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 30 [2022-11-18 20:13:09,708 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 53 transitions. [2022-11-18 20:13:09,708 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:13:09,708 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 53 transitions. [2022-11-18 20:13:09,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 53 transitions. [2022-11-18 20:13:09,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 39. [2022-11-18 20:13:09,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.1025641025641026) internal successors, (43), 38 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:09,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2022-11-18 20:13:09,711 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 43 transitions. [2022-11-18 20:13:09,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-11-18 20:13:09,713 INFO L428 stractBuchiCegarLoop]: Abstraction has 39 states and 43 transitions. [2022-11-18 20:13:09,713 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-18 20:13:09,713 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 43 transitions. [2022-11-18 20:13:09,714 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:09,714 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:13:09,714 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:13:09,715 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 5, 2, 1, 1, 1, 1] [2022-11-18 20:13:09,715 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:13:09,715 INFO L748 eck$LassoCheckResult]: Stem: 1150#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1151#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1159#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1148#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1149#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1167#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1168#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1166#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1165#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1164#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1162#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1163#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1181#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1157#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1158#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1179#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1180#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1186#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1185#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1184#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1174#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1175#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1183#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1182#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1169#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1153#L556-2 [2022-11-18 20:13:09,715 INFO L750 eck$LassoCheckResult]: Loop: 1153#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1156#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1160#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1178#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1176#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1173#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1171#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1172#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1170#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1153#L556-2 [2022-11-18 20:13:09,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:09,716 INFO L85 PathProgramCache]: Analyzing trace with hash 201819590, now seen corresponding path program 5 times [2022-11-18 20:13:09,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:09,716 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938280421] [2022-11-18 20:13:09,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:09,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:09,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:11,230 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 25 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:11,230 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:11,231 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938280421] [2022-11-18 20:13:11,231 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [938280421] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:11,231 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [963989299] [2022-11-18 20:13:11,231 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 20:13:11,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:11,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:11,234 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:11,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2022-11-18 20:13:11,395 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-11-18 20:13:11,395 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:13:11,398 INFO L263 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 56 conjunts are in the unsatisfiable core [2022-11-18 20:13:11,402 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:11,449 INFO L321 Elim1Store]: treesize reduction 15, result has 42.3 percent of original size [2022-11-18 20:13:11,449 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2022-11-18 20:13:11,624 INFO L321 Elim1Store]: treesize reduction 40, result has 43.7 percent of original size [2022-11-18 20:13:11,624 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 51 treesize of output 57 [2022-11-18 20:13:11,856 INFO L321 Elim1Store]: treesize reduction 20, result has 50.0 percent of original size [2022-11-18 20:13:11,857 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 56 [2022-11-18 20:13:12,163 INFO L321 Elim1Store]: treesize reduction 30, result has 28.6 percent of original size [2022-11-18 20:13:12,163 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 69 treesize of output 47 [2022-11-18 20:13:12,496 INFO L321 Elim1Store]: treesize reduction 28, result has 30.0 percent of original size [2022-11-18 20:13:12,496 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 86 treesize of output 56 [2022-11-18 20:13:12,652 INFO L321 Elim1Store]: treesize reduction 33, result has 17.5 percent of original size [2022-11-18 20:13:12,653 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 58 treesize of output 40 [2022-11-18 20:13:12,789 INFO L321 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-11-18 20:13:12,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 30 [2022-11-18 20:13:12,830 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 20 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:12,831 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:22,401 INFO L321 Elim1Store]: treesize reduction 10, result has 9.1 percent of original size [2022-11-18 20:13:22,401 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 137 treesize of output 1 [2022-11-18 20:13:22,402 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 25 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:22,402 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [963989299] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:13:22,403 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:13:22,403 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 15] total 41 [2022-11-18 20:13:22,403 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108424107] [2022-11-18 20:13:22,403 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:22,404 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:13:22,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:22,404 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 4 times [2022-11-18 20:13:22,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:22,404 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218667818] [2022-11-18 20:13:22,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:22,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:22,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:22,415 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:13:22,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:22,424 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:13:23,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:23,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-11-18 20:13:23,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=1486, Unknown=0, NotChecked=0, Total=1640 [2022-11-18 20:13:23,066 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. cyclomatic complexity: 7 Second operand has 41 states, 41 states have (on average 1.6097560975609757) internal successors, (66), 41 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:24,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:24,955 INFO L93 Difference]: Finished difference Result 63 states and 68 transitions. [2022-11-18 20:13:24,955 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 68 transitions. [2022-11-18 20:13:24,966 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:24,968 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 44 states and 48 transitions. [2022-11-18 20:13:24,969 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-11-18 20:13:24,970 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-11-18 20:13:24,971 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 48 transitions. [2022-11-18 20:13:24,971 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:13:24,971 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 48 transitions. [2022-11-18 20:13:24,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 48 transitions. [2022-11-18 20:13:24,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 42. [2022-11-18 20:13:24,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.0952380952380953) internal successors, (46), 41 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:24,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 46 transitions. [2022-11-18 20:13:24,976 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 46 transitions. [2022-11-18 20:13:24,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-18 20:13:24,978 INFO L428 stractBuchiCegarLoop]: Abstraction has 42 states and 46 transitions. [2022-11-18 20:13:24,978 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-18 20:13:24,978 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 46 transitions. [2022-11-18 20:13:24,979 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:24,980 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:13:24,980 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:13:24,983 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 6, 2, 1, 1, 1, 1] [2022-11-18 20:13:24,983 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:13:24,984 INFO L748 eck$LassoCheckResult]: Stem: 1470#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1471#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1479#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1468#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1469#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1509#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1508#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1477#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1478#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1482#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1498#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1497#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1472#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1473#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1476#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1474#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1475#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1507#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1506#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1505#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1504#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1502#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1499#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1496#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1495#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1494#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1492#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1483#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1484#L556-2 [2022-11-18 20:13:24,984 INFO L750 eck$LassoCheckResult]: Loop: 1484#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1493#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1491#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1490#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1489#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1488#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1486#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1487#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1485#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1484#L556-2 [2022-11-18 20:13:24,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:24,984 INFO L85 PathProgramCache]: Analyzing trace with hash -1653865051, now seen corresponding path program 6 times [2022-11-18 20:13:24,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:24,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1170384189] [2022-11-18 20:13:24,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:24,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:25,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:26,238 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 25 proven. 59 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:26,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:26,238 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1170384189] [2022-11-18 20:13:26,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1170384189] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:26,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [904325451] [2022-11-18 20:13:26,239 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 20:13:26,239 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:26,239 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:26,244 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:26,262 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2022-11-18 20:13:26,435 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-11-18 20:13:26,435 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:13:26,438 INFO L263 TraceCheckSpWp]: Trace formula consists of 385 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-18 20:13:26,447 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:26,496 INFO L321 Elim1Store]: treesize reduction 26, result has 42.2 percent of original size [2022-11-18 20:13:26,497 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 74 [2022-11-18 20:13:26,506 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:13:26,514 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-18 20:13:26,550 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:13:26,551 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 9 [2022-11-18 20:13:26,556 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:13:26,580 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:13:26,580 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:13:26,749 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-18 20:13:26,750 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:13:26,764 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:26,765 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 62 treesize of output 59 [2022-11-18 20:13:26,772 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:13:26,781 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:13:26,840 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2022-11-18 20:13:26,977 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:26,978 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 39 [2022-11-18 20:13:26,983 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2022-11-18 20:13:27,058 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:13:27,058 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 30 [2022-11-18 20:13:27,266 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:13:27,266 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 42 [2022-11-18 20:13:27,399 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:13:27,399 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 42 [2022-11-18 20:13:27,549 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:13:27,549 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 42 [2022-11-18 20:13:27,674 INFO L321 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2022-11-18 20:13:27,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 31 [2022-11-18 20:13:27,719 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 25 proven. 59 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:27,719 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:28,416 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:13:28,417 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 42 [2022-11-18 20:13:29,218 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 23 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:29,218 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [904325451] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:13:29,218 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:13:29,218 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 41 [2022-11-18 20:13:29,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1892691109] [2022-11-18 20:13:29,219 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:29,219 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:13:29,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:29,220 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 5 times [2022-11-18 20:13:29,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:29,220 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443636467] [2022-11-18 20:13:29,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:29,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:29,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:29,230 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:13:29,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:13:29,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:13:29,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:29,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-11-18 20:13:29,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=1383, Unknown=43, NotChecked=0, Total=1640 [2022-11-18 20:13:29,804 INFO L87 Difference]: Start difference. First operand 42 states and 46 transitions. cyclomatic complexity: 7 Second operand has 41 states, 41 states have (on average 1.853658536585366) internal successors, (76), 41 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:31,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:31,087 INFO L93 Difference]: Finished difference Result 55 states and 58 transitions. [2022-11-18 20:13:31,087 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 58 transitions. [2022-11-18 20:13:31,087 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:31,088 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 53 states and 56 transitions. [2022-11-18 20:13:31,088 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-11-18 20:13:31,088 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-11-18 20:13:31,088 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 56 transitions. [2022-11-18 20:13:31,088 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:13:31,089 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 56 transitions. [2022-11-18 20:13:31,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 56 transitions. [2022-11-18 20:13:31,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 43. [2022-11-18 20:13:31,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.069767441860465) internal successors, (46), 42 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:13:31,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 46 transitions. [2022-11-18 20:13:31,092 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 46 transitions. [2022-11-18 20:13:31,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-18 20:13:31,093 INFO L428 stractBuchiCegarLoop]: Abstraction has 43 states and 46 transitions. [2022-11-18 20:13:31,093 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-18 20:13:31,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 46 transitions. [2022-11-18 20:13:31,093 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:13:31,094 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:13:31,094 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:13:31,094 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 8, 2, 1, 1, 1, 1] [2022-11-18 20:13:31,095 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:13:31,095 INFO L748 eck$LassoCheckResult]: Stem: 1808#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1809#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1818#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1806#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1807#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1829#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1828#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1827#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1825#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1826#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1824#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1823#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1822#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1820#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1821#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1845#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1816#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1817#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1812#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1813#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1843#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1842#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1841#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1837#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1838#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1836#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1834#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1810#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1811#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1848#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1830#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1814#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1815#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1819#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1833#L556-2 [2022-11-18 20:13:31,095 INFO L750 eck$LassoCheckResult]: Loop: 1833#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1847#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1846#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1844#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1840#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1839#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 1832#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 1835#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1831#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1833#L556-2 [2022-11-18 20:13:31,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:31,096 INFO L85 PathProgramCache]: Analyzing trace with hash 296921417, now seen corresponding path program 7 times [2022-11-18 20:13:31,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:31,096 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826432153] [2022-11-18 20:13:31,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:31,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:31,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:33,335 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 50 proven. 82 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:13:33,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:33,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826432153] [2022-11-18 20:13:33,336 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1826432153] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:33,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1616237248] [2022-11-18 20:13:33,336 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 20:13:33,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:33,336 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:33,340 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:33,363 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2022-11-18 20:13:33,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:33,502 INFO L263 TraceCheckSpWp]: Trace formula consists of 455 conjuncts, 90 conjunts are in the unsatisfiable core [2022-11-18 20:13:33,510 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:33,535 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:13:33,536 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:13:33,583 INFO L321 Elim1Store]: treesize reduction 13, result has 58.1 percent of original size [2022-11-18 20:13:33,584 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 54 [2022-11-18 20:13:33,616 INFO L321 Elim1Store]: treesize reduction 35, result has 34.0 percent of original size [2022-11-18 20:13:33,616 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 71 [2022-11-18 20:13:33,625 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:13:33,651 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-18 20:13:33,690 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:13:33,847 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-18 20:13:33,848 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:13:33,863 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:33,864 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 35 [2022-11-18 20:13:33,996 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:33,996 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 40 [2022-11-18 20:13:34,187 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:34,188 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 48 [2022-11-18 20:13:34,196 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2022-11-18 20:13:34,305 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:34,306 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 30 [2022-11-18 20:13:34,450 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:34,451 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 38 [2022-11-18 20:13:34,586 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:34,586 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 38 [2022-11-18 20:13:34,885 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:34,885 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 42 [2022-11-18 20:13:35,252 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:35,253 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 88 treesize of output 54 [2022-11-18 20:13:35,631 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:35,632 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 90 treesize of output 52 [2022-11-18 20:13:36,020 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:36,020 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 42 [2022-11-18 20:13:36,163 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-18 20:13:36,164 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 31 [2022-11-18 20:13:36,232 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 26 proven. 109 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:13:36,233 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:14:02,958 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:14:02,958 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 5 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 5 new quantified variables, introduced 5 case distinctions, treesize of input 79 treesize of output 181 [2022-11-18 20:14:12,591 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 19 proven. 116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:14:12,591 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1616237248] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:14:12,592 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:14:12,592 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 24, 23] total 61 [2022-11-18 20:14:12,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303488131] [2022-11-18 20:14:12,592 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:14:12,592 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:14:12,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:14:12,593 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 6 times [2022-11-18 20:14:12,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:14:12,593 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792661295] [2022-11-18 20:14:12,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:14:12,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:14:12,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:14:12,602 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:14:12,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:14:12,609 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:14:13,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:14:13,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2022-11-18 20:14:13,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=450, Invalid=3172, Unknown=38, NotChecked=0, Total=3660 [2022-11-18 20:14:13,287 INFO L87 Difference]: Start difference. First operand 43 states and 46 transitions. cyclomatic complexity: 6 Second operand has 61 states, 61 states have (on average 1.5573770491803278) internal successors, (95), 61 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:14:41,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:14:41,634 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-11-18 20:14:41,634 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 119 transitions. [2022-11-18 20:14:41,635 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:14:41,636 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 88 states and 92 transitions. [2022-11-18 20:14:41,636 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 37 [2022-11-18 20:14:41,636 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2022-11-18 20:14:41,636 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 92 transitions. [2022-11-18 20:14:41,637 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:14:41,637 INFO L218 hiAutomatonCegarLoop]: Abstraction has 88 states and 92 transitions. [2022-11-18 20:14:41,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 92 transitions. [2022-11-18 20:14:41,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 58. [2022-11-18 20:14:41,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 57 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:14:41,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 61 transitions. [2022-11-18 20:14:41,641 INFO L240 hiAutomatonCegarLoop]: Abstraction has 58 states and 61 transitions. [2022-11-18 20:14:41,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2022-11-18 20:14:41,642 INFO L428 stractBuchiCegarLoop]: Abstraction has 58 states and 61 transitions. [2022-11-18 20:14:41,642 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-18 20:14:41,642 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 58 states and 61 transitions. [2022-11-18 20:14:41,643 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:14:41,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:14:41,643 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:14:41,644 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 15, 13, 2, 1, 1, 1, 1] [2022-11-18 20:14:41,644 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:14:41,645 INFO L748 eck$LassoCheckResult]: Stem: 2360#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2361#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2370#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2358#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2359#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2401#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2400#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2368#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2369#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2381#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2379#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2378#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2377#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2366#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2367#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2364#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2365#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2399#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2398#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2397#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2396#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2395#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2394#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2393#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2392#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2391#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2390#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2389#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2388#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2387#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2386#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2385#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2384#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2383#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2382#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2376#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2380#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2374#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2375#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2362#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2363#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2415#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2402#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2373#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2371#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2372#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2414#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2413#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2412#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2405#L556-2 [2022-11-18 20:14:41,645 INFO L750 eck$LassoCheckResult]: Loop: 2405#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2411#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2410#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2409#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2408#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2407#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2404#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2406#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2403#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2405#L556-2 [2022-11-18 20:14:41,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:14:41,646 INFO L85 PathProgramCache]: Analyzing trace with hash -2090067702, now seen corresponding path program 8 times [2022-11-18 20:14:41,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:14:41,646 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921740216] [2022-11-18 20:14:41,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:14:41,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:14:41,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:14:45,005 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 111 proven. 177 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-11-18 20:14:45,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:14:45,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921740216] [2022-11-18 20:14:45,006 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1921740216] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:14:45,006 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [693735667] [2022-11-18 20:14:45,006 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:14:45,006 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:14:45,006 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:14:45,010 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:14:45,026 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2022-11-18 20:14:45,214 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:14:45,214 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:14:45,218 INFO L263 TraceCheckSpWp]: Trace formula consists of 630 conjuncts, 59 conjunts are in the unsatisfiable core [2022-11-18 20:14:45,223 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:14:45,248 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:14:45,248 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:14:45,295 INFO L321 Elim1Store]: treesize reduction 19, result has 44.1 percent of original size [2022-11-18 20:14:45,295 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 25 [2022-11-18 20:14:45,333 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-18 20:14:45,333 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:14:45,378 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-11-18 20:14:45,495 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:14:45,496 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 37 [2022-11-18 20:14:45,715 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:45,716 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 41 [2022-11-18 20:14:45,722 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2022-11-18 20:14:45,787 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:45,788 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 25 [2022-11-18 20:14:45,836 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:45,837 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 25 [2022-11-18 20:14:45,880 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:45,880 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 25 [2022-11-18 20:14:45,927 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:45,927 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 25 [2022-11-18 20:14:45,973 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:45,973 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 25 [2022-11-18 20:14:46,197 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:14:46,198 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 33 [2022-11-18 20:14:46,402 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:14:46,403 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 45 treesize of output 35 [2022-11-18 20:14:46,676 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:14:46,677 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 43 [2022-11-18 20:14:46,966 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:46,967 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 41 [2022-11-18 20:14:46,974 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2022-11-18 20:14:46,977 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 108 proven. 163 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2022-11-18 20:14:46,977 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:14:49,122 WARN L837 $PredicateComparison]: unable to prove that (or (not (< |c_ULTIMATE.start_main_#t~mem15#1| |c_ULTIMATE.start_main_#t~mem16#1|)) (forall ((v_ArrVal_744 (Array Int Int)) (v_ArrVal_750 Int)) (let ((.cse0 (select v_ArrVal_744 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse1 (+ 3 .cse0))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_744 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 2 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse1) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_744) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (< v_ArrVal_750 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_744 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_750)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_750 .cse1)))))) (forall ((v_ArrVal_738 Int)) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (or (not (<= v_ArrVal_738 (+ (select .cse2 |c_ULTIMATE.start_main_~tmp~0#1.offset|) 1))) (< v_ArrVal_738 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_738)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))))) is different from false [2022-11-18 20:14:50,027 INFO L321 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-11-18 20:14:50,027 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 143 treesize of output 122 [2022-11-18 20:14:50,080 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:14:50,080 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 77 treesize of output 85 [2022-11-18 20:14:50,339 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 126 proven. 139 refuted. 0 times theorem prover too weak. 39 trivial. 11 not checked. [2022-11-18 20:14:50,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [693735667] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:14:50,340 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:14:50,340 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 16, 17] total 44 [2022-11-18 20:14:50,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1488429755] [2022-11-18 20:14:50,340 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:14:50,340 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:14:50,341 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:14:50,341 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 7 times [2022-11-18 20:14:50,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:14:50,341 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378201594] [2022-11-18 20:14:50,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:14:50,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:14:50,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:14:50,354 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:14:50,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:14:50,362 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:14:51,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:14:51,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-11-18 20:14:51,173 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=1643, Unknown=24, NotChecked=82, Total=1892 [2022-11-18 20:14:51,173 INFO L87 Difference]: Start difference. First operand 58 states and 61 transitions. cyclomatic complexity: 6 Second operand has 44 states, 44 states have (on average 1.8636363636363635) internal successors, (82), 44 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:14:53,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:14:53,687 INFO L93 Difference]: Finished difference Result 92 states and 96 transitions. [2022-11-18 20:14:53,687 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 92 states and 96 transitions. [2022-11-18 20:14:53,688 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:14:53,688 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 92 states to 63 states and 66 transitions. [2022-11-18 20:14:53,689 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2022-11-18 20:14:53,689 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2022-11-18 20:14:53,689 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 66 transitions. [2022-11-18 20:14:53,689 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:14:53,690 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 66 transitions. [2022-11-18 20:14:53,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 66 transitions. [2022-11-18 20:14:53,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 61. [2022-11-18 20:14:53,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.0491803278688525) internal successors, (64), 60 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:14:53,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 64 transitions. [2022-11-18 20:14:53,695 INFO L240 hiAutomatonCegarLoop]: Abstraction has 61 states and 64 transitions. [2022-11-18 20:14:53,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-18 20:14:53,696 INFO L428 stractBuchiCegarLoop]: Abstraction has 61 states and 64 transitions. [2022-11-18 20:14:53,696 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-18 20:14:53,696 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 64 transitions. [2022-11-18 20:14:53,697 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:14:53,697 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:14:53,697 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:14:53,698 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [16, 16, 14, 2, 1, 1, 1, 1] [2022-11-18 20:14:53,699 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:14:53,699 INFO L748 eck$LassoCheckResult]: Stem: 2882#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2883#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2891#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2880#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2881#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2888#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2886#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2887#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2924#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2925#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2889#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2890#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2902#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2900#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2899#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2897#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2898#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2923#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2922#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2921#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2920#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2919#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2918#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2917#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2916#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2915#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2914#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2913#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2912#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2911#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2910#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2909#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2908#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2907#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2906#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2905#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2904#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2903#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2896#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2901#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2895#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2892#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2884#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2885#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2940#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2926#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2893#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2894#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2930#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2939#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2938#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2937#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2929#L556-2 [2022-11-18 20:14:53,699 INFO L750 eck$LassoCheckResult]: Loop: 2929#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2936#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2935#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2934#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2933#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2932#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 2928#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 2931#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2927#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2929#L556-2 [2022-11-18 20:14:53,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:14:53,700 INFO L85 PathProgramCache]: Analyzing trace with hash 1159113705, now seen corresponding path program 9 times [2022-11-18 20:14:53,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:14:53,700 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993204110] [2022-11-18 20:14:53,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:14:53,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:14:53,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:14:57,899 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 129 proven. 222 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-18 20:14:57,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:14:57,899 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993204110] [2022-11-18 20:14:57,900 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1993204110] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:14:57,900 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [470212694] [2022-11-18 20:14:57,900 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:14:57,900 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:14:57,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:14:57,902 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:14:57,905 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-11-18 20:14:58,412 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2022-11-18 20:14:58,412 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:14:58,417 INFO L263 TraceCheckSpWp]: Trace formula consists of 665 conjuncts, 83 conjunts are in the unsatisfiable core [2022-11-18 20:14:58,427 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:14:58,444 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:14:58,445 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:14:58,480 INFO L321 Elim1Store]: treesize reduction 26, result has 42.2 percent of original size [2022-11-18 20:14:58,480 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 74 [2022-11-18 20:14:58,487 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-11-18 20:14:58,493 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2022-11-18 20:14:58,519 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 15 [2022-11-18 20:14:58,522 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:14:58,680 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-18 20:14:58,681 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:14:58,690 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-11-18 20:14:58,780 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-11-18 20:14:58,881 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-11-18 20:14:59,057 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:14:59,058 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 37 [2022-11-18 20:14:59,264 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:59,264 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 41 [2022-11-18 20:14:59,275 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2022-11-18 20:14:59,410 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:59,411 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 34 [2022-11-18 20:14:59,464 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:14:59,465 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 34 [2022-11-18 20:14:59,729 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:14:59,730 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2022-11-18 20:15:00,112 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:00,113 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 70 treesize of output 44 [2022-11-18 20:15:00,567 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:00,567 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 84 treesize of output 50 [2022-11-18 20:15:00,811 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:00,811 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 52 [2022-11-18 20:15:01,032 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:01,032 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 52 [2022-11-18 20:15:01,448 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:01,449 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 102 treesize of output 60 [2022-11-18 20:15:01,928 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:15:01,929 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 50 [2022-11-18 20:15:01,939 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2022-11-18 20:15:01,942 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 134 proven. 212 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-18 20:15:01,943 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:15:14,045 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 153 proven. 195 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-18 20:15:14,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [470212694] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:15:14,045 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:15:14,046 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24, 25] total 68 [2022-11-18 20:15:14,046 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436722900] [2022-11-18 20:15:14,046 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:15:14,047 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:15:14,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:15:14,047 INFO L85 PathProgramCache]: Analyzing trace with hash -803259212, now seen corresponding path program 8 times [2022-11-18 20:15:14,047 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:15:14,047 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803234903] [2022-11-18 20:15:14,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:15:14,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:15:14,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:15:14,057 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:15:14,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:15:14,066 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:15:14,818 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:15:14,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2022-11-18 20:15:14,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=405, Invalid=4103, Unknown=48, NotChecked=0, Total=4556 [2022-11-18 20:15:14,821 INFO L87 Difference]: Start difference. First operand 61 states and 64 transitions. cyclomatic complexity: 6 Second operand has 68 states, 68 states have (on average 1.838235294117647) internal successors, (125), 68 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:15:16,404 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse0 (select |c_#length| |c_ULTIMATE.start_main_~maxId~0#1.base|)) (.cse1 (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse6 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse8 (+ 6 .cse6))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6) (let ((.cse7 (+ 2 .cse6))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse7)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse6))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse8) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse9 (+ .cse6 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse9)) (not (<= v_ArrVal_882 .cse8))))))) (.cse3 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (.cse2 (select .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (and (= (select |c_#valid| |c_ULTIMATE.start_main_~id~0#1.base|) 1) (= (select |c_#valid| |c_ULTIMATE.start_main_~maxId~0#1.base|) 1) (<= .cse0 4) (or .cse1 (< .cse2 .cse3)) (<= 4 .cse0) (let ((.cse4 (+ .cse2 1))) (or .cse1 (< .cse3 .cse4) (forall ((v_ArrVal_867 Int)) (or (not (<= v_ArrVal_867 .cse4)) (< v_ArrVal_867 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_867)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))))))) is different from false [2022-11-18 20:15:16,561 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse0 (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7))))))) (.cse2 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (.cse1 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (and (or .cse0 (< .cse1 .cse2)) (let ((.cse3 (+ .cse1 1))) (or .cse0 (< .cse2 .cse3) (forall ((v_ArrVal_867 Int)) (or (not (<= v_ArrVal_867 .cse3)) (< v_ArrVal_867 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_867)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))))))) is different from false [2022-11-18 20:15:17,996 WARN L837 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse6 (+ .cse5 6))) (or (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse5 5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse6)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (let ((.cse7 (+ .cse5 1))) (= .cse7 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (let ((.cse8 (+ .cse5 2))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8))))))) is different from false [2022-11-18 20:15:18,384 WARN L837 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse6 (+ .cse5 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse5 5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse6)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (let ((.cse7 (+ .cse5 1))) (= .cse7 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (let ((.cse8 (+ .cse5 2))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8))))))) is different from false [2022-11-18 20:15:18,989 WARN L837 $PredicateComparison]: unable to prove that (and (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse1 (select .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ .cse1 5))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse1 4))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (= .cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|)) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2)))) (let ((.cse3 (+ .cse1 1))) (= .cse3 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))))) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse4 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse6 (+ 6 .cse4))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse4) (let ((.cse5 (+ 2 .cse4))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse5)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse4))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse7 (+ .cse4 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse7)) (not (<= v_ArrVal_882 .cse6))))))) is different from false [2022-11-18 20:15:19,303 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse2 (select .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse0 (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|)) (.cse3 (+ .cse2 5)) (.cse4 (let ((.cse11 (+ .cse2 1))) (= .cse11 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))) (and (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse2 4))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse3)))) .cse4) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7)))))) (let ((.cse9 (+ .cse2 6))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse9)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse4 (let ((.cse10 (+ .cse2 2))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse10)))))))) is different from false [2022-11-18 20:15:19,700 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse6 (+ .cse5 5)) (.cse7 (let ((.cse10 (+ .cse5 1))) (= .cse10 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))) (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse5 4))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse6)))) .cse7) (let ((.cse8 (+ .cse5 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse8) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse8)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse7 (let ((.cse9 (+ .cse5 2))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse9)))))))) is different from false [2022-11-18 20:15:19,953 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse5 (select .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse1 (+ .cse5 4)) (.cse3 (= .cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|)))) (and (let ((.cse2 (+ .cse5 5))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) .cse3 (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2)))) (let ((.cse4 (+ .cse5 1))) (= .cse4 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse4)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse6 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse8 (+ 6 .cse6))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6) (let ((.cse7 (+ 2 .cse6))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse7)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse6))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse8) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse9 (+ .cse6 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse9)) (not (<= v_ArrVal_882 .cse8)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse5 3))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse1) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse1)))) .cse3))))) is different from false [2022-11-18 20:15:20,255 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse9 (select .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ .cse9 4)) (.cse0 (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|)) (.cse3 (+ .cse9 5)) (.cse4 (let ((.cse12 (+ .cse9 1))) (= .cse12 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse12)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))) (and (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse2)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse3)))) .cse4) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7)))))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse9 3))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2))))) (let ((.cse10 (+ .cse9 6))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse10) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse10)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse4 (let ((.cse11 (+ .cse9 2))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse11)))))))) is different from false [2022-11-18 20:15:20,677 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse6 (+ .cse5 4)) (.cse7 (+ .cse5 5)) (.cse8 (let ((.cse11 (+ .cse5 1))) (= .cse11 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))) (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse5 3))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse6))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse7)))) .cse8) (let ((.cse9 (+ .cse5 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse9)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse8 (let ((.cse10 (+ .cse5 2))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse10)))))))) is different from false [2022-11-18 20:15:20,925 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse5 (select .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse1 (+ .cse5 4)) (.cse3 (= .cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse10 (+ .cse5 3))) (and (let ((.cse2 (+ .cse5 5))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) .cse3 (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2)))) (let ((.cse4 (+ .cse5 1))) (= .cse4 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse4)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))))) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse6 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse8 (+ 6 .cse6))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6) (let ((.cse7 (+ 2 .cse6))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse7)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse6))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse8) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse9 (+ .cse6 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse9)) (not (<= v_ArrVal_882 .cse8)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse1) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse1)))) .cse3) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse10)))) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ .cse5 2))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse10)))))) is different from false [2022-11-18 20:15:21,184 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse13 (select .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse12 (+ .cse13 2))) (let ((.cse2 (+ .cse13 4)) (.cse0 (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|)) (.cse3 (+ .cse13 5)) (.cse4 (let ((.cse14 (+ .cse13 1))) (= .cse14 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse14)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|)))) (.cse11 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse12))) (.cse9 (+ .cse13 3))) (and (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse2)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse3)))) .cse4) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7)))))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2))))) (let ((.cse10 (+ .cse13 6))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse10) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse10)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse4 (= (select (select .cse11 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse12))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse9)))) (< (select (select .cse11 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9))))))) is different from false [2022-11-18 20:15:21,578 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse12 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse11 (+ .cse12 2))) (let ((.cse6 (+ .cse12 4)) (.cse7 (+ .cse12 5)) (.cse8 (let ((.cse13 (+ .cse12 1))) (= .cse13 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse13)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|)))) (.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11))) (.cse5 (+ .cse12 3))) (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse5)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse6))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse7)))) .cse8) (let ((.cse9 (+ .cse12 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse9)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse8 (= (select (select .cse10 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse11))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse5)))) (< (select (select .cse10 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse5))))))) is different from false [2022-11-18 20:15:21,779 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse6 (select .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse4 (+ .cse6 1))) (let ((.cse1 (+ .cse6 4)) (.cse3 (= .cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse11 (+ .cse6 3)) (.cse5 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse4))) (.cse12 (+ .cse6 2))) (and (let ((.cse2 (+ .cse6 5))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) .cse3 (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2)))) (= .cse4 (select (select .cse5 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|)))) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse7 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse9 (+ 6 .cse7))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse7) (let ((.cse8 (+ 2 .cse7))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse7))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse10 (+ .cse7 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse10)) (not (<= v_ArrVal_882 .cse9)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse1) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse1)))) .cse3) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse11)))) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse12)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse11)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse12)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse5 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse12))))))) is different from false [2022-11-18 20:15:21,883 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse13 (select .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse15 (+ .cse13 1))) (let ((.cse12 (+ .cse13 2)) (.cse14 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse15)))) (let ((.cse2 (+ .cse13 4)) (.cse0 (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|)) (.cse3 (+ .cse13 5)) (.cse4 (= .cse15 (select (select .cse14 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse11 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse12))) (.cse9 (+ .cse13 3))) (and (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse2)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse3)))) .cse4) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7)))))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2))))) (let ((.cse10 (+ .cse13 6))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse10) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse10)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse4 (= (select (select .cse11 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse12))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse9)))) (< (select (select .cse11 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse12)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse14 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse12)))))))) is different from false [2022-11-18 20:15:22,027 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse12 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse14 (+ .cse12 1))) (let ((.cse11 (+ .cse12 2)) (.cse13 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse14)))) (let ((.cse6 (+ .cse12 4)) (.cse7 (+ .cse12 5)) (.cse8 (= .cse14 (select (select .cse13 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11))) (.cse5 (+ .cse12 3))) (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse5)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse6))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse7)))) .cse8) (let ((.cse9 (+ .cse12 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse9)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse8 (= (select (select .cse10 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse11))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse5)))) (< (select (select .cse10 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse5)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse11)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse13 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse11)))))))) is different from false [2022-11-18 20:15:26,082 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse14 (select .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse9 (+ .cse14 1))) (let ((.cse13 (+ .cse14 2)) (.cse15 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse9)))) (let ((.cse2 (+ .cse14 4)) (.cse0 (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|)) (.cse3 (+ .cse14 5)) (.cse4 (= .cse9 (select (select .cse15 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse12 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse13))) (.cse10 (+ .cse14 3))) (and (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse2)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse3)))) .cse4) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7)))))) (or (< (select (select |c_#memory_int| |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse9)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2))))) (let ((.cse11 (+ .cse14 6))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse11) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse11)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse4 (= (select (select .cse12 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse13))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse10)))) (< (select (select .cse12 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse10)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse13)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse15 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse13)))))))) is different from false [2022-11-18 20:15:26,258 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse12 (select .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse14 (+ .cse12 1))) (let ((.cse11 (+ .cse12 2)) (.cse13 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse14)))) (let ((.cse6 (+ .cse12 4)) (.cse7 (+ .cse12 5)) (.cse8 (= .cse14 (select (select .cse13 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11))) (.cse5 (+ .cse12 3))) (and (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse0 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse2 (+ 6 .cse0))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse0) (let ((.cse1 (+ 2 .cse0))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse0))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse3 (+ .cse0 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse3)) (not (<= v_ArrVal_882 .cse2)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse5)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse6))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse7)))) .cse8) (let ((.cse9 (+ .cse12 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse9)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse8 (= (select (select .cse10 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse11))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse5)))) (< (select (select .cse10 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse5)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse11)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse13 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse11)) (or (not (< |c_ULTIMATE.start_main_#t~mem15#1| |c_ULTIMATE.start_main_#t~mem16#1|)) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse14)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))))))))) is different from false [2022-11-18 20:15:26,428 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse6 (select .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse4 (+ .cse6 1))) (let ((.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (.cse1 (+ .cse6 4)) (.cse3 (= .cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse12 (+ .cse6 3)) (.cse5 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse4))) (.cse13 (+ .cse6 2))) (and (let ((.cse2 (+ .cse6 5))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse1)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) .cse3 (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2)))) (= .cse4 (select (select .cse5 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|)))) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse7 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse9 (+ 6 .cse7))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse7) (let ((.cse8 (+ 2 .cse7))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse7))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse9) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse10 (+ .cse7 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse10)) (not (<= v_ArrVal_882 .cse9)))))) (or (< .cse11 .cse4) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse4)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))) (< .cse6 .cse11) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse12)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse1) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse1)))) .cse3) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse12)))) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse13)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse12)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse13)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse5 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse13))))))) is different from false [2022-11-18 20:15:26,514 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse12 (select .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse10 (+ .cse12 1))) (let ((.cse15 (+ .cse12 2)) (.cse16 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse10)))) (let ((.cse2 (+ .cse12 4)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (.cse0 (= |c_ULTIMATE.start_main_#t~mem12#1| |c_ULTIMATE.start_main_#t~mem13#1|)) (.cse3 (+ .cse12 5)) (.cse4 (= .cse10 (select (select .cse16 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse14 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse15))) (.cse11 (+ .cse12 3))) (and (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse2)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse3)))) .cse4) (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse5 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse7 (+ 6 .cse5))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse5) (let ((.cse6 (+ 2 .cse5))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse6)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse5))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse8 (+ .cse5 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse8)) (not (<= v_ArrVal_882 .cse7)))))) (or (< .cse9 .cse10) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse10)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse11)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse2) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse2))))) (< .cse12 .cse9) (let ((.cse13 (+ .cse12 6))) (or .cse0 (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse3)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse13) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse13)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse4 (= (select (select .cse14 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse15))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse11)))) (< (select (select .cse14 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse11)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse15)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse16 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse15)))))))) is different from false [2022-11-18 20:15:26,663 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base|))) (let ((.cse13 (select .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse15 (+ .cse13 1))) (let ((.cse12 (+ .cse13 2)) (.cse14 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse15)))) (let ((.cse7 (+ .cse13 4)) (.cse8 (+ .cse13 5)) (.cse9 (= .cse15 (select (select .cse14 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|))) (.cse11 (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse12))) (.cse6 (+ .cse13 3)) (.cse0 (< |c_ULTIMATE.start_main_#t~mem15#1| |c_ULTIMATE.start_main_#t~mem16#1|))) (and .cse0 (forall ((v_ArrVal_882 Int) (v_ArrVal_870 (Array Int Int))) (let ((.cse1 (select v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset|))) (let ((.cse3 (+ 6 .cse1))) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| v_ArrVal_870) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse1) (let ((.cse2 (+ 2 .cse1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse2)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse2)) (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| (+ 5 .cse1))) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse3) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (let ((.cse4 (+ .cse1 1))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store v_ArrVal_870 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse4)) |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse4)) (not (<= v_ArrVal_882 .cse3)))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse6)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse7) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse7))))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse7)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse8) (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse8)))) .cse9) (let ((.cse10 (+ .cse13 6))) (or (< (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| .cse8)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse10) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse10)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) .cse9 (= (select (select .cse11 |c_ULTIMATE.start_main_~id~0#1.base|) |c_ULTIMATE.start_main_~id~0#1.offset|) .cse12))) (or (forall ((v_ArrVal_882 Int)) (or (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)) (not (<= v_ArrVal_882 .cse6)))) (< (select (select .cse11 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse6)) (or (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse12)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|)))) (< (select (select .cse14 |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|) .cse12)) (or (not .cse0) (forall ((v_ArrVal_882 Int)) (or (not (<= v_ArrVal_882 .cse15)) (< v_ArrVal_882 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~tmp~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~tmp~0#1.offset| v_ArrVal_882)) |c_ULTIMATE.start_main_~maxId~0#1.base|) |c_ULTIMATE.start_main_~maxId~0#1.offset|))))))))))) is different from false [2022-11-18 20:15:26,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:15:26,777 INFO L93 Difference]: Finished difference Result 132 states and 138 transitions. [2022-11-18 20:15:26,777 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 138 transitions. [2022-11-18 20:15:26,779 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:15:26,779 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 72 states and 75 transitions. [2022-11-18 20:15:26,780 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2022-11-18 20:15:26,780 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2022-11-18 20:15:26,780 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72 states and 75 transitions. [2022-11-18 20:15:26,780 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:15:26,780 INFO L218 hiAutomatonCegarLoop]: Abstraction has 72 states and 75 transitions. [2022-11-18 20:15:26,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states and 75 transitions. [2022-11-18 20:15:26,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 70. [2022-11-18 20:15:26,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.042857142857143) internal successors, (73), 69 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:15:26,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 73 transitions. [2022-11-18 20:15:26,784 INFO L240 hiAutomatonCegarLoop]: Abstraction has 70 states and 73 transitions. [2022-11-18 20:15:26,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-11-18 20:15:26,785 INFO L428 stractBuchiCegarLoop]: Abstraction has 70 states and 73 transitions. [2022-11-18 20:15:26,785 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-18 20:15:26,785 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 73 transitions. [2022-11-18 20:15:26,786 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-11-18 20:15:26,786 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:15:26,786 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:15:26,787 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [19, 19, 17, 2, 1, 1, 1, 1] [2022-11-18 20:15:26,787 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-11-18 20:15:26,787 INFO L748 eck$LassoCheckResult]: Stem: 3549#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3550#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call write~int(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;call write~int(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 3558#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 3547#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 3548#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3555#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3601#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3556#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3557#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3553#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3554#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3600#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3599#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3598#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3597#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3596#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3595#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3594#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3593#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3592#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3568#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3570#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3567#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3566#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3564#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3565#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3591#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3590#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3589#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3588#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3587#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3586#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3585#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3584#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3583#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3582#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3581#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3580#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3579#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3578#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3577#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3576#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3575#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3574#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3573#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3572#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3571#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3563#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3569#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3562#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3559#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3551#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3552#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3616#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3602#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3560#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3561#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3606#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3615#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3614#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3613#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3605#L556-2 [2022-11-18 20:15:26,788 INFO L750 eck$LassoCheckResult]: Loop: 3605#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3612#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3611#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3610#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3609#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3608#L556 assume main_#t~mem15#1 < main_#t~mem16#1;havoc main_#t~mem15#1;havoc main_#t~mem16#1;call main_#t~mem17#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int(1 + main_#t~mem17#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem17#1; 3604#L556-2 call main_#t~mem12#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~id~0#1.base, main_~id~0#1.offset, 4); 3607#L555-1 assume !!(main_#t~mem12#1 != main_#t~mem13#1 && 0 != main_#t~nondet14#1);havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;call main_#t~mem15#1 := read~int(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem16#1 := read~int(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3603#L556 assume !(main_#t~mem15#1 < main_#t~mem16#1);havoc main_#t~mem15#1;havoc main_#t~mem16#1;call write~int(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3605#L556-2 [2022-11-18 20:15:26,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:15:26,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1451630666, now seen corresponding path program 10 times [2022-11-18 20:15:26,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:15:26,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844554600] [2022-11-18 20:15:26,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:15:26,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:15:26,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:15:32,468 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 165 proven. 339 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-18 20:15:32,468 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:15:32,469 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844554600] [2022-11-18 20:15:32,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844554600] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:15:32,469 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2037918861] [2022-11-18 20:15:32,469 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:15:32,469 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:15:32,469 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:15:32,471 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:15:32,473 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2022-11-18 20:15:32,750 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:15:32,750 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:15:32,755 INFO L263 TraceCheckSpWp]: Trace formula consists of 770 conjuncts, 114 conjunts are in the unsatisfiable core [2022-11-18 20:15:32,767 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:15:32,792 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:15:32,792 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 20:15:32,986 INFO L321 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-18 20:15:32,987 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 31 [2022-11-18 20:15:33,030 INFO L321 Elim1Store]: treesize reduction 16, result has 36.0 percent of original size [2022-11-18 20:15:33,031 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:15:33,188 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2022-11-18 20:15:33,322 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2022-11-18 20:15:33,465 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2022-11-18 20:15:33,600 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2022-11-18 20:15:33,733 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2022-11-18 20:15:33,997 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:15:33,998 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 39 [2022-11-18 20:15:34,004 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2022-11-18 20:15:34,147 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:34,147 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 30 [2022-11-18 20:15:34,542 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:34,543 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 42 [2022-11-18 20:15:34,983 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:34,984 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:35,419 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:35,419 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:35,858 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:35,858 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:36,290 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:36,290 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:36,720 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:36,720 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:37,164 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:37,165 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:37,621 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:15:37,621 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 45 [2022-11-18 20:15:38,183 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:15:38,183 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 68 treesize of output 57 [2022-11-18 20:15:38,193 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2022-11-18 20:15:38,197 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 214 proven. 290 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-18 20:15:38,198 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:16:13,472 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-18 20:16:13,472 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 101 [2022-11-18 20:16:13,473 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-11-18 20:16:13,473 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:243) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:258) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:140) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.pop(ManagedScript.java:129) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:86) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:898) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:772) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:346) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:306) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:582) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:399) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:271) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:342) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkFeasibilityAndComputeInterpolants(LassoCheck.java:881) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkStemFeasibility(LassoCheck.java:836) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:751) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:257) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.cegar.AbstractBuchiCegarLoop.runCegarLoop(AbstractBuchiCegarLoop.java:359) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.runCegarLoops(BuchiAutomizerObserver.java:136) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:157) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:341) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1465) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:658) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:239) ... 45 more [2022-11-18 20:16:13,477 INFO L158 Benchmark]: Toolchain (without parser) took 208160.29ms. Allocated memory was 153.1MB in the beginning and 323.0MB in the end (delta: 169.9MB). Free memory was 126.1MB in the beginning and 203.7MB in the end (delta: -77.6MB). Peak memory consumption was 92.8MB. Max. memory is 16.1GB. [2022-11-18 20:16:13,477 INFO L158 Benchmark]: CDTParser took 0.28ms. Allocated memory is still 98.6MB. Free memory is still 54.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:16:13,478 INFO L158 Benchmark]: CACSL2BoogieTranslator took 450.41ms. Allocated memory is still 153.1MB. Free memory was 126.1MB in the beginning and 121.4MB in the end (delta: 4.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-18 20:16:13,478 INFO L158 Benchmark]: Boogie Procedure Inliner took 41.22ms. Allocated memory is still 153.1MB. Free memory was 121.4MB in the beginning and 119.7MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:16:13,478 INFO L158 Benchmark]: Boogie Preprocessor took 26.91ms. Allocated memory is still 153.1MB. Free memory was 119.7MB in the beginning and 118.4MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:16:13,479 INFO L158 Benchmark]: RCFGBuilder took 533.08ms. Allocated memory is still 153.1MB. Free memory was 118.4MB in the beginning and 106.1MB in the end (delta: 12.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-18 20:16:13,479 INFO L158 Benchmark]: BuchiAutomizer took 207103.75ms. Allocated memory was 153.1MB in the beginning and 323.0MB in the end (delta: 169.9MB). Free memory was 106.1MB in the beginning and 203.7MB in the end (delta: -97.6MB). Peak memory consumption was 73.4MB. Max. memory is 16.1GB. [2022-11-18 20:16:13,480 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.28ms. Allocated memory is still 98.6MB. Free memory is still 54.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 450.41ms. Allocated memory is still 153.1MB. Free memory was 126.1MB in the beginning and 121.4MB in the end (delta: 4.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 41.22ms. Allocated memory is still 153.1MB. Free memory was 121.4MB in the beginning and 119.7MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 26.91ms. Allocated memory is still 153.1MB. Free memory was 119.7MB in the beginning and 118.4MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 533.08ms. Allocated memory is still 153.1MB. Free memory was 118.4MB in the beginning and 106.1MB in the end (delta: 12.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * BuchiAutomizer took 207103.75ms. Allocated memory was 153.1MB in the beginning and 323.0MB in the end (delta: 169.9MB). Free memory was 106.1MB in the beginning and 203.7MB in the end (delta: -97.6MB). Peak memory consumption was 73.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:243) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-11-18 20:16:13,498 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:13,704 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:13,904 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:14,103 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:14,303 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Ended with exit code 0 [2022-11-18 20:16:14,504 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Ended with exit code 0 [2022-11-18 20:16:14,704 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Ended with exit code 0 [2022-11-18 20:16:14,904 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Ended with exit code 0 [2022-11-18 20:16:15,104 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Ended with exit code 0 [2022-11-18 20:16:15,305 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/config using search string *Termination*64bit*_Bitvector*.epf No suitable settings file found using Termination*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e74808d-44c0-4393-8892-3eb51fa29a24/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")