./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d69e4513fb8989bf305d8f9ce21862e8623f2a3d0c8146e8e7fb7e8c658a7eff --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:53:17,109 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:53:17,114 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:53:17,153 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:53:17,154 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:53:17,160 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:53:17,163 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:53:17,173 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:53:17,176 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:53:17,179 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:53:17,180 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:53:17,181 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:53:17,182 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:53:17,183 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:53:17,184 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:53:17,185 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:53:17,186 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:53:17,193 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:53:17,196 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:53:17,205 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:53:17,207 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:53:17,212 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:53:17,216 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:53:17,217 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:53:17,221 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:53:17,221 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:53:17,221 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:53:17,222 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:53:17,228 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:53:17,229 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:53:17,230 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:53:17,231 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:53:17,233 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:53:17,235 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:53:17,237 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:53:17,239 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:53:17,240 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:53:17,240 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:53:17,241 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:53:17,242 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:53:17,242 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:53:17,243 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-11-18 20:53:17,296 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:53:17,296 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:53:17,297 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:53:17,297 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:53:17,299 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:53:17,299 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:53:17,299 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:53:17,299 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 20:53:17,300 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 20:53:17,300 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 20:53:17,301 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 20:53:17,302 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 20:53:17,302 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 20:53:17,302 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:53:17,302 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:53:17,302 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:53:17,303 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:53:17,303 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 20:53:17,303 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 20:53:17,303 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 20:53:17,304 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:53:17,304 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 20:53:17,304 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:53:17,306 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 20:53:17,306 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:53:17,306 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:53:17,307 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:53:17,307 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:53:17,308 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 20:53:17,309 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d69e4513fb8989bf305d8f9ce21862e8623f2a3d0c8146e8e7fb7e8c658a7eff [2022-11-18 20:53:17,718 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:53:17,751 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:53:17,755 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:53:17,757 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:53:17,758 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:53:17,759 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c [2022-11-18 20:53:17,837 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/data/f4290ba1d/bde2a303b14a4056bc1bd4506037b240/FLAG4bb2f62dc [2022-11-18 20:53:18,516 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:53:18,517 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c [2022-11-18 20:53:18,523 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/data/f4290ba1d/bde2a303b14a4056bc1bd4506037b240/FLAG4bb2f62dc [2022-11-18 20:53:18,875 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/data/f4290ba1d/bde2a303b14a4056bc1bd4506037b240 [2022-11-18 20:53:18,878 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:53:18,880 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:53:18,891 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:53:18,891 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:53:18,897 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:53:18,898 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:53:18" (1/1) ... [2022-11-18 20:53:18,901 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4479c943 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:18, skipping insertion in model container [2022-11-18 20:53:18,901 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:53:18" (1/1) ... [2022-11-18 20:53:18,911 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:53:18,928 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:53:19,161 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:53:19,165 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:53:19,186 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:53:19,209 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:53:19,210 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19 WrapperNode [2022-11-18 20:53:19,210 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:53:19,211 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:53:19,212 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:53:19,212 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:53:19,221 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,229 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,249 INFO L138 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2022-11-18 20:53:19,249 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:53:19,250 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:53:19,251 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:53:19,251 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:53:19,259 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,259 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,261 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,261 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,267 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,271 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,272 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,273 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,275 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:53:19,276 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:53:19,277 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:53:19,277 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:53:19,278 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (1/1) ... [2022-11-18 20:53:19,286 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:19,302 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:19,315 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:19,353 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 20:53:19,377 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 20:53:19,378 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:53:19,378 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:53:19,378 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 20:53:19,378 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:53:19,378 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:53:19,466 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:53:19,468 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:53:19,692 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:53:19,699 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:53:19,699 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-18 20:53:19,702 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:53:19 BoogieIcfgContainer [2022-11-18 20:53:19,702 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:53:19,703 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 20:53:19,704 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 20:53:19,709 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 20:53:19,710 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:53:19,710 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 08:53:18" (1/3) ... [2022-11-18 20:53:19,711 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3abe4ae7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:53:19, skipping insertion in model container [2022-11-18 20:53:19,711 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:53:19,711 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:53:19" (2/3) ... [2022-11-18 20:53:19,712 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3abe4ae7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:53:19, skipping insertion in model container [2022-11-18 20:53:19,712 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:53:19,712 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:53:19" (3/3) ... [2022-11-18 20:53:19,714 INFO L332 chiAutomizerObserver]: Analyzing ICFG LexIndexValue-Array-1.c [2022-11-18 20:53:19,783 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 20:53:19,784 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 20:53:19,784 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 20:53:19,784 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 20:53:19,784 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 20:53:19,785 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 20:53:19,785 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 20:53:19,786 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 20:53:19,793 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:19,839 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 20:53:19,840 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:19,840 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:19,847 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 20:53:19,847 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:53:19,848 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 20:53:19,848 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:19,851 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 20:53:19,851 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:19,851 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:19,852 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 20:53:19,852 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:53:19,862 INFO L748 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 11#L14-3true [2022-11-18 20:53:19,863 INFO L750 eck$LassoCheckResult]: Loop: 11#L14-3true assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 12#L14-2true main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 11#L14-3true [2022-11-18 20:53:19,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:19,877 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-18 20:53:19,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:19,890 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281864789] [2022-11-18 20:53:19,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:19,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:20,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:20,043 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:20,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:20,095 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:20,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:20,099 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-18 20:53:20,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:20,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335516035] [2022-11-18 20:53:20,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:20,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:20,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:20,129 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:20,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:20,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:20,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:20,164 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-18 20:53:20,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:20,171 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258521213] [2022-11-18 20:53:20,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:20,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:20,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:20,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:20,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:20,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:20,718 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:53:20,720 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:53:20,720 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:53:20,720 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:53:20,720 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 20:53:20,720 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:20,721 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:53:20,721 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:53:20,721 INFO L133 ssoRankerPreferences]: Filename of dumped script: LexIndexValue-Array-1.c_Iteration1_Lasso [2022-11-18 20:53:20,721 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:53:20,721 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:53:20,753 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,766 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,783 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,788 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,798 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,803 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,807 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,966 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,973 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,993 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:20,997 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:21,000 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:53:21,260 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 20:53:21,266 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 20:53:21,268 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,268 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,272 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,335 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-18 20:53:21,336 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,362 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,363 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:53:21,363 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,363 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,364 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,366 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:53:21,366 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:53:21,379 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,399 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,400 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,401 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,413 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-18 20:53:21,429 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,429 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:53:21,430 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,430 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,430 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,431 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:53:21,431 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:53:21,440 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,451 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,451 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,451 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,453 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,466 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-18 20:53:21,467 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,482 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,482 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:53:21,483 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,483 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,483 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,484 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:53:21,484 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:53:21,493 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,504 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,504 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,504 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,510 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,521 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,521 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-18 20:53:21,537 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,537 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,537 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,538 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,554 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:53:21,554 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:53:21,571 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,576 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,577 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,578 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,581 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-18 20:53:21,584 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,597 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,597 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,597 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,597 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,602 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:53:21,602 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:53:21,639 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,644 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,646 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,647 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,649 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,654 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-18 20:53:21,656 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,669 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,669 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:53:21,669 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,669 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,669 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,670 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:53:21,670 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:53:21,680 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,689 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2022-11-18 20:53:21,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,690 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,692 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-18 20:53:21,698 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,710 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,711 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,711 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,711 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,715 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:53:21,715 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:53:21,729 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,740 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,742 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-18 20:53:21,751 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,764 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,764 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,764 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,764 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,779 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:53:21,779 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:53:21,809 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,821 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,823 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-18 20:53:21,836 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,851 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,851 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,851 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,851 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,861 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:53:21,861 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:53:21,875 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,882 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,883 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,884 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,892 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-18 20:53:21,893 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,906 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,906 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:53:21,906 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,907 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:53:21,908 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:53:21,911 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,916 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,916 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,916 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,918 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,920 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-18 20:53:21,921 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,934 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,934 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:53:21,934 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,934 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,934 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,935 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:53:21,935 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:53:21,941 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:53:21,945 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:21,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:21,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:21,947 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:21,951 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-18 20:53:21,953 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:53:21,966 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:53:21,966 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:53:21,966 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:53:21,967 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:53:21,981 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:53:21,981 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:53:22,024 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 20:53:22,067 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2022-11-18 20:53:22,067 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2022-11-18 20:53:22,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:53:22,069 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:22,074 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:53:22,076 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-18 20:53:22,088 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 20:53:22,104 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 20:53:22,104 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 20:53:22,105 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2022-11-18 20:53:22,109 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:22,121 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2022-11-18 20:53:22,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:22,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:22,178 INFO L263 TraceCheckSpWp]: Trace formula consists of 25 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:53:22,179 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:22,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:22,198 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:53:22,199 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:22,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:22,315 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 20:53:22,317 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:22,386 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 28 states and 43 transitions. Complement of second has 8 states. [2022-11-18 20:53:22,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 20:53:22,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:22,428 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:53:22,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 25 transitions. [2022-11-18 20:53:22,432 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 25 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-18 20:53:22,432 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:53:22,432 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 25 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-18 20:53:22,432 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:53:22,432 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 25 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-18 20:53:22,433 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:53:22,433 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 43 transitions. [2022-11-18 20:53:22,436 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:22,440 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 10 states and 14 transitions. [2022-11-18 20:53:22,441 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:22,441 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-11-18 20:53:22,441 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 14 transitions. [2022-11-18 20:53:22,442 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:22,442 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2022-11-18 20:53:22,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 14 transitions. [2022-11-18 20:53:22,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2022-11-18 20:53:22,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 8 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:22,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 13 transitions. [2022-11-18 20:53:22,474 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 13 transitions. [2022-11-18 20:53:22,474 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 13 transitions. [2022-11-18 20:53:22,474 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 20:53:22,474 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 13 transitions. [2022-11-18 20:53:22,475 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:22,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:22,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:22,477 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2022-11-18 20:53:22,477 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:22,477 INFO L748 eck$LassoCheckResult]: Stem: 86#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 87#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 89#L14-3 assume !(main_~i~0#1 < 1048); 83#L19-2 [2022-11-18 20:53:22,478 INFO L750 eck$LassoCheckResult]: Loop: 83#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 84#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 85#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 88#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 83#L19-2 [2022-11-18 20:53:22,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:22,479 INFO L85 PathProgramCache]: Analyzing trace with hash 29861, now seen corresponding path program 1 times [2022-11-18 20:53:22,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:22,479 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143348237] [2022-11-18 20:53:22,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:22,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:22,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:22,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:22,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:22,605 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2143348237] [2022-11-18 20:53:22,606 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2143348237] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:53:22,606 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:53:22,607 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:53:22,607 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [258553273] [2022-11-18 20:53:22,608 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:53:22,612 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:53:22,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:22,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1511655, now seen corresponding path program 1 times [2022-11-18 20:53:22,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:22,613 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255009495] [2022-11-18 20:53:22,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:22,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:22,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:22,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:22,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:22,641 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:22,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:53:22,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:53:22,796 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:53:22,797 INFO L87 Difference]: Start difference. First operand 9 states and 13 transitions. cyclomatic complexity: 6 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:22,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:53:22,814 INFO L93 Difference]: Finished difference Result 10 states and 13 transitions. [2022-11-18 20:53:22,815 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 13 transitions. [2022-11-18 20:53:22,817 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:22,819 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 13 transitions. [2022-11-18 20:53:22,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:22,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:53:22,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2022-11-18 20:53:22,820 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:22,820 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2022-11-18 20:53:22,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2022-11-18 20:53:22,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2022-11-18 20:53:22,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.3333333333333333) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:22,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 12 transitions. [2022-11-18 20:53:22,823 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 12 transitions. [2022-11-18 20:53:22,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:53:22,825 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 12 transitions. [2022-11-18 20:53:22,826 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 20:53:22,826 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 12 transitions. [2022-11-18 20:53:22,828 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:22,828 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:22,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:22,829 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2022-11-18 20:53:22,829 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:22,830 INFO L748 eck$LassoCheckResult]: Stem: 111#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 112#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 114#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 115#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 116#L14-3 assume !(main_~i~0#1 < 1048); 108#L19-2 [2022-11-18 20:53:22,830 INFO L750 eck$LassoCheckResult]: Loop: 108#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 109#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 110#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 113#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 108#L19-2 [2022-11-18 20:53:22,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:22,831 INFO L85 PathProgramCache]: Analyzing trace with hash 28698723, now seen corresponding path program 1 times [2022-11-18 20:53:22,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:22,838 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1516562242] [2022-11-18 20:53:22,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:22,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:22,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:22,953 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:22,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:22,958 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1516562242] [2022-11-18 20:53:22,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1516562242] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:53:22,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1707973473] [2022-11-18 20:53:22,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:22,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:53:22,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:22,968 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:53:22,995 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-18 20:53:23,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:23,029 INFO L263 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:53:23,031 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:23,055 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:23,055 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:53:23,087 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:23,087 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1707973473] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:53:23,088 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:53:23,088 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-11-18 20:53:23,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698476063] [2022-11-18 20:53:23,088 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:53:23,089 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:53:23,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:23,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1511655, now seen corresponding path program 2 times [2022-11-18 20:53:23,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:23,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992506223] [2022-11-18 20:53:23,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:23,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:23,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:23,113 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:23,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:23,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:23,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:53:23,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:53:23,276 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:53:23,276 INFO L87 Difference]: Start difference. First operand 9 states and 12 transitions. cyclomatic complexity: 5 Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:23,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:53:23,324 INFO L93 Difference]: Finished difference Result 15 states and 18 transitions. [2022-11-18 20:53:23,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 18 transitions. [2022-11-18 20:53:23,328 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:23,331 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 18 transitions. [2022-11-18 20:53:23,331 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:23,331 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:53:23,331 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 18 transitions. [2022-11-18 20:53:23,332 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:23,332 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 18 transitions. [2022-11-18 20:53:23,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 18 transitions. [2022-11-18 20:53:23,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-11-18 20:53:23,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.2) internal successors, (18), 14 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:23,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 18 transitions. [2022-11-18 20:53:23,340 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 18 transitions. [2022-11-18 20:53:23,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:53:23,342 INFO L428 stractBuchiCegarLoop]: Abstraction has 15 states and 18 transitions. [2022-11-18 20:53:23,343 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 20:53:23,343 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 18 transitions. [2022-11-18 20:53:23,344 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:23,345 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:23,345 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:23,346 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1] [2022-11-18 20:53:23,346 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:23,346 INFO L748 eck$LassoCheckResult]: Stem: 169#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 170#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 172#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 173#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 174#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 175#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 180#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 179#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 178#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 177#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 176#L14-3 assume !(main_~i~0#1 < 1048); 166#L19-2 [2022-11-18 20:53:23,347 INFO L750 eck$LassoCheckResult]: Loop: 166#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 167#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 168#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 171#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 166#L19-2 [2022-11-18 20:53:23,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:23,347 INFO L85 PathProgramCache]: Analyzing trace with hash -1081477475, now seen corresponding path program 2 times [2022-11-18 20:53:23,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:23,348 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763171996] [2022-11-18 20:53:23,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:23,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:23,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:23,539 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:23,539 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:23,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763171996] [2022-11-18 20:53:23,540 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [763171996] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:53:23,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [763368157] [2022-11-18 20:53:23,540 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:53:23,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:53:23,541 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:23,542 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:53:23,567 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-18 20:53:23,619 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:53:23,619 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:53:23,620 INFO L263 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:53:23,621 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:23,654 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:23,654 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:53:23,738 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:23,738 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [763368157] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:53:23,739 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:53:23,739 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2022-11-18 20:53:23,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834788454] [2022-11-18 20:53:23,739 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:53:23,740 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:53:23,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:23,741 INFO L85 PathProgramCache]: Analyzing trace with hash 1511655, now seen corresponding path program 3 times [2022-11-18 20:53:23,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:23,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535220372] [2022-11-18 20:53:23,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:23,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:23,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:23,748 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:23,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:23,771 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:23,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:53:23,905 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 20:53:23,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-18 20:53:23,906 INFO L87 Difference]: Start difference. First operand 15 states and 18 transitions. cyclomatic complexity: 5 Second operand has 13 states, 12 states have (on average 2.0) internal successors, (24), 13 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:23,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:53:23,987 INFO L93 Difference]: Finished difference Result 27 states and 30 transitions. [2022-11-18 20:53:23,987 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 30 transitions. [2022-11-18 20:53:23,997 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:23,998 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 30 transitions. [2022-11-18 20:53:23,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:23,998 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:53:23,999 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 30 transitions. [2022-11-18 20:53:23,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:23,999 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 30 transitions. [2022-11-18 20:53:24,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 30 transitions. [2022-11-18 20:53:24,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2022-11-18 20:53:24,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 26 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:24,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 30 transitions. [2022-11-18 20:53:24,005 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 30 transitions. [2022-11-18 20:53:24,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:53:24,010 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 30 transitions. [2022-11-18 20:53:24,010 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 20:53:24,010 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 30 transitions. [2022-11-18 20:53:24,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:24,013 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:24,013 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:24,015 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1] [2022-11-18 20:53:24,015 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:24,016 INFO L748 eck$LassoCheckResult]: Stem: 287#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 288#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 290#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 291#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 292#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 293#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 294#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 310#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 309#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 308#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 307#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 306#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 305#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 304#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 303#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 302#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 301#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 300#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 299#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 298#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 297#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 296#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 295#L14-3 assume !(main_~i~0#1 < 1048); 284#L19-2 [2022-11-18 20:53:24,017 INFO L750 eck$LassoCheckResult]: Loop: 284#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 285#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 286#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 289#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 284#L19-2 [2022-11-18 20:53:24,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:24,018 INFO L85 PathProgramCache]: Analyzing trace with hash 899905681, now seen corresponding path program 3 times [2022-11-18 20:53:24,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:24,022 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404482428] [2022-11-18 20:53:24,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:24,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:24,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:24,445 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:24,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:24,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404482428] [2022-11-18 20:53:24,445 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [404482428] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:53:24,446 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [355795677] [2022-11-18 20:53:24,446 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:53:24,446 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:53:24,446 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:24,450 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:53:24,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-18 20:53:24,648 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-18 20:53:24,648 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:53:24,650 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 20:53:24,652 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:24,737 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:24,737 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:53:25,092 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:25,092 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [355795677] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:53:25,092 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:53:25,093 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2022-11-18 20:53:25,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701724750] [2022-11-18 20:53:25,093 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:53:25,094 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:53:25,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:25,094 INFO L85 PathProgramCache]: Analyzing trace with hash 1511655, now seen corresponding path program 4 times [2022-11-18 20:53:25,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:25,094 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220669580] [2022-11-18 20:53:25,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:25,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:25,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:25,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:25,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:25,120 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:25,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:53:25,247 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 20:53:25,247 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-11-18 20:53:25,247 INFO L87 Difference]: Start difference. First operand 27 states and 30 transitions. cyclomatic complexity: 5 Second operand has 25 states, 24 states have (on average 2.0) internal successors, (48), 25 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:25,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:53:25,371 INFO L93 Difference]: Finished difference Result 51 states and 54 transitions. [2022-11-18 20:53:25,371 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 54 transitions. [2022-11-18 20:53:25,372 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:25,373 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 54 transitions. [2022-11-18 20:53:25,373 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:25,373 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:53:25,374 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 54 transitions. [2022-11-18 20:53:25,374 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:25,374 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 54 transitions. [2022-11-18 20:53:25,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 54 transitions. [2022-11-18 20:53:25,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2022-11-18 20:53:25,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0588235294117647) internal successors, (54), 50 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:25,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 54 transitions. [2022-11-18 20:53:25,379 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 54 transitions. [2022-11-18 20:53:25,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-18 20:53:25,380 INFO L428 stractBuchiCegarLoop]: Abstraction has 51 states and 54 transitions. [2022-11-18 20:53:25,380 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 20:53:25,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 54 transitions. [2022-11-18 20:53:25,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:25,381 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:25,381 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:25,383 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1] [2022-11-18 20:53:25,383 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:25,383 INFO L748 eck$LassoCheckResult]: Stem: 525#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 526#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 528#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 531#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 532#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 529#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 530#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 572#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 571#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 570#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 569#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 568#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 567#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 566#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 565#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 564#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 563#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 562#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 561#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 560#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 559#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 558#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 557#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 556#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 555#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 554#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 553#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 552#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 551#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 550#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 549#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 548#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 547#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 546#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 545#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 544#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 543#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 542#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 541#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 540#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 539#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 538#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 537#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 536#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 535#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 534#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 533#L14-3 assume !(main_~i~0#1 < 1048); 522#L19-2 [2022-11-18 20:53:25,383 INFO L750 eck$LassoCheckResult]: Loop: 522#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 523#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 524#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 527#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 522#L19-2 [2022-11-18 20:53:25,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:25,384 INFO L85 PathProgramCache]: Analyzing trace with hash -111832455, now seen corresponding path program 4 times [2022-11-18 20:53:25,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:25,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488027269] [2022-11-18 20:53:25,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:25,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:25,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:26,300 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:26,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:26,300 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488027269] [2022-11-18 20:53:26,300 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1488027269] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:53:26,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [628864830] [2022-11-18 20:53:26,301 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:53:26,301 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:53:26,301 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:26,305 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:53:26,331 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-18 20:53:26,453 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:53:26,454 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:53:26,456 INFO L263 TraceCheckSpWp]: Trace formula consists of 268 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:53:26,463 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:26,623 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:26,623 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:53:27,750 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:27,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [628864830] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:53:27,751 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:53:27,751 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2022-11-18 20:53:27,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430754503] [2022-11-18 20:53:27,751 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:53:27,752 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:53:27,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:27,752 INFO L85 PathProgramCache]: Analyzing trace with hash 1511655, now seen corresponding path program 5 times [2022-11-18 20:53:27,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:27,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148550076] [2022-11-18 20:53:27,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:27,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:27,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:27,761 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:27,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:27,770 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:27,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:53:27,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-18 20:53:27,890 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-11-18 20:53:27,891 INFO L87 Difference]: Start difference. First operand 51 states and 54 transitions. cyclomatic complexity: 5 Second operand has 49 states, 48 states have (on average 2.0) internal successors, (96), 49 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:28,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:53:28,166 INFO L93 Difference]: Finished difference Result 99 states and 102 transitions. [2022-11-18 20:53:28,166 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 102 transitions. [2022-11-18 20:53:28,171 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:28,172 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 102 transitions. [2022-11-18 20:53:28,173 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:28,173 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:53:28,173 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 102 transitions. [2022-11-18 20:53:28,174 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:28,174 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 102 transitions. [2022-11-18 20:53:28,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 102 transitions. [2022-11-18 20:53:28,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2022-11-18 20:53:28,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0303030303030303) internal successors, (102), 98 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:28,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 102 transitions. [2022-11-18 20:53:28,188 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 102 transitions. [2022-11-18 20:53:28,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-18 20:53:28,189 INFO L428 stractBuchiCegarLoop]: Abstraction has 99 states and 102 transitions. [2022-11-18 20:53:28,191 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 20:53:28,191 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 102 transitions. [2022-11-18 20:53:28,192 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:28,192 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:28,193 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:28,195 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1] [2022-11-18 20:53:28,195 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:28,196 INFO L748 eck$LassoCheckResult]: Stem: 1003#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1004#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 1006#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1007#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1008#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1009#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1010#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1098#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1097#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1096#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1095#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1094#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1093#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1092#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1091#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1090#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1089#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1088#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1087#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1086#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1085#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1084#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1083#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1082#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1081#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1080#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1079#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1078#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1077#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1076#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1075#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1074#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1073#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1072#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1071#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1070#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1069#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1068#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1067#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1066#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1065#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1064#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1063#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1062#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1061#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1060#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1059#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1058#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1057#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1056#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1055#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1054#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1053#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1052#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1051#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1050#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1049#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1048#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1047#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1046#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1045#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1044#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1043#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1042#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1041#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1040#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1039#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1038#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1037#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1036#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1035#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1034#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1033#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1032#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1031#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1030#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1029#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1028#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1027#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1026#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1025#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1024#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1023#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1022#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1021#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1020#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1019#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1018#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1017#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1016#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1015#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1014#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1013#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1012#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1011#L14-3 assume !(main_~i~0#1 < 1048); 1000#L19-2 [2022-11-18 20:53:28,196 INFO L750 eck$LassoCheckResult]: Loop: 1000#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 1001#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 1002#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 1005#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1000#L19-2 [2022-11-18 20:53:28,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:28,197 INFO L85 PathProgramCache]: Analyzing trace with hash -1497227703, now seen corresponding path program 5 times [2022-11-18 20:53:28,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:28,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460833622] [2022-11-18 20:53:28,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:28,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:28,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:31,198 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:31,198 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:31,198 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460833622] [2022-11-18 20:53:31,198 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460833622] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:53:31,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1064168990] [2022-11-18 20:53:31,199 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 20:53:31,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:53:31,199 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:31,209 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:53:31,210 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-18 20:53:35,821 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-11-18 20:53:35,821 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:53:35,831 INFO L263 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-18 20:53:35,837 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:53:36,049 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:36,049 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:53:40,224 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:40,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1064168990] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:53:40,224 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:53:40,225 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 96 [2022-11-18 20:53:40,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684315994] [2022-11-18 20:53:40,225 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:53:40,226 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:53:40,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:40,232 INFO L85 PathProgramCache]: Analyzing trace with hash 1511655, now seen corresponding path program 6 times [2022-11-18 20:53:40,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:40,233 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296587483] [2022-11-18 20:53:40,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:40,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:40,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:40,239 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:53:40,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:53:40,247 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:53:40,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:53:40,360 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-18 20:53:40,363 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-11-18 20:53:40,364 INFO L87 Difference]: Start difference. First operand 99 states and 102 transitions. cyclomatic complexity: 5 Second operand has 97 states, 96 states have (on average 2.0) internal successors, (192), 97 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:41,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:53:41,054 INFO L93 Difference]: Finished difference Result 195 states and 198 transitions. [2022-11-18 20:53:41,054 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 198 transitions. [2022-11-18 20:53:41,057 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:41,059 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 198 transitions. [2022-11-18 20:53:41,059 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-18 20:53:41,059 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-18 20:53:41,060 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 198 transitions. [2022-11-18 20:53:41,061 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:53:41,061 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 198 transitions. [2022-11-18 20:53:41,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 198 transitions. [2022-11-18 20:53:41,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2022-11-18 20:53:41,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.0153846153846153) internal successors, (198), 194 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:53:41,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 198 transitions. [2022-11-18 20:53:41,072 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 198 transitions. [2022-11-18 20:53:41,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-11-18 20:53:41,073 INFO L428 stractBuchiCegarLoop]: Abstraction has 195 states and 198 transitions. [2022-11-18 20:53:41,074 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-18 20:53:41,074 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 198 transitions. [2022-11-18 20:53:41,076 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-18 20:53:41,076 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:53:41,076 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:53:41,082 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1] [2022-11-18 20:53:41,082 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-18 20:53:41,083 INFO L748 eck$LassoCheckResult]: Stem: 1961#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1962#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 1964#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1965#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1966#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1967#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1968#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2152#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2151#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2150#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2149#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2148#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2147#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2146#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2145#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2144#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2143#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2142#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2141#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2140#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2139#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2138#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2137#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2136#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2135#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2134#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2133#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2132#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2131#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2130#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2129#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2128#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2127#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2126#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2125#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2124#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2123#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2122#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2121#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2120#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2119#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2118#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2117#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2116#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2115#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2114#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2113#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2112#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2111#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2110#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2109#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2108#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2107#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2106#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2105#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2104#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2103#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2102#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2101#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2100#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2099#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2098#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2097#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2096#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2095#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2094#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2093#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2092#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2091#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2090#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2089#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2088#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2087#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2086#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2085#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2084#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2083#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2082#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2081#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2080#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2079#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2078#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2077#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2076#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2075#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2074#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2073#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2072#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2071#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2070#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2069#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2068#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2067#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2066#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2065#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2064#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2063#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2062#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2061#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2060#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2059#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2058#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2057#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2056#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2055#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2054#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2053#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2052#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2051#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2050#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2049#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2048#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2047#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2046#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2045#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2044#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2043#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2042#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2041#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2040#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2039#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2038#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2037#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2036#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2035#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2034#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2033#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2032#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2031#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2030#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2029#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2028#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2027#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2026#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2025#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2024#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2023#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2022#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2021#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2020#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2019#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2018#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2017#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2016#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2015#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2014#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2013#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2012#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2011#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2010#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2009#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2008#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2007#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2006#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2005#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2004#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2003#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2002#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2001#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2000#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1999#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1998#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1997#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1996#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1995#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1994#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1993#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1992#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1991#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1990#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1989#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1988#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1987#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1986#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1985#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1984#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1983#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1982#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1981#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1980#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1979#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1978#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1977#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1976#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1975#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1974#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1973#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1972#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1971#L14-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1970#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1969#L14-3 assume !(main_~i~0#1 < 1048); 1958#L19-2 [2022-11-18 20:53:41,083 INFO L750 eck$LassoCheckResult]: Loop: 1958#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 1959#L18 assume main_#t~short3#1;call main_#t~mem2#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 1960#L18-2 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1; 1963#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1958#L19-2 [2022-11-18 20:53:41,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:53:41,084 INFO L85 PathProgramCache]: Analyzing trace with hash 2115802601, now seen corresponding path program 6 times [2022-11-18 20:53:41,084 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:53:41,084 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552755154] [2022-11-18 20:53:41,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:53:41,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:53:41,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:53:50,733 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:53:50,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:53:50,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552755154] [2022-11-18 20:53:50,734 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552755154] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:53:50,734 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [198019058] [2022-11-18 20:53:50,734 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 20:53:50,734 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:53:50,734 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:53:50,742 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:53:50,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7c49ba56-eb6a-4673-8128-9a9bbbd8174c/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process