./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-15/array17_alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-15/array17_alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash c64c4370fd8b6e918e28e5e9f3a24e52a6875ae7268f4c7e3f97f19ee293047c --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:04:59,368 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:04:59,370 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:04:59,406 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:04:59,407 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:04:59,408 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:04:59,410 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:04:59,421 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:04:59,424 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:04:59,431 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:04:59,432 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:04:59,434 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:04:59,434 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:04:59,435 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:04:59,437 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:04:59,438 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:04:59,439 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:04:59,440 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:04:59,442 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:04:59,458 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:04:59,460 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:04:59,465 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:04:59,469 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:04:59,472 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:04:59,477 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:04:59,481 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:04:59,481 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:04:59,482 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:04:59,484 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:04:59,486 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:04:59,487 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:04:59,489 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:04:59,491 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:04:59,492 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:04:59,495 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:04:59,495 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:04:59,496 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:04:59,497 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:04:59,497 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:04:59,498 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:04:59,500 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:04:59,501 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-11-18 20:04:59,550 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:04:59,551 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:04:59,551 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:04:59,551 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:04:59,553 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:04:59,553 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:04:59,553 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:04:59,553 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 20:04:59,553 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 20:04:59,554 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 20:04:59,554 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 20:04:59,554 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 20:04:59,554 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 20:04:59,555 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:04:59,555 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:04:59,555 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:04:59,555 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:04:59,555 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 20:04:59,556 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 20:04:59,556 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 20:04:59,556 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:04:59,556 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 20:04:59,556 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:04:59,556 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 20:04:59,557 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:04:59,557 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:04:59,557 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:04:59,557 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:04:59,563 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 20:04:59,563 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c64c4370fd8b6e918e28e5e9f3a24e52a6875ae7268f4c7e3f97f19ee293047c [2022-11-18 20:04:59,948 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:04:59,990 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:04:59,993 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:04:59,995 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:04:59,996 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:04:59,998 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/termination-15/array17_alloca.i [2022-11-18 20:05:00,076 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/data/2972d843f/7725baf15d5c4241b80c75826e9d6d84/FLAGb71c39774 [2022-11-18 20:05:00,682 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:05:00,683 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/sv-benchmarks/c/termination-15/array17_alloca.i [2022-11-18 20:05:00,694 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/data/2972d843f/7725baf15d5c4241b80c75826e9d6d84/FLAGb71c39774 [2022-11-18 20:05:00,978 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/data/2972d843f/7725baf15d5c4241b80c75826e9d6d84 [2022-11-18 20:05:00,980 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:05:00,981 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:05:00,988 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:05:00,988 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:05:00,993 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:05:00,993 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:05:00" (1/1) ... [2022-11-18 20:05:00,995 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@45d6ab3b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:00, skipping insertion in model container [2022-11-18 20:05:00,995 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:05:00" (1/1) ... [2022-11-18 20:05:01,004 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:05:01,041 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:05:01,488 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:05:01,500 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:05:01,565 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:05:01,593 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:05:01,593 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01 WrapperNode [2022-11-18 20:05:01,594 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:05:01,599 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:05:01,599 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:05:01,600 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:05:01,609 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,637 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,658 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 64 [2022-11-18 20:05:01,658 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:05:01,659 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:05:01,659 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:05:01,659 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:05:01,671 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,671 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,686 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,687 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,691 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,696 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,698 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,699 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,701 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:05:01,702 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:05:01,702 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:05:01,703 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:05:01,706 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (1/1) ... [2022-11-18 20:05:01,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:01,727 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:01,746 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:01,752 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 20:05:01,788 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 20:05:01,788 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 20:05:01,788 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:05:01,789 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:05:01,789 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:05:01,789 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:05:01,872 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:05:01,875 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:05:02,101 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:05:02,107 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:05:02,108 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-18 20:05:02,110 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:05:02 BoogieIcfgContainer [2022-11-18 20:05:02,110 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:05:02,111 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 20:05:02,111 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 20:05:02,115 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 20:05:02,116 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:05:02,116 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 08:05:00" (1/3) ... [2022-11-18 20:05:02,117 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5c96252c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:05:02, skipping insertion in model container [2022-11-18 20:05:02,118 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:05:02,118 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:05:01" (2/3) ... [2022-11-18 20:05:02,118 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5c96252c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:05:02, skipping insertion in model container [2022-11-18 20:05:02,118 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:05:02,119 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:05:02" (3/3) ... [2022-11-18 20:05:02,120 INFO L332 chiAutomizerObserver]: Analyzing ICFG array17_alloca.i [2022-11-18 20:05:02,248 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 20:05:02,249 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 20:05:02,249 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 20:05:02,249 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 20:05:02,249 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 20:05:02,249 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 20:05:02,249 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 20:05:02,250 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 20:05:02,271 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:02,314 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-18 20:05:02,315 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:05:02,315 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:05:02,326 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-18 20:05:02,326 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:05:02,326 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 20:05:02,327 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:02,331 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-18 20:05:02,331 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:05:02,331 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:05:02,332 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-18 20:05:02,332 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:05:02,343 INFO L748 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 13#L367true assume !(main_~length~0#1 < 1); 11#L367-2true assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 14#L371true assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 16#L373true assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 4#L375-3true [2022-11-18 20:05:02,344 INFO L750 eck$LassoCheckResult]: Loop: 4#L375-3true assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 9#L375-2true main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 4#L375-3true [2022-11-18 20:05:02,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:02,358 INFO L85 PathProgramCache]: Analyzing trace with hash 889572334, now seen corresponding path program 1 times [2022-11-18 20:05:02,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:02,370 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925498664] [2022-11-18 20:05:02,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:02,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:02,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:02,529 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:02,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:02,588 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:02,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:02,593 INFO L85 PathProgramCache]: Analyzing trace with hash 1955, now seen corresponding path program 1 times [2022-11-18 20:05:02,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:02,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714206132] [2022-11-18 20:05:02,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:02,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:02,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:02,610 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:02,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:02,622 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:02,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:02,624 INFO L85 PathProgramCache]: Analyzing trace with hash 180522064, now seen corresponding path program 1 times [2022-11-18 20:05:02,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:02,625 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093365224] [2022-11-18 20:05:02,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:02,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:02,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:02,660 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:02,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:02,679 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:03,116 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:05:03,117 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:05:03,117 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:05:03,118 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:05:03,118 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 20:05:03,118 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:03,118 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:05:03,119 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:05:03,119 INFO L133 ssoRankerPreferences]: Filename of dumped script: array17_alloca.i_Iteration1_Lasso [2022-11-18 20:05:03,119 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:05:03,120 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:05:03,143 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,155 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,161 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,164 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,168 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,172 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,175 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,179 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,182 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,186 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,190 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,197 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,403 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:03,768 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 20:05:03,773 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 20:05:03,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:03,775 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:03,783 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:03,789 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-18 20:05:03,790 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:03,806 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:03,807 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:03,807 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:03,807 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:03,808 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:03,810 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:03,810 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:03,820 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:03,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:03,835 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:03,836 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:03,838 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:03,849 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:03,864 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-18 20:05:03,864 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:03,865 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:03,865 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:03,865 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:03,870 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:03,870 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:03,886 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:03,891 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:03,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:03,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:03,893 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:03,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-18 20:05:03,900 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:03,914 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:03,915 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:03,915 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:03,915 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:03,915 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:03,916 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:03,916 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:03,925 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:03,935 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:03,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:03,935 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:03,937 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:03,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-18 20:05:03,948 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:03,961 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:03,961 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:03,961 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:03,961 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:03,962 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:03,963 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:03,963 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:03,972 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:03,981 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:03,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:03,982 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:03,984 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:03,995 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-18 20:05:03,995 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,009 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,009 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,009 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,009 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,010 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,010 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,011 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,020 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,028 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,030 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,031 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,040 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,053 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-18 20:05:04,054 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,054 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,054 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,054 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,055 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,056 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,056 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,066 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,075 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,075 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,075 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,077 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,086 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,091 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-18 20:05:04,097 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,097 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,098 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,098 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,098 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,099 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,099 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,110 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,114 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-11-18 20:05:04,115 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,119 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,133 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-18 20:05:04,134 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,148 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,148 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,148 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,148 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,149 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,149 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,150 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,159 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,168 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,170 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,170 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,171 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,176 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,190 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,190 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,190 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-18 20:05:04,190 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,191 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,191 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,191 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,192 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,206 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,212 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,213 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,214 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,224 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,236 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-18 20:05:04,237 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,237 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,237 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,237 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,237 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,238 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,239 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,249 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,255 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,255 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,257 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-18 20:05:04,282 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,282 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,283 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,283 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,286 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:04,286 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:04,298 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,307 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,309 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,310 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,329 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,345 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-18 20:05:04,345 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,345 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:04,346 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,346 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,346 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,347 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:04,347 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:04,349 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,352 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,353 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,353 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,354 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-18 20:05:04,358 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,369 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,369 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,370 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,370 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,374 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:04,374 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:04,387 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,393 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,393 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,393 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,395 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-18 20:05:04,400 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,414 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,414 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,414 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,415 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,420 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:04,422 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:04,450 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:04,455 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,456 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,456 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,457 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,472 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-18 20:05:04,472 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:04,486 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:04,487 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:04,487 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:04,487 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:04,497 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:04,497 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:04,535 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 20:05:04,627 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-18 20:05:04,627 INFO L444 ModelExtractionUtils]: 3 out of 22 variables were initially zero. Simplification set additionally 16 variables to zero. [2022-11-18 20:05:04,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:04,629 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:04,664 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:04,668 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 20:05:04,682 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-18 20:05:04,696 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 20:05:04,697 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 20:05:04,697 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~length~0#1) = -1*ULTIMATE.start_main_~i~0#1 + 1*ULTIMATE.start_main_~length~0#1 Supporting invariants [] [2022-11-18 20:05:04,707 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:04,721 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2022-11-18 20:05:04,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:04,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:04,775 INFO L263 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:05:04,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:05:04,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:04,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 20:05:04,800 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:05:04,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:04,860 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 20:05:04,863 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:04,918 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 34 states and 49 transitions. Complement of second has 7 states. [2022-11-18 20:05:04,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 20:05:04,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:04,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-11-18 20:05:04,929 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 34 transitions. Stem has 6 letters. Loop has 2 letters. [2022-11-18 20:05:04,930 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:05:04,930 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 34 transitions. Stem has 8 letters. Loop has 2 letters. [2022-11-18 20:05:04,930 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:05:04,930 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 34 transitions. Stem has 6 letters. Loop has 4 letters. [2022-11-18 20:05:04,931 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:05:04,932 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 49 transitions. [2022-11-18 20:05:04,935 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:04,938 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 12 states and 16 transitions. [2022-11-18 20:05:04,940 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2022-11-18 20:05:04,940 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 20:05:04,941 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 16 transitions. [2022-11-18 20:05:04,941 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:05:04,941 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 16 transitions. [2022-11-18 20:05:04,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 16 transitions. [2022-11-18 20:05:04,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2022-11-18 20:05:04,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:04,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2022-11-18 20:05:04,974 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 16 transitions. [2022-11-18 20:05:04,974 INFO L428 stractBuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2022-11-18 20:05:04,974 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 20:05:04,974 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2022-11-18 20:05:04,975 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:04,975 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:05:04,975 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:05:04,976 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:05:04,976 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:05:04,976 INFO L748 eck$LassoCheckResult]: Stem: 113#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 114#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 121#L367 assume !(main_~length~0#1 < 1); 115#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 116#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 122#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 117#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 118#L375-4 main_~j~0#1 := 1; 111#L380-2 [2022-11-18 20:05:04,976 INFO L750 eck$LassoCheckResult]: Loop: 111#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 112#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 111#L380-2 [2022-11-18 20:05:04,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:04,977 INFO L85 PathProgramCache]: Analyzing trace with hash 180522006, now seen corresponding path program 1 times [2022-11-18 20:05:04,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:04,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933361683] [2022-11-18 20:05:04,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:04,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:04,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:05,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:05,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:05:05,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933361683] [2022-11-18 20:05:05,115 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1933361683] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:05:05,115 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:05:05,115 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:05:05,116 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632768337] [2022-11-18 20:05:05,116 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:05:05,119 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:05:05,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:05,119 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 1 times [2022-11-18 20:05:05,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:05,121 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993883383] [2022-11-18 20:05:05,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:05,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:05,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,135 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:05,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,142 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:05,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:05:05,278 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:05:05,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:05:05,281 INFO L87 Difference]: Start difference. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:05,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:05:05,320 INFO L93 Difference]: Finished difference Result 13 states and 16 transitions. [2022-11-18 20:05:05,320 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 16 transitions. [2022-11-18 20:05:05,321 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:05,325 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 16 transitions. [2022-11-18 20:05:05,325 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 20:05:05,326 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 20:05:05,326 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 16 transitions. [2022-11-18 20:05:05,326 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:05:05,326 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 16 transitions. [2022-11-18 20:05:05,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 16 transitions. [2022-11-18 20:05:05,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 12. [2022-11-18 20:05:05,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.25) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:05,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 15 transitions. [2022-11-18 20:05:05,331 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 15 transitions. [2022-11-18 20:05:05,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:05:05,332 INFO L428 stractBuchiCegarLoop]: Abstraction has 12 states and 15 transitions. [2022-11-18 20:05:05,333 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 20:05:05,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 15 transitions. [2022-11-18 20:05:05,335 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:05,335 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:05:05,335 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:05:05,337 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:05:05,337 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:05:05,337 INFO L748 eck$LassoCheckResult]: Stem: 145#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 146#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 153#L367 assume !(main_~length~0#1 < 1); 147#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 148#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 154#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 149#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 150#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 151#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 152#L375-4 main_~j~0#1 := 1; 143#L380-2 [2022-11-18 20:05:05,337 INFO L750 eck$LassoCheckResult]: Loop: 143#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 144#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 143#L380-2 [2022-11-18 20:05:05,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:05,338 INFO L85 PathProgramCache]: Analyzing trace with hash 1683012600, now seen corresponding path program 1 times [2022-11-18 20:05:05,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:05,341 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887680003] [2022-11-18 20:05:05,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:05,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:05,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:05,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,409 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:05,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:05,410 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 2 times [2022-11-18 20:05:05,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:05,410 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520394164] [2022-11-18 20:05:05,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:05,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:05,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,435 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:05,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,441 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:05,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:05,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1827560517, now seen corresponding path program 1 times [2022-11-18 20:05:05,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:05,451 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651775761] [2022-11-18 20:05:05,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:05,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:05,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:05,608 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:05,609 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:05:05,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651775761] [2022-11-18 20:05:05,609 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651775761] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:05:05,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1204243328] [2022-11-18 20:05:05,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:05,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:05:05,610 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:05,612 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:05:05,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-18 20:05:05,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:05,684 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:05:05,685 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:05:05,721 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:05,722 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:05:05,755 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:05,756 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1204243328] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:05:05,756 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:05:05,757 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 7 [2022-11-18 20:05:05,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643044910] [2022-11-18 20:05:05,757 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:05:05,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:05:05,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:05:05,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:05:05,861 INFO L87 Difference]: Start difference. First operand 12 states and 15 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 2.4285714285714284) internal successors, (17), 7 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:05,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:05:05,959 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2022-11-18 20:05:05,959 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 28 transitions. [2022-11-18 20:05:05,960 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:05,960 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 15 states and 17 transitions. [2022-11-18 20:05:05,961 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 20:05:05,961 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 20:05:05,961 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 17 transitions. [2022-11-18 20:05:05,961 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:05:05,961 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-11-18 20:05:05,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 17 transitions. [2022-11-18 20:05:05,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 14. [2022-11-18 20:05:05,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:05,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 16 transitions. [2022-11-18 20:05:05,964 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2022-11-18 20:05:05,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-18 20:05:05,965 INFO L428 stractBuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2022-11-18 20:05:05,966 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 20:05:05,966 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 16 transitions. [2022-11-18 20:05:05,966 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:05,967 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:05:05,967 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:05:05,967 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:05:05,968 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:05:05,968 INFO L748 eck$LassoCheckResult]: Stem: 271#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 272#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 275#L367 assume !(main_~length~0#1 < 1); 273#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 274#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 276#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 267#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 268#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 269#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 270#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 278#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 277#L375-4 main_~j~0#1 := 1; 265#L380-2 [2022-11-18 20:05:05,968 INFO L750 eck$LassoCheckResult]: Loop: 265#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 266#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 265#L380-2 [2022-11-18 20:05:05,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:05,969 INFO L85 PathProgramCache]: Analyzing trace with hash -1827505318, now seen corresponding path program 2 times [2022-11-18 20:05:05,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:05,969 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822649504] [2022-11-18 20:05:05,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:05,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:05,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:05,987 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:05,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:06,002 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:06,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:06,003 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 3 times [2022-11-18 20:05:06,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:06,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66509492] [2022-11-18 20:05:06,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:06,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:06,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:06,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:06,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:06,015 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:06,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:06,016 INFO L85 PathProgramCache]: Analyzing trace with hash 409014941, now seen corresponding path program 2 times [2022-11-18 20:05:06,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:06,017 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264628853] [2022-11-18 20:05:06,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:06,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:06,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:06,040 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:05:06,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:05:06,059 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:05:06,286 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:06,673 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:05:06,674 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:05:06,674 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:05:06,674 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:05:06,674 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 20:05:06,674 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:06,674 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:05:06,674 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:05:06,675 INFO L133 ssoRankerPreferences]: Filename of dumped script: array17_alloca.i_Iteration4_Lasso [2022-11-18 20:05:06,675 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:05:06,675 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:05:06,678 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:06,682 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:06,685 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:06,690 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:06,693 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,026 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,029 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,033 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,036 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,039 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,042 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,046 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:05:07,403 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 20:05:07,403 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 20:05:07,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,404 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,411 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,420 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-11-18 20:05:07,420 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,435 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,435 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:07,436 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,436 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,436 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,438 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:07,438 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:07,454 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:07,463 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,465 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,482 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,495 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-11-18 20:05:07,496 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,497 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:07,497 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,497 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,497 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,498 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:07,498 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:07,514 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:07,524 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,526 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,535 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,547 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-11-18 20:05:07,549 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,549 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,549 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,550 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,553 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:07,553 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:07,570 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:07,580 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,582 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,593 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,606 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-11-18 20:05:07,607 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,607 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:05:07,607 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,607 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,607 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,608 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:05:07,608 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:05:07,622 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:07,630 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,631 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,631 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,633 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,637 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2022-11-18 20:05:07,651 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,652 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,652 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,652 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,657 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:07,658 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:07,683 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:07,685 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2022-11-18 20:05:07,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,687 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,690 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2022-11-18 20:05:07,691 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,702 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,703 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,703 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,703 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,718 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:07,718 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:07,731 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:05:07,741 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,742 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,751 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:05:07,766 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2022-11-18 20:05:07,767 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:05:07,767 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:05:07,767 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:05:07,767 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:05:07,779 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:05:07,780 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:05:07,803 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 20:05:07,876 INFO L443 ModelExtractionUtils]: Simplification made 19 calls to the SMT solver. [2022-11-18 20:05:07,877 INFO L444 ModelExtractionUtils]: 2 out of 25 variables were initially zero. Simplification set additionally 20 variables to zero. [2022-11-18 20:05:07,877 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:05:07,877 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:07,881 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:05:07,883 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 20:05:07,897 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2022-11-18 20:05:07,908 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 20:05:07,908 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 20:05:07,909 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2022-11-18 20:05:07,914 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,933 INFO L156 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2022-11-18 20:05:07,962 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2022-11-18 20:05:07,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:07,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:08,000 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:05:08,002 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:05:08,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:08,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 20:05:08,032 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:05:08,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:08,051 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 20:05:08,052 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 14 states and 16 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:08,075 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 14 states and 16 transitions. cyclomatic complexity: 4. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 18 states and 22 transitions. Complement of second has 5 states. [2022-11-18 20:05:08,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-11-18 20:05:08,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:08,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2022-11-18 20:05:08,078 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 12 letters. Loop has 2 letters. [2022-11-18 20:05:08,078 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:05:08,078 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 14 letters. Loop has 2 letters. [2022-11-18 20:05:08,079 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:05:08,079 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 12 letters. Loop has 4 letters. [2022-11-18 20:05:08,079 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:05:08,080 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 22 transitions. [2022-11-18 20:05:08,081 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:08,082 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 22 transitions. [2022-11-18 20:05:08,082 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2022-11-18 20:05:08,083 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2022-11-18 20:05:08,083 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2022-11-18 20:05:08,083 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:05:08,083 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-11-18 20:05:08,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2022-11-18 20:05:08,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-11-18 20:05:08,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:05:08,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 22 transitions. [2022-11-18 20:05:08,088 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-11-18 20:05:08,088 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-11-18 20:05:08,089 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 20:05:08,089 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 22 transitions. [2022-11-18 20:05:08,089 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:05:08,090 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:05:08,090 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:05:08,091 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:05:08,091 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:05:08,092 INFO L748 eck$LassoCheckResult]: Stem: 384#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 385#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 392#L367 assume !(main_~length~0#1 < 1); 386#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 387#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 393#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 388#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 389#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 390#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 391#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 396#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 394#L375-4 main_~j~0#1 := 1; 395#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 383#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 379#L380-2 [2022-11-18 20:05:08,092 INFO L750 eck$LassoCheckResult]: Loop: 379#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 380#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 379#L380-2 [2022-11-18 20:05:08,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:05:08,093 INFO L85 PathProgramCache]: Analyzing trace with hash 409014943, now seen corresponding path program 1 times [2022-11-18 20:05:08,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:05:08,093 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640721670] [2022-11-18 20:05:08,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:08,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:05:08,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:08,796 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:08,796 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:05:08,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640721670] [2022-11-18 20:05:08,797 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [640721670] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:05:08,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [943239967] [2022-11-18 20:05:08,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:05:08,798 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:05:08,798 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:05:08,799 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:05:08,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-18 20:05:08,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:05:08,866 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-18 20:05:08,871 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:05:08,936 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:05:09,000 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:05:09,004 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 20:05:09,149 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:05:09,151 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:05:09,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:05:09,159 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:05:09,159 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 34 treesize of output 18 [2022-11-18 20:05:09,187 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:05:09,187 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:02,371 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2022-11-18 20:06:02,385 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:06:02,386 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1290 treesize of output 1082 [2022-11-18 20:06:03,096 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:03,097 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [943239967] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:03,097 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:03,097 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 7] total 16 [2022-11-18 20:06:03,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673176565] [2022-11-18 20:06:03,098 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:03,100 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:03,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:03,101 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 4 times [2022-11-18 20:06:03,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:03,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074949531] [2022-11-18 20:06:03,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:03,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:03,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:03,110 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:03,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:03,123 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:03,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:03,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-18 20:06:03,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=214, Unknown=3, NotChecked=0, Total=272 [2022-11-18 20:06:03,220 INFO L87 Difference]: Start difference. First operand 18 states and 22 transitions. cyclomatic complexity: 7 Second operand has 17 states, 16 states have (on average 1.8125) internal successors, (29), 17 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:03,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:03,547 INFO L93 Difference]: Finished difference Result 35 states and 43 transitions. [2022-11-18 20:06:03,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 43 transitions. [2022-11-18 20:06:03,547 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-18 20:06:03,548 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 33 states and 41 transitions. [2022-11-18 20:06:03,548 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-18 20:06:03,548 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-18 20:06:03,548 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 41 transitions. [2022-11-18 20:06:03,548 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:06:03,548 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33 states and 41 transitions. [2022-11-18 20:06:03,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 41 transitions. [2022-11-18 20:06:03,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 24. [2022-11-18 20:06:03,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.25) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:03,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 30 transitions. [2022-11-18 20:06:03,550 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2022-11-18 20:06:03,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 20:06:03,553 INFO L428 stractBuchiCegarLoop]: Abstraction has 24 states and 30 transitions. [2022-11-18 20:06:03,554 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 20:06:03,554 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 30 transitions. [2022-11-18 20:06:03,555 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:03,558 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:03,558 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:03,559 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:06:03,559 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:03,559 INFO L748 eck$LassoCheckResult]: Stem: 548#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 549#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 553#L367 assume !(main_~length~0#1 < 1); 550#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 551#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 554#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 544#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 545#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 546#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 547#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 556#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 555#L375-4 main_~j~0#1 := 1; 540#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 541#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 542#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 543#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 552#L380-2 [2022-11-18 20:06:03,559 INFO L750 eck$LassoCheckResult]: Loop: 552#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 559#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 552#L380-2 [2022-11-18 20:06:03,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:03,560 INFO L85 PathProgramCache]: Analyzing trace with hash -2073631454, now seen corresponding path program 1 times [2022-11-18 20:06:03,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:03,560 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81638030] [2022-11-18 20:06:03,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:03,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:03,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:03,681 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:03,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:03,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [81638030] [2022-11-18 20:06:03,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [81638030] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:03,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1015317505] [2022-11-18 20:06:03,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:03,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:03,683 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:03,687 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:03,706 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-18 20:06:03,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:03,752 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-18 20:06:03,753 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:03,828 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:03,828 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:03,897 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:03,897 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1015317505] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:03,897 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:03,897 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 12 [2022-11-18 20:06:03,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837545783] [2022-11-18 20:06:03,898 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:03,898 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:03,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:03,898 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 5 times [2022-11-18 20:06:03,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:03,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418310638] [2022-11-18 20:06:03,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:03,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:03,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:03,902 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:03,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:03,910 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:04,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:04,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-18 20:06:04,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2022-11-18 20:06:04,012 INFO L87 Difference]: Start difference. First operand 24 states and 30 transitions. cyclomatic complexity: 9 Second operand has 12 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 12 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:04,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:04,114 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2022-11-18 20:06:04,114 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 33 transitions. [2022-11-18 20:06:04,115 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:04,115 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 24 states and 29 transitions. [2022-11-18 20:06:04,115 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2022-11-18 20:06:04,115 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2022-11-18 20:06:04,115 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 29 transitions. [2022-11-18 20:06:04,116 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:06:04,116 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 29 transitions. [2022-11-18 20:06:04,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 29 transitions. [2022-11-18 20:06:04,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-11-18 20:06:04,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 23 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:04,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 29 transitions. [2022-11-18 20:06:04,118 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 29 transitions. [2022-11-18 20:06:04,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 20:06:04,119 INFO L428 stractBuchiCegarLoop]: Abstraction has 24 states and 29 transitions. [2022-11-18 20:06:04,120 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 20:06:04,120 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 29 transitions. [2022-11-18 20:06:04,120 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:04,120 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:04,121 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:04,122 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:06:04,122 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:04,122 INFO L748 eck$LassoCheckResult]: Stem: 714#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 715#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 717#L367 assume !(main_~length~0#1 < 1); 708#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 709#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 716#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 710#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 711#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 712#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 713#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 726#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 724#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 725#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 718#L375-4 main_~j~0#1 := 1; 719#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 706#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 705#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 707#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 703#L380-2 [2022-11-18 20:06:04,122 INFO L750 eck$LassoCheckResult]: Loop: 703#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 704#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 703#L380-2 [2022-11-18 20:06:04,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:04,123 INFO L85 PathProgramCache]: Analyzing trace with hash -457174268, now seen corresponding path program 2 times [2022-11-18 20:06:04,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:04,123 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919421263] [2022-11-18 20:06:04,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:04,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:04,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:04,612 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:04,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:04,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1919421263] [2022-11-18 20:06:04,613 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1919421263] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:04,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1391687136] [2022-11-18 20:06:04,613 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:06:04,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:04,613 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:04,617 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:04,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-11-18 20:06:04,688 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:06:04,689 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:04,690 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:06:04,694 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:04,785 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:06:04,871 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 20:06:05,150 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:06:05,151 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:06:05,153 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:06:05,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:06:05,161 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:06:05,161 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 34 treesize of output 18 [2022-11-18 20:06:05,167 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:05,167 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:05,517 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2022-11-18 20:06:05,526 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:06:05,527 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 526 treesize of output 462 [2022-11-18 20:06:05,792 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:05,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1391687136] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:05,793 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:05,793 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 10] total 23 [2022-11-18 20:06:05,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96432978] [2022-11-18 20:06:05,793 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:05,794 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:05,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:05,794 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 6 times [2022-11-18 20:06:05,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:05,795 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096510012] [2022-11-18 20:06:05,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:05,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:05,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:05,799 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:05,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:05,802 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:05,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:05,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 20:06:05,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=469, Unknown=0, NotChecked=0, Total=552 [2022-11-18 20:06:05,903 INFO L87 Difference]: Start difference. First operand 24 states and 29 transitions. cyclomatic complexity: 8 Second operand has 24 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 24 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:06,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:06,420 INFO L93 Difference]: Finished difference Result 51 states and 63 transitions. [2022-11-18 20:06:06,421 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 63 transitions. [2022-11-18 20:06:06,421 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2022-11-18 20:06:06,423 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 49 states and 61 transitions. [2022-11-18 20:06:06,423 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2022-11-18 20:06:06,424 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2022-11-18 20:06:06,424 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 61 transitions. [2022-11-18 20:06:06,424 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:06:06,424 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 61 transitions. [2022-11-18 20:06:06,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 61 transitions. [2022-11-18 20:06:06,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 35. [2022-11-18 20:06:06,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.2285714285714286) internal successors, (43), 34 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:06,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 43 transitions. [2022-11-18 20:06:06,428 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35 states and 43 transitions. [2022-11-18 20:06:06,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-18 20:06:06,430 INFO L428 stractBuchiCegarLoop]: Abstraction has 35 states and 43 transitions. [2022-11-18 20:06:06,430 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-18 20:06:06,430 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 43 transitions. [2022-11-18 20:06:06,431 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:06,431 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:06,431 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:06,431 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:06:06,432 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:06,432 INFO L748 eck$LassoCheckResult]: Stem: 925#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 926#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 935#L367 assume !(main_~length~0#1 < 1); 927#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 928#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 936#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 929#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 930#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 939#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 943#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 931#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 932#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 951#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 949#L375-4 main_~j~0#1 := 1; 944#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 945#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 923#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 924#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 934#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 933#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 921#L380-2 [2022-11-18 20:06:06,432 INFO L750 eck$LassoCheckResult]: Loop: 921#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 922#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 921#L380-2 [2022-11-18 20:06:06,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:06,433 INFO L85 PathProgramCache]: Analyzing trace with hash -1257807801, now seen corresponding path program 3 times [2022-11-18 20:06:06,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:06,433 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146206258] [2022-11-18 20:06:06,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:06,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:06,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:06,563 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:06,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:06,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146206258] [2022-11-18 20:06:06,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146206258] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:06,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1389029525] [2022-11-18 20:06:06,564 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:06:06,564 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:06,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:06,571 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:06,590 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-11-18 20:06:06,641 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-18 20:06:06,641 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:06,642 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-18 20:06:06,643 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:06,758 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:06,758 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:06,869 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:06,870 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1389029525] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:06,870 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:06,870 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 14 [2022-11-18 20:06:06,870 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870745615] [2022-11-18 20:06:06,870 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:06,870 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:06,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:06,871 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 7 times [2022-11-18 20:06:06,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:06,871 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503515019] [2022-11-18 20:06:06,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:06,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:06,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:06,874 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:06,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:06,877 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:06,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:06,984 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-18 20:06:06,984 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=132, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:06:06,984 INFO L87 Difference]: Start difference. First operand 35 states and 43 transitions. cyclomatic complexity: 11 Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 14 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:07,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:07,120 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2022-11-18 20:06:07,120 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 46 transitions. [2022-11-18 20:06:07,120 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:07,121 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 33 states and 40 transitions. [2022-11-18 20:06:07,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-18 20:06:07,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-18 20:06:07,124 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 40 transitions. [2022-11-18 20:06:07,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:06:07,125 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33 states and 40 transitions. [2022-11-18 20:06:07,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 40 transitions. [2022-11-18 20:06:07,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2022-11-18 20:06:07,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.2121212121212122) internal successors, (40), 32 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:07,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 40 transitions. [2022-11-18 20:06:07,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 33 states and 40 transitions. [2022-11-18 20:06:07,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:06:07,130 INFO L428 stractBuchiCegarLoop]: Abstraction has 33 states and 40 transitions. [2022-11-18 20:06:07,131 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-18 20:06:07,131 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 40 transitions. [2022-11-18 20:06:07,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:07,132 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:07,133 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:07,133 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:06:07,134 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:07,134 INFO L748 eck$LassoCheckResult]: Stem: 1144#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1145#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1148#L367 assume !(main_~length~0#1 < 1); 1138#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1139#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 1149#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 1140#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1141#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1142#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1143#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1152#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1158#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1157#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1156#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1154#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 1150#L375-4 main_~j~0#1 := 1; 1151#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1153#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 1164#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1162#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 1134#L380-2 [2022-11-18 20:06:07,134 INFO L750 eck$LassoCheckResult]: Loop: 1134#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1135#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1134#L380-2 [2022-11-18 20:06:07,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:07,135 INFO L85 PathProgramCache]: Analyzing trace with hash -1819977752, now seen corresponding path program 2 times [2022-11-18 20:06:07,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:07,135 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853856032] [2022-11-18 20:06:07,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:07,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:07,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:07,220 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-18 20:06:07,220 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:07,220 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853856032] [2022-11-18 20:06:07,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1853856032] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:07,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1680061564] [2022-11-18 20:06:07,221 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:06:07,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:07,221 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:07,231 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:07,246 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-11-18 20:06:07,297 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:06:07,297 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:07,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:06:07,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:07,322 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-18 20:06:07,323 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:06:07,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1680061564] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:06:07,323 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 20:06:07,323 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2022-11-18 20:06:07,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1784430214] [2022-11-18 20:06:07,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:06:07,324 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:07,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:07,327 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 8 times [2022-11-18 20:06:07,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:07,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724462886] [2022-11-18 20:06:07,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:07,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:07,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:07,332 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:07,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:07,336 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:07,435 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:07,435 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:06:07,435 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:06:07,435 INFO L87 Difference]: Start difference. First operand 33 states and 40 transitions. cyclomatic complexity: 10 Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:07,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:07,456 INFO L93 Difference]: Finished difference Result 33 states and 37 transitions. [2022-11-18 20:06:07,456 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 37 transitions. [2022-11-18 20:06:07,457 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:07,457 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 29 states and 33 transitions. [2022-11-18 20:06:07,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2022-11-18 20:06:07,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2022-11-18 20:06:07,457 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 33 transitions. [2022-11-18 20:06:07,457 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:06:07,458 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 33 transitions. [2022-11-18 20:06:07,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 33 transitions. [2022-11-18 20:06:07,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2022-11-18 20:06:07,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:07,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-11-18 20:06:07,460 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-18 20:06:07,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:06:07,464 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-18 20:06:07,464 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-18 20:06:07,464 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-11-18 20:06:07,464 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:07,464 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:07,464 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:07,465 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:06:07,465 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:07,465 INFO L748 eck$LassoCheckResult]: Stem: 1268#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1269#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1279#L367 assume !(main_~length~0#1 < 1); 1270#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1271#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 1280#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 1272#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1273#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1274#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1275#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1292#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1291#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1290#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1289#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1286#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 1285#L375-4 main_~j~0#1 := 1; 1284#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1283#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1267#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1266#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1278#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1276#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 1277#L380-2 [2022-11-18 20:06:07,465 INFO L750 eck$LassoCheckResult]: Loop: 1277#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1282#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1277#L380-2 [2022-11-18 20:06:07,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:07,466 INFO L85 PathProgramCache]: Analyzing trace with hash -948777687, now seen corresponding path program 4 times [2022-11-18 20:06:07,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:07,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1199215871] [2022-11-18 20:06:07,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:07,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:07,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:08,075 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:08,075 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:08,075 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1199215871] [2022-11-18 20:06:08,075 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1199215871] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:08,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [980577483] [2022-11-18 20:06:08,076 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:06:08,076 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:08,076 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:08,081 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:08,098 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-11-18 20:06:08,165 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:06:08,165 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:08,167 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-18 20:06:08,169 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:08,246 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:06:08,355 INFO L321 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-11-18 20:06:08,356 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 36 [2022-11-18 20:06:09,029 INFO L321 Elim1Store]: treesize reduction 58, result has 10.8 percent of original size [2022-11-18 20:06:09,029 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 63 treesize of output 36 [2022-11-18 20:06:09,040 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:09,040 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:07:30,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2022-11-18 20:07:30,452 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:07:30,453 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 614 treesize of output 524 [2022-11-18 20:07:30,731 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 1 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:30,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [980577483] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:07:30,731 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:07:30,731 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 31 [2022-11-18 20:07:30,731 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [280986119] [2022-11-18 20:07:30,732 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:07:30,732 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:07:30,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:30,732 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 9 times [2022-11-18 20:07:30,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:30,733 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460419242] [2022-11-18 20:07:30,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:30,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:30,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:07:30,736 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:07:30,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:07:30,739 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:07:30,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:30,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-11-18 20:07:30,848 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=826, Unknown=4, NotChecked=0, Total=992 [2022-11-18 20:07:30,848 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 32 states, 31 states have (on average 1.5806451612903225) internal successors, (49), 32 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:34,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:34,648 INFO L93 Difference]: Finished difference Result 33 states and 38 transitions. [2022-11-18 20:07:34,649 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 38 transitions. [2022-11-18 20:07:34,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:07:34,650 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 24 states and 27 transitions. [2022-11-18 20:07:34,650 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2022-11-18 20:07:34,650 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2022-11-18 20:07:34,650 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 27 transitions. [2022-11-18 20:07:34,651 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:07:34,651 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 27 transitions. [2022-11-18 20:07:34,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 27 transitions. [2022-11-18 20:07:34,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-11-18 20:07:34,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.125) internal successors, (27), 23 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:34,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2022-11-18 20:07:34,653 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 27 transitions. [2022-11-18 20:07:34,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 20:07:34,655 INFO L428 stractBuchiCegarLoop]: Abstraction has 24 states and 27 transitions. [2022-11-18 20:07:34,655 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-18 20:07:34,655 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 27 transitions. [2022-11-18 20:07:34,656 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:07:34,656 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:07:34,656 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:07:34,657 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:34,657 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:07:34,657 INFO L748 eck$LassoCheckResult]: Stem: 1518#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1519#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1522#L367 assume !(main_~length~0#1 < 1); 1520#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1521#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 1523#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 1514#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1515#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1516#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1517#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1532#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1531#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1530#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1529#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1528#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1527#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1526#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 1524#L375-4 main_~j~0#1 := 1; 1525#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1512#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1511#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1513#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 1509#L380-2 [2022-11-18 20:07:34,657 INFO L750 eck$LassoCheckResult]: Loop: 1509#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1510#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1509#L380-2 [2022-11-18 20:07:34,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:34,658 INFO L85 PathProgramCache]: Analyzing trace with hash -1510949560, now seen corresponding path program 5 times [2022-11-18 20:07:34,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:34,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691567786] [2022-11-18 20:07:34,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:34,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:34,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:35,434 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:35,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:35,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691567786] [2022-11-18 20:07:35,434 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691567786] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:07:35,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1999107831] [2022-11-18 20:07:35,434 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 20:07:35,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:35,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:07:35,443 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:07:35,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-11-18 20:07:35,533 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-18 20:07:35,533 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:07:35,534 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-18 20:07:35,537 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:07:35,675 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:07:35,779 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2022-11-18 20:07:35,906 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:07:35,907 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 41 [2022-11-18 20:07:36,005 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:07:36,005 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 41 [2022-11-18 20:07:36,343 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:07:36,344 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:07:36,349 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:07:36,350 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 42 treesize of output 18 [2022-11-18 20:07:36,354 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:36,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:07:37,239 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 73 [2022-11-18 20:07:37,250 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:07:37,250 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1087 treesize of output 1023 [2022-11-18 20:07:37,638 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:37,639 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1999107831] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:07:37,639 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:07:37,639 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15, 16] total 34 [2022-11-18 20:07:37,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011411837] [2022-11-18 20:07:37,639 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:07:37,640 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:07:37,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:37,640 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 10 times [2022-11-18 20:07:37,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:37,640 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79749705] [2022-11-18 20:07:37,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:37,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:37,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:07:37,644 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:07:37,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:07:37,647 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:07:37,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:37,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-18 20:07:37,741 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=1024, Unknown=0, NotChecked=0, Total=1190 [2022-11-18 20:07:37,741 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. cyclomatic complexity: 6 Second operand has 35 states, 34 states have (on average 1.5588235294117647) internal successors, (53), 35 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:38,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:38,285 INFO L93 Difference]: Finished difference Result 42 states and 50 transitions. [2022-11-18 20:07:38,286 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 50 transitions. [2022-11-18 20:07:38,287 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:07:38,287 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 41 states and 48 transitions. [2022-11-18 20:07:38,287 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2022-11-18 20:07:38,288 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-11-18 20:07:38,288 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 48 transitions. [2022-11-18 20:07:38,288 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:07:38,288 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 48 transitions. [2022-11-18 20:07:38,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 48 transitions. [2022-11-18 20:07:38,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 36. [2022-11-18 20:07:38,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.1944444444444444) internal successors, (43), 35 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:38,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 43 transitions. [2022-11-18 20:07:38,291 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 43 transitions. [2022-11-18 20:07:38,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-11-18 20:07:38,292 INFO L428 stractBuchiCegarLoop]: Abstraction has 36 states and 43 transitions. [2022-11-18 20:07:38,292 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-18 20:07:38,292 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 43 transitions. [2022-11-18 20:07:38,295 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:07:38,295 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:07:38,296 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:07:38,296 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:38,298 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:07:38,298 INFO L748 eck$LassoCheckResult]: Stem: 1754#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1755#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1760#L367 assume !(main_~length~0#1 < 1); 1756#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1757#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 1761#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 1750#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1751#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1752#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1753#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1781#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1780#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1779#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1778#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1777#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 1776#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 1775#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 1762#L375-4 main_~j~0#1 := 1; 1746#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1747#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1748#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1749#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1763#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1758#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 1759#L380-2 [2022-11-18 20:07:38,298 INFO L750 eck$LassoCheckResult]: Loop: 1759#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 1764#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 1759#L380-2 [2022-11-18 20:07:38,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:38,299 INFO L85 PathProgramCache]: Analyzing trace with hash -323581557, now seen corresponding path program 6 times [2022-11-18 20:07:38,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:38,299 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695018385] [2022-11-18 20:07:38,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:38,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:38,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:38,893 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:38,893 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:38,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695018385] [2022-11-18 20:07:38,894 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1695018385] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:07:38,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [5039095] [2022-11-18 20:07:38,894 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 20:07:38,894 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:38,894 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:07:38,897 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:07:38,898 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2022-11-18 20:07:38,978 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-11-18 20:07:38,978 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:07:38,980 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-18 20:07:38,983 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:07:39,137 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:07:39,231 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2022-11-18 20:07:39,324 INFO L321 Elim1Store]: treesize reduction 32, result has 49.2 percent of original size [2022-11-18 20:07:39,325 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 44 treesize of output 52 [2022-11-18 20:07:40,066 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:07:40,068 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:40,069 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:07:40,098 INFO L321 Elim1Store]: treesize reduction 34, result has 35.8 percent of original size [2022-11-18 20:07:40,098 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 59 treesize of output 45 [2022-11-18 20:07:40,147 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:40,147 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:08:09,106 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 61 [2022-11-18 20:08:09,140 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:09,141 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34874 treesize of output 31290 [2022-11-18 20:08:25,448 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:25,448 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [5039095] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:08:25,448 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:08:25,449 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 16, 15] total 37 [2022-11-18 20:08:25,449 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994689990] [2022-11-18 20:08:25,449 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:08:25,449 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:08:25,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:25,450 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 11 times [2022-11-18 20:08:25,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:25,450 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061118911] [2022-11-18 20:08:25,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:25,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:25,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:08:25,454 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:08:25,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:08:25,457 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:08:25,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:08:25,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-11-18 20:08:25,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=1229, Unknown=2, NotChecked=0, Total=1406 [2022-11-18 20:08:25,549 INFO L87 Difference]: Start difference. First operand 36 states and 43 transitions. cyclomatic complexity: 10 Second operand has 38 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 38 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:08:37,835 WARN L233 SmtUtils]: Spent 12.05s on a formula simplification. DAG size of input: 54 DAG size of output: 27 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:08:38,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:08:38,418 INFO L93 Difference]: Finished difference Result 50 states and 58 transitions. [2022-11-18 20:08:38,418 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 50 states and 58 transitions. [2022-11-18 20:08:38,418 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:08:38,419 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 50 states to 49 states and 56 transitions. [2022-11-18 20:08:38,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2022-11-18 20:08:38,419 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2022-11-18 20:08:38,420 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 56 transitions. [2022-11-18 20:08:38,420 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:08:38,420 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 56 transitions. [2022-11-18 20:08:38,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 56 transitions. [2022-11-18 20:08:38,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 40. [2022-11-18 20:08:38,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.175) internal successors, (47), 39 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:08:38,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 47 transitions. [2022-11-18 20:08:38,424 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 47 transitions. [2022-11-18 20:08:38,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-18 20:08:38,425 INFO L428 stractBuchiCegarLoop]: Abstraction has 40 states and 47 transitions. [2022-11-18 20:08:38,425 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-18 20:08:38,426 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 47 transitions. [2022-11-18 20:08:38,426 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:08:38,426 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:08:38,426 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:08:38,427 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:08:38,427 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:08:38,427 INFO L748 eck$LassoCheckResult]: Stem: 2031#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2032#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2042#L367 assume !(main_~length~0#1 < 1); 2033#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2034#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 2043#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 2035#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2036#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2037#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2038#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2045#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2065#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2064#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2063#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2062#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2061#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2060#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 2058#L375-4 main_~j~0#1 := 1; 2067#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2066#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2030#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2029#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2041#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2047#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2046#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2039#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 2040#L380-2 [2022-11-18 20:08:38,428 INFO L750 eck$LassoCheckResult]: Loop: 2040#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2048#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2040#L380-2 [2022-11-18 20:08:38,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:38,428 INFO L85 PathProgramCache]: Analyzing trace with hash -1724231410, now seen corresponding path program 7 times [2022-11-18 20:08:38,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:38,431 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156269659] [2022-11-18 20:08:38,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:38,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:38,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:38,953 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:38,954 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:08:38,954 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156269659] [2022-11-18 20:08:38,954 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156269659] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:38,954 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2045152879] [2022-11-18 20:08:38,954 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 20:08:38,955 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:08:38,955 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:08:38,965 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:08:38,971 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2022-11-18 20:08:39,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:39,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-18 20:08:39,044 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:08:39,202 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:08:39,280 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 20:08:39,609 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:08:39,610 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:08:39,617 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:39,617 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 34 treesize of output 18 [2022-11-18 20:08:39,621 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:39,622 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:08:39,999 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2022-11-18 20:08:40,007 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:40,007 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 256 treesize of output 224 [2022-11-18 20:08:40,075 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:40,076 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2045152879] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:08:40,076 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:08:40,076 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 14] total 31 [2022-11-18 20:08:40,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777758750] [2022-11-18 20:08:40,076 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:08:40,077 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:08:40,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:40,077 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 12 times [2022-11-18 20:08:40,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:40,078 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006485638] [2022-11-18 20:08:40,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:40,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:40,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:08:40,082 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:08:40,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:08:40,085 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:08:40,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:08:40,208 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-11-18 20:08:40,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=881, Unknown=0, NotChecked=0, Total=992 [2022-11-18 20:08:40,209 INFO L87 Difference]: Start difference. First operand 40 states and 47 transitions. cyclomatic complexity: 10 Second operand has 32 states, 31 states have (on average 1.7741935483870968) internal successors, (55), 32 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:08:40,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:08:40,966 INFO L93 Difference]: Finished difference Result 66 states and 77 transitions. [2022-11-18 20:08:40,966 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 77 transitions. [2022-11-18 20:08:40,967 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2022-11-18 20:08:40,970 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 64 states and 75 transitions. [2022-11-18 20:08:40,970 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-11-18 20:08:40,971 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-11-18 20:08:40,971 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 75 transitions. [2022-11-18 20:08:40,971 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:08:40,971 INFO L218 hiAutomatonCegarLoop]: Abstraction has 64 states and 75 transitions. [2022-11-18 20:08:40,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 75 transitions. [2022-11-18 20:08:40,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 42. [2022-11-18 20:08:40,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.1666666666666667) internal successors, (49), 41 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:08:40,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 49 transitions. [2022-11-18 20:08:40,980 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 49 transitions. [2022-11-18 20:08:40,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-11-18 20:08:40,983 INFO L428 stractBuchiCegarLoop]: Abstraction has 42 states and 49 transitions. [2022-11-18 20:08:40,983 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-11-18 20:08:40,983 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 49 transitions. [2022-11-18 20:08:40,984 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:08:40,984 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:08:40,984 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:08:40,985 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:08:40,986 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:08:40,986 INFO L748 eck$LassoCheckResult]: Stem: 2337#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2338#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2348#L367 assume !(main_~length~0#1 < 1); 2339#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2340#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 2349#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 2341#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2342#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2351#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2357#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2361#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2360#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2359#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2358#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2343#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2344#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2352#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 2350#L375-4 main_~j~0#1 := 1; 2333#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2334#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2335#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2336#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2347#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2373#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2362#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2356#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2355#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2345#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 2346#L380-2 [2022-11-18 20:08:40,986 INFO L750 eck$LassoCheckResult]: Loop: 2346#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2354#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2346#L380-2 [2022-11-18 20:08:40,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:40,987 INFO L85 PathProgramCache]: Analyzing trace with hash 870990801, now seen corresponding path program 8 times [2022-11-18 20:08:40,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:40,987 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508248168] [2022-11-18 20:08:40,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:40,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:41,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:41,235 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 13 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:41,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:08:41,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508248168] [2022-11-18 20:08:41,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1508248168] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:41,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [765559040] [2022-11-18 20:08:41,236 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:08:41,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:08:41,236 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:08:41,243 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:08:41,264 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-11-18 20:08:41,348 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:08:41,348 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:08:41,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 177 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-18 20:08:41,351 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:08:41,525 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 20 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:41,526 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:08:41,688 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 16 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:41,689 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [765559040] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:08:41,689 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:08:41,689 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 21 [2022-11-18 20:08:41,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826391289] [2022-11-18 20:08:41,689 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:08:41,690 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:08:41,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:41,690 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 13 times [2022-11-18 20:08:41,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:41,690 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221558134] [2022-11-18 20:08:41,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:41,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:41,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:08:41,694 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:08:41,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:08:41,697 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:08:41,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:08:41,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-18 20:08:41,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=317, Unknown=0, NotChecked=0, Total=420 [2022-11-18 20:08:41,803 INFO L87 Difference]: Start difference. First operand 42 states and 49 transitions. cyclomatic complexity: 10 Second operand has 21 states, 21 states have (on average 2.0476190476190474) internal successors, (43), 21 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:08:41,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:08:41,999 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-11-18 20:08:41,999 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 58 transitions. [2022-11-18 20:08:42,001 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:08:42,001 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 42 states and 48 transitions. [2022-11-18 20:08:42,001 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2022-11-18 20:08:42,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-11-18 20:08:42,002 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 48 transitions. [2022-11-18 20:08:42,003 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 20:08:42,003 INFO L218 hiAutomatonCegarLoop]: Abstraction has 42 states and 48 transitions. [2022-11-18 20:08:42,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 48 transitions. [2022-11-18 20:08:42,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2022-11-18 20:08:42,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.1428571428571428) internal successors, (48), 41 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:08:42,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 48 transitions. [2022-11-18 20:08:42,005 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 48 transitions. [2022-11-18 20:08:42,014 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 20:08:42,015 INFO L428 stractBuchiCegarLoop]: Abstraction has 42 states and 48 transitions. [2022-11-18 20:08:42,016 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-11-18 20:08:42,016 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 48 transitions. [2022-11-18 20:08:42,016 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:08:42,016 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:08:42,016 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:08:42,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:08:42,020 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:08:42,020 INFO L748 eck$LassoCheckResult]: Stem: 2629#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2630#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~post209#1, main_#t~post208#1, main_#t~mem210#1, main_#t~mem211#1, main_#t~post212#1, main_#t~post213#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset, main_~value~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2639#L367 assume !(main_~length~0#1 < 1); 2631#L367-2 assume !!(main_~length~0#1 <= 536870911);call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2632#L371 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~value~0#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 2640#L373 assume !!(main_~value~0#1 <= 1073741823);main_~i~0#1 := 0; 2633#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2634#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2635#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2636#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2642#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2666#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2665#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2664#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2663#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2662#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2661#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2660#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2659#L375-3 assume !!(main_~i~0#1 < main_~length~0#1);main_#t~post209#1 := main_~value~0#1;main_~value~0#1 := 1 + main_#t~post209#1;call write~int(main_#t~post209#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~post209#1; 2658#L375-2 main_#t~post208#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post208#1;havoc main_#t~post208#1; 2655#L375-3 assume !(main_~i~0#1 < main_~length~0#1); 2654#L375-4 main_~j~0#1 := 1; 2651#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2648#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2646#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2644#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2643#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2637#L380 assume !(main_#t~mem210#1 > main_#t~mem211#1);havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post213#1 := main_~j~0#1;main_~j~0#1 := main_#t~post213#1 - 1;havoc main_#t~post213#1; 2638#L380-2 [2022-11-18 20:08:42,020 INFO L750 eck$LassoCheckResult]: Loop: 2638#L380-2 assume !!(0 < main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);call main_#t~mem211#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * (main_~j~0#1 - 1), 4); 2645#L380 assume main_#t~mem210#1 > main_#t~mem211#1;havoc main_#t~mem210#1;havoc main_#t~mem211#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1; 2638#L380-2 [2022-11-18 20:08:42,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:42,021 INFO L85 PathProgramCache]: Analyzing trace with hash -93884209, now seen corresponding path program 9 times [2022-11-18 20:08:42,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:42,021 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564868771] [2022-11-18 20:08:42,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:42,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:42,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:43,227 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 2 proven. 53 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:43,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:08:43,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564868771] [2022-11-18 20:08:43,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1564868771] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:43,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1760935718] [2022-11-18 20:08:43,228 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:08:43,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:08:43,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:08:43,235 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:08:43,255 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-11-18 20:08:43,349 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-11-18 20:08:43,349 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:08:43,351 INFO L263 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-18 20:08:43,360 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:08:43,421 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:08:43,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,460 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2022-11-18 20:08:43,524 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,526 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,537 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:43,537 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 35 [2022-11-18 20:08:43,570 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,572 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,574 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:43,575 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 35 [2022-11-18 20:08:43,642 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,646 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:43,646 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 35 [2022-11-18 20:08:43,900 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:43,900 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 12 [2022-11-18 20:08:43,910 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 6 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:08:43,910 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:11:37,092 WARN L233 SmtUtils]: Spent 5.63s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:13:24,374 WARN L233 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 43 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:18:53,038 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-18 20:18:53,039 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 101 [2022-11-18 20:18:53,040 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-11-18 20:18:53,040 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:243) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:139) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:898) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:772) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:346) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:306) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:582) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:399) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:271) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:342) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkFeasibilityAndComputeInterpolants(LassoCheck.java:881) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkStemFeasibility(LassoCheck.java:836) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:751) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:257) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.cegar.AbstractBuchiCegarLoop.runCegarLoop(AbstractBuchiCegarLoop.java:359) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.runCegarLoops(BuchiAutomizerObserver.java:136) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:157) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:341) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1465) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:658) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:239) ... 44 more [2022-11-18 20:18:53,044 INFO L158 Benchmark]: Toolchain (without parser) took 832062.11ms. Allocated memory was 117.4MB in the beginning and 482.3MB in the end (delta: 364.9MB). Free memory was 76.2MB in the beginning and 347.3MB in the end (delta: -271.1MB). Peak memory consumption was 94.1MB. Max. memory is 16.1GB. [2022-11-18 20:18:53,044 INFO L158 Benchmark]: CDTParser took 0.36ms. Allocated memory is still 117.4MB. Free memory is still 93.3MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:18:53,044 INFO L158 Benchmark]: CACSL2BoogieTranslator took 610.36ms. Allocated memory is still 117.4MB. Free memory was 76.0MB in the beginning and 83.8MB in the end (delta: -7.9MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-18 20:18:53,044 INFO L158 Benchmark]: Boogie Procedure Inliner took 59.13ms. Allocated memory is still 117.4MB. Free memory was 83.8MB in the beginning and 81.7MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:18:53,045 INFO L158 Benchmark]: Boogie Preprocessor took 42.64ms. Allocated memory is still 117.4MB. Free memory was 81.7MB in the beginning and 80.7MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:18:53,045 INFO L158 Benchmark]: RCFGBuilder took 407.83ms. Allocated memory is still 117.4MB. Free memory was 80.2MB in the beginning and 69.6MB in the end (delta: 10.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-18 20:18:53,045 INFO L158 Benchmark]: BuchiAutomizer took 830932.22ms. Allocated memory was 117.4MB in the beginning and 482.3MB in the end (delta: 364.9MB). Free memory was 69.6MB in the beginning and 347.3MB in the end (delta: -277.7MB). Peak memory consumption was 89.9MB. Max. memory is 16.1GB. [2022-11-18 20:18:53,047 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36ms. Allocated memory is still 117.4MB. Free memory is still 93.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 610.36ms. Allocated memory is still 117.4MB. Free memory was 76.0MB in the beginning and 83.8MB in the end (delta: -7.9MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 59.13ms. Allocated memory is still 117.4MB. Free memory was 83.8MB in the beginning and 81.7MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 42.64ms. Allocated memory is still 117.4MB. Free memory was 81.7MB in the beginning and 80.7MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 407.83ms. Allocated memory is still 117.4MB. Free memory was 80.2MB in the beginning and 69.6MB in the end (delta: 10.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * BuchiAutomizer took 830932.22ms. Allocated memory was 117.4MB in the beginning and 482.3MB in the end (delta: 364.9MB). Free memory was 69.6MB in the beginning and 347.3MB in the end (delta: -277.7MB). Peak memory consumption was 89.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:243) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-11-18 20:18:53,065 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Ended with exit code 0 [2022-11-18 20:18:53,266 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Ended with exit code 0 [2022-11-18 20:18:53,466 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2022-11-18 20:18:53,667 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2022-11-18 20:18:53,867 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2022-11-18 20:18:54,067 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2022-11-18 20:18:54,267 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Ended with exit code 0 [2022-11-18 20:18:54,467 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2022-11-18 20:18:54,667 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2022-11-18 20:18:54,868 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Ended with exit code 0 [2022-11-18 20:18:55,068 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2022-11-18 20:18:55,268 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/config using search string *Termination*64bit*_Bitvector*.epf No suitable settings file found using Termination*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e799c1c5-5d48-41e6-aaa2-613b9ec81678/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")