./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_2-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_2-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d1726b0c52a0be10cb8b374bfde8cdbfe3513d4b934203f7e56a3a1bce5e9e5b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:06:33,090 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:06:33,096 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:06:33,142 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:06:33,144 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:06:33,148 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:06:33,151 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:06:33,156 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:06:33,159 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:06:33,165 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:06:33,167 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:06:33,169 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:06:33,171 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:06:33,173 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:06:33,175 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:06:33,177 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:06:33,180 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:06:33,181 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:06:33,183 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:06:33,191 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:06:33,193 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:06:33,195 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:06:33,198 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:06:33,199 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:06:33,208 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:06:33,209 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:06:33,209 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:06:33,211 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:06:33,212 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:06:33,213 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:06:33,213 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:06:33,215 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:06:33,217 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:06:33,218 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:06:33,220 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:06:33,221 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:06:33,222 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:06:33,222 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:06:33,222 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:06:33,223 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:06:33,224 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:06:33,225 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 20:06:33,270 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:06:33,271 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:06:33,271 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:06:33,272 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:06:33,273 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:06:33,273 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:06:33,274 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:06:33,274 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 20:06:33,274 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 20:06:33,274 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 20:06:33,276 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 20:06:33,276 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 20:06:33,276 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 20:06:33,277 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:06:33,277 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 20:06:33,277 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:06:33,277 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:06:33,278 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 20:06:33,278 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:06:33,278 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 20:06:33,278 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 20:06:33,279 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 20:06:33,279 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 20:06:33,280 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:06:33,281 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 20:06:33,281 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:06:33,281 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 20:06:33,282 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:06:33,282 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:06:33,282 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:06:33,282 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:06:33,284 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 20:06:33,284 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d1726b0c52a0be10cb8b374bfde8cdbfe3513d4b934203f7e56a3a1bce5e9e5b [2022-11-18 20:06:33,599 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:06:33,628 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:06:33,631 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:06:33,632 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:06:33,633 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:06:33,635 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/loop-acceleration/array_2-1.i [2022-11-18 20:06:33,707 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/data/a03567d8c/b2dbce4b30564047828951851fefb99c/FLAG39e22e8e7 [2022-11-18 20:06:34,176 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:06:34,176 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/sv-benchmarks/c/loop-acceleration/array_2-1.i [2022-11-18 20:06:34,183 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/data/a03567d8c/b2dbce4b30564047828951851fefb99c/FLAG39e22e8e7 [2022-11-18 20:06:34,548 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/data/a03567d8c/b2dbce4b30564047828951851fefb99c [2022-11-18 20:06:34,550 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:06:34,552 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:06:34,554 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:06:34,554 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:06:34,561 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:06:34,562 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,563 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46173f18 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34, skipping insertion in model container [2022-11-18 20:06:34,563 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,571 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:06:34,585 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:06:34,780 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/sv-benchmarks/c/loop-acceleration/array_2-1.i[849,862] [2022-11-18 20:06:34,794 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:06:34,805 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:06:34,816 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/sv-benchmarks/c/loop-acceleration/array_2-1.i[849,862] [2022-11-18 20:06:34,826 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:06:34,839 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:06:34,840 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34 WrapperNode [2022-11-18 20:06:34,840 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:06:34,841 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:06:34,841 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:06:34,841 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:06:34,848 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,854 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,875 INFO L138 Inliner]: procedures = 16, calls = 17, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 52 [2022-11-18 20:06:34,876 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:06:34,877 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:06:34,877 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:06:34,877 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:06:34,887 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,887 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,889 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,890 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,895 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,912 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,914 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,922 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,924 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:06:34,925 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:06:34,925 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:06:34,925 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:06:34,932 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (1/1) ... [2022-11-18 20:06:34,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:34,955 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:34,977 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:35,011 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 20:06:35,040 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:06:35,040 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 20:06:35,041 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:06:35,041 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 20:06:35,041 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:06:35,041 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:06:35,041 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 20:06:35,041 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:06:35,130 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:06:35,132 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:06:35,264 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:06:35,270 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:06:35,270 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-18 20:06:35,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:06:35 BoogieIcfgContainer [2022-11-18 20:06:35,272 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:06:35,273 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 20:06:35,274 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 20:06:35,278 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 20:06:35,283 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:06:35,284 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 08:06:34" (1/3) ... [2022-11-18 20:06:35,285 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5f1e4aca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:06:35, skipping insertion in model container [2022-11-18 20:06:35,285 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:06:35,285 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:06:34" (2/3) ... [2022-11-18 20:06:35,285 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5f1e4aca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:06:35, skipping insertion in model container [2022-11-18 20:06:35,286 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:06:35,286 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:06:35" (3/3) ... [2022-11-18 20:06:35,287 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_2-1.i [2022-11-18 20:06:35,344 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 20:06:35,344 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 20:06:35,345 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 20:06:35,345 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 20:06:35,345 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 20:06:35,345 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 20:06:35,345 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 20:06:35,345 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 20:06:35,350 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:35,370 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-18 20:06:35,370 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:35,370 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:35,376 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 20:06:35,376 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:35,376 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 20:06:35,377 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:35,378 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-11-18 20:06:35,378 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:35,378 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:35,379 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 20:06:35,379 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:35,387 INFO L748 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 6#L25-3true [2022-11-18 20:06:35,387 INFO L750 eck$LassoCheckResult]: Loop: 6#L25-3true assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 10#L25-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 6#L25-3true [2022-11-18 20:06:35,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:35,394 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-18 20:06:35,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:35,405 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811101280] [2022-11-18 20:06:35,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:35,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:35,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:35,514 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:35,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:35,573 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:35,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:35,577 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-18 20:06:35,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:35,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138441170] [2022-11-18 20:06:35,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:35,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:35,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:35,608 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:35,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:35,641 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:35,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:35,643 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-18 20:06:35,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:35,643 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533997773] [2022-11-18 20:06:35,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:35,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:35,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:35,696 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:35,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:35,730 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:36,422 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:06:36,423 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:06:36,423 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:06:36,423 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:06:36,424 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 20:06:36,424 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:36,424 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:06:36,424 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:06:36,424 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_2-1.i_Iteration1_Lasso [2022-11-18 20:06:36,424 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:06:36,425 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:06:36,446 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,457 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,462 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,465 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,468 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,472 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,475 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,478 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,481 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:36,484 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:06:37,236 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 20:06:37,240 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 20:06:37,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,242 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,246 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,252 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,265 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-18 20:06:37,266 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,266 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,267 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,267 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,267 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,269 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,269 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,275 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,280 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2022-11-18 20:06:37,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,284 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,287 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-18 20:06:37,288 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,298 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,298 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,298 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,298 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,303 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:06:37,303 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:06:37,313 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,328 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,328 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,330 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,337 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-18 20:06:37,344 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,357 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,357 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,357 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,357 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,357 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,358 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,358 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,371 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,374 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,375 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,375 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,376 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,379 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-18 20:06:37,380 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,390 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,390 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,390 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,390 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,390 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,391 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,391 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,400 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,408 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,408 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,408 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,411 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,425 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,436 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-18 20:06:37,437 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,437 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,437 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,437 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,440 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:06:37,440 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:06:37,459 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,463 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,464 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,465 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,472 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-18 20:06:37,472 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,484 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,485 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,485 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,485 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,485 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,486 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,486 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,515 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,519 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,520 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,520 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,530 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,540 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-18 20:06:37,541 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,553 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,554 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,554 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,554 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,554 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,555 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,555 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,564 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,572 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,572 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,574 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,584 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,596 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,596 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,597 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,597 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,597 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,597 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,598 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-18 20:06:37,615 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,621 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,621 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,621 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,622 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,627 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-18 20:06:37,628 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,638 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,638 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,639 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,639 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,639 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,639 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,639 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,650 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,659 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,659 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,660 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,661 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,666 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-18 20:06:37,667 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,677 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,677 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,677 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,678 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,680 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:06:37,680 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:06:37,693 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,702 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,703 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,708 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-18 20:06:37,708 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,721 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,721 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 20:06:37,721 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,721 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,721 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,722 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 20:06:37,722 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 20:06:37,731 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,735 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,735 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,735 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,736 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,744 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,757 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,757 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,757 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,757 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,761 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-18 20:06:37,762 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:06:37,763 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:06:37,774 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 20:06:37,782 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:37,783 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,783 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,784 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-18 20:06:37,796 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 20:06:37,809 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 20:06:37,809 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 20:06:37,809 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 20:06:37,810 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 20:06:37,821 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 20:06:37,822 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 20:06:37,846 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 20:06:37,942 INFO L443 ModelExtractionUtils]: Simplification made 23 calls to the SMT solver. [2022-11-18 20:06:37,942 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2022-11-18 20:06:37,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:06:37,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:37,959 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:06:37,967 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-18 20:06:37,968 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 20:06:38,005 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 20:06:38,006 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 20:06:38,006 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#B~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 4095*v_rep(select #length ULTIMATE.start_main_~#B~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2022-11-18 20:06:38,017 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:38,069 INFO L156 tatePredicateManager]: 11 out of 11 supporting invariants were superfluous and have been removed [2022-11-18 20:06:38,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:38,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:38,118 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:06:38,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:38,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:38,139 INFO L263 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:06:38,140 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:38,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:38,238 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 20:06:38,241 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,289 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 27 states and 37 transitions. Complement of second has 8 states. [2022-11-18 20:06:38,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 20:06:38,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 18 transitions. [2022-11-18 20:06:38,297 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-18 20:06:38,298 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:06:38,298 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-18 20:06:38,298 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:06:38,298 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-18 20:06:38,299 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 20:06:38,299 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 37 transitions. [2022-11-18 20:06:38,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:38,305 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 8 states and 10 transitions. [2022-11-18 20:06:38,306 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-11-18 20:06:38,306 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2022-11-18 20:06:38,307 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2022-11-18 20:06:38,307 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:06:38,307 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2022-11-18 20:06:38,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2022-11-18 20:06:38,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2022-11-18 20:06:38,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2022-11-18 20:06:38,332 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2022-11-18 20:06:38,332 INFO L428 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2022-11-18 20:06:38,332 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 20:06:38,332 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2022-11-18 20:06:38,332 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:38,333 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:38,333 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:38,333 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-18 20:06:38,333 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:38,333 INFO L748 eck$LassoCheckResult]: Stem: 126#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 127#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 131#L25-3 assume !(main_~i~0#1 < 2048); 130#L25-4 main_~i~0#1 := 0; 128#L29-3 [2022-11-18 20:06:38,334 INFO L750 eck$LassoCheckResult]: Loop: 128#L29-3 assume !!(main_~i~0#1 < 2048);call main_#t~mem5#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem5#1;havoc main_#t~mem5#1;call write~int(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4); 129#L29-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 128#L29-3 [2022-11-18 20:06:38,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:38,334 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-18 20:06:38,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:38,334 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601218791] [2022-11-18 20:06:38,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:38,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:38,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:38,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:38,439 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:38,439 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601218791] [2022-11-18 20:06:38,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1601218791] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:06:38,441 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:06:38,441 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:06:38,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [943476870] [2022-11-18 20:06:38,443 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:06:38,446 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:38,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:38,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1731, now seen corresponding path program 1 times [2022-11-18 20:06:38,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:38,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855427863] [2022-11-18 20:06:38,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:38,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:38,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:38,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:38,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:38,472 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:38,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:38,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:06:38,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:06:38,570 INFO L87 Difference]: Start difference. First operand 8 states and 10 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:38,590 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2022-11-18 20:06:38,590 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2022-11-18 20:06:38,593 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:38,594 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 12 transitions. [2022-11-18 20:06:38,595 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-11-18 20:06:38,595 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-11-18 20:06:38,595 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 12 transitions. [2022-11-18 20:06:38,595 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:06:38,597 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2022-11-18 20:06:38,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 12 transitions. [2022-11-18 20:06:38,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 8. [2022-11-18 20:06:38,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2022-11-18 20:06:38,600 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2022-11-18 20:06:38,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:06:38,601 INFO L428 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2022-11-18 20:06:38,601 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 20:06:38,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2022-11-18 20:06:38,604 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:38,604 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:38,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:38,605 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-18 20:06:38,605 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:38,606 INFO L748 eck$LassoCheckResult]: Stem: 153#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 154#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 155#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 149#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 150#L25-3 assume !(main_~i~0#1 < 2048); 156#L25-4 main_~i~0#1 := 0; 151#L29-3 [2022-11-18 20:06:38,606 INFO L750 eck$LassoCheckResult]: Loop: 151#L29-3 assume !!(main_~i~0#1 < 2048);call main_#t~mem5#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem5#1;havoc main_#t~mem5#1;call write~int(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4); 152#L29-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 151#L29-3 [2022-11-18 20:06:38,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:38,607 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-18 20:06:38,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:38,612 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662227720] [2022-11-18 20:06:38,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:38,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:38,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:38,706 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:38,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:38,707 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662227720] [2022-11-18 20:06:38,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [662227720] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:38,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1286947521] [2022-11-18 20:06:38,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:38,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:38,709 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:38,712 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:38,735 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-18 20:06:38,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:38,770 INFO L263 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:06:38,771 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:38,783 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:38,783 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:38,804 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:38,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1286947521] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:38,804 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:38,804 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-18 20:06:38,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110359435] [2022-11-18 20:06:38,805 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:38,805 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:38,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:38,805 INFO L85 PathProgramCache]: Analyzing trace with hash 1731, now seen corresponding path program 2 times [2022-11-18 20:06:38,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:38,806 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365623234] [2022-11-18 20:06:38,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:38,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:38,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:38,811 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:38,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:38,816 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:38,913 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-18 20:06:38,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:38,922 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:06:38,922 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:06:38,922 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:38,989 INFO L93 Difference]: Finished difference Result 21 states and 22 transitions. [2022-11-18 20:06:38,989 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 22 transitions. [2022-11-18 20:06:38,990 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:38,991 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 21 states and 22 transitions. [2022-11-18 20:06:38,991 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2022-11-18 20:06:38,991 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2022-11-18 20:06:38,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 22 transitions. [2022-11-18 20:06:38,991 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:06:38,992 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 22 transitions. [2022-11-18 20:06:38,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 22 transitions. [2022-11-18 20:06:38,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 14. [2022-11-18 20:06:38,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:38,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-11-18 20:06:38,994 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-11-18 20:06:38,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:06:38,995 INFO L428 stractBuchiCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-11-18 20:06:38,995 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 20:06:38,995 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 15 transitions. [2022-11-18 20:06:38,996 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:38,996 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:38,996 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:38,996 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-18 20:06:38,996 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:38,997 INFO L748 eck$LassoCheckResult]: Stem: 220#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 221#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 224#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 218#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 219#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 225#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 231#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 230#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 229#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 228#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 227#L25-3 assume !(main_~i~0#1 < 2048); 226#L25-4 main_~i~0#1 := 0; 222#L29-3 [2022-11-18 20:06:38,997 INFO L750 eck$LassoCheckResult]: Loop: 222#L29-3 assume !!(main_~i~0#1 < 2048);call main_#t~mem5#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem5#1;havoc main_#t~mem5#1;call write~int(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4); 223#L29-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 222#L29-3 [2022-11-18 20:06:38,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:38,997 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-18 20:06:38,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:38,997 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924866611] [2022-11-18 20:06:38,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:38,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:39,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:39,193 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:39,193 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:39,193 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924866611] [2022-11-18 20:06:39,194 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1924866611] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:39,194 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1830112131] [2022-11-18 20:06:39,194 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:06:39,194 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:39,194 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:39,195 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:39,219 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-18 20:06:39,284 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:06:39,284 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:39,285 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:06:39,287 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:39,320 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:39,321 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:39,395 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:39,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1830112131] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:39,395 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:39,395 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-18 20:06:39,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850996753] [2022-11-18 20:06:39,396 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:39,397 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:39,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:39,398 INFO L85 PathProgramCache]: Analyzing trace with hash 1731, now seen corresponding path program 3 times [2022-11-18 20:06:39,398 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:39,398 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327173334] [2022-11-18 20:06:39,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:39,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:39,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:39,405 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:39,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:39,416 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:39,497 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:39,497 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 20:06:39,498 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-18 20:06:39,498 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:39,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:39,616 INFO L93 Difference]: Finished difference Result 45 states and 46 transitions. [2022-11-18 20:06:39,616 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 46 transitions. [2022-11-18 20:06:39,617 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:39,618 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 45 states and 46 transitions. [2022-11-18 20:06:39,618 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-11-18 20:06:39,618 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-11-18 20:06:39,618 INFO L73 IsDeterministic]: Start isDeterministic. Operand 45 states and 46 transitions. [2022-11-18 20:06:39,619 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:06:39,619 INFO L218 hiAutomatonCegarLoop]: Abstraction has 45 states and 46 transitions. [2022-11-18 20:06:39,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states and 46 transitions. [2022-11-18 20:06:39,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 26. [2022-11-18 20:06:39,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.0384615384615385) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:39,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 27 transitions. [2022-11-18 20:06:39,621 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 27 transitions. [2022-11-18 20:06:39,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:06:39,623 INFO L428 stractBuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2022-11-18 20:06:39,623 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 20:06:39,623 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 27 transitions. [2022-11-18 20:06:39,624 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:39,624 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:39,624 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:39,625 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2022-11-18 20:06:39,625 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:39,625 INFO L748 eck$LassoCheckResult]: Stem: 363#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 364#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 365#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 366#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 367#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 359#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 360#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 384#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 383#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 382#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 381#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 380#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 379#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 378#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 377#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 376#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 375#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 374#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 373#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 372#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 371#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 370#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 369#L25-3 assume !(main_~i~0#1 < 2048); 368#L25-4 main_~i~0#1 := 0; 361#L29-3 [2022-11-18 20:06:39,625 INFO L750 eck$LassoCheckResult]: Loop: 361#L29-3 assume !!(main_~i~0#1 < 2048);call main_#t~mem5#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem5#1;havoc main_#t~mem5#1;call write~int(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4); 362#L29-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 361#L29-3 [2022-11-18 20:06:39,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:39,626 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2022-11-18 20:06:39,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:39,626 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443912664] [2022-11-18 20:06:39,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:39,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:39,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:40,011 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:40,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:40,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443912664] [2022-11-18 20:06:40,012 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1443912664] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:40,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [875592348] [2022-11-18 20:06:40,012 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:06:40,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:40,013 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:40,047 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:40,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-18 20:06:40,862 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-18 20:06:40,863 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:40,866 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 20:06:40,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:40,923 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:40,923 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:41,154 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:41,154 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [875592348] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:41,154 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:41,155 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-11-18 20:06:41,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105430774] [2022-11-18 20:06:41,155 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:41,155 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:41,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:41,156 INFO L85 PathProgramCache]: Analyzing trace with hash 1731, now seen corresponding path program 4 times [2022-11-18 20:06:41,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:41,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136888039] [2022-11-18 20:06:41,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:41,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:41,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:41,161 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:41,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:41,165 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:41,242 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:41,242 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 20:06:41,243 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-11-18 20:06:41,243 INFO L87 Difference]: Start difference. First operand 26 states and 27 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:41,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:41,483 INFO L93 Difference]: Finished difference Result 93 states and 94 transitions. [2022-11-18 20:06:41,484 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 93 states and 94 transitions. [2022-11-18 20:06:41,485 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:41,486 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 93 states to 93 states and 94 transitions. [2022-11-18 20:06:41,486 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 49 [2022-11-18 20:06:41,486 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 49 [2022-11-18 20:06:41,486 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 94 transitions. [2022-11-18 20:06:41,487 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:06:41,487 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 94 transitions. [2022-11-18 20:06:41,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 94 transitions. [2022-11-18 20:06:41,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 50. [2022-11-18 20:06:41,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.02) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:41,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2022-11-18 20:06:41,497 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 51 transitions. [2022-11-18 20:06:41,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-18 20:06:41,498 INFO L428 stractBuchiCegarLoop]: Abstraction has 50 states and 51 transitions. [2022-11-18 20:06:41,499 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 20:06:41,499 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 51 transitions. [2022-11-18 20:06:41,500 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:41,500 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:41,500 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:41,501 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2022-11-18 20:06:41,503 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:41,503 INFO L748 eck$LassoCheckResult]: Stem: 648#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 649#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 650#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 651#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 652#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 644#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 645#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 693#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 692#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 691#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 690#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 689#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 688#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 687#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 686#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 685#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 684#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 683#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 682#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 681#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 680#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 679#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 678#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 677#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 676#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 675#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 674#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 673#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 672#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 671#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 670#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 669#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 668#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 667#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 666#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 665#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 664#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 663#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 662#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 661#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 660#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 659#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 658#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 657#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 656#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 655#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 654#L25-3 assume !(main_~i~0#1 < 2048); 653#L25-4 main_~i~0#1 := 0; 646#L29-3 [2022-11-18 20:06:41,507 INFO L750 eck$LassoCheckResult]: Loop: 646#L29-3 assume !!(main_~i~0#1 < 2048);call main_#t~mem5#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem5#1;havoc main_#t~mem5#1;call write~int(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4); 647#L29-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 646#L29-3 [2022-11-18 20:06:41,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:41,507 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2022-11-18 20:06:41,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:41,508 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066387236] [2022-11-18 20:06:41,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:41,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:41,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:42,593 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:42,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:42,593 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066387236] [2022-11-18 20:06:42,593 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2066387236] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:42,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [221674371] [2022-11-18 20:06:42,594 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:06:42,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:42,594 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:42,599 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:42,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-18 20:06:42,793 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:06:42,794 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:06:42,797 INFO L263 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:06:42,800 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:06:42,934 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:42,934 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:06:43,811 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:43,812 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [221674371] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:06:43,812 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:06:43,812 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-11-18 20:06:43,812 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1537640310] [2022-11-18 20:06:43,812 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:06:43,813 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:06:43,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:43,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1731, now seen corresponding path program 5 times [2022-11-18 20:06:43,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:43,814 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715355074] [2022-11-18 20:06:43,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:43,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:43,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:43,819 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:06:43,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:06:43,823 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:06:43,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:06:43,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-18 20:06:43,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-11-18 20:06:43,916 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:44,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:06:44,492 INFO L93 Difference]: Finished difference Result 189 states and 190 transitions. [2022-11-18 20:06:44,493 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 189 states and 190 transitions. [2022-11-18 20:06:44,505 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:44,508 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 189 states to 189 states and 190 transitions. [2022-11-18 20:06:44,510 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2022-11-18 20:06:44,510 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2022-11-18 20:06:44,511 INFO L73 IsDeterministic]: Start isDeterministic. Operand 189 states and 190 transitions. [2022-11-18 20:06:44,512 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:06:44,513 INFO L218 hiAutomatonCegarLoop]: Abstraction has 189 states and 190 transitions. [2022-11-18 20:06:44,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states and 190 transitions. [2022-11-18 20:06:44,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 98. [2022-11-18 20:06:44,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.010204081632653) internal successors, (99), 97 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:06:44,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 99 transitions. [2022-11-18 20:06:44,527 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 99 transitions. [2022-11-18 20:06:44,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-18 20:06:44,528 INFO L428 stractBuchiCegarLoop]: Abstraction has 98 states and 99 transitions. [2022-11-18 20:06:44,529 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 20:06:44,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 99 transitions. [2022-11-18 20:06:44,531 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-11-18 20:06:44,531 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:06:44,531 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:06:44,533 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2022-11-18 20:06:44,535 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 20:06:44,537 INFO L748 eck$LassoCheckResult]: Stem: 1219#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 1220#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post1#1, main_#t~mem5#1, main_#t~post4#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0; 1223#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1217#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1218#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1224#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1314#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1313#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1312#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1311#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1310#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1309#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1308#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1307#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1306#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1305#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1304#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1303#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1302#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1301#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1300#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1299#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1298#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1297#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1296#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1295#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1294#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1293#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1292#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1291#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1290#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1289#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1288#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1287#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1286#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1285#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1284#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1283#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1282#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1281#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1280#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1279#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1278#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1277#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1276#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1275#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1274#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1273#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1272#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1271#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1270#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1269#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1268#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1267#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1266#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1265#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1264#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1263#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1262#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1261#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1260#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1259#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1258#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1257#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1256#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1255#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1254#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1253#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1252#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1251#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1250#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1249#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1248#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1247#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1246#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1245#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1244#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1243#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1242#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1241#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1240#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1239#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1238#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1237#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1236#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1235#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1234#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1233#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1232#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1231#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1230#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1229#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1228#L25-3 assume !!(main_~i~0#1 < 2048);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;call write~int(main_#t~nondet3#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1227#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1226#L25-3 assume !(main_~i~0#1 < 2048); 1225#L25-4 main_~i~0#1 := 0; 1221#L29-3 [2022-11-18 20:06:44,537 INFO L750 eck$LassoCheckResult]: Loop: 1221#L29-3 assume !!(main_~i~0#1 < 2048);call main_#t~mem5#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem5#1;havoc main_#t~mem5#1;call write~int(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4); 1222#L29-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1221#L29-3 [2022-11-18 20:06:44,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:06:44,538 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2022-11-18 20:06:44,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:06:44,538 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943020094] [2022-11-18 20:06:44,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:06:44,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:06:44,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:06:47,590 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:06:47,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:06:47,590 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943020094] [2022-11-18 20:06:47,590 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943020094] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:06:47,590 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [29602265] [2022-11-18 20:06:47,591 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 20:06:47,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:06:47,591 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:06:47,598 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:06:47,627 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78bdcda5-4507-4303-8e39-cf596731e826/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process