./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 19:53:08,872 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 19:53:08,874 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 19:53:08,914 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 19:53:08,915 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 19:53:08,919 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 19:53:08,922 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 19:53:08,925 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 19:53:08,930 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 19:53:08,931 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 19:53:08,932 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 19:53:08,933 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 19:53:08,933 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 19:53:08,934 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 19:53:08,935 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 19:53:08,936 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 19:53:08,937 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 19:53:08,938 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 19:53:08,940 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 19:53:08,941 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 19:53:08,946 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 19:53:08,950 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 19:53:08,954 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 19:53:08,955 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 19:53:08,968 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 19:53:08,968 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 19:53:08,968 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 19:53:08,969 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 19:53:08,970 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 19:53:08,971 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 19:53:08,971 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 19:53:08,972 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 19:53:08,973 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 19:53:08,973 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 19:53:08,974 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 19:53:08,975 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 19:53:08,975 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 19:53:08,976 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 19:53:08,976 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 19:53:08,977 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 19:53:08,978 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 19:53:08,979 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 19:53:08,999 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 19:53:09,000 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 19:53:09,000 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 19:53:09,001 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 19:53:09,002 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 19:53:09,002 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 19:53:09,002 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 19:53:09,003 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 19:53:09,003 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 19:53:09,003 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 19:53:09,003 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 19:53:09,004 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 19:53:09,004 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 19:53:09,004 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 19:53:09,004 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 19:53:09,005 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 19:53:09,005 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 19:53:09,005 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 19:53:09,005 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 19:53:09,006 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 19:53:09,006 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 19:53:09,006 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 19:53:09,006 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 19:53:09,007 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 19:53:09,007 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 19:53:09,007 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 19:53:09,007 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 19:53:09,008 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 19:53:09,008 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 19:53:09,008 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 19:53:09,008 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 19:53:09,009 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 19:53:09,010 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f [2022-11-18 19:53:09,306 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 19:53:09,330 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 19:53:09,333 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 19:53:09,334 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 19:53:09,338 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 19:53:09,340 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2022-11-18 19:53:09,422 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/data/056865535/4004d78326e7453eb34daf88e460c509/FLAGbc28b673f [2022-11-18 19:53:09,951 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 19:53:09,951 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2022-11-18 19:53:09,960 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/data/056865535/4004d78326e7453eb34daf88e460c509/FLAGbc28b673f [2022-11-18 19:53:10,246 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/data/056865535/4004d78326e7453eb34daf88e460c509 [2022-11-18 19:53:10,249 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 19:53:10,250 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 19:53:10,252 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 19:53:10,252 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 19:53:10,256 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 19:53:10,256 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,258 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38daffbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10, skipping insertion in model container [2022-11-18 19:53:10,258 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,267 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 19:53:10,318 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 19:53:10,651 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2022-11-18 19:53:10,652 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:53:10,670 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 19:53:10,744 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2022-11-18 19:53:10,745 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:53:10,760 INFO L208 MainTranslator]: Completed translation [2022-11-18 19:53:10,760 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10 WrapperNode [2022-11-18 19:53:10,761 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 19:53:10,762 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 19:53:10,762 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 19:53:10,762 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 19:53:10,774 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,786 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,831 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 43, calls inlined = 61, statements flattened = 874 [2022-11-18 19:53:10,832 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 19:53:10,832 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 19:53:10,833 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 19:53:10,833 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 19:53:10,842 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,842 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,849 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,849 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,863 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,886 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,889 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,892 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,900 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 19:53:10,904 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 19:53:10,909 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 19:53:10,909 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 19:53:10,912 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (1/1) ... [2022-11-18 19:53:10,921 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:53:10,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:10,947 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:53:10,973 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9f15d911-6822-4485-b2f3-e55ee33cbb31/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 19:53:10,989 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 19:53:10,989 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 19:53:10,989 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 19:53:10,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 19:53:11,099 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 19:53:11,102 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 19:53:12,061 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 19:53:12,086 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 19:53:12,087 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 19:53:12,089 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:53:12 BoogieIcfgContainer [2022-11-18 19:53:12,089 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 19:53:12,090 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 19:53:12,090 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 19:53:12,106 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 19:53:12,106 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:53:12,107 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 07:53:10" (1/3) ... [2022-11-18 19:53:12,108 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@fab8b7c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:53:12, skipping insertion in model container [2022-11-18 19:53:12,108 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:53:12,108 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:10" (2/3) ... [2022-11-18 19:53:12,108 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@fab8b7c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:53:12, skipping insertion in model container [2022-11-18 19:53:12,108 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:53:12,109 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:53:12" (3/3) ... [2022-11-18 19:53:12,110 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2022-11-18 19:53:12,168 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 19:53:12,168 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 19:53:12,169 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 19:53:12,169 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 19:53:12,169 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 19:53:12,169 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 19:53:12,169 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 19:53:12,169 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 19:53:12,175 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 250 states, 249 states have (on average 1.6144578313253013) internal successors, (402), 249 states have internal predecessors, (402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:12,206 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 229 [2022-11-18 19:53:12,206 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:12,207 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:12,215 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-18 19:53:12,216 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:12,216 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 19:53:12,217 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 250 states, 249 states have (on average 1.6144578313253013) internal successors, (402), 249 states have internal predecessors, (402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:12,248 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 229 [2022-11-18 19:53:12,248 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:12,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:12,250 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-18 19:53:12,251 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:12,258 INFO L748 eck$LassoCheckResult]: Stem: 238#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 157#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 67#L197true assume 0 != ~side1Failed_History_0~0 % 256;init_#res#1 := 0; 56#L233true main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 156#L58true assume !(0 == assume_abort_if_not_~cond#1); 117#L57true assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 47#L574-2true [2022-11-18 19:53:12,260 INFO L750 eck$LassoCheckResult]: Loop: 47#L574-2true assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 182#L170true assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 121#L261true assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 129#L80true assume { :end_inline_write_side1_failed_history } true; 112#L277true assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 245#L318true assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 63#L110true assume { :end_inline_write_side2_failed_history } true; 28#L334true assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 132#L375true assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 25#L148true assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 135#L158true Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 134#L394true assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 185#L400-1true assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 50#L140true assume { :end_inline_write_active_side_history } true; 91#L410true assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 173#L439true assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 215#L442-2true assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 133#L58-2true assume 0 == assume_abort_if_not_~cond#1;assume false; 14#L57-1true assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 24#L178true assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 15#L188true check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 61#L449true assume !(0 == check_~tmp___0~0#1); 211#L449-1true assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 12#L88-2true assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 196#L98-2true check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 184#L479true assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 51#L118-2true assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 251#L128-2true check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 149#L481true assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 220#L148-1true assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 209#L158-1true check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 218#L483true assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 81#L529true main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 127#L608-44true assume !(0 == assert_~arg#1 % 256); 213#L603-22true assume { :end_inline_assert } true; 47#L574-2true [2022-11-18 19:53:12,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:12,290 INFO L85 PathProgramCache]: Analyzing trace with hash 889563392, now seen corresponding path program 1 times [2022-11-18 19:53:12,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:12,300 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771295699] [2022-11-18 19:53:12,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:12,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:12,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:12,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:12,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:12,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [771295699] [2022-11-18 19:53:12,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [771295699] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:12,561 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:12,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 19:53:12,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018732889] [2022-11-18 19:53:12,565 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:12,571 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:53:12,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:12,576 INFO L85 PathProgramCache]: Analyzing trace with hash 361462835, now seen corresponding path program 1 times [2022-11-18 19:53:12,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:12,577 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990133942] [2022-11-18 19:53:12,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:12,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:12,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:12,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:12,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:12,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990133942] [2022-11-18 19:53:12,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [990133942] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:12,690 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:12,690 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 19:53:12,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207077486] [2022-11-18 19:53:12,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:12,692 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:12,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:12,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:53:12,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:53:12,743 INFO L87 Difference]: Start difference. First operand has 250 states, 249 states have (on average 1.6144578313253013) internal successors, (402), 249 states have internal predecessors, (402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:12,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:12,873 INFO L93 Difference]: Finished difference Result 248 states and 373 transitions. [2022-11-18 19:53:12,881 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 248 states and 373 transitions. [2022-11-18 19:53:12,893 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 206 [2022-11-18 19:53:12,909 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 248 states to 223 states and 337 transitions. [2022-11-18 19:53:12,910 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 223 [2022-11-18 19:53:12,911 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 223 [2022-11-18 19:53:12,912 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 337 transitions. [2022-11-18 19:53:12,913 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:12,914 INFO L218 hiAutomatonCegarLoop]: Abstraction has 223 states and 337 transitions. [2022-11-18 19:53:12,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 337 transitions. [2022-11-18 19:53:12,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2022-11-18 19:53:12,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 223 states, 223 states have (on average 1.5112107623318385) internal successors, (337), 222 states have internal predecessors, (337), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:12,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 337 transitions. [2022-11-18 19:53:12,955 INFO L240 hiAutomatonCegarLoop]: Abstraction has 223 states and 337 transitions. [2022-11-18 19:53:12,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:53:12,960 INFO L428 stractBuchiCegarLoop]: Abstraction has 223 states and 337 transitions. [2022-11-18 19:53:12,960 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 19:53:12,960 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 223 states and 337 transitions. [2022-11-18 19:53:12,963 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 206 [2022-11-18 19:53:12,964 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:12,964 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:12,965 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:12,965 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:12,966 INFO L748 eck$LassoCheckResult]: Stem: 732#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 711#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 621#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 622#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 546#L203 assume !(-2 != ~active_side_History_0~0); 547#L206 assume !(0 != ~manual_selection_History_0~0); 564#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 723#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 679#L215 assume !(-2 != ~active_side_History_1~0); 680#L218 assume !(0 != ~manual_selection_History_1~0); 712#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 725#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 650#L227 assume !(-2 != ~active_side_History_2~0); 651#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 605#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 606#L58 assume !(0 == assume_abort_if_not_~cond#1); 682#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 590#L574-2 [2022-11-18 19:53:12,966 INFO L750 eck$LassoCheckResult]: Loop: 590#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 591#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 686#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 687#L80 assume { :end_inline_write_side1_failed_history } true; 676#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 538#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 616#L110 assume { :end_inline_write_side2_failed_history } true; 558#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 560#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 551#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 552#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 695#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 519#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 595#L140 assume { :end_inline_write_active_side_history } true; 596#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 655#L439 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 707#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 694#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 533#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 534#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 535#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 536#L449 assume !(0 == check_~tmp___0~0#1); 526#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 528#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 529#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 721#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 597#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 598#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 704#L481 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 705#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 709#L158-1 check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 727#L483 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 517#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 645#L608-44 assume !(0 == assert_~arg#1 % 256); 692#L603-22 assume { :end_inline_assert } true; 590#L574-2 [2022-11-18 19:53:12,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:12,967 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 1 times [2022-11-18 19:53:12,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:12,968 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1851227379] [2022-11-18 19:53:12,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:12,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:12,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:12,993 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:13,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,057 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:13,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,063 INFO L85 PathProgramCache]: Analyzing trace with hash -1632681871, now seen corresponding path program 1 times [2022-11-18 19:53:13,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,064 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418653082] [2022-11-18 19:53:13,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:13,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:13,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:13,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418653082] [2022-11-18 19:53:13,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1418653082] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:13,234 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:13,235 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:13,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251554465] [2022-11-18 19:53:13,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:13,235 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:13,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:13,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:13,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:13,239 INFO L87 Difference]: Start difference. First operand 223 states and 337 transitions. cyclomatic complexity: 115 Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:13,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:13,283 INFO L93 Difference]: Finished difference Result 416 states and 634 transitions. [2022-11-18 19:53:13,283 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 634 transitions. [2022-11-18 19:53:13,287 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 399 [2022-11-18 19:53:13,291 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 634 transitions. [2022-11-18 19:53:13,291 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2022-11-18 19:53:13,293 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2022-11-18 19:53:13,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 634 transitions. [2022-11-18 19:53:13,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:13,295 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 634 transitions. [2022-11-18 19:53:13,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 634 transitions. [2022-11-18 19:53:13,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 251. [2022-11-18 19:53:13,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 251 states, 251 states have (on average 1.5139442231075697) internal successors, (380), 250 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:13,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 380 transitions. [2022-11-18 19:53:13,309 INFO L240 hiAutomatonCegarLoop]: Abstraction has 251 states and 380 transitions. [2022-11-18 19:53:13,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:13,310 INFO L428 stractBuchiCegarLoop]: Abstraction has 251 states and 380 transitions. [2022-11-18 19:53:13,310 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 19:53:13,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 251 states and 380 transitions. [2022-11-18 19:53:13,312 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 234 [2022-11-18 19:53:13,313 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:13,313 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:13,314 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:13,314 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:13,314 INFO L748 eck$LassoCheckResult]: Stem: 1382#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 1360#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 1266#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 1267#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 1191#L203 assume !(-2 != ~active_side_History_0~0); 1192#L206 assume !(0 != ~manual_selection_History_0~0); 1209#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 1372#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 1326#L215 assume !(-2 != ~active_side_History_1~0); 1327#L218 assume !(0 != ~manual_selection_History_1~0); 1361#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 1374#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 1296#L227 assume !(-2 != ~active_side_History_2~0); 1297#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 1253#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1254#L58 assume !(0 == assume_abort_if_not_~cond#1); 1330#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 1235#L574-2 [2022-11-18 19:53:13,315 INFO L750 eck$LassoCheckResult]: Loop: 1235#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 1236#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 1333#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 1334#L80 assume { :end_inline_write_side1_failed_history } true; 1322#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 1323#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 1262#L110 assume { :end_inline_write_side2_failed_history } true; 1203#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 1205#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1196#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1197#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 1342#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 1167#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 1240#L140 assume { :end_inline_write_active_side_history } true; 1241#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 1301#L439 assume !(0 == ~side1Failed~0 % 256); 1355#L442 assume 0 == ~side2Failed~0 % 256;check_~tmp~3#1 := 1; 1356#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1341#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 1178#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 1179#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 1180#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 1181#L449 assume !(0 == check_~tmp___0~0#1); 1171#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 1173#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 1174#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 1370#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 1242#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 1243#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 1353#L481 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1354#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1358#L158-1 check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 1376#L483 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 1162#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1291#L608-44 assume !(0 == assert_~arg#1 % 256); 1339#L603-22 assume { :end_inline_assert } true; 1235#L574-2 [2022-11-18 19:53:13,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,316 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 2 times [2022-11-18 19:53:13,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,316 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407458930] [2022-11-18 19:53:13,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,334 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:13,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,353 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:13,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,354 INFO L85 PathProgramCache]: Analyzing trace with hash 2107824286, now seen corresponding path program 1 times [2022-11-18 19:53:13,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,354 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290805606] [2022-11-18 19:53:13,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:13,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:13,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:13,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290805606] [2022-11-18 19:53:13,415 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [290805606] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:13,415 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:13,416 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:13,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1654727967] [2022-11-18 19:53:13,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:13,416 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:13,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:13,417 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:13,417 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:13,418 INFO L87 Difference]: Start difference. First operand 251 states and 380 transitions. cyclomatic complexity: 130 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:13,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:13,443 INFO L93 Difference]: Finished difference Result 461 states and 702 transitions. [2022-11-18 19:53:13,443 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 461 states and 702 transitions. [2022-11-18 19:53:13,447 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 444 [2022-11-18 19:53:13,451 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 461 states to 461 states and 702 transitions. [2022-11-18 19:53:13,451 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 461 [2022-11-18 19:53:13,454 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 461 [2022-11-18 19:53:13,454 INFO L73 IsDeterministic]: Start isDeterministic. Operand 461 states and 702 transitions. [2022-11-18 19:53:13,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:13,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 461 states and 702 transitions. [2022-11-18 19:53:13,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states and 702 transitions. [2022-11-18 19:53:13,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 282. [2022-11-18 19:53:13,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 282 states, 282 states have (on average 1.5106382978723405) internal successors, (426), 281 states have internal predecessors, (426), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:13,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 282 states to 282 states and 426 transitions. [2022-11-18 19:53:13,492 INFO L240 hiAutomatonCegarLoop]: Abstraction has 282 states and 426 transitions. [2022-11-18 19:53:13,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:13,494 INFO L428 stractBuchiCegarLoop]: Abstraction has 282 states and 426 transitions. [2022-11-18 19:53:13,495 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 19:53:13,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 282 states and 426 transitions. [2022-11-18 19:53:13,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 265 [2022-11-18 19:53:13,497 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:13,497 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:13,500 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:13,500 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:13,501 INFO L748 eck$LassoCheckResult]: Stem: 2098#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 2076#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 1984#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 1985#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 1909#L203 assume !(-2 != ~active_side_History_0~0); 1910#L206 assume !(0 != ~manual_selection_History_0~0); 1927#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 2088#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 2043#L215 assume !(-2 != ~active_side_History_1~0); 2044#L218 assume !(0 != ~manual_selection_History_1~0); 2077#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 2090#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 2013#L227 assume !(-2 != ~active_side_History_2~0); 2014#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 1968#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1969#L58 assume !(0 == assume_abort_if_not_~cond#1); 2046#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 1953#L574-2 [2022-11-18 19:53:13,501 INFO L750 eck$LassoCheckResult]: Loop: 1953#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 1954#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 2050#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 2051#L80 assume { :end_inline_write_side1_failed_history } true; 2039#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 2040#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 1979#L110 assume { :end_inline_write_side2_failed_history } true; 1921#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 1923#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1914#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1915#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 2059#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 1882#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 1958#L140 assume { :end_inline_write_active_side_history } true; 1959#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 2018#L439 assume !(0 == ~side1Failed~0 % 256); 2071#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 2072#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2058#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 1896#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 1897#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 1898#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 1899#L449 assume !(0 == check_~tmp___0~0#1); 1889#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 1891#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 1892#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 2086#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 1960#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 1961#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 2069#L481 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2070#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2074#L158-1 check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 2092#L483 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 1880#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 2008#L608-44 assume !(0 == assert_~arg#1 % 256); 2056#L603-22 assume { :end_inline_assert } true; 1953#L574-2 [2022-11-18 19:53:13,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,503 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 3 times [2022-11-18 19:53:13,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544613940] [2022-11-18 19:53:13,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,531 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:13,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,562 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:13,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,566 INFO L85 PathProgramCache]: Analyzing trace with hash 1290175836, now seen corresponding path program 1 times [2022-11-18 19:53:13,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,567 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815362296] [2022-11-18 19:53:13,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:13,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:13,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:13,776 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815362296] [2022-11-18 19:53:13,777 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815362296] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:13,777 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:13,777 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:13,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940241581] [2022-11-18 19:53:13,778 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:13,781 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:13,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:13,784 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:13,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:13,786 INFO L87 Difference]: Start difference. First operand 282 states and 426 transitions. cyclomatic complexity: 145 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:13,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:13,812 INFO L93 Difference]: Finished difference Result 389 states and 585 transitions. [2022-11-18 19:53:13,812 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 389 states and 585 transitions. [2022-11-18 19:53:13,816 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 372 [2022-11-18 19:53:13,825 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 389 states to 389 states and 585 transitions. [2022-11-18 19:53:13,826 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 389 [2022-11-18 19:53:13,827 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 389 [2022-11-18 19:53:13,827 INFO L73 IsDeterministic]: Start isDeterministic. Operand 389 states and 585 transitions. [2022-11-18 19:53:13,828 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:13,828 INFO L218 hiAutomatonCegarLoop]: Abstraction has 389 states and 585 transitions. [2022-11-18 19:53:13,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states and 585 transitions. [2022-11-18 19:53:13,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 279. [2022-11-18 19:53:13,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 279 states, 279 states have (on average 1.5053763440860215) internal successors, (420), 278 states have internal predecessors, (420), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:13,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 420 transitions. [2022-11-18 19:53:13,849 INFO L240 hiAutomatonCegarLoop]: Abstraction has 279 states and 420 transitions. [2022-11-18 19:53:13,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:13,851 INFO L428 stractBuchiCegarLoop]: Abstraction has 279 states and 420 transitions. [2022-11-18 19:53:13,851 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 19:53:13,851 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 279 states and 420 transitions. [2022-11-18 19:53:13,853 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 262 [2022-11-18 19:53:13,853 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:13,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:13,857 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:13,857 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:13,858 INFO L748 eck$LassoCheckResult]: Stem: 2777#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 2754#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 2663#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 2664#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 2586#L203 assume !(-2 != ~active_side_History_0~0); 2587#L206 assume !(0 != ~manual_selection_History_0~0); 2604#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 2766#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 2720#L215 assume !(-2 != ~active_side_History_1~0); 2721#L218 assume !(0 != ~manual_selection_History_1~0); 2755#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 2768#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 2689#L227 assume !(-2 != ~active_side_History_2~0); 2690#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 2646#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2647#L58 assume !(0 == assume_abort_if_not_~cond#1); 2723#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 2630#L574-2 [2022-11-18 19:53:13,859 INFO L750 eck$LassoCheckResult]: Loop: 2630#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 2631#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 2727#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 2728#L80 assume { :end_inline_write_side1_failed_history } true; 2716#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 2717#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 2822#L110 assume { :end_inline_write_side2_failed_history } true; 2820#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 2821#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2824#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2823#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 2736#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 2559#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 2636#L140 assume { :end_inline_write_active_side_history } true; 2637#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 2694#L439 assume !(0 == ~side1Failed~0 % 256); 2749#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 2750#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2735#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 2573#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 2574#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 2590#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 2575#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 2576#L449 assume !(0 == check_~tmp___0~0#1); 2566#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 2568#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 2569#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 2764#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 2638#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 2639#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 2747#L481 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2748#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2752#L158-1 check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 2770#L483 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 2557#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 2685#L608-44 assume !(0 == assert_~arg#1 % 256); 2733#L603-22 assume { :end_inline_assert } true; 2630#L574-2 [2022-11-18 19:53:13,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,860 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 4 times [2022-11-18 19:53:13,860 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,861 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336586157] [2022-11-18 19:53:13,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,892 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:13,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:13,927 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:13,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:13,929 INFO L85 PathProgramCache]: Analyzing trace with hash -1538525200, now seen corresponding path program 1 times [2022-11-18 19:53:13,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:13,932 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433385884] [2022-11-18 19:53:13,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:13,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:13,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:14,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:14,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:14,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433385884] [2022-11-18 19:53:14,057 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1433385884] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:14,057 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:14,057 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:14,057 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674191226] [2022-11-18 19:53:14,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:14,058 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:14,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:14,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:14,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:14,060 INFO L87 Difference]: Start difference. First operand 279 states and 420 transitions. cyclomatic complexity: 142 Second operand has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:14,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:14,129 INFO L93 Difference]: Finished difference Result 397 states and 590 transitions. [2022-11-18 19:53:14,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 590 transitions. [2022-11-18 19:53:14,133 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 380 [2022-11-18 19:53:14,136 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 397 states and 590 transitions. [2022-11-18 19:53:14,136 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 397 [2022-11-18 19:53:14,137 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 397 [2022-11-18 19:53:14,138 INFO L73 IsDeterministic]: Start isDeterministic. Operand 397 states and 590 transitions. [2022-11-18 19:53:14,139 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:14,139 INFO L218 hiAutomatonCegarLoop]: Abstraction has 397 states and 590 transitions. [2022-11-18 19:53:14,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states and 590 transitions. [2022-11-18 19:53:14,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 267. [2022-11-18 19:53:14,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 267 states, 267 states have (on average 1.4831460674157304) internal successors, (396), 266 states have internal predecessors, (396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:14,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 396 transitions. [2022-11-18 19:53:14,148 INFO L240 hiAutomatonCegarLoop]: Abstraction has 267 states and 396 transitions. [2022-11-18 19:53:14,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:14,152 INFO L428 stractBuchiCegarLoop]: Abstraction has 267 states and 396 transitions. [2022-11-18 19:53:14,152 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 19:53:14,152 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 267 states and 396 transitions. [2022-11-18 19:53:14,155 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 250 [2022-11-18 19:53:14,155 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:14,155 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:14,156 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:14,156 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:14,157 INFO L748 eck$LassoCheckResult]: Stem: 3443#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 3422#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 3339#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 3340#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 3265#L203 assume !(-2 != ~active_side_History_0~0); 3266#L206 assume !(0 != ~manual_selection_History_0~0); 3283#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 3435#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 3389#L215 assume !(-2 != ~active_side_History_1~0); 3390#L218 assume !(0 != ~manual_selection_History_1~0); 3423#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 3436#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 3363#L227 assume !(-2 != ~active_side_History_2~0); 3364#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 3325#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3326#L58 assume !(0 == assume_abort_if_not_~cond#1); 3392#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 3312#L574-2 [2022-11-18 19:53:14,159 INFO L750 eck$LassoCheckResult]: Loop: 3312#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 3313#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 3396#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 3397#L80 assume { :end_inline_write_side1_failed_history } true; 3387#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 3388#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 3492#L110 assume { :end_inline_write_side2_failed_history } true; 3490#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 3491#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3494#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3493#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 3457#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 3451#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 3448#L140 assume { :end_inline_write_active_side_history } true; 3446#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 3444#L439 assume !(0 == ~side1Failed~0 % 256); 3417#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 3418#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3404#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 3252#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 3253#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 3269#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 3254#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 3255#L449 assume !(0 == check_~tmp___0~0#1); 3246#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 3248#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 3249#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 3332#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 3433#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 3314#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 3315#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 3415#L481 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3416#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3420#L158-1 check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 3438#L483 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 3237#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 3360#L608-44 assume !(0 == assert_~arg#1 % 256); 3401#L603-22 assume { :end_inline_assert } true; 3312#L574-2 [2022-11-18 19:53:14,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:14,160 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 5 times [2022-11-18 19:53:14,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:14,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625364477] [2022-11-18 19:53:14,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:14,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:14,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:14,177 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:14,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:14,203 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:14,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:14,204 INFO L85 PathProgramCache]: Analyzing trace with hash 1267501644, now seen corresponding path program 1 times [2022-11-18 19:53:14,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:14,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503965582] [2022-11-18 19:53:14,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:14,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:14,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:14,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:14,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:14,287 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503965582] [2022-11-18 19:53:14,289 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [503965582] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:14,289 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:14,289 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:14,289 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1166627251] [2022-11-18 19:53:14,289 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:14,290 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:14,290 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:14,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:14,291 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:14,292 INFO L87 Difference]: Start difference. First operand 267 states and 396 transitions. cyclomatic complexity: 130 Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:14,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:14,354 INFO L93 Difference]: Finished difference Result 415 states and 607 transitions. [2022-11-18 19:53:14,355 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 415 states and 607 transitions. [2022-11-18 19:53:14,358 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 398 [2022-11-18 19:53:14,361 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 415 states to 415 states and 607 transitions. [2022-11-18 19:53:14,362 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 415 [2022-11-18 19:53:14,362 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 415 [2022-11-18 19:53:14,362 INFO L73 IsDeterministic]: Start isDeterministic. Operand 415 states and 607 transitions. [2022-11-18 19:53:14,363 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:14,364 INFO L218 hiAutomatonCegarLoop]: Abstraction has 415 states and 607 transitions. [2022-11-18 19:53:14,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states and 607 transitions. [2022-11-18 19:53:14,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 255. [2022-11-18 19:53:14,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 255 states, 255 states have (on average 1.4588235294117646) internal successors, (372), 254 states have internal predecessors, (372), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:14,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 372 transitions. [2022-11-18 19:53:14,377 INFO L240 hiAutomatonCegarLoop]: Abstraction has 255 states and 372 transitions. [2022-11-18 19:53:14,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:14,382 INFO L428 stractBuchiCegarLoop]: Abstraction has 255 states and 372 transitions. [2022-11-18 19:53:14,382 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 19:53:14,382 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 255 states and 372 transitions. [2022-11-18 19:53:14,385 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 238 [2022-11-18 19:53:14,385 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:14,385 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:14,390 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:14,390 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:14,391 INFO L748 eck$LassoCheckResult]: Stem: 4125#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 4103#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 4021#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 4022#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 3950#L203 assume !(-2 != ~active_side_History_0~0); 3951#L206 assume !(0 != ~manual_selection_History_0~0); 3968#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 4116#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 4067#L215 assume !(-2 != ~active_side_History_1~0); 4068#L218 assume !(0 != ~manual_selection_History_1~0); 4104#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 4117#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 4043#L227 assume !(-2 != ~active_side_History_2~0); 4044#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 4005#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4006#L58 assume !(0 == assume_abort_if_not_~cond#1); 4070#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 3992#L574-2 [2022-11-18 19:53:14,396 INFO L750 eck$LassoCheckResult]: Loop: 3992#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 3993#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 4074#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 4075#L80 assume { :end_inline_write_side1_failed_history } true; 4063#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 4064#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 4157#L110 assume { :end_inline_write_side2_failed_history } true; 4151#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 4149#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4144#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4143#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 4142#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 4134#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 4132#L140 assume { :end_inline_write_active_side_history } true; 4130#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 4127#L439 assume !(0 == ~side1Failed~0 % 256); 4098#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 4099#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4084#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 3940#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 3941#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 3954#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 3942#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 3943#L449 assume !(0 == check_~tmp___0~0#1); 3934#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 3936#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 3937#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 4015#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 4113#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 3999#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 4000#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 4080#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 4096#L481 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4097#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4101#L158-1 check_#t~ret17#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1; 4119#L483 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 3925#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 4039#L608-44 assume !(0 == assert_~arg#1 % 256); 4079#L603-22 assume { :end_inline_assert } true; 3992#L574-2 [2022-11-18 19:53:14,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:14,398 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 6 times [2022-11-18 19:53:14,398 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:14,398 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499992818] [2022-11-18 19:53:14,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:14,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:14,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:14,424 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:14,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:14,441 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:14,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:14,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1555476481, now seen corresponding path program 1 times [2022-11-18 19:53:14,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:14,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [139780364] [2022-11-18 19:53:14,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:14,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:14,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:14,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:14,639 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:14,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [139780364] [2022-11-18 19:53:14,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [139780364] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:14,640 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:14,640 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 19:53:14,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864664991] [2022-11-18 19:53:14,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:14,641 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:14,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:14,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:53:14,641 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:53:14,642 INFO L87 Difference]: Start difference. First operand 255 states and 372 transitions. cyclomatic complexity: 118 Second operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 4 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:14,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:14,708 INFO L93 Difference]: Finished difference Result 241 states and 341 transitions. [2022-11-18 19:53:14,709 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 241 states and 341 transitions. [2022-11-18 19:53:14,711 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 206 [2022-11-18 19:53:14,712 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 241 states to 223 states and 316 transitions. [2022-11-18 19:53:14,712 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 223 [2022-11-18 19:53:14,713 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 223 [2022-11-18 19:53:14,713 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 316 transitions. [2022-11-18 19:53:14,713 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:14,713 INFO L218 hiAutomatonCegarLoop]: Abstraction has 223 states and 316 transitions. [2022-11-18 19:53:14,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 316 transitions. [2022-11-18 19:53:14,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2022-11-18 19:53:14,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 223 states, 223 states have (on average 1.4170403587443947) internal successors, (316), 222 states have internal predecessors, (316), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:14,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 316 transitions. [2022-11-18 19:53:14,718 INFO L240 hiAutomatonCegarLoop]: Abstraction has 223 states and 316 transitions. [2022-11-18 19:53:14,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 19:53:14,718 INFO L428 stractBuchiCegarLoop]: Abstraction has 223 states and 316 transitions. [2022-11-18 19:53:14,719 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-18 19:53:14,719 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 223 states and 316 transitions. [2022-11-18 19:53:14,720 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 206 [2022-11-18 19:53:14,720 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:14,720 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:14,721 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:14,721 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:14,721 INFO L748 eck$LassoCheckResult]: Stem: 4596#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 4518#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 4519#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 4570#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 4492#L203 assume !(-2 != ~active_side_History_0~0); 4493#L206 assume !(0 != ~manual_selection_History_0~0); 4508#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 4568#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 4569#L215 assume !(-2 != ~active_side_History_1~0); 4520#L218 assume !(0 != ~manual_selection_History_1~0); 4521#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 4576#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 4577#L227 assume !(-2 != ~active_side_History_2~0); 4571#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 4547#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4514#L58 assume !(0 == assume_abort_if_not_~cond#1); 4515#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 4536#L574-2 [2022-11-18 19:53:14,723 INFO L750 eck$LassoCheckResult]: Loop: 4536#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 4537#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 4557#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 4443#L80 assume { :end_inline_write_side1_failed_history } true; 4444#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 4597#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 4562#L110 assume { :end_inline_write_side2_failed_history } true; 4499#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 4501#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4645#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4644#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 4636#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 4632#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 4623#L140 assume { :end_inline_write_active_side_history } true; 4587#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 4543#L439 assume !(0 == ~side1Failed~0 % 256); 4488#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 4489#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4454#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 4455#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 4463#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 4495#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 4471#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 4472#L449 assume !(0 == check_~tmp___0~0#1); 4432#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 4458#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 4459#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 4561#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 4558#L479 assume !(0 != check_~tmp___7~0#1 % 256); 4466#L479-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 4559#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 4565#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 4584#L98-3 check_#t~ret19#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret19#1;havoc check_#t~ret19#1; 4478#L495 assume !(0 == check_~tmp___11~0#1 % 256); 4479#L495-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4588#L148-3 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4522#L158-3 check_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 4523#L511 assume !(check_~tmp___20~0#1 > -2); 4551#L511-1 check_#res#1 := 1; 4552#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 4433#L608-44 assume !(0 == assert_~arg#1 % 256); 4434#L603-22 assume { :end_inline_assert } true; 4536#L574-2 [2022-11-18 19:53:14,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:14,723 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 7 times [2022-11-18 19:53:14,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:14,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266656534] [2022-11-18 19:53:14,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:14,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:14,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:14,738 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:14,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:14,757 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:14,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:14,758 INFO L85 PathProgramCache]: Analyzing trace with hash 346788497, now seen corresponding path program 1 times [2022-11-18 19:53:14,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:14,759 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483621838] [2022-11-18 19:53:14,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:14,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:14,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:14,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:14,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:14,976 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483621838] [2022-11-18 19:53:14,977 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [483621838] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:14,977 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:14,977 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 19:53:14,979 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160686007] [2022-11-18 19:53:14,979 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:14,980 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:14,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:14,980 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 19:53:14,980 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 19:53:14,981 INFO L87 Difference]: Start difference. First operand 223 states and 316 transitions. cyclomatic complexity: 94 Second operand has 6 states, 6 states have (on average 7.0) internal successors, (42), 6 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:15,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:15,199 INFO L93 Difference]: Finished difference Result 894 states and 1265 transitions. [2022-11-18 19:53:15,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 894 states and 1265 transitions. [2022-11-18 19:53:15,206 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 877 [2022-11-18 19:53:15,210 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 894 states to 894 states and 1265 transitions. [2022-11-18 19:53:15,211 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 894 [2022-11-18 19:53:15,212 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 894 [2022-11-18 19:53:15,212 INFO L73 IsDeterministic]: Start isDeterministic. Operand 894 states and 1265 transitions. [2022-11-18 19:53:15,213 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:15,213 INFO L218 hiAutomatonCegarLoop]: Abstraction has 894 states and 1265 transitions. [2022-11-18 19:53:15,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 894 states and 1265 transitions. [2022-11-18 19:53:15,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 894 to 316. [2022-11-18 19:53:15,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 316 states have (on average 1.389240506329114) internal successors, (439), 315 states have internal predecessors, (439), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:15,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 439 transitions. [2022-11-18 19:53:15,223 INFO L240 hiAutomatonCegarLoop]: Abstraction has 316 states and 439 transitions. [2022-11-18 19:53:15,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 19:53:15,226 INFO L428 stractBuchiCegarLoop]: Abstraction has 316 states and 439 transitions. [2022-11-18 19:53:15,226 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-18 19:53:15,226 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 439 transitions. [2022-11-18 19:53:15,228 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 299 [2022-11-18 19:53:15,228 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:15,228 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:15,229 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:15,229 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:15,229 INFO L748 eck$LassoCheckResult]: Stem: 5772#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 5670#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 5671#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 5732#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 5643#L203 assume !(-2 != ~active_side_History_0~0); 5644#L206 assume !(0 != ~manual_selection_History_0~0); 5660#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 5730#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 5731#L215 assume !(-2 != ~active_side_History_1~0); 5672#L218 assume !(0 != ~manual_selection_History_1~0); 5673#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 5738#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 5739#L227 assume !(-2 != ~active_side_History_2~0); 5733#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 5703#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 5666#L58 assume !(0 == assume_abort_if_not_~cond#1); 5667#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 5690#L574-2 [2022-11-18 19:53:15,229 INFO L750 eck$LassoCheckResult]: Loop: 5690#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 5691#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 5713#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 5593#L80 assume { :end_inline_write_side1_failed_history } true; 5594#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 5775#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 5720#L110 assume { :end_inline_write_side2_failed_history } true; 5651#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 5653#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 5869#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 5862#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 5860#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 5848#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 5844#L140 assume { :end_inline_write_active_side_history } true; 5838#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 5697#L439 assume !(0 == ~side1Failed~0 % 256); 5698#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 5760#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 5761#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 5613#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 5614#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 5750#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 5751#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 5717#L449 assume !(0 == check_~tmp___0~0#1); 5581#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 5608#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 5609#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 5719#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 5714#L479 assume !(0 != check_~tmp___7~0#1 % 256); 5617#L479-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 5724#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 5725#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 5752#L98-3 check_#t~ret19#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret19#1;havoc check_#t~ret19#1; 5753#L495 assume !(0 == check_~tmp___11~0#1 % 256); 5758#L495-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 5759#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 5688#L151-3 assume 1 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_1~0; 5674#L158-3 check_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 5675#L511 assume !(check_~tmp___20~0#1 > -2); 5707#L511-1 check_#res#1 := 1; 5708#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 5582#L608-44 assume !(0 == assert_~arg#1 % 256); 5583#L603-22 assume { :end_inline_assert } true; 5690#L574-2 [2022-11-18 19:53:15,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:15,230 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 8 times [2022-11-18 19:53:15,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:15,230 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417181234] [2022-11-18 19:53:15,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:15,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:15,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:15,242 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:15,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:15,253 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:15,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:15,254 INFO L85 PathProgramCache]: Analyzing trace with hash 836898261, now seen corresponding path program 1 times [2022-11-18 19:53:15,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:15,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176409001] [2022-11-18 19:53:15,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:15,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:15,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:15,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:15,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:15,374 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176409001] [2022-11-18 19:53:15,374 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [176409001] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:15,374 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:15,374 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:15,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241015591] [2022-11-18 19:53:15,374 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:15,375 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:15,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:15,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:15,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:15,376 INFO L87 Difference]: Start difference. First operand 316 states and 439 transitions. cyclomatic complexity: 124 Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:15,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:15,429 INFO L93 Difference]: Finished difference Result 363 states and 507 transitions. [2022-11-18 19:53:15,429 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 363 states and 507 transitions. [2022-11-18 19:53:15,433 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 346 [2022-11-18 19:53:15,435 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 363 states to 363 states and 507 transitions. [2022-11-18 19:53:15,435 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 363 [2022-11-18 19:53:15,435 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 363 [2022-11-18 19:53:15,436 INFO L73 IsDeterministic]: Start isDeterministic. Operand 363 states and 507 transitions. [2022-11-18 19:53:15,436 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:15,436 INFO L218 hiAutomatonCegarLoop]: Abstraction has 363 states and 507 transitions. [2022-11-18 19:53:15,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 363 states and 507 transitions. [2022-11-18 19:53:15,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 363 to 223. [2022-11-18 19:53:15,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 223 states, 223 states have (on average 1.4080717488789238) internal successors, (314), 222 states have internal predecessors, (314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:15,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 314 transitions. [2022-11-18 19:53:15,441 INFO L240 hiAutomatonCegarLoop]: Abstraction has 223 states and 314 transitions. [2022-11-18 19:53:15,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:15,442 INFO L428 stractBuchiCegarLoop]: Abstraction has 223 states and 314 transitions. [2022-11-18 19:53:15,443 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-18 19:53:15,443 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 223 states and 314 transitions. [2022-11-18 19:53:15,444 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 206 [2022-11-18 19:53:15,444 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:15,444 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:15,445 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:15,445 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:15,445 INFO L748 eck$LassoCheckResult]: Stem: 6432#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 6351#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 6352#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 6403#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 6326#L203 assume !(-2 != ~active_side_History_0~0); 6327#L206 assume !(0 != ~manual_selection_History_0~0); 6341#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 6401#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 6402#L215 assume !(-2 != ~active_side_History_1~0); 6353#L218 assume !(0 != ~manual_selection_History_1~0); 6354#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 6411#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 6412#L227 assume !(-2 != ~active_side_History_2~0); 6404#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 6383#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 6347#L58 assume !(0 == assume_abort_if_not_~cond#1); 6348#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 6369#L574-2 [2022-11-18 19:53:15,445 INFO L750 eck$LassoCheckResult]: Loop: 6369#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 6370#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 6390#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 6277#L80 assume { :end_inline_write_side1_failed_history } true; 6278#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 6433#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 6473#L110 assume { :end_inline_write_side2_failed_history } true; 6466#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 6455#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 6452#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 6451#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 6450#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 6444#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 6441#L140 assume { :end_inline_write_active_side_history } true; 6438#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 6376#L439 assume !(0 == ~side1Failed~0 % 256); 6322#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 6323#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 6288#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 6289#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 6300#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 6329#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 6305#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 6306#L449 assume !(0 == check_~tmp___0~0#1); 6266#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 6292#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 6293#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 6394#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 6391#L479 assume !(0 != check_~tmp___7~0#1 % 256); 6298#L479-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 6392#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 6398#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 6421#L98-3 check_#t~ret19#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret19#1;havoc check_#t~ret19#1; 6312#L495 assume !(0 == check_~tmp___11~0#1 % 256); 6313#L495-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 6423#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 6367#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 6368#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 6355#L158-3 check_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 6356#L511 assume !(check_~tmp___20~0#1 > -2); 6384#L511-1 check_#res#1 := 1; 6385#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 6267#L608-44 assume !(0 == assert_~arg#1 % 256); 6268#L603-22 assume { :end_inline_assert } true; 6369#L574-2 [2022-11-18 19:53:15,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:15,446 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 9 times [2022-11-18 19:53:15,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:15,447 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576808879] [2022-11-18 19:53:15,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:15,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:15,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:15,490 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:15,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:15,499 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:15,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:15,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1007017130, now seen corresponding path program 1 times [2022-11-18 19:53:15,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:15,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309492740] [2022-11-18 19:53:15,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:15,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:15,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:15,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:15,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:15,656 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309492740] [2022-11-18 19:53:15,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1309492740] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:15,657 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:15,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-18 19:53:15,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574936676] [2022-11-18 19:53:15,657 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:15,657 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:15,657 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:15,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 19:53:15,658 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-18 19:53:15,658 INFO L87 Difference]: Start difference. First operand 223 states and 314 transitions. cyclomatic complexity: 92 Second operand has 7 states, 7 states have (on average 6.285714285714286) internal successors, (44), 7 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:15,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:15,966 INFO L93 Difference]: Finished difference Result 581 states and 824 transitions. [2022-11-18 19:53:15,966 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 581 states and 824 transitions. [2022-11-18 19:53:15,970 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 561 [2022-11-18 19:53:15,974 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 581 states to 581 states and 824 transitions. [2022-11-18 19:53:15,974 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 581 [2022-11-18 19:53:15,975 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 581 [2022-11-18 19:53:15,975 INFO L73 IsDeterministic]: Start isDeterministic. Operand 581 states and 824 transitions. [2022-11-18 19:53:15,976 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:15,976 INFO L218 hiAutomatonCegarLoop]: Abstraction has 581 states and 824 transitions. [2022-11-18 19:53:15,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581 states and 824 transitions. [2022-11-18 19:53:15,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 228. [2022-11-18 19:53:15,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 228 states have (on average 1.3991228070175439) internal successors, (319), 227 states have internal predecessors, (319), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:15,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 319 transitions. [2022-11-18 19:53:15,983 INFO L240 hiAutomatonCegarLoop]: Abstraction has 228 states and 319 transitions. [2022-11-18 19:53:15,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-18 19:53:15,984 INFO L428 stractBuchiCegarLoop]: Abstraction has 228 states and 319 transitions. [2022-11-18 19:53:15,984 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-18 19:53:15,984 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 228 states and 319 transitions. [2022-11-18 19:53:15,986 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 211 [2022-11-18 19:53:15,986 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:15,986 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:15,987 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:15,987 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:15,987 INFO L748 eck$LassoCheckResult]: Stem: 7267#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 7186#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 7187#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 7241#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 7161#L203 assume !(-2 != ~active_side_History_0~0); 7162#L206 assume !(0 != ~manual_selection_History_0~0); 7176#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 7239#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 7240#L215 assume !(-2 != ~active_side_History_1~0); 7188#L218 assume !(0 != ~manual_selection_History_1~0); 7189#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 7247#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 7248#L227 assume !(-2 != ~active_side_History_2~0); 7242#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 7215#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7182#L58 assume !(0 == assume_abort_if_not_~cond#1); 7183#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 7204#L574-2 [2022-11-18 19:53:15,988 INFO L750 eck$LassoCheckResult]: Loop: 7204#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 7205#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 7226#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 7113#L80 assume { :end_inline_write_side1_failed_history } true; 7114#L277 assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0; 7268#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 7232#L110 assume { :end_inline_write_side2_failed_history } true; 7168#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 7122#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7123#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 7132#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 7126#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 7108#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 7209#L140 assume { :end_inline_write_active_side_history } true; 7210#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 7211#L439 assume !(0 == ~side1Failed~0 % 256); 7157#L442 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 7158#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7124#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 7125#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 7133#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 7164#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 7141#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 7142#L449 assume !(0 == check_~tmp___0~0#1); 7102#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7128#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 7129#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7231#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 7227#L479 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 7212#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 7109#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 7110#L128-2 check_#t~ret16#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret16#1;havoc check_#t~ret16#1; 7155#L481 assume !(0 == check_~tmp___8~0#1 % 256); 7136#L479-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7235#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 7236#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7255#L98-3 check_#t~ret19#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret19#1;havoc check_#t~ret19#1; 7256#L495 assume !(0 == check_~tmp___11~0#1 % 256); 7221#L495-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7259#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 7202#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 7203#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 7190#L158-3 check_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 7191#L511 assume !(check_~tmp___20~0#1 > -2); 7222#L511-1 check_#res#1 := 1; 7223#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 7103#L608-44 assume !(0 == assert_~arg#1 % 256); 7104#L603-22 assume { :end_inline_assert } true; 7204#L574-2 [2022-11-18 19:53:15,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:15,988 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 10 times [2022-11-18 19:53:15,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:15,989 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116498794] [2022-11-18 19:53:15,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:15,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:15,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:15,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:16,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:16,008 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:16,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:16,009 INFO L85 PathProgramCache]: Analyzing trace with hash -1711428528, now seen corresponding path program 1 times [2022-11-18 19:53:16,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:16,009 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298188573] [2022-11-18 19:53:16,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:16,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:16,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:16,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:16,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:16,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298188573] [2022-11-18 19:53:16,141 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [298188573] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:16,141 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:16,141 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 19:53:16,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496369540] [2022-11-18 19:53:16,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:16,142 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:16,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:16,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:53:16,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:53:16,143 INFO L87 Difference]: Start difference. First operand 228 states and 319 transitions. cyclomatic complexity: 92 Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:16,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:16,164 INFO L93 Difference]: Finished difference Result 230 states and 320 transitions. [2022-11-18 19:53:16,164 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 230 states and 320 transitions. [2022-11-18 19:53:16,166 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 197 [2022-11-18 19:53:16,168 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 230 states to 214 states and 296 transitions. [2022-11-18 19:53:16,168 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 214 [2022-11-18 19:53:16,168 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 214 [2022-11-18 19:53:16,168 INFO L73 IsDeterministic]: Start isDeterministic. Operand 214 states and 296 transitions. [2022-11-18 19:53:16,169 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:16,169 INFO L218 hiAutomatonCegarLoop]: Abstraction has 214 states and 296 transitions. [2022-11-18 19:53:16,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states and 296 transitions. [2022-11-18 19:53:16,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2022-11-18 19:53:16,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 214 states have (on average 1.3831775700934579) internal successors, (296), 213 states have internal predecessors, (296), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:16,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 296 transitions. [2022-11-18 19:53:16,173 INFO L240 hiAutomatonCegarLoop]: Abstraction has 214 states and 296 transitions. [2022-11-18 19:53:16,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:53:16,174 INFO L428 stractBuchiCegarLoop]: Abstraction has 214 states and 296 transitions. [2022-11-18 19:53:16,174 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-18 19:53:16,174 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 214 states and 296 transitions. [2022-11-18 19:53:16,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 197 [2022-11-18 19:53:16,177 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:16,177 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:16,178 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:16,178 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:16,178 INFO L748 eck$LassoCheckResult]: Stem: 7732#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(54, 2);call #Ultimate.allocInit(12, 3);~cs1~0 := 0;~cs2~0 := 0;~s2p_new~0 := 0;~s1s2_old~0 := 0;~cs1_new~0 := 0;~s1s2~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s1s1~0 := 0;~s2s2~0 := 0;~cs1_old~0 := 0;~side1Failed_History_2~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_0~0 := 0;~s2p_old~0 := 0;~cs2_new~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;~s1p_new~0 := 0;~side2_written~0 := 0;~s1p~0 := 0;~manual_selection_History_0~0 := 0;~s2s2_new~0 := 0;~cs2_old~0 := 0;~s1p_old~0 := 0;~side2Failed_History_2~0 := 0;~s2s1_old~0 := 0;~nomsg~0 := -1;~side2Failed_History_1~0 := 0;~side2Failed_History_0~0 := 0;~s2s1_new~0 := 0;~side1Failed~0 := 0;~s2s2_old~0 := 0;~side1_written~0 := 0;~s2p~0 := 0;~s1s1_old~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~side2Failed~0 := 0;~active_side_History_2~0 := 0;~s1s2_new~0 := 0; 7653#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~side2Failed~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~side1Failed_History_0~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~side1Failed_History_1~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~side1Failed_History_2~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~side2Failed_History_0~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~side2Failed_History_1~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~side2Failed_History_2~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1; 7654#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 7707#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 7628#L203 assume !(-2 != ~active_side_History_0~0); 7629#L206 assume !(0 != ~manual_selection_History_0~0); 7643#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 7705#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 7706#L215 assume !(-2 != ~active_side_History_1~0); 7655#L218 assume !(0 != ~manual_selection_History_1~0); 7656#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 7713#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 7714#L227 assume !(-2 != ~active_side_History_2~0); 7708#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 7682#L233 main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7649#L58 assume !(0 == assume_abort_if_not_~cond#1); 7650#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 7671#L574-2 [2022-11-18 19:53:16,179 INFO L750 eck$LassoCheckResult]: Loop: 7671#L574-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 7672#L170 assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0; 7693#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet5#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 7580#L80 assume { :end_inline_write_side1_failed_history } true; 7581#L277 assume !(0 != ~side1Failed~0 % 256);Side1_activestandby_task_each_pals_period_~side1~0#1 := ~s1s1_old~0;~s1s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~s2s1_old~0;~s2s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := ~cs1_old~0;~cs1_old~0 := ~nomsg~0; 7734#L290 assume Side1_activestandby_task_each_pals_period_~side1~0#1 == Side1_activestandby_task_each_pals_period_~side2~0#1;Side1_activestandby_task_each_pals_period_~next_state~0#1 := 1; 7583#L309-1 ~s1s1_new~0 := (if (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s1_new~0) % 256 <= 127 then (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s1_new~0) % 256 else (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s2_new~0) % 256 <= 127 then (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s2_new~0) % 256 else (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1p_new~0) % 256 <= 127 then (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1p_new~0) % 256 else (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1p_new~0) % 256 - 256);~side1_written~0 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 7612#L318 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 7764#L110 assume { :end_inline_write_side2_failed_history } true; 7763#L334 assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0; 7589#L375 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7590#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 7599#L158 Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 7593#L394 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 7575#L400-1 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 7676#L140 assume { :end_inline_write_active_side_history } true; 7677#L410 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 7678#L439 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 7625#L442-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7591#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 7592#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 7600#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 7631#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 7608#L188 check_#t~ret10#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1; 7609#L449 assume !(0 == check_~tmp___0~0#1); 7569#L449-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7595#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 7596#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7698#L98-2 check_#t~ret15#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret15#1;havoc check_#t~ret15#1; 7694#L479 assume !(0 != check_~tmp___7~0#1 % 256); 7695#L479-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7696#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 7702#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7721#L98-3 check_#t~ret19#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret19#1;havoc check_#t~ret19#1; 7615#L495 assume 0 == check_~tmp___11~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 7616#L118-4 assume !(0 == read_side2_failed_history_~index#1 % 256); 7664#L121-4 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 7704#L128-4 check_#t~ret20#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___12~0#1 := check_#t~ret20#1;havoc check_#t~ret20#1; 7727#L497 assume !(0 != check_~tmp___12~0#1 % 256); 7688#L495-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7724#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 7669#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 7670#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 7657#L158-3 check_#t~ret23#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 7658#L511 assume !(check_~tmp___20~0#1 > -2); 7689#L511-1 check_#res#1 := 1; 7690#L529 main_#t~ret48#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 7570#L608-44 assume !(0 == assert_~arg#1 % 256); 7571#L603-22 assume { :end_inline_assert } true; 7671#L574-2 [2022-11-18 19:53:16,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:16,179 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 11 times [2022-11-18 19:53:16,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:16,180 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094644222] [2022-11-18 19:53:16,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:16,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:16,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:16,191 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:16,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:16,229 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:16,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:16,229 INFO L85 PathProgramCache]: Analyzing trace with hash -1265938467, now seen corresponding path program 1 times [2022-11-18 19:53:16,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:16,230 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171420277] [2022-11-18 19:53:16,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:16,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:16,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:16,281 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:16,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:16,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:16,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:16,326 INFO L85 PathProgramCache]: Analyzing trace with hash -1936336067, now seen corresponding path program 1 times [2022-11-18 19:53:16,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:16,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1837766728] [2022-11-18 19:53:16,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:16,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:16,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:16,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:16,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:16,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1837766728] [2022-11-18 19:53:16,435 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1837766728] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:16,435 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:16,435 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 19:53:16,435 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031682497] [2022-11-18 19:53:16,436 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:24,135 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 19:53:24,136 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 19:53:24,136 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 19:53:24,136 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 19:53:24,137 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-18 19:53:24,137 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:53:24,137 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 19:53:24,137 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 19:53:24,137 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c_Iteration12_Loop [2022-11-18 19:53:24,138 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 19:53:24,138 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 19:53:24,188 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,199 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,201 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,207 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,228 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,232 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,235 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,239 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,242 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,244 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,247 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,249 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:24,251 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,103 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,112 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,114 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,117 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,119 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,122 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,125 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,131 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,133 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,135 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,138 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,140 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,146 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,149 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,155 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,158 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,160 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,162 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,165 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,172 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,174 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,179 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,198 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,217 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,221 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,223 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,226 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,232 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,234 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,237 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,243 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,246 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,248 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,250 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,252 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,254 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,256 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,258 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,260 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,264 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,266 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,268 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,271 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,273 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,275 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:26,280 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:53:29,598 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 28