./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5d3b64744a19af136ca9c439b2264a15465f658e2e3d4a576a98d96e4b8aff92 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 19:45:01,003 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 19:45:01,006 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 19:45:01,025 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 19:45:01,026 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 19:45:01,027 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 19:45:01,028 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 19:45:01,030 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 19:45:01,032 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 19:45:01,033 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 19:45:01,034 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 19:45:01,035 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 19:45:01,035 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 19:45:01,037 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 19:45:01,038 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 19:45:01,039 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 19:45:01,040 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 19:45:01,041 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 19:45:01,043 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 19:45:01,045 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 19:45:01,046 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 19:45:01,047 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 19:45:01,049 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 19:45:01,050 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 19:45:01,053 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 19:45:01,054 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 19:45:01,054 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 19:45:01,055 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 19:45:01,056 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 19:45:01,057 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 19:45:01,057 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 19:45:01,058 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 19:45:01,059 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 19:45:01,060 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 19:45:01,061 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 19:45:01,061 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 19:45:01,062 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 19:45:01,062 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 19:45:01,062 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 19:45:01,063 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 19:45:01,064 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 19:45:01,066 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 19:45:01,125 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 19:45:01,126 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 19:45:01,127 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 19:45:01,127 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 19:45:01,128 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 19:45:01,129 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 19:45:01,129 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 19:45:01,129 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 19:45:01,130 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 19:45:01,130 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 19:45:01,130 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 19:45:01,131 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 19:45:01,131 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 19:45:01,131 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 19:45:01,132 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 19:45:01,132 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 19:45:01,132 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 19:45:01,132 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 19:45:01,133 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 19:45:01,133 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 19:45:01,133 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 19:45:01,134 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 19:45:01,147 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 19:45:01,148 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 19:45:01,148 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 19:45:01,148 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 19:45:01,149 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 19:45:01,149 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 19:45:01,149 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 19:45:01,150 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 19:45:01,150 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 19:45:01,151 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 19:45:01,151 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5d3b64744a19af136ca9c439b2264a15465f658e2e3d4a576a98d96e4b8aff92 [2022-11-18 19:45:01,386 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 19:45:01,416 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 19:45:01,419 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 19:45:01,421 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 19:45:01,422 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 19:45:01,423 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c [2022-11-18 19:45:01,508 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/data/e01717f53/107a431ac0044f2ba2d7b48ff97e0eab/FLAG7c2f61790 [2022-11-18 19:45:02,032 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 19:45:02,033 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c [2022-11-18 19:45:02,048 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/data/e01717f53/107a431ac0044f2ba2d7b48ff97e0eab/FLAG7c2f61790 [2022-11-18 19:45:02,375 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/data/e01717f53/107a431ac0044f2ba2d7b48ff97e0eab [2022-11-18 19:45:02,377 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 19:45:02,379 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 19:45:02,382 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 19:45:02,383 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 19:45:02,389 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 19:45:02,390 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,391 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@9d4093d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02, skipping insertion in model container [2022-11-18 19:45:02,391 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,399 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 19:45:02,424 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 19:45:02,710 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c[8246,8259] [2022-11-18 19:45:02,711 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:45:02,724 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 19:45:02,807 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c[8246,8259] [2022-11-18 19:45:02,808 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:45:02,835 INFO L208 MainTranslator]: Completed translation [2022-11-18 19:45:02,836 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02 WrapperNode [2022-11-18 19:45:02,836 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 19:45:02,837 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 19:45:02,837 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 19:45:02,837 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 19:45:02,847 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,870 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,915 INFO L138 Inliner]: procedures = 22, calls = 14, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 244 [2022-11-18 19:45:02,916 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 19:45:02,916 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 19:45:02,917 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 19:45:02,917 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 19:45:02,928 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,929 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,940 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,940 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,945 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,949 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,967 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,968 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,971 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 19:45:02,972 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 19:45:02,972 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 19:45:02,972 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 19:45:02,986 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (1/1) ... [2022-11-18 19:45:02,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:45:03,005 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:45:03,020 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:45:03,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_80ec1c06-b8bd-4760-924f-2da73106bfff/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 19:45:03,065 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 19:45:03,065 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 19:45:03,065 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 19:45:03,066 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 19:45:03,185 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 19:45:03,187 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 19:45:03,612 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 19:45:03,627 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 19:45:03,627 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 19:45:03,629 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:45:03 BoogieIcfgContainer [2022-11-18 19:45:03,629 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 19:45:03,630 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 19:45:03,630 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 19:45:03,636 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 19:45:03,636 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:45:03,637 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 07:45:02" (1/3) ... [2022-11-18 19:45:03,638 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@76d1d98f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:45:03, skipping insertion in model container [2022-11-18 19:45:03,638 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:45:03,638 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:45:02" (2/3) ... [2022-11-18 19:45:03,638 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@76d1d98f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:45:03, skipping insertion in model container [2022-11-18 19:45:03,638 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:45:03,639 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:45:03" (3/3) ... [2022-11-18 19:45:03,640 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.4.1.ufo.BOUNDED-8.pals.c [2022-11-18 19:45:03,721 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 19:45:03,721 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 19:45:03,721 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 19:45:03,721 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 19:45:03,721 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 19:45:03,721 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 19:45:03,722 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 19:45:03,722 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 19:45:03,726 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 68 states, 67 states have (on average 1.7164179104477613) internal successors, (115), 67 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:03,747 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 35 [2022-11-18 19:45:03,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:45:03,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:45:03,754 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:03,754 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:03,754 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 19:45:03,755 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 68 states, 67 states have (on average 1.7164179104477613) internal successors, (115), 67 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:03,759 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 35 [2022-11-18 19:45:03,759 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:45:03,759 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:45:03,760 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:03,761 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:03,768 INFO L748 eck$LassoCheckResult]: Stem: 53#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p1~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p2_old~0 := 0;~send4~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 44#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 54#L163true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 22#L163-1true init_#res#1 := init_~tmp~0#1; 52#L256true main_#t~ret21#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 63#L312true assume !(0 == main_~i2~0#1); 15#L312-2true ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 10#L322-2true [2022-11-18 19:45:03,769 INFO L750 eck$LassoCheckResult]: Loop: 10#L322-2true assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 7#L61true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 51#L61-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 8#L89true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 19#L89-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 55#L114true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 45#L114-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 34#L139true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 20#L139-2true assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 64#L264true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 17#L264-1true check_#res#1 := check_~tmp~1#1; 65#L284true main_#t~ret22#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 23#L349true assume !(0 == assert_~arg#1 % 256); 35#L344true assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 10#L322-2true [2022-11-18 19:45:03,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:03,776 INFO L85 PathProgramCache]: Analyzing trace with hash 1932780748, now seen corresponding path program 1 times [2022-11-18 19:45:03,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:03,785 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822998989] [2022-11-18 19:45:03,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:03,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:03,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:45:04,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:45:04,053 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:45:04,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822998989] [2022-11-18 19:45:04,054 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1822998989] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:45:04,054 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:45:04,054 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:45:04,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277422595] [2022-11-18 19:45:04,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:45:04,083 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:45:04,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:04,089 INFO L85 PathProgramCache]: Analyzing trace with hash 1387092733, now seen corresponding path program 1 times [2022-11-18 19:45:04,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:04,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220399800] [2022-11-18 19:45:04,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:04,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:04,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:45:04,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:45:04,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:45:04,611 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220399800] [2022-11-18 19:45:04,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220399800] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:45:04,612 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:45:04,612 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:45:04,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [319565454] [2022-11-18 19:45:04,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:45:04,614 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:45:04,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:45:04,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 19:45:04,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 19:45:04,654 INFO L87 Difference]: Start difference. First operand has 68 states, 67 states have (on average 1.7164179104477613) internal successors, (115), 67 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:04,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:45:04,798 INFO L93 Difference]: Finished difference Result 106 states and 170 transitions. [2022-11-18 19:45:04,800 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 106 states and 170 transitions. [2022-11-18 19:45:04,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2022-11-18 19:45:04,811 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 106 states to 97 states and 139 transitions. [2022-11-18 19:45:04,814 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2022-11-18 19:45:04,815 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2022-11-18 19:45:04,818 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 139 transitions. [2022-11-18 19:45:04,819 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:45:04,819 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 139 transitions. [2022-11-18 19:45:04,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 139 transitions. [2022-11-18 19:45:04,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 63. [2022-11-18 19:45:04,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.3333333333333333) internal successors, (84), 62 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:04,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 84 transitions. [2022-11-18 19:45:04,850 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 84 transitions. [2022-11-18 19:45:04,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 19:45:04,855 INFO L428 stractBuchiCegarLoop]: Abstraction has 63 states and 84 transitions. [2022-11-18 19:45:04,855 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 19:45:04,856 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 84 transitions. [2022-11-18 19:45:04,857 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2022-11-18 19:45:04,857 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:45:04,858 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:45:04,859 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:04,859 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:04,859 INFO L748 eck$LassoCheckResult]: Stem: 251#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p1~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p2_old~0 := 0;~send4~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 244#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 245#L163 assume 0 == ~r1~0; 224#L164 assume ~id1~0 >= 0; 213#L165 assume 0 == ~st1~0; 214#L166 assume ~send1~0 == ~id1~0; 229#L167 assume 0 == ~mode1~0 % 256; 206#L168 assume ~id2~0 >= 0; 207#L169 assume 0 == ~st2~0; 253#L170 assume ~send2~0 == ~id2~0; 248#L171 assume 0 == ~mode2~0 % 256; 246#L172 assume ~id3~0 >= 0; 247#L173 assume 0 == ~st3~0; 252#L174 assume ~send3~0 == ~id3~0; 197#L175 assume 0 == ~mode3~0 % 256; 198#L176 assume ~id4~0 >= 0; 249#L177 assume 0 == ~st4~0; 235#L178 assume ~send4~0 == ~id4~0; 236#L179 assume 0 == ~mode4~0 % 256; 192#L180 assume ~id1~0 != ~id2~0; 193#L181 assume ~id1~0 != ~id3~0; 232#L182 assume ~id1~0 != ~id4~0; 233#L183 assume ~id2~0 != ~id3~0; 218#L184 assume ~id2~0 != ~id4~0; 219#L185 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 225#L163-1 init_#res#1 := init_~tmp~0#1; 226#L256 main_#t~ret21#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 250#L312 assume !(0 == main_~i2~0#1); 215#L312-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 205#L322-2 [2022-11-18 19:45:04,860 INFO L750 eck$LassoCheckResult]: Loop: 205#L322-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 199#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 201#L61-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 202#L89 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 203#L89-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 222#L114 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 234#L114-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 237#L139 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 212#L139-2 assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 223#L264 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 220#L264-1 check_#res#1 := check_~tmp~1#1; 221#L284 main_#t~ret22#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 227#L349 assume !(0 == assert_~arg#1 % 256); 228#L344 assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 205#L322-2 [2022-11-18 19:45:04,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:04,861 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 1 times [2022-11-18 19:45:04,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:04,861 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939683434] [2022-11-18 19:45:04,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:04,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:04,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:04,881 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:45:04,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:04,926 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:45:04,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:04,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1387092733, now seen corresponding path program 2 times [2022-11-18 19:45:04,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:04,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144586339] [2022-11-18 19:45:04,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:04,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:04,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:45:05,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:45:05,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:45:05,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144586339] [2022-11-18 19:45:05,247 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144586339] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:45:05,247 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:45:05,248 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:45:05,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118673845] [2022-11-18 19:45:05,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:45:05,248 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:45:05,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:45:05,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 19:45:05,251 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 19:45:05,251 INFO L87 Difference]: Start difference. First operand 63 states and 84 transitions. cyclomatic complexity: 22 Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:05,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:45:05,324 INFO L93 Difference]: Finished difference Result 66 states and 86 transitions. [2022-11-18 19:45:05,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 86 transitions. [2022-11-18 19:45:05,331 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2022-11-18 19:45:05,333 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 63 states and 81 transitions. [2022-11-18 19:45:05,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2022-11-18 19:45:05,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2022-11-18 19:45:05,335 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 81 transitions. [2022-11-18 19:45:05,336 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:45:05,336 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 81 transitions. [2022-11-18 19:45:05,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 81 transitions. [2022-11-18 19:45:05,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2022-11-18 19:45:05,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.2857142857142858) internal successors, (81), 62 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:05,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 81 transitions. [2022-11-18 19:45:05,343 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 81 transitions. [2022-11-18 19:45:05,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 19:45:05,345 INFO L428 stractBuchiCegarLoop]: Abstraction has 63 states and 81 transitions. [2022-11-18 19:45:05,345 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 19:45:05,346 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 81 transitions. [2022-11-18 19:45:05,350 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2022-11-18 19:45:05,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:45:05,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:45:05,352 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:05,353 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:05,353 INFO L748 eck$LassoCheckResult]: Stem: 392#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p1~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p2_old~0 := 0;~send4~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 385#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 386#L163 assume 0 == ~r1~0; 365#L164 assume ~id1~0 >= 0; 354#L165 assume 0 == ~st1~0; 355#L166 assume ~send1~0 == ~id1~0; 370#L167 assume 0 == ~mode1~0 % 256; 347#L168 assume ~id2~0 >= 0; 348#L169 assume 0 == ~st2~0; 394#L170 assume ~send2~0 == ~id2~0; 389#L171 assume 0 == ~mode2~0 % 256; 387#L172 assume ~id3~0 >= 0; 388#L173 assume 0 == ~st3~0; 393#L174 assume ~send3~0 == ~id3~0; 338#L175 assume 0 == ~mode3~0 % 256; 339#L176 assume ~id4~0 >= 0; 390#L177 assume 0 == ~st4~0; 376#L178 assume ~send4~0 == ~id4~0; 377#L179 assume 0 == ~mode4~0 % 256; 333#L180 assume ~id1~0 != ~id2~0; 334#L181 assume ~id1~0 != ~id3~0; 373#L182 assume ~id1~0 != ~id4~0; 374#L183 assume ~id2~0 != ~id3~0; 359#L184 assume ~id2~0 != ~id4~0; 360#L185 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 366#L163-1 init_#res#1 := init_~tmp~0#1; 367#L256 main_#t~ret21#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 391#L312 assume !(0 == main_~i2~0#1); 356#L312-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 346#L322-2 [2022-11-18 19:45:05,353 INFO L750 eck$LassoCheckResult]: Loop: 346#L322-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 340#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 342#L61-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 343#L89 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 344#L89-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 363#L114 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 375#L114-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 378#L139 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 353#L139-2 assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 364#L264 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 335#L265 assume ~r1~0 >= 4; 336#L269 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 361#L264-1 check_#res#1 := check_~tmp~1#1; 362#L284 main_#t~ret22#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 368#L349 assume !(0 == assert_~arg#1 % 256); 369#L344 assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 346#L322-2 [2022-11-18 19:45:05,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:05,355 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 2 times [2022-11-18 19:45:05,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:05,356 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186056040] [2022-11-18 19:45:05,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:05,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:05,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,381 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:45:05,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:45:05,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:05,422 INFO L85 PathProgramCache]: Analyzing trace with hash 140432525, now seen corresponding path program 1 times [2022-11-18 19:45:05,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:05,423 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286800202] [2022-11-18 19:45:05,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:05,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:05,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:45:05,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:45:05,456 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:45:05,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286800202] [2022-11-18 19:45:05,456 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1286800202] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:45:05,456 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:45:05,458 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:45:05,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309483076] [2022-11-18 19:45:05,458 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:45:05,458 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:45:05,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:45:05,461 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:45:05,461 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:45:05,462 INFO L87 Difference]: Start difference. First operand 63 states and 81 transitions. cyclomatic complexity: 19 Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:05,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:45:05,493 INFO L93 Difference]: Finished difference Result 91 states and 122 transitions. [2022-11-18 19:45:05,493 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 122 transitions. [2022-11-18 19:45:05,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2022-11-18 19:45:05,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 91 states and 122 transitions. [2022-11-18 19:45:05,501 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2022-11-18 19:45:05,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2022-11-18 19:45:05,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 91 states and 122 transitions. [2022-11-18 19:45:05,504 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:45:05,504 INFO L218 hiAutomatonCegarLoop]: Abstraction has 91 states and 122 transitions. [2022-11-18 19:45:05,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states and 122 transitions. [2022-11-18 19:45:05,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2022-11-18 19:45:05,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.3406593406593406) internal successors, (122), 90 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:45:05,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 122 transitions. [2022-11-18 19:45:05,519 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 122 transitions. [2022-11-18 19:45:05,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:45:05,520 INFO L428 stractBuchiCegarLoop]: Abstraction has 91 states and 122 transitions. [2022-11-18 19:45:05,521 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 19:45:05,521 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 122 transitions. [2022-11-18 19:45:05,522 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2022-11-18 19:45:05,522 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:45:05,522 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:45:05,523 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:05,524 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:45:05,524 INFO L748 eck$LassoCheckResult]: Stem: 555#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p1~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p2_old~0 := 0;~send4~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 546#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 547#L163 assume 0 == ~r1~0; 524#L164 assume ~id1~0 >= 0; 513#L165 assume 0 == ~st1~0; 514#L166 assume ~send1~0 == ~id1~0; 529#L167 assume 0 == ~mode1~0 % 256; 506#L168 assume ~id2~0 >= 0; 507#L169 assume 0 == ~st2~0; 557#L170 assume ~send2~0 == ~id2~0; 550#L171 assume 0 == ~mode2~0 % 256; 548#L172 assume ~id3~0 >= 0; 549#L173 assume 0 == ~st3~0; 556#L174 assume ~send3~0 == ~id3~0; 497#L175 assume 0 == ~mode3~0 % 256; 498#L176 assume ~id4~0 >= 0; 551#L177 assume 0 == ~st4~0; 537#L178 assume ~send4~0 == ~id4~0; 538#L179 assume 0 == ~mode4~0 % 256; 493#L180 assume ~id1~0 != ~id2~0; 494#L181 assume ~id1~0 != ~id3~0; 534#L182 assume ~id1~0 != ~id4~0; 535#L183 assume ~id2~0 != ~id3~0; 518#L184 assume ~id2~0 != ~id4~0; 519#L185 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 525#L163-1 init_#res#1 := init_~tmp~0#1; 526#L256 main_#t~ret21#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 554#L312 assume !(0 == main_~i2~0#1); 515#L312-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 505#L322-2 [2022-11-18 19:45:05,525 INFO L750 eck$LassoCheckResult]: Loop: 505#L322-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 499#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 501#L61-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 502#L89 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 503#L89-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 522#L114 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 536#L114-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 539#L139 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 512#L139-2 assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 523#L264 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 560#L265 assume !(~r1~0 >= 4); 531#L268 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0; 532#L269 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 520#L264-1 check_#res#1 := check_~tmp~1#1; 521#L284 main_#t~ret22#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 527#L349 assume !(0 == assert_~arg#1 % 256); 528#L344 assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 505#L322-2 [2022-11-18 19:45:05,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:05,525 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 3 times [2022-11-18 19:45:05,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:05,526 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895823309] [2022-11-18 19:45:05,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:05,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:05,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,552 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:45:05,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,572 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:45:05,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:05,573 INFO L85 PathProgramCache]: Analyzing trace with hash 1705012855, now seen corresponding path program 1 times [2022-11-18 19:45:05,573 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:05,574 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220896957] [2022-11-18 19:45:05,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:05,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:05,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,610 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:45:05,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,644 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:45:05,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:45:05,645 INFO L85 PathProgramCache]: Analyzing trace with hash 1742065361, now seen corresponding path program 1 times [2022-11-18 19:45:05,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:45:05,646 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232441017] [2022-11-18 19:45:05,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:45:05,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:45:05,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,684 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:45:05,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:45:05,735 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:45:09,420 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 19:45:09,421 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 19:45:09,421 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 19:45:09,421 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 19:45:09,421 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-18 19:45:09,422 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:45:09,422 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 19:45:09,422 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 19:45:09,422 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.4.1.ufo.BOUNDED-8.pals.c_Iteration4_Loop [2022-11-18 19:45:09,422 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 19:45:09,423 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 19:45:09,461 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:09,474 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:09,479 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:09,482 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:09,485 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:09,487 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:09,493 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:11,149 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:11,160 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:11,164 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:11,171 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:11,177 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:45:12,847 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 24