./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2e89791a2e8bde62b11f5e3f45edc8f6b1d8831a0e105552a6da22a3ff44c454 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 19:40:23,732 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 19:40:23,734 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 19:40:23,775 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 19:40:23,775 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 19:40:23,780 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 19:40:23,782 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 19:40:23,786 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 19:40:23,788 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 19:40:23,794 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 19:40:23,795 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 19:40:23,797 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 19:40:23,798 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 19:40:23,800 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 19:40:23,801 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 19:40:23,803 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 19:40:23,805 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 19:40:23,806 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 19:40:23,807 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 19:40:23,814 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 19:40:23,816 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 19:40:23,817 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 19:40:23,820 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 19:40:23,821 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 19:40:23,827 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 19:40:23,827 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 19:40:23,828 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 19:40:23,829 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 19:40:23,830 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 19:40:23,831 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 19:40:23,832 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 19:40:23,833 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 19:40:23,835 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 19:40:23,836 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 19:40:23,838 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 19:40:23,839 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 19:40:23,839 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 19:40:23,840 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 19:40:23,840 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 19:40:23,841 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 19:40:23,841 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 19:40:23,842 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 19:40:23,884 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 19:40:23,884 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 19:40:23,885 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 19:40:23,885 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 19:40:23,886 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 19:40:23,886 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 19:40:23,887 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 19:40:23,887 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 19:40:23,887 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 19:40:23,887 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 19:40:23,888 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 19:40:23,889 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 19:40:23,889 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 19:40:23,889 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 19:40:23,889 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 19:40:23,889 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 19:40:23,889 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 19:40:23,890 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 19:40:23,890 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 19:40:23,890 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 19:40:23,890 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 19:40:23,890 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 19:40:23,890 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 19:40:23,891 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 19:40:23,891 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 19:40:23,891 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 19:40:23,891 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 19:40:23,891 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 19:40:23,892 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 19:40:23,892 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 19:40:23,892 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 19:40:23,893 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 19:40:23,893 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2e89791a2e8bde62b11f5e3f45edc8f6b1d8831a0e105552a6da22a3ff44c454 [2022-11-18 19:40:24,151 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 19:40:24,174 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 19:40:24,177 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 19:40:24,178 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 19:40:24,180 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 19:40:24,182 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c [2022-11-18 19:40:24,257 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/data/a8b26eba2/957f9d0b0e9948ddba6859ea814bd0f2/FLAG9fb79ac5a [2022-11-18 19:40:24,833 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 19:40:24,834 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c [2022-11-18 19:40:24,843 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/data/a8b26eba2/957f9d0b0e9948ddba6859ea814bd0f2/FLAG9fb79ac5a [2022-11-18 19:40:25,154 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/data/a8b26eba2/957f9d0b0e9948ddba6859ea814bd0f2 [2022-11-18 19:40:25,157 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 19:40:25,161 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 19:40:25,165 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 19:40:25,165 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 19:40:25,168 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 19:40:25,169 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,171 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@659cfe41 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25, skipping insertion in model container [2022-11-18 19:40:25,171 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,178 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 19:40:25,232 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 19:40:25,476 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c[15177,15190] [2022-11-18 19:40:25,481 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:40:25,492 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 19:40:25,544 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/sv-benchmarks/c/seq-mthreaded/pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c[15177,15190] [2022-11-18 19:40:25,545 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:40:25,572 INFO L208 MainTranslator]: Completed translation [2022-11-18 19:40:25,572 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25 WrapperNode [2022-11-18 19:40:25,572 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 19:40:25,573 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 19:40:25,573 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 19:40:25,574 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 19:40:25,581 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,589 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,620 INFO L138 Inliner]: procedures = 26, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 344 [2022-11-18 19:40:25,620 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 19:40:25,621 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 19:40:25,621 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 19:40:25,621 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 19:40:25,630 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,631 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,633 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,634 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,640 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,646 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,648 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,650 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,654 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 19:40:25,654 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 19:40:25,655 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 19:40:25,655 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 19:40:25,656 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (1/1) ... [2022-11-18 19:40:25,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:40:25,690 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:40:25,707 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:40:25,716 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4914eaed-1c4b-4015-8a2c-38cdb500b434/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 19:40:25,757 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 19:40:25,757 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 19:40:25,757 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 19:40:25,758 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 19:40:25,865 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 19:40:25,867 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 19:40:26,432 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 19:40:26,444 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 19:40:26,450 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 19:40:26,452 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:40:26 BoogieIcfgContainer [2022-11-18 19:40:26,452 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 19:40:26,454 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 19:40:26,455 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 19:40:26,459 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 19:40:26,460 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:40:26,460 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 07:40:25" (1/3) ... [2022-11-18 19:40:26,461 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53a5d840 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:40:26, skipping insertion in model container [2022-11-18 19:40:26,461 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:40:26,461 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:40:25" (2/3) ... [2022-11-18 19:40:26,462 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53a5d840 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:40:26, skipping insertion in model container [2022-11-18 19:40:26,462 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:40:26,462 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:40:26" (3/3) ... [2022-11-18 19:40:26,463 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c [2022-11-18 19:40:26,539 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 19:40:26,539 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 19:40:26,539 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 19:40:26,539 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 19:40:26,539 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 19:40:26,540 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 19:40:26,540 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 19:40:26,540 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 19:40:26,545 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:26,594 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-18 19:40:26,595 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:40:26,595 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:40:26,607 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:26,608 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:26,608 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 19:40:26,609 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:26,621 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-11-18 19:40:26,622 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:40:26,622 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:40:26,636 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:26,636 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:26,660 INFO L748 eck$LassoCheckResult]: Stem: 83#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 26#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 54#L230true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 93#L230-1true init_#res#1 := init_~tmp~0#1; 63#L391true main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 30#L24true assume !(0 == assume_abort_if_not_~cond#1); 9#L23true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 23#L469-2true [2022-11-18 19:40:26,687 INFO L750 eck$LassoCheckResult]: Loop: 23#L469-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 7#L80true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 13#L80-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 81#L106true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 32#L106-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 27#L131true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 69#L131-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 91#L156true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 25#L156-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 68#L181true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 28#L181-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 22#L206true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 50#L206-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 48#L399true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 87#L399-1true check_#res#1 := check_~tmp~1#1; 3#L419true main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 29#L501true assume !(0 == assert_~arg#1 % 256); 61#L496true assume { :end_inline_assert } true; 23#L469-2true [2022-11-18 19:40:26,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:26,700 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2022-11-18 19:40:26,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:26,711 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501407411] [2022-11-18 19:40:26,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:26,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:26,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:40:27,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:40:27,099 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:40:27,101 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501407411] [2022-11-18 19:40:27,102 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [501407411] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:40:27,102 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:40:27,103 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:40:27,105 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235474067] [2022-11-18 19:40:27,106 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:40:27,110 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:40:27,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:27,113 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 1 times [2022-11-18 19:40:27,113 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:27,114 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584092011] [2022-11-18 19:40:27,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:27,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:27,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:40:27,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:40:27,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:40:27,482 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584092011] [2022-11-18 19:40:27,483 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1584092011] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:40:27,483 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:40:27,483 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:40:27,483 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792870162] [2022-11-18 19:40:27,484 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:40:27,485 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:40:27,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:40:27,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 19:40:27,546 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 19:40:27,550 INFO L87 Difference]: Start difference. First operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:27,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:40:27,710 INFO L93 Difference]: Finished difference Result 96 states and 164 transitions. [2022-11-18 19:40:27,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 164 transitions. [2022-11-18 19:40:27,713 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-18 19:40:27,721 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 92 states and 121 transitions. [2022-11-18 19:40:27,723 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-18 19:40:27,724 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-18 19:40:27,725 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions. [2022-11-18 19:40:27,726 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:40:27,726 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-18 19:40:27,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions. [2022-11-18 19:40:27,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-18 19:40:27,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:27,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions. [2022-11-18 19:40:27,756 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-18 19:40:27,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 19:40:27,761 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-11-18 19:40:27,761 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 19:40:27,761 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions. [2022-11-18 19:40:27,762 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-18 19:40:27,762 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:40:27,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:40:27,764 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:27,764 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:27,765 INFO L748 eck$LassoCheckResult]: Stem: 296#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 232#L230 assume 0 == ~r1~0 % 256; 233#L231 assume ~id1~0 >= 0; 244#L232 assume 0 == ~st1~0; 301#L233 assume ~send1~0 == ~id1~0; 222#L234 assume 0 == ~mode1~0 % 256; 223#L235 assume ~id2~0 >= 0; 293#L236 assume 0 == ~st2~0; 279#L237 assume ~send2~0 == ~id2~0; 268#L238 assume 0 == ~mode2~0 % 256; 269#L239 assume ~id3~0 >= 0; 264#L240 assume 0 == ~st3~0; 265#L241 assume ~send3~0 == ~id3~0; 273#L242 assume 0 == ~mode3~0 % 256; 242#L243 assume ~id4~0 >= 0; 234#L244 assume 0 == ~st4~0; 235#L245 assume ~send4~0 == ~id4~0; 272#L246 assume 0 == ~mode4~0 % 256; 285#L247 assume ~id5~0 >= 0; 286#L248 assume 0 == ~st5~0; 224#L249 assume ~send5~0 == ~id5~0; 225#L250 assume 0 == ~mode5~0 % 256; 247#L251 assume ~id6~0 >= 0; 248#L252 assume 0 == ~st6~0; 256#L253 assume ~send6~0 == ~id6~0; 257#L254 assume 0 == ~mode6~0 % 256; 258#L255 assume ~id1~0 != ~id2~0; 259#L256 assume ~id1~0 != ~id3~0; 295#L257 assume ~id1~0 != ~id4~0; 276#L258 assume ~id1~0 != ~id5~0; 211#L259 assume ~id1~0 != ~id6~0; 212#L260 assume ~id2~0 != ~id3~0; 302#L261 assume ~id2~0 != ~id4~0; 297#L262 assume ~id2~0 != ~id5~0; 298#L263 assume ~id2~0 != ~id6~0; 299#L264 assume ~id3~0 != ~id4~0; 218#L265 assume ~id3~0 != ~id5~0; 219#L266 assume ~id3~0 != ~id6~0; 243#L267 assume ~id4~0 != ~id5~0; 261#L268 assume ~id4~0 != ~id6~0; 262#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 300#L230-1 init_#res#1 := init_~tmp~0#1; 254#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 255#L24 assume !(0 == assume_abort_if_not_~cond#1); 245#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 246#L469-2 [2022-11-18 19:40:27,765 INFO L750 eck$LassoCheckResult]: Loop: 246#L469-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 239#L80 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 241#L80-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 260#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 294#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 291#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 274#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 275#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 281#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 270#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 271#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 277#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 216#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 217#L399 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 288#L399-1 check_#res#1 := check_~tmp~1#1; 220#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 221#L501 assume !(0 == assert_~arg#1 % 256); 249#L496 assume { :end_inline_assert } true; 246#L469-2 [2022-11-18 19:40:27,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:27,766 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2022-11-18 19:40:27,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:27,766 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461494641] [2022-11-18 19:40:27,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:27,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:27,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:27,791 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:40:27,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:27,838 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:40:27,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:27,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 2 times [2022-11-18 19:40:27,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:27,839 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259146697] [2022-11-18 19:40:27,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:27,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:27,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:40:28,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:40:28,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:40:28,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259146697] [2022-11-18 19:40:28,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1259146697] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:40:28,157 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:40:28,157 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:40:28,157 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973138430] [2022-11-18 19:40:28,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:40:28,158 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:40:28,159 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:40:28,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 19:40:28,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 19:40:28,160 INFO L87 Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:28,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:40:28,236 INFO L93 Difference]: Finished difference Result 95 states and 123 transitions. [2022-11-18 19:40:28,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions. [2022-11-18 19:40:28,241 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-18 19:40:28,244 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions. [2022-11-18 19:40:28,246 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-11-18 19:40:28,247 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-11-18 19:40:28,248 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions. [2022-11-18 19:40:28,248 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:40:28,249 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-18 19:40:28,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions. [2022-11-18 19:40:28,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-11-18 19:40:28,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:28,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions. [2022-11-18 19:40:28,263 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-18 19:40:28,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 19:40:28,264 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-11-18 19:40:28,265 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 19:40:28,265 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions. [2022-11-18 19:40:28,268 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-11-18 19:40:28,268 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:40:28,269 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:40:28,271 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:28,272 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:28,272 INFO L748 eck$LassoCheckResult]: Stem: 495#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 488#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 428#L230 assume 0 == ~r1~0 % 256; 429#L231 assume ~id1~0 >= 0; 443#L232 assume 0 == ~st1~0; 500#L233 assume ~send1~0 == ~id1~0; 421#L234 assume 0 == ~mode1~0 % 256; 422#L235 assume ~id2~0 >= 0; 492#L236 assume 0 == ~st2~0; 478#L237 assume ~send2~0 == ~id2~0; 467#L238 assume 0 == ~mode2~0 % 256; 468#L239 assume ~id3~0 >= 0; 463#L240 assume 0 == ~st3~0; 464#L241 assume ~send3~0 == ~id3~0; 472#L242 assume 0 == ~mode3~0 % 256; 441#L243 assume ~id4~0 >= 0; 433#L244 assume 0 == ~st4~0; 434#L245 assume ~send4~0 == ~id4~0; 471#L246 assume 0 == ~mode4~0 % 256; 486#L247 assume ~id5~0 >= 0; 487#L248 assume 0 == ~st5~0; 423#L249 assume ~send5~0 == ~id5~0; 424#L250 assume 0 == ~mode5~0 % 256; 446#L251 assume ~id6~0 >= 0; 447#L252 assume 0 == ~st6~0; 455#L253 assume ~send6~0 == ~id6~0; 456#L254 assume 0 == ~mode6~0 % 256; 457#L255 assume ~id1~0 != ~id2~0; 458#L256 assume ~id1~0 != ~id3~0; 494#L257 assume ~id1~0 != ~id4~0; 475#L258 assume ~id1~0 != ~id5~0; 412#L259 assume ~id1~0 != ~id6~0; 413#L260 assume ~id2~0 != ~id3~0; 501#L261 assume ~id2~0 != ~id4~0; 496#L262 assume ~id2~0 != ~id5~0; 497#L263 assume ~id2~0 != ~id6~0; 498#L264 assume ~id3~0 != ~id4~0; 417#L265 assume ~id3~0 != ~id5~0; 418#L266 assume ~id3~0 != ~id6~0; 442#L267 assume ~id4~0 != ~id5~0; 460#L268 assume ~id4~0 != ~id6~0; 461#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 499#L230-1 init_#res#1 := init_~tmp~0#1; 453#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 454#L24 assume !(0 == assume_abort_if_not_~cond#1); 444#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 445#L469-2 [2022-11-18 19:40:28,272 INFO L750 eck$LassoCheckResult]: Loop: 445#L469-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 438#L80 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 440#L80-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 459#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 493#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 490#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 473#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 474#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 480#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 469#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 470#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 476#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 410#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 411#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 425#L400 assume ~r1~0 % 256 >= 6; 426#L404 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 485#L399-1 check_#res#1 := check_~tmp~1#1; 419#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 420#L501 assume !(0 == assert_~arg#1 % 256); 448#L496 assume { :end_inline_assert } true; 445#L469-2 [2022-11-18 19:40:28,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:28,273 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2022-11-18 19:40:28,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:28,273 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166631280] [2022-11-18 19:40:28,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:28,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:28,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,309 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:40:28,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,365 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:40:28,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:28,366 INFO L85 PathProgramCache]: Analyzing trace with hash -204006149, now seen corresponding path program 1 times [2022-11-18 19:40:28,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:28,367 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684679385] [2022-11-18 19:40:28,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:28,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:28,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:40:28,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:40:28,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:40:28,416 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684679385] [2022-11-18 19:40:28,416 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684679385] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:40:28,417 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:40:28,417 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:40:28,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42801071] [2022-11-18 19:40:28,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:40:28,418 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:40:28,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:40:28,420 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:40:28,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:40:28,420 INFO L87 Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:28,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:40:28,455 INFO L93 Difference]: Finished difference Result 132 states and 179 transitions. [2022-11-18 19:40:28,455 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions. [2022-11-18 19:40:28,458 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-18 19:40:28,461 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions. [2022-11-18 19:40:28,461 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2022-11-18 19:40:28,462 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 132 [2022-11-18 19:40:28,462 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions. [2022-11-18 19:40:28,462 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:40:28,463 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-18 19:40:28,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions. [2022-11-18 19:40:28,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2022-11-18 19:40:28,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:40:28,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions. [2022-11-18 19:40:28,471 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-18 19:40:28,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:40:28,472 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-11-18 19:40:28,472 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 19:40:28,472 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions. [2022-11-18 19:40:28,473 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-11-18 19:40:28,473 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:40:28,479 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:40:28,480 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:28,480 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:40:28,480 INFO L748 eck$LassoCheckResult]: Stem: 725#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p5~0 := 0;~p6~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p1_old~0 := 0;~p5_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~p6_old~0 := 0;~send6~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~st2~0 := 0;~st1~0 := 0;~p3_old~0 := 0;~st4~0 := 0;~st3~0 := 0;~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~id1~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~id5~0 := 0;~p3_new~0 := 0;~r1~0 := 0; 718#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 660#L230 assume 0 == ~r1~0 % 256; 661#L231 assume ~id1~0 >= 0; 672#L232 assume 0 == ~st1~0; 733#L233 assume ~send1~0 == ~id1~0; 651#L234 assume 0 == ~mode1~0 % 256; 652#L235 assume ~id2~0 >= 0; 722#L236 assume 0 == ~st2~0; 708#L237 assume ~send2~0 == ~id2~0; 697#L238 assume 0 == ~mode2~0 % 256; 698#L239 assume ~id3~0 >= 0; 693#L240 assume 0 == ~st3~0; 694#L241 assume ~send3~0 == ~id3~0; 702#L242 assume 0 == ~mode3~0 % 256; 670#L243 assume ~id4~0 >= 0; 662#L244 assume 0 == ~st4~0; 663#L245 assume ~send4~0 == ~id4~0; 701#L246 assume 0 == ~mode4~0 % 256; 714#L247 assume ~id5~0 >= 0; 715#L248 assume 0 == ~st5~0; 653#L249 assume ~send5~0 == ~id5~0; 654#L250 assume 0 == ~mode5~0 % 256; 675#L251 assume ~id6~0 >= 0; 676#L252 assume 0 == ~st6~0; 685#L253 assume ~send6~0 == ~id6~0; 686#L254 assume 0 == ~mode6~0 % 256; 687#L255 assume ~id1~0 != ~id2~0; 688#L256 assume ~id1~0 != ~id3~0; 724#L257 assume ~id1~0 != ~id4~0; 705#L258 assume ~id1~0 != ~id5~0; 640#L259 assume ~id1~0 != ~id6~0; 641#L260 assume ~id2~0 != ~id3~0; 734#L261 assume ~id2~0 != ~id4~0; 729#L262 assume ~id2~0 != ~id5~0; 730#L263 assume ~id2~0 != ~id6~0; 731#L264 assume ~id3~0 != ~id4~0; 647#L265 assume ~id3~0 != ~id5~0; 648#L266 assume ~id3~0 != ~id6~0; 671#L267 assume ~id4~0 != ~id5~0; 690#L268 assume ~id4~0 != ~id6~0; 691#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 732#L230-1 init_#res#1 := init_~tmp~0#1; 683#L391 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 684#L24 assume !(0 == assume_abort_if_not_~cond#1); 673#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 674#L469-2 [2022-11-18 19:40:28,481 INFO L750 eck$LassoCheckResult]: Loop: 674#L469-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 767#L80 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 728#L80-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 763#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 761#L106-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 756#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 753#L131-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 751#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 747#L156-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 745#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 741#L181-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 739#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 737#L206-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 736#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 735#L400 assume !(~r1~0 % 256 >= 6); 726#L403 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 727#L404 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 771#L399-1 check_#res#1 := check_~tmp~1#1; 770#L419 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 769#L501 assume !(0 == assert_~arg#1 % 256); 768#L496 assume { :end_inline_assert } true; 674#L469-2 [2022-11-18 19:40:28,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:28,481 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2022-11-18 19:40:28,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:28,482 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316050166] [2022-11-18 19:40:28,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:28,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:28,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,515 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:40:28,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,549 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:40:28,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:28,556 INFO L85 PathProgramCache]: Analyzing trace with hash -382651293, now seen corresponding path program 1 times [2022-11-18 19:40:28,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:28,557 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276239581] [2022-11-18 19:40:28,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:28,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:28,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,627 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:40:28,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,687 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:40:28,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:40:28,688 INFO L85 PathProgramCache]: Analyzing trace with hash -706871679, now seen corresponding path program 1 times [2022-11-18 19:40:28,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:40:28,688 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345573123] [2022-11-18 19:40:28,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:40:28,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:40:28,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,746 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:40:28,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:40:28,832 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:40:34,195 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 19:40:34,196 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 19:40:34,196 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 19:40:34,196 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 19:40:34,196 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-18 19:40:34,196 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:40:34,197 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 19:40:34,197 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 19:40:34,197 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6_overflow.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-18 19:40:34,197 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 19:40:34,197 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 19:40:34,247 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:34,257 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:34,262 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:34,268 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:34,271 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,425 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,432 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,439 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,446 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,452 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,458 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:36,462 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:40:39,091 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 28