./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a3df27f87602fca8935d2269a873dfd3f1a5195383d477434680a0bc703d239a --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:00:07,617 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:00:07,620 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:00:07,652 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:00:07,652 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:00:07,654 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:00:07,659 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:00:07,664 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:00:07,668 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:00:07,675 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:00:07,677 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:00:07,679 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:00:07,681 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:00:07,683 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:00:07,686 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:00:07,688 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:00:07,691 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:00:07,692 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:00:07,694 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:00:07,701 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:00:07,706 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:00:07,707 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:00:07,709 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:00:07,711 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:00:07,716 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:00:07,717 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:00:07,717 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:00:07,719 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:00:07,720 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:00:07,721 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:00:07,721 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:00:07,723 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:00:07,725 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:00:07,726 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:00:07,728 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:00:07,729 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:00:07,729 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:00:07,730 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:00:07,730 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:00:07,731 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:00:07,732 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:00:07,733 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 20:00:07,780 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:00:07,781 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:00:07,781 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:00:07,782 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:00:07,783 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:00:07,783 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:00:07,784 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:00:07,784 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 20:00:07,784 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 20:00:07,784 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 20:00:07,785 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 20:00:07,785 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 20:00:07,786 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 20:00:07,786 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:00:07,786 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 20:00:07,786 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:00:07,786 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:00:07,787 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 20:00:07,787 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:00:07,787 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 20:00:07,787 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 20:00:07,787 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 20:00:07,788 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 20:00:07,788 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:00:07,788 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 20:00:07,788 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:00:07,788 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 20:00:07,788 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:00:07,789 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:00:07,789 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:00:07,789 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:00:07,791 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 20:00:07,791 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a3df27f87602fca8935d2269a873dfd3f1a5195383d477434680a0bc703d239a [2022-11-18 20:00:08,046 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:00:08,067 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:00:08,070 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:00:08,071 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:00:08,072 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:00:08,073 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c [2022-11-18 20:00:08,154 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/data/819cb0315/0c834ef8f4d04fd7b96fc8c8c61cce27/FLAG1f982dc3f [2022-11-18 20:00:08,776 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:00:08,776 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c [2022-11-18 20:00:08,787 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/data/819cb0315/0c834ef8f4d04fd7b96fc8c8c61cce27/FLAG1f982dc3f [2022-11-18 20:00:09,073 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/data/819cb0315/0c834ef8f4d04fd7b96fc8c8c61cce27 [2022-11-18 20:00:09,075 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:00:09,079 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:00:09,081 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:00:09,082 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:00:09,086 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:00:09,086 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,088 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@171b538a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09, skipping insertion in model container [2022-11-18 20:00:09,088 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,098 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:00:09,136 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:00:09,460 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c[26518,26531] [2022-11-18 20:00:09,461 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:00:09,475 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:00:09,588 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c[26518,26531] [2022-11-18 20:00:09,589 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:00:09,609 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:00:09,611 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09 WrapperNode [2022-11-18 20:00:09,612 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:00:09,613 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:00:09,613 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:00:09,613 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:00:09,622 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,636 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,687 INFO L138 Inliner]: procedures = 28, calls = 19, calls flagged for inlining = 14, calls inlined = 14, statements flattened = 465 [2022-11-18 20:00:09,687 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:00:09,688 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:00:09,688 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:00:09,688 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:00:09,703 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,703 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,707 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,707 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,716 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,723 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,726 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,729 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,734 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:00:09,735 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:00:09,735 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:00:09,735 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:00:09,736 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (1/1) ... [2022-11-18 20:00:09,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:00:09,756 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:00:09,770 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 20:00:09,815 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_793e9c30-f527-48d2-a8f2-7865056ffc2f/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 20:00:09,838 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:00:09,838 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 20:00:09,838 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:00:09,838 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:00:10,056 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:00:10,058 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:00:10,712 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:00:10,724 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:00:10,726 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 20:00:10,730 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:00:10 BoogieIcfgContainer [2022-11-18 20:00:10,730 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:00:10,732 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 20:00:10,732 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 20:00:10,736 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 20:00:10,737 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:00:10,737 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 08:00:09" (1/3) ... [2022-11-18 20:00:10,738 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@65307cdd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:00:10, skipping insertion in model container [2022-11-18 20:00:10,739 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:00:10,739 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:00:09" (2/3) ... [2022-11-18 20:00:10,739 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@65307cdd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:00:10, skipping insertion in model container [2022-11-18 20:00:10,739 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 20:00:10,739 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:00:10" (3/3) ... [2022-11-18 20:00:10,741 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.1.ufo.UNBOUNDED.pals.c [2022-11-18 20:00:10,884 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 20:00:10,884 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 20:00:10,884 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 20:00:10,884 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 20:00:10,884 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 20:00:10,885 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 20:00:10,885 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 20:00:10,885 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 20:00:10,890 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:10,943 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-11-18 20:00:10,943 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:00:10,943 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:00:10,953 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:10,953 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:10,954 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 20:00:10,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:10,970 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-11-18 20:00:10,971 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:00:10,971 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:00:10,972 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:10,972 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:10,985 INFO L748 eck$LassoCheckResult]: Stem: 119#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 38#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 71#L300true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 46#L300-1true init_#res#1 := init_~tmp~0#1; 16#L545true main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 40#L22true assume !(0 == assume_abort_if_not_~cond#1); 104#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 52#L635-2true [2022-11-18 20:00:10,995 INFO L750 eck$LassoCheckResult]: Loop: 52#L635-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 114#L92true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 65#L92-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 17#L123true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 41#L123-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 25#L148true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 36#L148-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 57#L173true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 131#L173-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 76#L198true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 82#L198-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 69#L223true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 54#L223-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 130#L248true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 31#L248-2true assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 63#L273true assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 113#L273-2true assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 83#L553true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 97#L553-1true check_#res#1 := check_~tmp~1#1; 55#L573true main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 21#L673true assume !(0 == assert_~arg#1 % 256); 28#L668true assume { :end_inline_assert } true; 52#L635-2true [2022-11-18 20:00:11,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:11,003 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2022-11-18 20:00:11,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:11,014 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861521270] [2022-11-18 20:00:11,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:11,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:11,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:00:11,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:00:11,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:00:11,467 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861521270] [2022-11-18 20:00:11,468 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1861521270] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:00:11,468 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:00:11,469 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:00:11,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820379856] [2022-11-18 20:00:11,471 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:00:11,476 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 20:00:11,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:11,479 INFO L85 PathProgramCache]: Analyzing trace with hash 37408160, now seen corresponding path program 1 times [2022-11-18 20:00:11,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:11,480 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998667856] [2022-11-18 20:00:11,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:11,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:11,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:00:11,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:00:11,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:00:11,979 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998667856] [2022-11-18 20:00:11,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1998667856] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:00:11,980 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:00:11,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:00:11,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827835067] [2022-11-18 20:00:11,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:00:11,982 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 20:00:11,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:00:12,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:00:12,019 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:00:12,021 INFO L87 Difference]: Start difference. First operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:12,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:00:12,181 INFO L93 Difference]: Finished difference Result 131 states and 229 transitions. [2022-11-18 20:00:12,183 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 229 transitions. [2022-11-18 20:00:12,186 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-18 20:00:12,190 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 127 states and 165 transitions. [2022-11-18 20:00:12,192 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2022-11-18 20:00:12,192 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2022-11-18 20:00:12,193 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 165 transitions. [2022-11-18 20:00:12,194 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:00:12,194 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-11-18 20:00:12,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 165 transitions. [2022-11-18 20:00:12,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-18 20:00:12,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2992125984251968) internal successors, (165), 126 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:12,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 165 transitions. [2022-11-18 20:00:12,229 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-11-18 20:00:12,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:00:12,234 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-11-18 20:00:12,235 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 20:00:12,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 165 transitions. [2022-11-18 20:00:12,237 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-18 20:00:12,237 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:00:12,237 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:00:12,239 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:12,239 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:12,240 INFO L748 eck$LassoCheckResult]: Stem: 404#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 342#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 343#L300 assume 0 == ~r1~0 % 256; 376#L301 assume ~id1~0 >= 0; 393#L302 assume 0 == ~st1~0; 394#L303 assume ~send1~0 == ~id1~0; 400#L304 assume 0 == ~mode1~0 % 256; 368#L305 assume ~id2~0 >= 0; 369#L306 assume 0 == ~st2~0; 386#L307 assume ~send2~0 == ~id2~0; 292#L308 assume 0 == ~mode2~0 % 256; 293#L309 assume ~id3~0 >= 0; 382#L310 assume 0 == ~st3~0; 354#L311 assume ~send3~0 == ~id3~0; 355#L312 assume 0 == ~mode3~0 % 256; 313#L313 assume ~id4~0 >= 0; 314#L314 assume 0 == ~st4~0; 346#L315 assume ~send4~0 == ~id4~0; 347#L316 assume 0 == ~mode4~0 % 256; 288#L317 assume ~id5~0 >= 0; 289#L318 assume 0 == ~st5~0; 405#L319 assume ~send5~0 == ~id5~0; 392#L320 assume 0 == ~mode5~0 % 256; 373#L321 assume ~id6~0 >= 0; 374#L322 assume 0 == ~st6~0; 286#L323 assume ~send6~0 == ~id6~0; 287#L324 assume 0 == ~mode6~0 % 256; 299#L325 assume ~id7~0 >= 0; 319#L326 assume 0 == ~st7~0; 304#L327 assume ~send7~0 == ~id7~0; 305#L328 assume 0 == ~mode7~0 % 256; 332#L329 assume ~id8~0 >= 0; 333#L330 assume 0 == ~st8~0; 290#L331 assume ~send8~0 == ~id8~0; 291#L332 assume 0 == ~mode8~0 % 256; 318#L333 assume ~id1~0 != ~id2~0; 330#L334 assume ~id1~0 != ~id3~0; 311#L335 assume ~id1~0 != ~id4~0; 312#L336 assume ~id1~0 != ~id5~0; 385#L337 assume ~id1~0 != ~id6~0; 358#L338 assume ~id1~0 != ~id7~0; 359#L339 assume ~id1~0 != ~id8~0; 402#L340 assume ~id2~0 != ~id3~0; 397#L341 assume ~id2~0 != ~id4~0; 334#L342 assume ~id2~0 != ~id5~0; 335#L343 assume ~id2~0 != ~id6~0; 324#L344 assume ~id2~0 != ~id7~0; 325#L345 assume ~id2~0 != ~id8~0; 350#L346 assume ~id3~0 != ~id4~0; 351#L347 assume ~id3~0 != ~id5~0; 403#L348 assume ~id3~0 != ~id6~0; 395#L349 assume ~id3~0 != ~id7~0; 396#L350 assume ~id3~0 != ~id8~0; 377#L351 assume ~id4~0 != ~id5~0; 378#L352 assume ~id4~0 != ~id6~0; 399#L353 assume ~id4~0 != ~id7~0; 366#L354 assume ~id4~0 != ~id8~0; 336#L355 assume ~id5~0 != ~id6~0; 337#L356 assume ~id5~0 != ~id7~0; 363#L357 assume ~id5~0 != ~id8~0; 297#L358 assume ~id6~0 != ~id7~0; 298#L359 assume ~id6~0 != ~id8~0; 300#L360 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 301#L300-1 init_#res#1 := init_~tmp~0#1; 306#L545 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 307#L22 assume !(0 == assume_abort_if_not_~cond#1); 345#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 329#L635-2 [2022-11-18 20:00:12,241 INFO L750 eck$LassoCheckResult]: Loop: 329#L635-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 360#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 353#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 308#L123 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 310#L123-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 321#L148 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 323#L148-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 340#L173 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 315#L173-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 380#L198 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 381#L198-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 375#L223 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 344#L223-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 362#L248 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 320#L248-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 331#L273 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 341#L273-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 387#L553 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 388#L553-1 check_#res#1 := check_~tmp~1#1; 361#L573 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 316#L673 assume !(0 == assert_~arg#1 % 256); 317#L668 assume { :end_inline_assert } true; 329#L635-2 [2022-11-18 20:00:12,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:12,242 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2022-11-18 20:00:12,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:12,242 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737856755] [2022-11-18 20:00:12,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:12,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:12,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:12,316 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:00:12,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:12,447 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:00:12,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:12,449 INFO L85 PathProgramCache]: Analyzing trace with hash 37408160, now seen corresponding path program 2 times [2022-11-18 20:00:12,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:12,449 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423816662] [2022-11-18 20:00:12,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:12,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:12,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:00:12,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:00:12,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:00:12,800 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1423816662] [2022-11-18 20:00:12,800 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1423816662] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:00:12,801 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:00:12,801 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:00:12,801 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849357981] [2022-11-18 20:00:12,802 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:00:12,802 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 20:00:12,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:00:12,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:00:12,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:00:12,806 INFO L87 Difference]: Start difference. First operand 127 states and 165 transitions. cyclomatic complexity: 39 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:12,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:00:12,871 INFO L93 Difference]: Finished difference Result 130 states and 167 transitions. [2022-11-18 20:00:12,872 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 130 states and 167 transitions. [2022-11-18 20:00:12,875 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-18 20:00:12,879 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 130 states to 127 states and 162 transitions. [2022-11-18 20:00:12,880 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2022-11-18 20:00:12,881 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2022-11-18 20:00:12,882 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 162 transitions. [2022-11-18 20:00:12,884 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:00:12,884 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-11-18 20:00:12,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 162 transitions. [2022-11-18 20:00:12,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-18 20:00:12,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2755905511811023) internal successors, (162), 126 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:12,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 162 transitions. [2022-11-18 20:00:12,902 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-11-18 20:00:12,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:00:12,903 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-11-18 20:00:12,904 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 20:00:12,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 162 transitions. [2022-11-18 20:00:12,906 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-18 20:00:12,909 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:00:12,910 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:00:12,911 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:12,914 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:12,914 INFO L748 eck$LassoCheckResult]: Stem: 673#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 611#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 612#L300 assume 0 == ~r1~0 % 256; 645#L301 assume ~id1~0 >= 0; 662#L302 assume 0 == ~st1~0; 663#L303 assume ~send1~0 == ~id1~0; 669#L304 assume 0 == ~mode1~0 % 256; 637#L305 assume ~id2~0 >= 0; 638#L306 assume 0 == ~st2~0; 655#L307 assume ~send2~0 == ~id2~0; 564#L308 assume 0 == ~mode2~0 % 256; 565#L309 assume ~id3~0 >= 0; 651#L310 assume 0 == ~st3~0; 623#L311 assume ~send3~0 == ~id3~0; 624#L312 assume 0 == ~mode3~0 % 256; 582#L313 assume ~id4~0 >= 0; 583#L314 assume 0 == ~st4~0; 615#L315 assume ~send4~0 == ~id4~0; 616#L316 assume 0 == ~mode4~0 % 256; 557#L317 assume ~id5~0 >= 0; 558#L318 assume 0 == ~st5~0; 674#L319 assume ~send5~0 == ~id5~0; 661#L320 assume 0 == ~mode5~0 % 256; 642#L321 assume ~id6~0 >= 0; 643#L322 assume 0 == ~st6~0; 555#L323 assume ~send6~0 == ~id6~0; 556#L324 assume 0 == ~mode6~0 % 256; 568#L325 assume ~id7~0 >= 0; 588#L326 assume 0 == ~st7~0; 573#L327 assume ~send7~0 == ~id7~0; 574#L328 assume 0 == ~mode7~0 % 256; 601#L329 assume ~id8~0 >= 0; 602#L330 assume 0 == ~st8~0; 559#L331 assume ~send8~0 == ~id8~0; 560#L332 assume 0 == ~mode8~0 % 256; 587#L333 assume ~id1~0 != ~id2~0; 599#L334 assume ~id1~0 != ~id3~0; 580#L335 assume ~id1~0 != ~id4~0; 581#L336 assume ~id1~0 != ~id5~0; 654#L337 assume ~id1~0 != ~id6~0; 627#L338 assume ~id1~0 != ~id7~0; 628#L339 assume ~id1~0 != ~id8~0; 671#L340 assume ~id2~0 != ~id3~0; 666#L341 assume ~id2~0 != ~id4~0; 603#L342 assume ~id2~0 != ~id5~0; 604#L343 assume ~id2~0 != ~id6~0; 593#L344 assume ~id2~0 != ~id7~0; 594#L345 assume ~id2~0 != ~id8~0; 619#L346 assume ~id3~0 != ~id4~0; 620#L347 assume ~id3~0 != ~id5~0; 672#L348 assume ~id3~0 != ~id6~0; 664#L349 assume ~id3~0 != ~id7~0; 665#L350 assume ~id3~0 != ~id8~0; 646#L351 assume ~id4~0 != ~id5~0; 647#L352 assume ~id4~0 != ~id6~0; 668#L353 assume ~id4~0 != ~id7~0; 635#L354 assume ~id4~0 != ~id8~0; 605#L355 assume ~id5~0 != ~id6~0; 606#L356 assume ~id5~0 != ~id7~0; 632#L357 assume ~id5~0 != ~id8~0; 566#L358 assume ~id6~0 != ~id7~0; 567#L359 assume ~id6~0 != ~id8~0; 569#L360 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 570#L300-1 init_#res#1 := init_~tmp~0#1; 575#L545 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 576#L22 assume !(0 == assume_abort_if_not_~cond#1); 614#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 598#L635-2 [2022-11-18 20:00:12,915 INFO L750 eck$LassoCheckResult]: Loop: 598#L635-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 629#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 622#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 577#L123 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 579#L123-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 590#L148 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 592#L148-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 609#L173 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 584#L173-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 649#L198 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 650#L198-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 644#L223 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 613#L223-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 630#L248 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 589#L248-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 600#L273 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 610#L273-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 656#L553 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 657#L554 assume ~r1~0 % 256 >= 8; 675#L558 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 660#L553-1 check_#res#1 := check_~tmp~1#1; 631#L573 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 585#L673 assume !(0 == assert_~arg#1 % 256); 586#L668 assume { :end_inline_assert } true; 598#L635-2 [2022-11-18 20:00:12,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:12,916 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2022-11-18 20:00:12,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:12,917 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717458615] [2022-11-18 20:00:12,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:12,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:12,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:12,954 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:00:12,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,003 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:00:13,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:13,005 INFO L85 PathProgramCache]: Analyzing trace with hash 173692112, now seen corresponding path program 1 times [2022-11-18 20:00:13,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:13,005 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561488460] [2022-11-18 20:00:13,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:13,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:13,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:00:13,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:00:13,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:00:13,058 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561488460] [2022-11-18 20:00:13,058 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561488460] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:00:13,059 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:00:13,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:00:13,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018425000] [2022-11-18 20:00:13,060 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:00:13,060 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 20:00:13,062 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:00:13,063 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:00:13,063 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:00:13,064 INFO L87 Difference]: Start difference. First operand 127 states and 162 transitions. cyclomatic complexity: 36 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:13,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:00:13,108 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2022-11-18 20:00:13,108 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 246 transitions. [2022-11-18 20:00:13,109 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 114 [2022-11-18 20:00:13,112 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 181 states and 246 transitions. [2022-11-18 20:00:13,112 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 181 [2022-11-18 20:00:13,114 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 181 [2022-11-18 20:00:13,114 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 246 transitions. [2022-11-18 20:00:13,120 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 20:00:13,120 INFO L218 hiAutomatonCegarLoop]: Abstraction has 181 states and 246 transitions. [2022-11-18 20:00:13,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 246 transitions. [2022-11-18 20:00:13,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 179. [2022-11-18 20:00:13,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 179 states have (on average 1.3575418994413408) internal successors, (243), 178 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:00:13,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 243 transitions. [2022-11-18 20:00:13,134 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 243 transitions. [2022-11-18 20:00:13,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:00:13,136 INFO L428 stractBuchiCegarLoop]: Abstraction has 179 states and 243 transitions. [2022-11-18 20:00:13,136 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 20:00:13,136 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 243 transitions. [2022-11-18 20:00:13,138 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 112 [2022-11-18 20:00:13,138 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 20:00:13,138 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 20:00:13,144 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:13,144 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:00:13,146 INFO L748 eck$LassoCheckResult]: Stem: 992#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~p4_old~0 := 0;~p4_new~0 := 0;~p5_new~0 := 0;~p5_old~0 := 0;~p2_old~0 := 0;~send4~0 := 0;~send5~0 := 0;~send6~0 := 0;~send7~0 := 0;~send1~0 := 0;~send2~0 := 0;~p2_new~0 := 0;~send3~0 := 0;~p3_old~0 := 0;~send8~0 := 0;~p3_new~0 := 0;~mode6~0 := 0;~p1~0 := 0;~mode5~0 := 0;~p2~0 := 0;~mode4~0 := 0;~p3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p5~0 := 0;~p6~0 := 0;~mode8~0 := 0;~p7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_new~0 := 0;~p8_old~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~mode2~0 := 0;~mode1~0 := 0;~nomsg~0 := -1;~p6_new~0 := 0;~p6_old~0 := 0;~st2~0 := 0;~st1~0 := 0;~st4~0 := 0;~st3~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];~st6~0 := 0;~st5~0 := 0;~id2~0 := 0;~st8~0 := 0;~id1~0 := 0;~st7~0 := 0;~id4~0 := 0;~id3~0 := 0;~id6~0 := 0;~p7_new~0 := 0;~id5~0 := 0;~id8~0 := 0;~p7_old~0 := 0;~id7~0 := 0;~r1~0 := 0; 925#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 926#L300 assume 0 == ~r1~0 % 256; 961#L301 assume ~id1~0 >= 0; 979#L302 assume 0 == ~st1~0; 980#L303 assume ~send1~0 == ~id1~0; 989#L304 assume 0 == ~mode1~0 % 256; 953#L305 assume ~id2~0 >= 0; 954#L306 assume 0 == ~st2~0; 972#L307 assume ~send2~0 == ~id2~0; 878#L308 assume 0 == ~mode2~0 % 256; 879#L309 assume ~id3~0 >= 0; 968#L310 assume 0 == ~st3~0; 937#L311 assume ~send3~0 == ~id3~0; 938#L312 assume 0 == ~mode3~0 % 256; 896#L313 assume ~id4~0 >= 0; 897#L314 assume 0 == ~st4~0; 931#L315 assume ~send4~0 == ~id4~0; 932#L316 assume 0 == ~mode4~0 % 256; 871#L317 assume ~id5~0 >= 0; 872#L318 assume 0 == ~st5~0; 993#L319 assume ~send5~0 == ~id5~0; 978#L320 assume 0 == ~mode5~0 % 256; 958#L321 assume ~id6~0 >= 0; 959#L322 assume 0 == ~st6~0; 869#L323 assume ~send6~0 == ~id6~0; 870#L324 assume 0 == ~mode6~0 % 256; 882#L325 assume ~id7~0 >= 0; 902#L326 assume 0 == ~st7~0; 887#L327 assume ~send7~0 == ~id7~0; 888#L328 assume 0 == ~mode7~0 % 256; 915#L329 assume ~id8~0 >= 0; 916#L330 assume 0 == ~st8~0; 873#L331 assume ~send8~0 == ~id8~0; 874#L332 assume 0 == ~mode8~0 % 256; 901#L333 assume ~id1~0 != ~id2~0; 913#L334 assume ~id1~0 != ~id3~0; 894#L335 assume ~id1~0 != ~id4~0; 895#L336 assume ~id1~0 != ~id5~0; 971#L337 assume ~id1~0 != ~id6~0; 942#L338 assume ~id1~0 != ~id7~0; 943#L339 assume ~id1~0 != ~id8~0; 990#L340 assume ~id2~0 != ~id3~0; 983#L341 assume ~id2~0 != ~id4~0; 917#L342 assume ~id2~0 != ~id5~0; 918#L343 assume ~id2~0 != ~id6~0; 907#L344 assume ~id2~0 != ~id7~0; 908#L345 assume ~id2~0 != ~id8~0; 933#L346 assume ~id3~0 != ~id4~0; 934#L347 assume ~id3~0 != ~id5~0; 991#L348 assume ~id3~0 != ~id6~0; 981#L349 assume ~id3~0 != ~id7~0; 982#L350 assume ~id3~0 != ~id8~0; 962#L351 assume ~id4~0 != ~id5~0; 963#L352 assume ~id4~0 != ~id6~0; 986#L353 assume ~id4~0 != ~id7~0; 949#L354 assume ~id4~0 != ~id8~0; 921#L355 assume ~id5~0 != ~id6~0; 922#L356 assume ~id5~0 != ~id7~0; 946#L357 assume ~id5~0 != ~id8~0; 880#L358 assume ~id6~0 != ~id7~0; 881#L359 assume ~id6~0 != ~id8~0; 883#L360 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 884#L300-1 init_#res#1 := init_~tmp~0#1; 889#L545 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 890#L22 assume !(0 == assume_abort_if_not_~cond#1); 928#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 987#L635-2 [2022-11-18 20:00:13,148 INFO L750 eck$LassoCheckResult]: Loop: 987#L635-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1036#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 936#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 891#L123 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 893#L123-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 904#L148 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 906#L148-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 923#L173 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 898#L173-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 965#L198 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 967#L198-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 960#L223 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 927#L223-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 944#L248 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 903#L248-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 914#L273 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 924#L273-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 973#L553 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 974#L554 assume !(~r1~0 % 256 >= 8); 995#L557 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 996#L558 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 1040#L553-1 check_#res#1 := check_~tmp~1#1; 1039#L573 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1038#L673 assume !(0 == assert_~arg#1 % 256); 1037#L668 assume { :end_inline_assert } true; 987#L635-2 [2022-11-18 20:00:13,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:13,148 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2022-11-18 20:00:13,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:13,150 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809915630] [2022-11-18 20:00:13,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:13,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:13,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:00:13,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,261 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:00:13,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:13,262 INFO L85 PathProgramCache]: Analyzing trace with hash -1558906905, now seen corresponding path program 1 times [2022-11-18 20:00:13,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:13,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464823415] [2022-11-18 20:00:13,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:13,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:13,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,336 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:00:13,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,425 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:00:13,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:00:13,426 INFO L85 PathProgramCache]: Analyzing trace with hash -612396504, now seen corresponding path program 1 times [2022-11-18 20:00:13,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:00:13,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165966683] [2022-11-18 20:00:13,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:00:13,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:00:13,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,508 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:00:13,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:00:13,616 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:00:23,276 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 20:00:23,277 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 20:00:23,277 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 20:00:23,277 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 20:00:23,278 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-18 20:00:23,278 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 20:00:23,278 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 20:00:23,278 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 20:00:23,278 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-18 20:00:23,279 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 20:00:23,279 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 20:00:23,326 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,340 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,343 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,346 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,353 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,355 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,361 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,364 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,367 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,370 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,376 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,380 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,383 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,386 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,393 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,399 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,403 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,407 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,410 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,414 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,418 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:23,421 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,346 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,353 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,358 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,361 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,366 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,373 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,375 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:28,380 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 20:00:33,905 WARN L233 SmtUtils]: Spent 5.23s on a formula simplification. DAG size of input: 491 DAG size of output: 438 (called from [L 68] de.uni_freiburg.informatik.ultimate.icfgtransformer.transformulatransformers.SimplifyPreprocessor.process) [2022-11-18 20:00:34,028 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 47