./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum10.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum10.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 21:05:03,770 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 21:05:03,773 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 21:05:03,822 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 21:05:03,823 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 21:05:03,827 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 21:05:03,830 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 21:05:03,833 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 21:05:03,835 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 21:05:03,841 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 21:05:03,843 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 21:05:03,846 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 21:05:03,846 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 21:05:03,849 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 21:05:03,851 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 21:05:03,853 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 21:05:03,855 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 21:05:03,856 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 21:05:03,858 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 21:05:03,866 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 21:05:03,868 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 21:05:03,870 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 21:05:03,873 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 21:05:03,875 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 21:05:03,881 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 21:05:03,882 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 21:05:03,882 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 21:05:03,884 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 21:05:03,885 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 21:05:03,886 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 21:05:03,886 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 21:05:03,888 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 21:05:03,890 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 21:05:03,891 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 21:05:03,894 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 21:05:03,894 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 21:05:03,895 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 21:05:03,895 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 21:05:03,896 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 21:05:03,897 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 21:05:03,897 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 21:05:03,898 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 21:05:03,945 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 21:05:03,945 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 21:05:03,946 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 21:05:03,946 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 21:05:03,948 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 21:05:03,948 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 21:05:03,948 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 21:05:03,948 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 21:05:03,949 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 21:05:03,949 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 21:05:03,950 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 21:05:03,950 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 21:05:03,951 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 21:05:03,951 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 21:05:03,951 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 21:05:03,952 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 21:05:03,952 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 21:05:03,952 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 21:05:03,952 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 21:05:03,953 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 21:05:03,953 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 21:05:03,953 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 21:05:03,953 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 21:05:03,955 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 21:05:03,955 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 21:05:03,955 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 21:05:03,956 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 21:05:03,956 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 21:05:03,956 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 21:05:03,957 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 21:05:03,957 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 21:05:03,958 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 21:05:03,959 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 [2022-11-18 21:05:04,214 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 21:05:04,244 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 21:05:04,247 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 21:05:04,248 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 21:05:04,249 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 21:05:04,250 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/reducercommutativity/rangesum10.i [2022-11-18 21:05:04,323 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/data/c78f671d6/49cc8fa2449747048ea1e482b2ff62c8/FLAGfb7901070 [2022-11-18 21:05:04,943 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 21:05:04,944 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/sv-benchmarks/c/reducercommutativity/rangesum10.i [2022-11-18 21:05:04,962 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/data/c78f671d6/49cc8fa2449747048ea1e482b2ff62c8/FLAGfb7901070 [2022-11-18 21:05:05,279 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/data/c78f671d6/49cc8fa2449747048ea1e482b2ff62c8 [2022-11-18 21:05:05,281 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 21:05:05,283 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 21:05:05,286 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 21:05:05,287 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 21:05:05,291 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 21:05:05,291 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,294 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@44ffbcdf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05, skipping insertion in model container [2022-11-18 21:05:05,294 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,302 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 21:05:05,326 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 21:05:05,545 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/sv-benchmarks/c/reducercommutativity/rangesum10.i[1465,1478] [2022-11-18 21:05:05,553 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 21:05:05,564 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 21:05:05,588 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/sv-benchmarks/c/reducercommutativity/rangesum10.i[1465,1478] [2022-11-18 21:05:05,589 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 21:05:05,603 INFO L208 MainTranslator]: Completed translation [2022-11-18 21:05:05,604 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05 WrapperNode [2022-11-18 21:05:05,604 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 21:05:05,605 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 21:05:05,606 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 21:05:05,606 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 21:05:05,615 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,631 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,659 INFO L138 Inliner]: procedures = 17, calls = 23, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 135 [2022-11-18 21:05:05,659 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 21:05:05,660 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 21:05:05,660 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 21:05:05,660 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 21:05:05,670 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,671 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,674 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,674 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,682 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,688 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,690 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,691 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,693 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 21:05:05,694 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 21:05:05,695 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 21:05:05,695 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 21:05:05,696 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (1/1) ... [2022-11-18 21:05:05,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:05,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:05,741 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:05,759 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 21:05:05,796 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 21:05:05,796 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 21:05:05,796 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 21:05:05,797 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 21:05:05,797 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 21:05:05,797 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 21:05:05,797 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 21:05:05,797 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 21:05:05,906 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 21:05:05,908 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 21:05:06,150 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 21:05:06,157 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 21:05:06,157 INFO L300 CfgBuilder]: Removed 5 assume(true) statements. [2022-11-18 21:05:06,160 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:05:06 BoogieIcfgContainer [2022-11-18 21:05:06,160 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 21:05:06,161 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 21:05:06,162 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 21:05:06,181 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 21:05:06,182 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 21:05:06,182 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 09:05:05" (1/3) ... [2022-11-18 21:05:06,183 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1e646446 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 09:05:06, skipping insertion in model container [2022-11-18 21:05:06,184 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 21:05:06,184 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:05:05" (2/3) ... [2022-11-18 21:05:06,185 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1e646446 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 09:05:06, skipping insertion in model container [2022-11-18 21:05:06,185 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 21:05:06,185 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:05:06" (3/3) ... [2022-11-18 21:05:06,187 INFO L332 chiAutomizerObserver]: Analyzing ICFG rangesum10.i [2022-11-18 21:05:06,318 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 21:05:06,318 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 21:05:06,318 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 21:05:06,318 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 21:05:06,319 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 21:05:06,319 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 21:05:06,319 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 21:05:06,319 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 21:05:06,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:06,386 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2022-11-18 21:05:06,387 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:06,387 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:06,393 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 21:05:06,393 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 21:05:06,394 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 21:05:06,396 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:06,402 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2022-11-18 21:05:06,402 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:06,402 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:06,403 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 21:05:06,403 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 21:05:06,413 INFO L748 eck$LassoCheckResult]: Stem: 15#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 6#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 21#L17-3true [2022-11-18 21:05:06,413 INFO L750 eck$LassoCheckResult]: Loop: 21#L17-3true assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10#L17-2true init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 21#L17-3true [2022-11-18 21:05:06,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:06,427 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-18 21:05:06,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:06,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857369236] [2022-11-18 21:05:06,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:06,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:06,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:06,621 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:06,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:06,703 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:06,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:06,707 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-18 21:05:06,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:06,708 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379275722] [2022-11-18 21:05:06,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:06,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:06,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:06,719 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:06,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:06,727 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:06,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:06,730 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-18 21:05:06,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:06,731 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303116203] [2022-11-18 21:05:06,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:06,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:06,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:06,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:06,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:06,786 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:07,300 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 21:05:07,301 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 21:05:07,301 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 21:05:07,301 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 21:05:07,301 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 21:05:07,301 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:07,302 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 21:05:07,302 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 21:05:07,303 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration1_Lasso [2022-11-18 21:05:07,303 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 21:05:07,304 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 21:05:07,331 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,344 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,347 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,352 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,358 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,806 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,810 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,813 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,816 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,819 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,825 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,829 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,834 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,837 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,841 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,844 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,848 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:07,851 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:08,239 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 21:05:08,244 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 21:05:08,246 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,246 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,250 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,257 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-18 21:05:08,272 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,272 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:08,273 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,273 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,273 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,277 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:08,277 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:08,295 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,305 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,305 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,307 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,316 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,329 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-18 21:05:08,330 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,330 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:08,331 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,331 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,331 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,332 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:08,333 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:08,347 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,355 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,355 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,355 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,357 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,360 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,373 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,373 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:08,373 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,374 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:08,375 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:08,376 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-18 21:05:08,380 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,385 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,385 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,387 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,396 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,396 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-18 21:05:08,408 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,408 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,409 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,409 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,412 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:08,412 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:08,424 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,427 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-11-18 21:05:08,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,430 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-18 21:05:08,435 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,445 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,445 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:08,446 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,446 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,446 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,447 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:08,447 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:08,454 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,463 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,465 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,471 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-18 21:05:08,472 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,485 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,485 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:08,486 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,486 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,486 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,492 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:08,492 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:08,502 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,507 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,508 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,508 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,509 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,516 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-18 21:05:08,529 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,529 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,530 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,530 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,539 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:08,539 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:08,554 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,559 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-11-18 21:05:08,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,560 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,563 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,567 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-18 21:05:08,568 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,582 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,583 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,583 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,583 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,591 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:08,592 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:08,615 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:08,624 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,626 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,631 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-18 21:05:08,632 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:08,643 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:08,643 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:08,644 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:08,644 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:08,664 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:08,664 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:08,695 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 21:05:08,774 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-18 21:05:08,775 INFO L444 ModelExtractionUtils]: 9 out of 22 variables were initially zero. Simplification set additionally 10 variables to zero. [2022-11-18 21:05:08,777 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:08,777 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:08,791 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:08,827 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 21:05:08,829 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-18 21:05:08,868 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 21:05:08,869 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 21:05:08,869 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_init_nondet_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#x~0#1.base)_1) = -8*ULTIMATE.start_init_nondet_~i~0#1 + 19*v_rep(select #length ULTIMATE.start_main_~#x~0#1.base)_1 Supporting invariants [] [2022-11-18 21:05:08,875 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:08,916 INFO L156 tatePredicateManager]: 8 out of 9 supporting invariants were superfluous and have been removed [2022-11-18 21:05:08,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:08,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:08,989 INFO L263 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 21:05:08,990 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:09,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:09,012 WARN L261 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-18 21:05:09,013 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:09,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:09,127 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 21:05:09,129 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,216 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:09,308 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 75 states and 119 transitions. Complement of second has 8 states. [2022-11-18 21:05:09,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 21:05:09,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 79 transitions. [2022-11-18 21:05:09,331 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 79 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-18 21:05:09,331 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:09,331 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 79 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-18 21:05:09,331 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:09,332 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 79 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-18 21:05:09,332 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:09,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 119 transitions. [2022-11-18 21:05:09,342 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:09,345 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 22 states and 32 transitions. [2022-11-18 21:05:09,346 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-18 21:05:09,346 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-18 21:05:09,346 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 32 transitions. [2022-11-18 21:05:09,347 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:09,347 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 32 transitions. [2022-11-18 21:05:09,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 32 transitions. [2022-11-18 21:05:09,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-11-18 21:05:09,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 32 transitions. [2022-11-18 21:05:09,379 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 32 transitions. [2022-11-18 21:05:09,379 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2022-11-18 21:05:09,379 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 21:05:09,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 32 transitions. [2022-11-18 21:05:09,380 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:09,380 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:09,380 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:09,381 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-18 21:05:09,381 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:09,381 INFO L748 eck$LassoCheckResult]: Stem: 183#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 184#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 195#L17-3 assume !(init_nondet_~i~0#1 < 10); 190#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 191#L28-3 [2022-11-18 21:05:09,381 INFO L750 eck$LassoCheckResult]: Loop: 191#L28-3 assume !!(rangesum_~i~1#1 < 10); 192#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 193#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 191#L28-3 [2022-11-18 21:05:09,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:09,382 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-18 21:05:09,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:09,382 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379797713] [2022-11-18 21:05:09,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:09,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:09,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:09,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:09,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:09,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379797713] [2022-11-18 21:05:09,472 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [379797713] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 21:05:09,472 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 21:05:09,473 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 21:05:09,473 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175689025] [2022-11-18 21:05:09,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 21:05:09,476 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 21:05:09,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:09,477 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2022-11-18 21:05:09,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:09,477 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259958386] [2022-11-18 21:05:09,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:09,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:09,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:09,491 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:09,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:09,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:09,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:09,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 21:05:09,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 21:05:09,570 INFO L87 Difference]: Start difference. First operand 22 states and 32 transitions. cyclomatic complexity: 15 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:09,584 INFO L93 Difference]: Finished difference Result 23 states and 32 transitions. [2022-11-18 21:05:09,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 32 transitions. [2022-11-18 21:05:09,585 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:09,585 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 32 transitions. [2022-11-18 21:05:09,585 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-18 21:05:09,586 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-18 21:05:09,586 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 32 transitions. [2022-11-18 21:05:09,586 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:09,586 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 32 transitions. [2022-11-18 21:05:09,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 32 transitions. [2022-11-18 21:05:09,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-11-18 21:05:09,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2022-11-18 21:05:09,588 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2022-11-18 21:05:09,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 21:05:09,590 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2022-11-18 21:05:09,590 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 21:05:09,590 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2022-11-18 21:05:09,590 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:09,591 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:09,591 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:09,591 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-18 21:05:09,591 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:09,591 INFO L748 eck$LassoCheckResult]: Stem: 234#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 235#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 247#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 248#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 249#L17-3 assume !(init_nondet_~i~0#1 < 10); 241#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 242#L28-3 [2022-11-18 21:05:09,591 INFO L750 eck$LassoCheckResult]: Loop: 242#L28-3 assume !!(rangesum_~i~1#1 < 10); 243#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 244#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 242#L28-3 [2022-11-18 21:05:09,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:09,592 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-18 21:05:09,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:09,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325755699] [2022-11-18 21:05:09,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:09,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:09,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:09,653 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:09,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:09,654 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325755699] [2022-11-18 21:05:09,654 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1325755699] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 21:05:09,654 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1749954177] [2022-11-18 21:05:09,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:09,654 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:09,655 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:09,656 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:09,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-18 21:05:09,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:09,722 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 21:05:09,724 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:09,743 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:09,743 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 21:05:09,770 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:09,771 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1749954177] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 21:05:09,775 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 21:05:09,776 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-18 21:05:09,776 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781212858] [2022-11-18 21:05:09,776 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 21:05:09,784 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 21:05:09,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:09,785 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 2 times [2022-11-18 21:05:09,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:09,785 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908669384] [2022-11-18 21:05:09,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:09,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:09,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:09,806 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:09,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:09,820 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:09,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:09,888 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 21:05:09,888 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 21:05:09,889 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 14 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:09,936 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-11-18 21:05:09,936 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 37 transitions. [2022-11-18 21:05:09,939 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:09,940 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 37 transitions. [2022-11-18 21:05:09,941 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-18 21:05:09,941 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-18 21:05:09,942 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 37 transitions. [2022-11-18 21:05:09,942 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:09,942 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-18 21:05:09,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 37 transitions. [2022-11-18 21:05:09,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-11-18 21:05:09,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.3214285714285714) internal successors, (37), 27 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:09,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2022-11-18 21:05:09,947 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-18 21:05:09,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 21:05:09,949 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-18 21:05:09,949 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 21:05:09,950 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 37 transitions. [2022-11-18 21:05:09,952 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:09,953 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:09,953 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:09,954 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-18 21:05:09,954 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:09,955 INFO L748 eck$LassoCheckResult]: Stem: 324#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 336#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 337#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 338#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 339#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 351#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 350#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 349#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 348#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 347#L17-3 assume !(init_nondet_~i~0#1 < 10); 331#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 332#L28-3 [2022-11-18 21:05:09,955 INFO L750 eck$LassoCheckResult]: Loop: 332#L28-3 assume !!(rangesum_~i~1#1 < 10); 333#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 334#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 332#L28-3 [2022-11-18 21:05:09,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:09,956 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-18 21:05:09,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:09,956 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232089197] [2022-11-18 21:05:09,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:09,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:09,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:10,112 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:10,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:10,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232089197] [2022-11-18 21:05:10,113 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [232089197] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 21:05:10,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [528435740] [2022-11-18 21:05:10,114 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 21:05:10,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:10,114 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:10,115 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:10,145 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-18 21:05:10,195 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 21:05:10,195 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 21:05:10,196 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 21:05:10,197 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:10,225 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:10,225 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 21:05:10,295 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:10,295 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [528435740] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 21:05:10,295 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 21:05:10,296 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-18 21:05:10,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1369310992] [2022-11-18 21:05:10,296 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 21:05:10,297 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 21:05:10,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,297 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 3 times [2022-11-18 21:05:10,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,298 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016237612] [2022-11-18 21:05:10,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,303 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:10,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,308 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:10,392 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:10,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 21:05:10,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-18 21:05:10,394 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. cyclomatic complexity: 14 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:10,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:10,454 INFO L93 Difference]: Finished difference Result 40 states and 49 transitions. [2022-11-18 21:05:10,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 49 transitions. [2022-11-18 21:05:10,458 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:10,459 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 49 transitions. [2022-11-18 21:05:10,459 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-11-18 21:05:10,460 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-11-18 21:05:10,460 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 49 transitions. [2022-11-18 21:05:10,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:10,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2022-11-18 21:05:10,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 49 transitions. [2022-11-18 21:05:10,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2022-11-18 21:05:10,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.225) internal successors, (49), 39 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:10,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2022-11-18 21:05:10,468 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2022-11-18 21:05:10,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 21:05:10,469 INFO L428 stractBuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2022-11-18 21:05:10,469 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 21:05:10,469 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 49 transitions. [2022-11-18 21:05:10,473 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:10,473 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:10,473 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:10,475 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2022-11-18 21:05:10,475 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:10,476 INFO L748 eck$LassoCheckResult]: Stem: 474#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 475#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 486#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 487#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 488#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 489#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 494#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 513#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 512#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 511#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 510#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 509#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 508#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 507#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 506#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 505#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 504#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 503#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 502#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 501#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 500#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 499#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 498#L17-3 assume !(init_nondet_~i~0#1 < 10); 481#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 482#L28-3 [2022-11-18 21:05:10,476 INFO L750 eck$LassoCheckResult]: Loop: 482#L28-3 assume !!(rangesum_~i~1#1 < 10); 483#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 484#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 482#L28-3 [2022-11-18 21:05:10,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,476 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2022-11-18 21:05:10,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,477 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887958028] [2022-11-18 21:05:10,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,537 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:10,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,582 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:10,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,583 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 4 times [2022-11-18 21:05:10,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,583 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466086467] [2022-11-18 21:05:10,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,588 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:10,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,593 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:10,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1328180093, now seen corresponding path program 1 times [2022-11-18 21:05:10,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,594 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180681509] [2022-11-18 21:05:10,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:10,682 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:10,683 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:10,683 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180681509] [2022-11-18 21:05:10,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1180681509] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 21:05:10,684 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 21:05:10,684 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 21:05:10,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177361040] [2022-11-18 21:05:10,684 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 21:05:10,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:10,753 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 21:05:10,753 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 21:05:10,753 INFO L87 Difference]: Start difference. First operand 40 states and 49 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:10,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:10,797 INFO L93 Difference]: Finished difference Result 49 states and 58 transitions. [2022-11-18 21:05:10,797 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 58 transitions. [2022-11-18 21:05:10,798 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:10,798 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 49 states and 58 transitions. [2022-11-18 21:05:10,798 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2022-11-18 21:05:10,799 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2022-11-18 21:05:10,799 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 58 transitions. [2022-11-18 21:05:10,799 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:10,800 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 58 transitions. [2022-11-18 21:05:10,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 58 transitions. [2022-11-18 21:05:10,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2022-11-18 21:05:10,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1956521739130435) internal successors, (55), 45 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:10,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 55 transitions. [2022-11-18 21:05:10,803 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 55 transitions. [2022-11-18 21:05:10,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 21:05:10,805 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 55 transitions. [2022-11-18 21:05:10,805 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 21:05:10,805 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 55 transitions. [2022-11-18 21:05:10,806 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:10,806 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:10,806 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:10,807 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1] [2022-11-18 21:05:10,807 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:10,807 INFO L748 eck$LassoCheckResult]: Stem: 571#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 572#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 584#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 585#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 586#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 587#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 616#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 615#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 614#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 613#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 612#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 611#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 610#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 609#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 608#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 607#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 606#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 605#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 604#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 603#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 602#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 599#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 598#L17-3 assume !(init_nondet_~i~0#1 < 10); 577#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 578#L28-3 assume !!(rangesum_~i~1#1 < 10); 579#L29 assume !(rangesum_~i~1#1 > 5); 580#L28-2 [2022-11-18 21:05:10,808 INFO L750 eck$LassoCheckResult]: Loop: 580#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 581#L28-3 assume !!(rangesum_~i~1#1 < 10); 601#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 580#L28-2 [2022-11-18 21:05:10,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,808 INFO L85 PathProgramCache]: Analyzing trace with hash -95702812, now seen corresponding path program 1 times [2022-11-18 21:05:10,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649251669] [2022-11-18 21:05:10,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:10,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,855 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:10,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,856 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 5 times [2022-11-18 21:05:10,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,857 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271926987] [2022-11-18 21:05:10,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,861 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:10,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:10,865 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:10,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:10,866 INFO L85 PathProgramCache]: Analyzing trace with hash 775842814, now seen corresponding path program 1 times [2022-11-18 21:05:10,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:10,867 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573367505] [2022-11-18 21:05:10,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:10,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:10,961 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:10,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:10,962 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573367505] [2022-11-18 21:05:10,962 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1573367505] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 21:05:10,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [923448049] [2022-11-18 21:05:10,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:10,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:10,964 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:10,971 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:10,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-18 21:05:11,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:11,068 INFO L263 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 21:05:11,069 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:11,085 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:11,085 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 21:05:11,104 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:11,104 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [923448049] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 21:05:11,105 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 21:05:11,105 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-11-18 21:05:11,105 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17827666] [2022-11-18 21:05:11,105 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 21:05:11,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:11,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 21:05:11,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 21:05:11,171 INFO L87 Difference]: Start difference. First operand 46 states and 55 transitions. cyclomatic complexity: 14 Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:11,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:11,274 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2022-11-18 21:05:11,275 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 76 states and 85 transitions. [2022-11-18 21:05:11,275 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2022-11-18 21:05:11,276 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 76 states to 76 states and 85 transitions. [2022-11-18 21:05:11,276 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2022-11-18 21:05:11,277 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2022-11-18 21:05:11,277 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 85 transitions. [2022-11-18 21:05:11,277 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:11,278 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 85 transitions. [2022-11-18 21:05:11,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 85 transitions. [2022-11-18 21:05:11,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 73. [2022-11-18 21:05:11,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1232876712328768) internal successors, (82), 72 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:11,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 82 transitions. [2022-11-18 21:05:11,282 INFO L240 hiAutomatonCegarLoop]: Abstraction has 73 states and 82 transitions. [2022-11-18 21:05:11,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 21:05:11,283 INFO L428 stractBuchiCegarLoop]: Abstraction has 73 states and 82 transitions. [2022-11-18 21:05:11,283 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 21:05:11,283 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 82 transitions. [2022-11-18 21:05:11,284 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:11,284 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:11,284 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:11,285 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 3, 1, 1, 1, 1] [2022-11-18 21:05:11,285 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:11,286 INFO L748 eck$LassoCheckResult]: Stem: 873#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 874#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 886#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 887#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 888#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 889#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 923#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 922#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 921#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 920#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 919#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 918#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 917#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 916#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 915#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 914#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 913#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 912#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 911#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 910#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 909#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 902#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 901#L17-3 assume !(init_nondet_~i~0#1 < 10); 879#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 880#L28-3 assume !!(rangesum_~i~1#1 < 10); 930#L29 assume !(rangesum_~i~1#1 > 5); 883#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 884#L28-3 assume !!(rangesum_~i~1#1 < 10); 881#L29 assume !(rangesum_~i~1#1 > 5); 882#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 928#L28-3 assume !!(rangesum_~i~1#1 < 10); 927#L29 assume !(rangesum_~i~1#1 > 5); 926#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 925#L28-3 assume !!(rangesum_~i~1#1 < 10); 924#L29 assume !(rangesum_~i~1#1 > 5); 908#L28-2 [2022-11-18 21:05:11,286 INFO L750 eck$LassoCheckResult]: Loop: 908#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 905#L28-3 assume !!(rangesum_~i~1#1 < 10); 906#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 908#L28-2 [2022-11-18 21:05:11,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:11,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1594065280, now seen corresponding path program 1 times [2022-11-18 21:05:11,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:11,287 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121586515] [2022-11-18 21:05:11,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:11,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:11,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:11,309 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:11,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:11,326 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:11,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:11,327 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 6 times [2022-11-18 21:05:11,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:11,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009598746] [2022-11-18 21:05:11,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:11,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:11,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:11,332 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:11,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:11,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:11,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:11,336 INFO L85 PathProgramCache]: Analyzing trace with hash -654604830, now seen corresponding path program 2 times [2022-11-18 21:05:11,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:11,336 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184157589] [2022-11-18 21:05:11,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:11,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:11,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:11,488 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:11,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:11,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184157589] [2022-11-18 21:05:11,489 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [184157589] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 21:05:11,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1209489178] [2022-11-18 21:05:11,489 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 21:05:11,489 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:11,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:11,495 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:11,519 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-18 21:05:11,628 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 21:05:11,628 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 21:05:11,630 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 21:05:11,631 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:11,672 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:11,672 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 21:05:11,736 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 21:05:11,736 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1209489178] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 21:05:11,736 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 21:05:11,736 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 8 [2022-11-18 21:05:11,737 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1405559881] [2022-11-18 21:05:11,737 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 21:05:11,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:11,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-18 21:05:11,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2022-11-18 21:05:11,821 INFO L87 Difference]: Start difference. First operand 73 states and 82 transitions. cyclomatic complexity: 14 Second operand has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:11,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:11,981 INFO L93 Difference]: Finished difference Result 94 states and 103 transitions. [2022-11-18 21:05:11,981 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 103 transitions. [2022-11-18 21:05:11,982 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2022-11-18 21:05:11,982 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 94 states and 103 transitions. [2022-11-18 21:05:11,982 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2022-11-18 21:05:11,983 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2022-11-18 21:05:11,983 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 103 transitions. [2022-11-18 21:05:11,983 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 21:05:11,983 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 103 transitions. [2022-11-18 21:05:11,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 103 transitions. [2022-11-18 21:05:11,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2022-11-18 21:05:11,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.098901098901099) internal successors, (100), 90 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:11,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2022-11-18 21:05:11,987 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 100 transitions. [2022-11-18 21:05:11,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 21:05:11,989 INFO L428 stractBuchiCegarLoop]: Abstraction has 91 states and 100 transitions. [2022-11-18 21:05:11,989 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-18 21:05:11,989 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 100 transitions. [2022-11-18 21:05:11,990 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:11,990 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:11,990 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:11,991 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 5, 1, 1, 1, 1] [2022-11-18 21:05:11,991 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:11,991 INFO L748 eck$LassoCheckResult]: Stem: 1276#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1277#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1289#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1290#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1291#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1292#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1328#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1327#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1326#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1325#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1324#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1323#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1322#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1321#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1320#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1319#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1318#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1317#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1316#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1315#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1314#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1307#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1306#L17-3 assume !(init_nondet_~i~0#1 < 10); 1282#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1283#L28-3 assume !!(rangesum_~i~1#1 < 10); 1341#L29 assume !(rangesum_~i~1#1 > 5); 1286#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1287#L28-3 assume !!(rangesum_~i~1#1 < 10); 1284#L29 assume !(rangesum_~i~1#1 > 5); 1285#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1339#L28-3 assume !!(rangesum_~i~1#1 < 10); 1338#L29 assume !(rangesum_~i~1#1 > 5); 1337#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1336#L28-3 assume !!(rangesum_~i~1#1 < 10); 1335#L29 assume !(rangesum_~i~1#1 > 5); 1334#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1333#L28-3 assume !!(rangesum_~i~1#1 < 10); 1332#L29 assume !(rangesum_~i~1#1 > 5); 1331#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1330#L28-3 assume !!(rangesum_~i~1#1 < 10); 1329#L29 assume !(rangesum_~i~1#1 > 5); 1313#L28-2 [2022-11-18 21:05:11,991 INFO L750 eck$LassoCheckResult]: Loop: 1313#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1310#L28-3 assume !!(rangesum_~i~1#1 < 10); 1311#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1313#L28-2 [2022-11-18 21:05:11,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:11,991 INFO L85 PathProgramCache]: Analyzing trace with hash 2114090752, now seen corresponding path program 2 times [2022-11-18 21:05:11,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:11,992 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542683794] [2022-11-18 21:05:11,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:11,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:12,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:12,015 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:12,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:12,044 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:12,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:12,044 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 7 times [2022-11-18 21:05:12,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:12,045 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619502396] [2022-11-18 21:05:12,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:12,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:12,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:12,049 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:12,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:12,052 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:12,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:12,053 INFO L85 PathProgramCache]: Analyzing trace with hash -522805150, now seen corresponding path program 3 times [2022-11-18 21:05:12,053 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:12,053 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184456787] [2022-11-18 21:05:12,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:12,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:12,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:12,085 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:12,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:12,113 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:19,345 WARN L233 SmtUtils]: Spent 7.16s on a formula simplification. DAG size of input: 260 DAG size of output: 197 (called from [L 278] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-11-18 21:05:20,533 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 21:05:20,534 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 21:05:20,534 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 21:05:20,534 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 21:05:20,534 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 21:05:20,534 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:20,534 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 21:05:20,534 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 21:05:20,534 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration8_Lasso [2022-11-18 21:05:20,534 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 21:05:20,534 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 21:05:20,539 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:20,544 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:20,547 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:20,549 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,635 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,638 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,640 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,643 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,646 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,648 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,651 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,654 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,657 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,660 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,662 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,667 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,669 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,672 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,674 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,677 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,679 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,682 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:22,684 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:23,247 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 21:05:23,247 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 21:05:23,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,248 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,254 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,263 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-18 21:05:23,264 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,277 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,277 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:23,277 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,277 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,277 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,278 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:23,278 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:23,287 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,295 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,296 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,297 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,301 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,314 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,314 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:23,314 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,314 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,314 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,315 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-18 21:05:23,315 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:23,315 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:23,324 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,333 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,334 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,337 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-11-18 21:05:23,337 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,351 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,351 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:23,351 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,351 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,351 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,352 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:23,352 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:23,361 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,370 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,371 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,371 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,375 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,383 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,396 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-11-18 21:05:23,396 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,396 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,396 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,396 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,398 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,399 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,410 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,415 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,416 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,417 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,427 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-11-18 21:05:23,428 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,444 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,444 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,444 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,444 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,447 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,447 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,464 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,468 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,469 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,469 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,470 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,475 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-11-18 21:05:23,475 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,488 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,488 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,489 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,489 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,490 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,491 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,505 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,517 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,518 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,519 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,533 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,539 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-11-18 21:05:23,546 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,546 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,546 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,546 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,548 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,549 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,571 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,579 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,580 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,581 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,586 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2022-11-18 21:05:23,602 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,602 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,602 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,602 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,611 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,611 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,624 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,633 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,634 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,638 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,650 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,650 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,651 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,651 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,652 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,652 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,653 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2022-11-18 21:05:23,675 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,683 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,683 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,684 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2022-11-18 21:05:23,688 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,698 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,698 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,699 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,699 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,700 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,700 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,710 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,712 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,713 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,714 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,715 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2022-11-18 21:05:23,716 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,729 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,729 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,729 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,729 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,731 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,731 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,746 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,748 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:23,748 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,749 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,749 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,750 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2022-11-18 21:05:23,752 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,762 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,762 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,762 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,762 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,764 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,764 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,775 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,778 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2022-11-18 21:05:23,778 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,778 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,779 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2022-11-18 21:05:23,783 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,793 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,793 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,793 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,793 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,795 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,795 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,828 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:23,831 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2022-11-18 21:05:23,831 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,831 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,832 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,836 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2022-11-18 21:05:23,836 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:23,846 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:23,846 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:23,846 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:23,846 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:23,854 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 21:05:23,854 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 21:05:23,872 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 21:05:23,897 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2022-11-18 21:05:23,897 INFO L444 ModelExtractionUtils]: 20 out of 31 variables were initially zero. Simplification set additionally 8 variables to zero. [2022-11-18 21:05:23,897 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:23,898 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:23,914 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:23,917 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 21:05:23,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2022-11-18 21:05:23,952 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 21:05:23,952 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 21:05:23,953 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 17 Supporting invariants [] [2022-11-18 21:05:23,956 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:24,213 INFO L156 tatePredicateManager]: 41 out of 41 supporting invariants were superfluous and have been removed [2022-11-18 21:05:24,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:24,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:24,283 INFO L263 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 21:05:24,284 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:24,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:24,351 INFO L263 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 21:05:24,351 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:24,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:24,379 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2022-11-18 21:05:24,379 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:24,412 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 104 states and 116 transitions. Complement of second has 7 states. [2022-11-18 21:05:24,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 21:05:24,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:24,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 16 transitions. [2022-11-18 21:05:24,413 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 3 letters. [2022-11-18 21:05:24,415 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:24,415 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 44 letters. Loop has 3 letters. [2022-11-18 21:05:24,416 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:24,416 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 6 letters. [2022-11-18 21:05:24,417 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:24,417 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 104 states and 116 transitions. [2022-11-18 21:05:24,418 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-18 21:05:24,422 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 104 states to 93 states and 104 transitions. [2022-11-18 21:05:24,423 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2022-11-18 21:05:24,423 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2022-11-18 21:05:24,423 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 104 transitions. [2022-11-18 21:05:24,424 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 21:05:24,424 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 104 transitions. [2022-11-18 21:05:24,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 104 transitions. [2022-11-18 21:05:24,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2022-11-18 21:05:24,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.118279569892473) internal successors, (104), 92 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:24,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 104 transitions. [2022-11-18 21:05:24,428 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 104 transitions. [2022-11-18 21:05:24,428 INFO L428 stractBuchiCegarLoop]: Abstraction has 93 states and 104 transitions. [2022-11-18 21:05:24,429 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-18 21:05:24,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 104 transitions. [2022-11-18 21:05:24,429 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-18 21:05:24,430 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:24,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:24,433 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 21:05:24,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:24,434 INFO L748 eck$LassoCheckResult]: Stem: 1791#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1792#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1807#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1808#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1809#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1810#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1868#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1867#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1866#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1865#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1864#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1863#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1862#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1861#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1860#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1859#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1858#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1857#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1856#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1855#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1854#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1824#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1823#L17-3 assume !(init_nondet_~i~0#1 < 10); 1797#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1798#L28-3 assume !!(rangesum_~i~1#1 < 10); 1799#L29 assume !(rangesum_~i~1#1 > 5); 1800#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1803#L28-3 assume !!(rangesum_~i~1#1 < 10); 1848#L29 assume !(rangesum_~i~1#1 > 5); 1804#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1805#L28-3 assume !!(rangesum_~i~1#1 < 10); 1801#L29 assume !(rangesum_~i~1#1 > 5); 1802#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1845#L28-3 assume !!(rangesum_~i~1#1 < 10); 1843#L29 assume !(rangesum_~i~1#1 > 5); 1841#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1839#L28-3 assume !!(rangesum_~i~1#1 < 10); 1837#L29 assume !(rangesum_~i~1#1 > 5); 1835#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1833#L28-3 assume !!(rangesum_~i~1#1 < 10); 1830#L29 assume !(rangesum_~i~1#1 > 5); 1825#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1818#L28-3 assume !(rangesum_~i~1#1 < 10); 1819#L28-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 1813#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1795#L28-8 assume !!(rangesum_~i~1#1 < 10); 1796#L29-2 assume !(rangesum_~i~1#1 > 5); 1811#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1812#L28-8 assume !!(rangesum_~i~1#1 < 10); 1853#L29-2 assume !(rangesum_~i~1#1 > 5); 1852#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1851#L28-8 assume !!(rangesum_~i~1#1 < 10); 1850#L29-2 assume !(rangesum_~i~1#1 > 5); 1849#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1847#L28-8 assume !!(rangesum_~i~1#1 < 10); 1846#L29-2 assume !(rangesum_~i~1#1 > 5); 1844#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1842#L28-8 assume !!(rangesum_~i~1#1 < 10); 1840#L29-2 assume !(rangesum_~i~1#1 > 5); 1838#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1836#L28-8 assume !!(rangesum_~i~1#1 < 10); 1834#L29-2 assume !(rangesum_~i~1#1 > 5); 1831#L28-7 [2022-11-18 21:05:24,434 INFO L750 eck$LassoCheckResult]: Loop: 1831#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1826#L28-8 assume !!(rangesum_~i~1#1 < 10); 1827#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1831#L28-7 [2022-11-18 21:05:24,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:24,435 INFO L85 PathProgramCache]: Analyzing trace with hash -365260545, now seen corresponding path program 1 times [2022-11-18 21:05:24,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:24,435 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902788248] [2022-11-18 21:05:24,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:24,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:24,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:24,522 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-18 21:05:24,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:24,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [902788248] [2022-11-18 21:05:24,523 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [902788248] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 21:05:24,523 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 21:05:24,523 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 21:05:24,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596020490] [2022-11-18 21:05:24,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 21:05:24,525 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 21:05:24,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:24,525 INFO L85 PathProgramCache]: Analyzing trace with hash 85178, now seen corresponding path program 1 times [2022-11-18 21:05:24,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:24,526 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995200505] [2022-11-18 21:05:24,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:24,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:24,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:24,545 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:24,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:24,548 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:24,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:24,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 21:05:24,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 21:05:24,618 INFO L87 Difference]: Start difference. First operand 93 states and 104 transitions. cyclomatic complexity: 16 Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:24,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:24,683 INFO L93 Difference]: Finished difference Result 108 states and 123 transitions. [2022-11-18 21:05:24,684 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 108 states and 123 transitions. [2022-11-18 21:05:24,685 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2022-11-18 21:05:24,686 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 108 states to 106 states and 119 transitions. [2022-11-18 21:05:24,686 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2022-11-18 21:05:24,686 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2022-11-18 21:05:24,686 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 119 transitions. [2022-11-18 21:05:24,686 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 21:05:24,686 INFO L218 hiAutomatonCegarLoop]: Abstraction has 106 states and 119 transitions. [2022-11-18 21:05:24,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 119 transitions. [2022-11-18 21:05:24,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 95. [2022-11-18 21:05:24,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.0947368421052632) internal successors, (104), 94 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:24,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 104 transitions. [2022-11-18 21:05:24,690 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 104 transitions. [2022-11-18 21:05:24,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 21:05:24,697 INFO L428 stractBuchiCegarLoop]: Abstraction has 95 states and 104 transitions. [2022-11-18 21:05:24,697 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-18 21:05:24,697 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 104 transitions. [2022-11-18 21:05:24,698 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 10 [2022-11-18 21:05:24,699 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:24,699 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:24,700 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 21:05:24,702 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:24,702 INFO L748 eck$LassoCheckResult]: Stem: 1999#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2000#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2015#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2016#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2017#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2018#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2051#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2050#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2049#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2048#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2047#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2046#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2045#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2044#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2043#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2042#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2041#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2040#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2039#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2038#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2037#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2032#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2031#L17-3 assume !(init_nondet_~i~0#1 < 10); 2005#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2006#L28-3 assume !!(rangesum_~i~1#1 < 10); 2007#L29 assume !(rangesum_~i~1#1 > 5); 2008#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2011#L28-3 assume !!(rangesum_~i~1#1 < 10); 2077#L29 assume !(rangesum_~i~1#1 > 5); 2012#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2013#L28-3 assume !!(rangesum_~i~1#1 < 10); 2009#L29 assume !(rangesum_~i~1#1 > 5); 2010#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2076#L28-3 assume !!(rangesum_~i~1#1 < 10); 2075#L29 assume !(rangesum_~i~1#1 > 5); 2074#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2073#L28-3 assume !!(rangesum_~i~1#1 < 10); 2072#L29 assume !(rangesum_~i~1#1 > 5); 2071#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2070#L28-3 assume !!(rangesum_~i~1#1 < 10); 2069#L29 assume !(rangesum_~i~1#1 > 5); 2054#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2068#L28-3 assume !!(rangesum_~i~1#1 < 10); 2053#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2033#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2026#L28-3 assume !(rangesum_~i~1#1 < 10); 2027#L28-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2020#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2021#L28-8 assume !!(rangesum_~i~1#1 < 10); 2030#L29-2 assume !(rangesum_~i~1#1 > 5); 2019#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2003#L28-8 assume !!(rangesum_~i~1#1 < 10); 2004#L29-2 assume !(rangesum_~i~1#1 > 5); 2067#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2066#L28-8 assume !!(rangesum_~i~1#1 < 10); 2065#L29-2 assume !(rangesum_~i~1#1 > 5); 2064#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2063#L28-8 assume !!(rangesum_~i~1#1 < 10); 2062#L29-2 assume !(rangesum_~i~1#1 > 5); 2061#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2060#L28-8 assume !!(rangesum_~i~1#1 < 10); 2059#L29-2 assume !(rangesum_~i~1#1 > 5); 2058#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2057#L28-8 assume !!(rangesum_~i~1#1 < 10); 2056#L29-2 assume !(rangesum_~i~1#1 > 5); 2052#L28-7 [2022-11-18 21:05:24,703 INFO L750 eck$LassoCheckResult]: Loop: 2052#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2055#L28-8 assume !!(rangesum_~i~1#1 < 10); 2035#L29-2 assume !(rangesum_~i~1#1 > 5); 2052#L28-7 [2022-11-18 21:05:24,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:24,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1039890653, now seen corresponding path program 1 times [2022-11-18 21:05:24,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:24,705 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197148989] [2022-11-18 21:05:24,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:24,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:24,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:24,841 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2022-11-18 21:05:24,842 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:24,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197148989] [2022-11-18 21:05:24,842 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1197148989] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 21:05:24,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1976441216] [2022-11-18 21:05:24,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:24,843 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:24,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:24,847 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:24,863 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-11-18 21:05:24,954 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:25,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:25,011 INFO L263 TraceCheckSpWp]: Trace formula consists of 261 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 21:05:25,016 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:25,064 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2022-11-18 21:05:25,064 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 21:05:25,064 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1976441216] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 21:05:25,064 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 21:05:25,065 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2022-11-18 21:05:25,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967850207] [2022-11-18 21:05:25,065 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 21:05:25,066 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 21:05:25,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:25,067 INFO L85 PathProgramCache]: Analyzing trace with hash 85180, now seen corresponding path program 1 times [2022-11-18 21:05:25,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:25,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112676698] [2022-11-18 21:05:25,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:25,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:25,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:25,070 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:25,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:25,072 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:25,099 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 21:05:25,099 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 21:05:25,099 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 21:05:25,100 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 21:05:25,100 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-18 21:05:25,100 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,100 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 21:05:25,100 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 21:05:25,100 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration10_Loop [2022-11-18 21:05:25,101 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 21:05:25,101 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 21:05:25,104 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:25,107 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:25,135 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 21:05:25,136 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-11-18 21:05:25,138 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,140 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,148 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-11-18 21:05:25,148 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-11-18 21:05:25,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2022-11-18 21:05:25,181 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-11-18 21:05:25,181 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_rangesum_#t~post3#1=0} Honda state: {ULTIMATE.start_rangesum_#t~post3#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-11-18 21:05:25,191 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:25,191 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,191 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,193 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,197 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-11-18 21:05:25,197 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-11-18 21:05:25,207 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2022-11-18 21:05:25,230 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:25,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,232 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,237 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-11-18 21:05:25,237 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-11-18 21:05:25,252 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2022-11-18 21:05:25,329 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-11-18 21:05:25,332 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2022-11-18 21:05:25,333 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 21:05:25,333 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 21:05:25,333 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 21:05:25,333 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 21:05:25,333 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 21:05:25,333 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,333 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 21:05:25,333 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 21:05:25,333 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration10_Loop [2022-11-18 21:05:25,333 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 21:05:25,333 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 21:05:25,334 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:25,339 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 21:05:25,369 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 21:05:25,370 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 21:05:25,370 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,370 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,371 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,379 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:25,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2022-11-18 21:05:25,393 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:25,393 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:25,393 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:25,393 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:25,393 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:25,394 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:25,394 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:25,411 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 21:05:25,419 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:25,420 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,420 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,421 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,428 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 21:05:25,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2022-11-18 21:05:25,441 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 21:05:25,441 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 21:05:25,442 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 21:05:25,442 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 21:05:25,442 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 21:05:25,443 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 21:05:25,443 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 21:05:25,459 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 21:05:25,462 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2022-11-18 21:05:25,462 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2022-11-18 21:05:25,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 21:05:25,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,471 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,473 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 21:05:25,473 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-11-18 21:05:25,474 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 21:05:25,474 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 9 Supporting invariants [] [2022-11-18 21:05:25,476 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2022-11-18 21:05:25,477 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:25,478 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-11-18 21:05:25,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:25,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:25,554 INFO L263 TraceCheckSpWp]: Trace formula consists of 261 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 21:05:25,555 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:25,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:25,649 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 21:05:25,650 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:25,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 21:05:25,663 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 21:05:25,663 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 95 states and 104 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:25,694 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 95 states and 104 transitions. cyclomatic complexity: 14. Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 114 states and 126 transitions. Complement of second has 5 states. [2022-11-18 21:05:25,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-11-18 21:05:25,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:25,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-11-18 21:05:25,696 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 65 letters. Loop has 3 letters. [2022-11-18 21:05:25,696 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:25,697 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 68 letters. Loop has 3 letters. [2022-11-18 21:05:25,697 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:25,697 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 65 letters. Loop has 6 letters. [2022-11-18 21:05:25,698 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 21:05:25,698 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 126 transitions. [2022-11-18 21:05:25,699 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-18 21:05:25,700 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 99 states and 109 transitions. [2022-11-18 21:05:25,700 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 42 [2022-11-18 21:05:25,700 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2022-11-18 21:05:25,700 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 109 transitions. [2022-11-18 21:05:25,701 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 21:05:25,701 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 109 transitions. [2022-11-18 21:05:25,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 109 transitions. [2022-11-18 21:05:25,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 98. [2022-11-18 21:05:25,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.1020408163265305) internal successors, (108), 97 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:25,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2022-11-18 21:05:25,706 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 108 transitions. [2022-11-18 21:05:25,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:25,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 21:05:25,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 21:05:25,707 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:25,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:25,733 INFO L93 Difference]: Finished difference Result 109 states and 122 transitions. [2022-11-18 21:05:25,733 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 109 states and 122 transitions. [2022-11-18 21:05:25,734 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-18 21:05:25,735 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 109 states to 109 states and 122 transitions. [2022-11-18 21:05:25,735 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2022-11-18 21:05:25,735 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2022-11-18 21:05:25,735 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 122 transitions. [2022-11-18 21:05:25,736 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 21:05:25,736 INFO L218 hiAutomatonCegarLoop]: Abstraction has 109 states and 122 transitions. [2022-11-18 21:05:25,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 122 transitions. [2022-11-18 21:05:25,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 98. [2022-11-18 21:05:25,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.0816326530612246) internal successors, (106), 97 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:25,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 106 transitions. [2022-11-18 21:05:25,740 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 106 transitions. [2022-11-18 21:05:25,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 21:05:25,741 INFO L428 stractBuchiCegarLoop]: Abstraction has 98 states and 106 transitions. [2022-11-18 21:05:25,741 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-18 21:05:25,741 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 106 transitions. [2022-11-18 21:05:25,742 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-18 21:05:25,742 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:25,742 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:25,743 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 21:05:25,743 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:25,744 INFO L748 eck$LassoCheckResult]: Stem: 2832#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2833#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2850#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2851#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2852#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2853#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2889#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2888#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2887#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2886#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2885#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2884#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2883#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2882#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2881#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2880#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2879#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2878#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2875#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2873#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2872#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2869#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2868#L17-3 assume !(init_nondet_~i~0#1 < 10); 2840#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2841#L28-3 assume !!(rangesum_~i~1#1 < 10); 2842#L29 assume !(rangesum_~i~1#1 > 5); 2843#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2847#L28-3 assume !!(rangesum_~i~1#1 < 10); 2902#L29 assume !(rangesum_~i~1#1 > 5); 2848#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2849#L28-3 assume !!(rangesum_~i~1#1 < 10); 2844#L29 assume !(rangesum_~i~1#1 > 5); 2845#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2901#L28-3 assume !!(rangesum_~i~1#1 < 10); 2900#L29 assume !(rangesum_~i~1#1 > 5); 2899#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2898#L28-3 assume !!(rangesum_~i~1#1 < 10); 2897#L29 assume !(rangesum_~i~1#1 > 5); 2896#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2895#L28-3 assume !!(rangesum_~i~1#1 < 10); 2894#L29 assume !(rangesum_~i~1#1 > 5); 2877#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2893#L28-3 assume !!(rangesum_~i~1#1 < 10); 2876#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2874#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2863#L28-3 assume !(rangesum_~i~1#1 < 10); 2864#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 2858#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2859#L28-8 assume !!(rangesum_~i~1#1 < 10); 2867#L29-2 assume !(rangesum_~i~1#1 > 5); 2854#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2838#L28-8 assume !!(rangesum_~i~1#1 < 10); 2839#L29-2 assume !(rangesum_~i~1#1 > 5); 2855#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2856#L28-8 assume !!(rangesum_~i~1#1 < 10); 2913#L29-2 assume !(rangesum_~i~1#1 > 5); 2912#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2911#L28-8 assume !!(rangesum_~i~1#1 < 10); 2910#L29-2 assume !(rangesum_~i~1#1 > 5); 2909#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2908#L28-8 assume !!(rangesum_~i~1#1 < 10); 2905#L29-2 assume !(rangesum_~i~1#1 > 5); 2906#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2907#L28-8 assume !!(rangesum_~i~1#1 < 10); 2892#L29-2 assume !(rangesum_~i~1#1 > 5); 2890#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2836#L28-8 assume !!(rangesum_~i~1#1 < 10); 2837#L29-2 [2022-11-18 21:05:25,744 INFO L750 eck$LassoCheckResult]: Loop: 2837#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2871#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2870#L28-8 assume !!(rangesum_~i~1#1 < 10); 2837#L29-2 [2022-11-18 21:05:25,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:25,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1815162476, now seen corresponding path program 1 times [2022-11-18 21:05:25,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:25,745 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806263344] [2022-11-18 21:05:25,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:25,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:25,766 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 21:05:25,766 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [973003942] [2022-11-18 21:05:25,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:25,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:25,767 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:25,768 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:25,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-11-18 21:05:25,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 21:05:25,899 INFO L263 TraceCheckSpWp]: Trace formula consists of 263 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-18 21:05:25,901 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:25,994 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2022-11-18 21:05:25,994 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 21:05:26,106 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2022-11-18 21:05:26,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:26,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1806263344] [2022-11-18 21:05:26,107 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 21:05:26,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [973003942] [2022-11-18 21:05:26,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [973003942] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 21:05:26,108 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 21:05:26,108 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 12 [2022-11-18 21:05:26,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071673243] [2022-11-18 21:05:26,108 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 21:05:26,109 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 21:05:26,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:26,109 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 2 times [2022-11-18 21:05:26,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:26,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381700467] [2022-11-18 21:05:26,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:26,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:26,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:26,113 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:26,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:26,117 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:26,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:26,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-18 21:05:26,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2022-11-18 21:05:26,188 INFO L87 Difference]: Start difference. First operand 98 states and 106 transitions. cyclomatic complexity: 14 Second operand has 12 states, 12 states have (on average 3.5) internal successors, (42), 12 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:26,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:26,409 INFO L93 Difference]: Finished difference Result 145 states and 162 transitions. [2022-11-18 21:05:26,409 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 145 states and 162 transitions. [2022-11-18 21:05:26,411 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 19 [2022-11-18 21:05:26,413 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 145 states to 139 states and 156 transitions. [2022-11-18 21:05:26,413 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2022-11-18 21:05:26,413 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2022-11-18 21:05:26,413 INFO L73 IsDeterministic]: Start isDeterministic. Operand 139 states and 156 transitions. [2022-11-18 21:05:26,414 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 21:05:26,414 INFO L218 hiAutomatonCegarLoop]: Abstraction has 139 states and 156 transitions. [2022-11-18 21:05:26,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states and 156 transitions. [2022-11-18 21:05:26,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 116. [2022-11-18 21:05:26,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.0948275862068966) internal successors, (127), 115 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:26,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 127 transitions. [2022-11-18 21:05:26,419 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 127 transitions. [2022-11-18 21:05:26,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 21:05:26,420 INFO L428 stractBuchiCegarLoop]: Abstraction has 116 states and 127 transitions. [2022-11-18 21:05:26,420 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-18 21:05:26,421 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 127 transitions. [2022-11-18 21:05:26,422 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2022-11-18 21:05:26,422 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:26,422 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:26,423 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 9, 6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 21:05:26,423 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-18 21:05:26,424 INFO L748 eck$LassoCheckResult]: Stem: 3486#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 3487#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 3505#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3506#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3507#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3508#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3561#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3559#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3557#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3555#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3553#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3551#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3549#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3547#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3545#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3543#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3541#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3539#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3537#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3535#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3530#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3526#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3525#L17-3 assume !(init_nondet_~i~0#1 < 10); 3494#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3495#L28-3 assume !!(rangesum_~i~1#1 < 10); 3496#L29 assume !(rangesum_~i~1#1 > 5); 3497#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3500#L28-3 assume !!(rangesum_~i~1#1 < 10); 3520#L29 assume !(rangesum_~i~1#1 > 5); 3501#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3502#L28-3 assume !!(rangesum_~i~1#1 < 10); 3498#L29 assume !(rangesum_~i~1#1 > 5); 3499#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3577#L28-3 assume !!(rangesum_~i~1#1 < 10); 3576#L29 assume !(rangesum_~i~1#1 > 5); 3575#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3574#L28-3 assume !!(rangesum_~i~1#1 < 10); 3573#L29 assume !(rangesum_~i~1#1 > 5); 3572#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3571#L28-3 assume !!(rangesum_~i~1#1 < 10); 3570#L29 assume !(rangesum_~i~1#1 > 5); 3534#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3569#L28-3 assume !!(rangesum_~i~1#1 < 10); 3568#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3567#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3566#L28-3 assume !!(rangesum_~i~1#1 < 10); 3565#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3564#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3563#L28-3 assume !!(rangesum_~i~1#1 < 10); 3562#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3533#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3536#L28-3 assume !!(rangesum_~i~1#1 < 10); 3531#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3532#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3518#L28-3 assume !(rangesum_~i~1#1 < 10); 3519#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 3512#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3490#L28-8 assume !!(rangesum_~i~1#1 < 10); 3491#L29-2 assume !(rangesum_~i~1#1 > 5); 3509#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3510#L28-8 assume !!(rangesum_~i~1#1 < 10); 3581#L29-2 assume !(rangesum_~i~1#1 > 5); 3580#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3578#L28-8 assume !!(rangesum_~i~1#1 < 10); 3579#L29-2 assume !(rangesum_~i~1#1 > 5); 3586#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3585#L28-8 assume !!(rangesum_~i~1#1 < 10); 3584#L29-2 assume !(rangesum_~i~1#1 > 5); 3583#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3582#L28-8 assume !!(rangesum_~i~1#1 < 10); 3523#L29-2 assume !(rangesum_~i~1#1 > 5); 3524#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3587#L28-8 assume !!(rangesum_~i~1#1 < 10); 3560#L29-2 assume !(rangesum_~i~1#1 > 5); 3558#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3556#L28-8 assume !!(rangesum_~i~1#1 < 10); 3554#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3552#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3550#L28-8 assume !!(rangesum_~i~1#1 < 10); 3548#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3546#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3544#L28-8 assume !!(rangesum_~i~1#1 < 10); 3542#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3540#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3538#L28-8 assume !!(rangesum_~i~1#1 < 10); 3528#L29-2 [2022-11-18 21:05:26,424 INFO L750 eck$LassoCheckResult]: Loop: 3528#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3529#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3527#L28-8 assume !!(rangesum_~i~1#1 < 10); 3528#L29-2 [2022-11-18 21:05:26,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:26,424 INFO L85 PathProgramCache]: Analyzing trace with hash -1484601769, now seen corresponding path program 1 times [2022-11-18 21:05:26,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:26,425 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411223849] [2022-11-18 21:05:26,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:26,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:26,448 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 21:05:26,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [327249396] [2022-11-18 21:05:26,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:26,448 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:26,449 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:26,452 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:26,471 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-11-18 21:05:26,548 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2022-11-18 21:05:26,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:26,708 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:26,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:26,931 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:26,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:26,932 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 3 times [2022-11-18 21:05:26,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:26,932 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784045267] [2022-11-18 21:05:26,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:26,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:26,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:26,936 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:26,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:26,939 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:26,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:26,940 INFO L85 PathProgramCache]: Analyzing trace with hash 1801965686, now seen corresponding path program 2 times [2022-11-18 21:05:26,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:26,941 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [768055469] [2022-11-18 21:05:26,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:26,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:26,963 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 21:05:26,964 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1654759384] [2022-11-18 21:05:26,964 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 21:05:26,964 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:26,964 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:26,967 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:26,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-11-18 21:05:27,132 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 21:05:27,132 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 21:05:27,134 INFO L263 TraceCheckSpWp]: Trace formula consists of 347 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 21:05:27,137 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 21:05:27,191 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 302 trivial. 0 not checked. [2022-11-18 21:05:27,191 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 21:05:27,192 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 21:05:27,192 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [768055469] [2022-11-18 21:05:27,192 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 21:05:27,192 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1654759384] [2022-11-18 21:05:27,192 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1654759384] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 21:05:27,192 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 21:05:27,193 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 21:05:27,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119694824] [2022-11-18 21:05:27,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 21:05:27,261 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 21:05:27,262 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 21:05:27,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 21:05:27,262 INFO L87 Difference]: Start difference. First operand 116 states and 127 transitions. cyclomatic complexity: 17 Second operand has 7 states, 6 states have (on average 4.666666666666667) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:27,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 21:05:27,377 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2022-11-18 21:05:27,378 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 139 states and 143 transitions. [2022-11-18 21:05:27,379 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-18 21:05:27,379 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 139 states to 115 states and 119 transitions. [2022-11-18 21:05:27,379 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2022-11-18 21:05:27,380 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2022-11-18 21:05:27,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 119 transitions. [2022-11-18 21:05:27,380 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-18 21:05:27,380 INFO L218 hiAutomatonCegarLoop]: Abstraction has 115 states and 119 transitions. [2022-11-18 21:05:27,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 119 transitions. [2022-11-18 21:05:27,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 96. [2022-11-18 21:05:27,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 96 states have (on average 1.0416666666666667) internal successors, (100), 95 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 21:05:27,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2022-11-18 21:05:27,383 INFO L240 hiAutomatonCegarLoop]: Abstraction has 96 states and 100 transitions. [2022-11-18 21:05:27,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 21:05:27,384 INFO L428 stractBuchiCegarLoop]: Abstraction has 96 states and 100 transitions. [2022-11-18 21:05:27,384 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-18 21:05:27,384 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 100 transitions. [2022-11-18 21:05:27,385 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-18 21:05:27,385 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 21:05:27,385 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 21:05:27,386 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 10, 6, 6, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 21:05:27,387 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 21:05:27,387 INFO L748 eck$LassoCheckResult]: Stem: 4014#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 4015#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 4031#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4032#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4033#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4034#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4098#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4096#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4094#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4092#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4090#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4088#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4086#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4085#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4083#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4080#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4075#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4074#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4073#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4072#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4071#L17-3 assume !!(init_nondet_~i~0#1 < 10);call write~int(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4051#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4050#L17-3 assume !(init_nondet_~i~0#1 < 10); 4022#L15 assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4023#L28-3 assume !!(rangesum_~i~1#1 < 10); 4024#L29 assume !(rangesum_~i~1#1 > 5); 4025#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4028#L28-3 assume !!(rangesum_~i~1#1 < 10); 4026#L29 assume !(rangesum_~i~1#1 > 5); 4027#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4029#L28-3 assume !!(rangesum_~i~1#1 < 10); 4102#L29 assume !(rangesum_~i~1#1 > 5); 4101#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4100#L28-3 assume !!(rangesum_~i~1#1 < 10); 4099#L29 assume !(rangesum_~i~1#1 > 5); 4097#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4095#L28-3 assume !!(rangesum_~i~1#1 < 10); 4093#L29 assume !(rangesum_~i~1#1 > 5); 4091#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4089#L28-3 assume !!(rangesum_~i~1#1 < 10); 4087#L29 assume !(rangesum_~i~1#1 > 5); 4082#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4084#L28-3 assume !!(rangesum_~i~1#1 < 10); 4081#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4079#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4043#L28-3 assume !!(rangesum_~i~1#1 < 10); 4044#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4068#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4066#L28-3 assume !!(rangesum_~i~1#1 < 10); 4064#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4062#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4060#L28-3 assume !!(rangesum_~i~1#1 < 10); 4058#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4056#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4054#L28-3 assume !(rangesum_~i~1#1 < 10); 4046#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4038#L37 main_#t~ret5#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4039#L28-8 assume !!(rangesum_~i~1#1 < 10); 4048#L29-2 assume !(rangesum_~i~1#1 > 5); 4035#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4036#L28-8 assume !!(rangesum_~i~1#1 < 10); 4109#L29-2 assume !(rangesum_~i~1#1 > 5); 4037#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4020#L28-8 assume !!(rangesum_~i~1#1 < 10); 4021#L29-2 assume !(rangesum_~i~1#1 > 5); 4049#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4108#L28-8 assume !!(rangesum_~i~1#1 < 10); 4107#L29-2 assume !(rangesum_~i~1#1 > 5); 4106#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4105#L28-8 assume !!(rangesum_~i~1#1 < 10); 4104#L29-2 assume !(rangesum_~i~1#1 > 5); 4103#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4077#L28-8 assume !!(rangesum_~i~1#1 < 10); 4078#L29-2 assume !(rangesum_~i~1#1 > 5); 4076#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4018#L28-8 assume !!(rangesum_~i~1#1 < 10); 4019#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4070#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4069#L28-8 assume !!(rangesum_~i~1#1 < 10); 4067#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4065#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4063#L28-8 assume !!(rangesum_~i~1#1 < 10); 4061#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4059#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4057#L28-8 assume !!(rangesum_~i~1#1 < 10); 4055#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4053#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4052#L28-8 assume !(rangesum_~i~1#1 < 10); 4045#L28-9 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4040#L37-1 main_#t~ret8#1 := rangesum_#res#1;assume { :end_inline_rangesum } true;main_~ret2~0#1 := main_#t~ret8#1;havoc main_#t~ret8#1;call main_#t~mem9#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem9#1;havoc main_#t~mem9#1;main_~i~2#1 := 0; 4041#L54-3 [2022-11-18 21:05:27,387 INFO L750 eck$LassoCheckResult]: Loop: 4041#L54-3 assume !!(main_~i~2#1 < 9);call main_#t~mem11#1 := read~int(main_~#x~0#1.base, main_~#x~0#1.offset + 4 * (1 + main_~i~2#1), 4);call write~int(main_#t~mem11#1, main_~#x~0#1.base, main_~#x~0#1.offset + 4 * main_~i~2#1, 4);havoc main_#t~mem11#1; 4042#L54-2 main_#t~post10#1 := main_~i~2#1;main_~i~2#1 := 1 + main_#t~post10#1;havoc main_#t~post10#1; 4041#L54-3 [2022-11-18 21:05:27,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:27,388 INFO L85 PathProgramCache]: Analyzing trace with hash 817204024, now seen corresponding path program 1 times [2022-11-18 21:05:27,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:27,388 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621191287] [2022-11-18 21:05:27,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:27,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:27,408 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 21:05:27,409 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1560622286] [2022-11-18 21:05:27,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:27,409 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:27,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:27,414 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:27,431 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-11-18 21:05:27,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:27,664 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:27,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:28,007 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:28,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:28,008 INFO L85 PathProgramCache]: Analyzing trace with hash 3331, now seen corresponding path program 1 times [2022-11-18 21:05:28,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:28,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697457096] [2022-11-18 21:05:28,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:28,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:28,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:28,013 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:28,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:28,016 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:05:28,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 21:05:28,017 INFO L85 PathProgramCache]: Analyzing trace with hash -645945734, now seen corresponding path program 1 times [2022-11-18 21:05:28,017 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 21:05:28,017 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991616667] [2022-11-18 21:05:28,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:28,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 21:05:28,038 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 21:05:28,039 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2035203343] [2022-11-18 21:05:28,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 21:05:28,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 21:05:28,039 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 21:05:28,047 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 21:05:28,063 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_81a612b8-209c-44d9-a21b-1b85f2634ff8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-11-18 21:05:28,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:28,342 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 21:05:28,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 21:05:28,696 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 21:08:56,080 WARN L233 SmtUtils]: Spent 3.45m on a formula simplification. DAG size of input: 533 DAG size of output: 391 (called from [L 278] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition)