./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-examples/standard_vararg_ground.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-examples/standard_vararg_ground.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 28ac72543f751666908cbd68a77fa11ffe4dd886016c3996df45b97bb42d5078 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 19:42:35,436 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 19:42:35,438 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 19:42:35,461 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 19:42:35,462 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 19:42:35,463 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 19:42:35,465 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 19:42:35,467 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 19:42:35,471 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 19:42:35,475 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 19:42:35,477 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 19:42:35,479 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 19:42:35,481 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 19:42:35,484 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 19:42:35,486 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 19:42:35,489 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 19:42:35,492 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 19:42:35,497 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 19:42:35,499 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 19:42:35,501 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 19:42:35,511 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 19:42:35,512 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 19:42:35,516 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 19:42:35,516 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 19:42:35,526 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 19:42:35,526 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 19:42:35,526 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 19:42:35,527 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 19:42:35,528 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 19:42:35,529 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 19:42:35,529 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 19:42:35,530 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 19:42:35,531 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 19:42:35,531 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 19:42:35,532 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 19:42:35,533 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 19:42:35,534 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 19:42:35,534 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 19:42:35,534 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 19:42:35,535 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 19:42:35,536 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 19:42:35,543 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 19:42:35,587 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 19:42:35,588 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 19:42:35,588 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 19:42:35,588 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 19:42:35,590 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 19:42:35,590 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 19:42:35,590 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 19:42:35,590 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 19:42:35,591 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 19:42:35,591 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 19:42:35,591 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 19:42:35,591 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 19:42:35,592 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 19:42:35,592 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 19:42:35,592 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 19:42:35,593 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 19:42:35,593 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 19:42:35,593 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 19:42:35,593 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 19:42:35,594 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 19:42:35,596 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 19:42:35,596 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 19:42:35,596 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 19:42:35,597 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 19:42:35,597 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 19:42:35,598 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 19:42:35,598 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 19:42:35,598 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 19:42:35,599 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 19:42:35,599 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 19:42:35,600 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 19:42:35,601 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 19:42:35,601 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 28ac72543f751666908cbd68a77fa11ffe4dd886016c3996df45b97bb42d5078 [2022-11-18 19:42:35,926 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 19:42:35,955 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 19:42:35,958 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 19:42:35,959 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 19:42:35,960 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 19:42:35,961 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/array-examples/standard_vararg_ground.i [2022-11-18 19:42:36,041 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/data/636bdd44a/bea7b6391b524fbc982162c6a221d48c/FLAG751a6113b [2022-11-18 19:42:36,526 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 19:42:36,527 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/sv-benchmarks/c/array-examples/standard_vararg_ground.i [2022-11-18 19:42:36,537 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/data/636bdd44a/bea7b6391b524fbc982162c6a221d48c/FLAG751a6113b [2022-11-18 19:42:36,933 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/data/636bdd44a/bea7b6391b524fbc982162c6a221d48c [2022-11-18 19:42:36,936 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 19:42:36,937 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 19:42:36,944 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 19:42:36,944 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 19:42:36,948 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 19:42:36,949 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:42:36" (1/1) ... [2022-11-18 19:42:36,951 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@18bfa040 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:36, skipping insertion in model container [2022-11-18 19:42:36,951 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:42:36" (1/1) ... [2022-11-18 19:42:36,963 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 19:42:36,981 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 19:42:37,223 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/sv-benchmarks/c/array-examples/standard_vararg_ground.i[815,828] [2022-11-18 19:42:37,242 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:42:37,254 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 19:42:37,273 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/sv-benchmarks/c/array-examples/standard_vararg_ground.i[815,828] [2022-11-18 19:42:37,283 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:42:37,303 INFO L208 MainTranslator]: Completed translation [2022-11-18 19:42:37,305 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37 WrapperNode [2022-11-18 19:42:37,305 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 19:42:37,306 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 19:42:37,306 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 19:42:37,306 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 19:42:37,315 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,322 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,341 INFO L138 Inliner]: procedures = 16, calls = 13, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 54 [2022-11-18 19:42:37,341 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 19:42:37,342 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 19:42:37,342 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 19:42:37,342 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 19:42:37,350 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,350 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,352 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,352 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,356 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,360 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,362 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,363 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,364 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 19:42:37,365 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 19:42:37,365 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 19:42:37,365 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 19:42:37,366 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (1/1) ... [2022-11-18 19:42:37,373 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:37,390 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:37,404 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:37,419 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 19:42:37,446 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 19:42:37,446 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 19:42:37,446 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 19:42:37,447 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 19:42:37,447 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 19:42:37,447 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 19:42:37,447 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 19:42:37,447 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 19:42:37,528 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 19:42:37,530 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 19:42:37,734 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 19:42:37,740 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 19:42:37,742 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-11-18 19:42:37,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:42:37 BoogieIcfgContainer [2022-11-18 19:42:37,744 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 19:42:37,745 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 19:42:37,745 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 19:42:37,750 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 19:42:37,751 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:42:37,751 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 07:42:36" (1/3) ... [2022-11-18 19:42:37,752 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@26ca4d8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:42:37, skipping insertion in model container [2022-11-18 19:42:37,766 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:42:37,766 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:42:37" (2/3) ... [2022-11-18 19:42:37,767 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@26ca4d8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:42:37, skipping insertion in model container [2022-11-18 19:42:37,767 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:42:37,767 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:42:37" (3/3) ... [2022-11-18 19:42:37,769 INFO L332 chiAutomizerObserver]: Analyzing ICFG standard_vararg_ground.i [2022-11-18 19:42:37,872 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 19:42:37,872 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 19:42:37,872 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 19:42:37,872 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 19:42:37,872 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 19:42:37,873 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 19:42:37,873 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 19:42:37,873 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 19:42:37,878 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:37,897 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 9 [2022-11-18 19:42:37,897 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:37,898 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:37,903 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:42:37,903 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:37,904 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 19:42:37,904 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:37,906 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 9 [2022-11-18 19:42:37,906 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:37,906 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:37,907 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:42:37,907 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:37,916 INFO L748 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 14#L20-3true [2022-11-18 19:42:37,916 INFO L750 eck$LassoCheckResult]: Loop: 14#L20-3true assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 15#L20-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 14#L20-3true [2022-11-18 19:42:37,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:37,924 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-18 19:42:37,935 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:37,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085361779] [2022-11-18 19:42:37,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:37,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:38,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:38,131 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:38,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:38,185 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:38,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:38,190 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-18 19:42:38,191 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:38,192 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749685707] [2022-11-18 19:42:38,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:38,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:38,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:38,218 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:38,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:38,240 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:38,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:38,254 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-18 19:42:38,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:38,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378555777] [2022-11-18 19:42:38,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:38,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:38,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:38,278 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:38,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:38,295 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:38,776 INFO L210 LassoAnalysis]: Preferences: [2022-11-18 19:42:38,777 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-18 19:42:38,777 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-18 19:42:38,778 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-18 19:42:38,778 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-18 19:42:38,779 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:38,779 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-18 19:42:38,780 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-18 19:42:38,780 INFO L133 ssoRankerPreferences]: Filename of dumped script: standard_vararg_ground.i_Iteration1_Lasso [2022-11-18 19:42:38,781 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-18 19:42:38,781 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-18 19:42:38,809 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,824 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,828 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,833 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,836 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,842 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,846 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,851 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:38,855 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:39,109 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:39,112 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-18 19:42:39,410 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-18 19:42:39,415 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-18 19:42:39,417 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,417 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,421 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,427 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,438 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-18 19:42:39,442 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,442 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,442 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,442 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,450 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,450 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,464 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,470 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,472 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,476 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,489 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,490 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:39,490 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,490 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,490 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,492 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-18 19:42:39,492 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:39,492 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:39,506 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,514 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,515 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,515 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,517 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,531 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-18 19:42:39,543 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,543 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,544 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,544 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,547 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,547 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,559 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,563 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,563 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,563 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,565 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-18 19:42:39,570 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,583 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,583 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:39,583 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,583 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,583 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,584 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:39,584 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:39,593 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,599 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,601 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,611 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-18 19:42:39,625 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,625 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:39,625 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,625 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,626 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,627 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:39,627 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:39,636 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,645 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,650 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,651 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,652 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,661 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,674 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-18 19:42:39,674 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,675 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,675 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,675 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,678 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,678 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,694 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,698 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,699 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,701 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,714 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-18 19:42:39,715 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,728 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,728 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:39,728 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,728 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,729 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,729 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:39,729 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:39,738 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,743 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,743 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,749 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,755 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-18 19:42:39,768 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,768 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:39,768 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,769 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,769 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,770 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:39,770 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:39,789 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,798 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,799 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,799 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,800 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,809 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,822 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,822 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,822 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,822 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,825 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,825 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,826 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-18 19:42:39,837 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,846 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,846 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,848 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,864 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,874 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-18 19:42:39,876 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,877 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,877 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,877 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,885 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,885 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,899 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,907 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,907 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,909 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,919 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-18 19:42:39,920 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,933 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,933 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,933 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,933 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,943 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,943 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,955 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:39,965 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:39,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:39,965 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:39,970 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:39,974 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:39,986 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:39,987 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:39,987 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:39,987 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:39,990 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:39,990 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:39,991 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-18 19:42:40,002 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,008 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,009 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,010 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,015 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,027 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,028 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,028 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,028 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,028 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-18 19:42:40,031 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:40,031 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:40,042 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,051 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,051 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,051 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,053 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,061 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,074 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,074 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,074 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,074 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,076 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:40,077 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:40,077 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-18 19:42:40,102 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,114 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,116 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,120 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,134 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-18 19:42:40,134 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,135 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,135 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,135 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,139 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:40,139 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:40,151 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,158 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,160 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,162 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-18 19:42:40,168 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,182 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,182 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:40,182 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,182 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,182 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,183 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:40,183 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:40,192 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,202 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,204 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,214 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,228 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-11-18 19:42:40,228 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,228 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,229 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,229 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,236 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:40,237 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:40,248 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,257 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,258 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,258 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,259 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,269 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-11-18 19:42:40,283 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,284 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,284 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,284 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,288 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:40,288 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:40,300 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,306 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,307 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,308 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,318 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-11-18 19:42:40,319 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,332 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,332 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-18 19:42:40,332 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,332 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,332 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,333 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-18 19:42:40,333 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-18 19:42:40,346 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-18 19:42:40,352 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,352 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,352 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,353 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,358 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-11-18 19:42:40,359 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-18 19:42:40,370 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-18 19:42:40,370 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-18 19:42:40,371 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-18 19:42:40,371 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-18 19:42:40,379 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-18 19:42:40,380 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-18 19:42:40,396 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-18 19:42:40,430 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-18 19:42:40,430 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2022-11-18 19:42:40,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:42:40,432 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:40,452 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:42:40,463 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-18 19:42:40,477 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-11-18 19:42:40,492 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-18 19:42:40,492 INFO L513 LassoAnalysis]: Proved termination. [2022-11-18 19:42:40,492 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#aa~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 199999*v_rep(select #length ULTIMATE.start_main_~#aa~0#1.base)_1 Supporting invariants [] [2022-11-18 19:42:40,501 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,519 INFO L156 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2022-11-18 19:42:40,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:40,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:40,570 INFO L263 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 19:42:40,571 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:40,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:40,585 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 19:42:40,586 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:40,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:40,662 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-18 19:42:40,664 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:40,724 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 40 states and 56 transitions. Complement of second has 8 states. [2022-11-18 19:42:40,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-18 19:42:40,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:40,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 35 transitions. [2022-11-18 19:42:40,733 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 35 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-18 19:42:40,734 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 19:42:40,734 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 35 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-18 19:42:40,734 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 19:42:40,734 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 35 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-18 19:42:40,734 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-18 19:42:40,735 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 56 transitions. [2022-11-18 19:42:40,738 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:40,742 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 13 states and 16 transitions. [2022-11-18 19:42:40,743 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:40,743 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2022-11-18 19:42:40,744 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 16 transitions. [2022-11-18 19:42:40,744 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:40,744 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 16 transitions. [2022-11-18 19:42:40,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 16 transitions. [2022-11-18 19:42:40,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 12. [2022-11-18 19:42:40,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.25) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:40,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 15 transitions. [2022-11-18 19:42:40,772 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 15 transitions. [2022-11-18 19:42:40,772 INFO L428 stractBuchiCegarLoop]: Abstraction has 12 states and 15 transitions. [2022-11-18 19:42:40,772 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 19:42:40,772 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 15 transitions. [2022-11-18 19:42:40,773 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:40,773 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:40,773 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:40,773 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2022-11-18 19:42:40,773 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:40,774 INFO L748 eck$LassoCheckResult]: Stem: 117#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 118#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 122#L20-3 assume !(main_~i~0#1 < 100000); 115#L25-2 [2022-11-18 19:42:40,774 INFO L750 eck$LassoCheckResult]: Loop: 115#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 116#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 115#L25-2 [2022-11-18 19:42:40,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:40,774 INFO L85 PathProgramCache]: Analyzing trace with hash 29861, now seen corresponding path program 1 times [2022-11-18 19:42:40,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:40,775 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236674102] [2022-11-18 19:42:40,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:40,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:40,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:40,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:40,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:42:40,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236674102] [2022-11-18 19:42:40,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [236674102] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:42:40,897 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:42:40,897 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 19:42:40,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048148533] [2022-11-18 19:42:40,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:42:40,901 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:42:40,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:40,902 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 1 times [2022-11-18 19:42:40,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:40,902 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905273543] [2022-11-18 19:42:40,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:40,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:40,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:40,908 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:40,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:40,914 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:40,975 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2022-11-18 19:42:40,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:42:40,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:42:40,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:42:40,984 INFO L87 Difference]: Start difference. First operand 12 states and 15 transitions. cyclomatic complexity: 6 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:41,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:42:41,002 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2022-11-18 19:42:41,002 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 15 transitions. [2022-11-18 19:42:41,003 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:41,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 15 transitions. [2022-11-18 19:42:41,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:41,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 19:42:41,010 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 15 transitions. [2022-11-18 19:42:41,010 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:41,010 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 15 transitions. [2022-11-18 19:42:41,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 15 transitions. [2022-11-18 19:42:41,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 12. [2022-11-18 19:42:41,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.1666666666666667) internal successors, (14), 11 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:41,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 14 transitions. [2022-11-18 19:42:41,014 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2022-11-18 19:42:41,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:42:41,015 INFO L428 stractBuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2022-11-18 19:42:41,016 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 19:42:41,016 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 14 transitions. [2022-11-18 19:42:41,017 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:41,017 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:41,017 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:41,018 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2022-11-18 19:42:41,018 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:41,018 INFO L748 eck$LassoCheckResult]: Stem: 148#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 153#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 154#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 155#L20-3 assume !(main_~i~0#1 < 100000); 146#L25-2 [2022-11-18 19:42:41,018 INFO L750 eck$LassoCheckResult]: Loop: 146#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 147#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 146#L25-2 [2022-11-18 19:42:41,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:41,019 INFO L85 PathProgramCache]: Analyzing trace with hash 28698723, now seen corresponding path program 1 times [2022-11-18 19:42:41,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:41,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765664692] [2022-11-18 19:42:41,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:41,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:41,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:41,128 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:41,128 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:42:41,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [765664692] [2022-11-18 19:42:41,129 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [765664692] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:42:41,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1800487670] [2022-11-18 19:42:41,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:41,130 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:42:41,130 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:41,131 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:42:41,135 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-18 19:42:41,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:41,191 INFO L263 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 19:42:41,192 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:41,217 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:41,217 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:42:41,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:41,248 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1800487670] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:42:41,249 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:42:41,249 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-11-18 19:42:41,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490596618] [2022-11-18 19:42:41,250 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:42:41,251 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:42:41,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:41,253 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 2 times [2022-11-18 19:42:41,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:41,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219333446] [2022-11-18 19:42:41,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:41,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:41,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:41,264 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:41,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:41,276 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:41,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:42:41,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 19:42:41,348 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 19:42:41,350 INFO L87 Difference]: Start difference. First operand 12 states and 14 transitions. cyclomatic complexity: 5 Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:41,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:42:41,384 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-11-18 19:42:41,385 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 20 transitions. [2022-11-18 19:42:41,385 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:41,386 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 20 transitions. [2022-11-18 19:42:41,386 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:41,386 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 19:42:41,387 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 20 transitions. [2022-11-18 19:42:41,387 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:41,387 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 20 transitions. [2022-11-18 19:42:41,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 20 transitions. [2022-11-18 19:42:41,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-11-18 19:42:41,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 17 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:41,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2022-11-18 19:42:41,390 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 20 transitions. [2022-11-18 19:42:41,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 19:42:41,391 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 20 transitions. [2022-11-18 19:42:41,391 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 19:42:41,392 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 20 transitions. [2022-11-18 19:42:41,392 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:41,393 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:41,393 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:41,393 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1] [2022-11-18 19:42:41,393 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:41,394 INFO L748 eck$LassoCheckResult]: Stem: 212#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 213#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 217#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 218#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 219#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 220#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 227#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 226#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 225#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 224#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 223#L20-3 assume !(main_~i~0#1 < 100000); 210#L25-2 [2022-11-18 19:42:41,394 INFO L750 eck$LassoCheckResult]: Loop: 210#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 211#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 210#L25-2 [2022-11-18 19:42:41,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:41,395 INFO L85 PathProgramCache]: Analyzing trace with hash -1081477475, now seen corresponding path program 2 times [2022-11-18 19:42:41,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:41,395 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599522163] [2022-11-18 19:42:41,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:41,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:41,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:41,541 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:41,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:42:41,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599522163] [2022-11-18 19:42:41,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599522163] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:42:41,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [791530021] [2022-11-18 19:42:41,542 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 19:42:41,542 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:42:41,543 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:41,544 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:42:41,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-18 19:42:41,630 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 19:42:41,631 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:42:41,632 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 19:42:41,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:41,684 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:41,684 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:42:41,791 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:41,792 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [791530021] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:42:41,792 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:42:41,792 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2022-11-18 19:42:41,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646496288] [2022-11-18 19:42:41,792 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:42:41,794 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:42:41,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:41,794 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 3 times [2022-11-18 19:42:41,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:41,795 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33060664] [2022-11-18 19:42:41,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:41,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:41,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:41,812 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:41,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:41,822 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:41,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:42:41,867 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 19:42:41,868 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-18 19:42:41,868 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. cyclomatic complexity: 5 Second operand has 13 states, 12 states have (on average 2.0) internal successors, (24), 13 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:41,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:42:41,942 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2022-11-18 19:42:41,942 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 32 transitions. [2022-11-18 19:42:41,945 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:41,949 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 30 states and 32 transitions. [2022-11-18 19:42:41,949 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:41,949 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 19:42:41,949 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 32 transitions. [2022-11-18 19:42:41,950 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:41,950 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 32 transitions. [2022-11-18 19:42:41,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 32 transitions. [2022-11-18 19:42:41,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2022-11-18 19:42:41,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.0666666666666667) internal successors, (32), 29 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:41,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 32 transitions. [2022-11-18 19:42:41,962 INFO L240 hiAutomatonCegarLoop]: Abstraction has 30 states and 32 transitions. [2022-11-18 19:42:41,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 19:42:41,963 INFO L428 stractBuchiCegarLoop]: Abstraction has 30 states and 32 transitions. [2022-11-18 19:42:41,964 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 19:42:41,964 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 32 transitions. [2022-11-18 19:42:41,966 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:41,966 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:41,966 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:41,967 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1] [2022-11-18 19:42:41,967 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:41,968 INFO L748 eck$LassoCheckResult]: Stem: 339#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 340#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 341#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 342#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 343#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 344#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 345#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 363#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 362#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 361#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 360#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 359#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 358#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 357#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 356#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 355#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 354#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 353#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 352#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 351#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 350#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 349#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 348#L20-3 assume !(main_~i~0#1 < 100000); 334#L25-2 [2022-11-18 19:42:41,968 INFO L750 eck$LassoCheckResult]: Loop: 334#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 335#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 334#L25-2 [2022-11-18 19:42:41,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:41,969 INFO L85 PathProgramCache]: Analyzing trace with hash 899905681, now seen corresponding path program 3 times [2022-11-18 19:42:41,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:41,969 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911181726] [2022-11-18 19:42:41,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:41,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:42,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:42,399 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:42,399 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:42:42,399 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911181726] [2022-11-18 19:42:42,400 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1911181726] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:42:42,400 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [849088296] [2022-11-18 19:42:42,400 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 19:42:42,400 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:42:42,400 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:42,433 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:42:42,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-18 19:42:42,601 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-18 19:42:42,601 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:42:42,603 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 19:42:42,604 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:42,663 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:42,663 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:42:42,937 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:42,937 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [849088296] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:42:42,937 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:42:42,938 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2022-11-18 19:42:42,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551367721] [2022-11-18 19:42:42,938 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:42:42,938 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:42:42,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:42,939 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 4 times [2022-11-18 19:42:42,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:42,939 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901648688] [2022-11-18 19:42:42,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:42,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:42,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:42,945 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:42,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:42,948 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:42,986 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:42:42,987 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 19:42:42,987 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-11-18 19:42:42,988 INFO L87 Difference]: Start difference. First operand 30 states and 32 transitions. cyclomatic complexity: 5 Second operand has 25 states, 24 states have (on average 2.0) internal successors, (48), 25 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:43,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:42:43,105 INFO L93 Difference]: Finished difference Result 54 states and 56 transitions. [2022-11-18 19:42:43,106 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 54 states and 56 transitions. [2022-11-18 19:42:43,115 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:43,116 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 54 states to 54 states and 56 transitions. [2022-11-18 19:42:43,118 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:43,118 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 19:42:43,118 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 56 transitions. [2022-11-18 19:42:43,119 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:43,119 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 56 transitions. [2022-11-18 19:42:43,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 56 transitions. [2022-11-18 19:42:43,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2022-11-18 19:42:43,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.037037037037037) internal successors, (56), 53 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:43,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 56 transitions. [2022-11-18 19:42:43,126 INFO L240 hiAutomatonCegarLoop]: Abstraction has 54 states and 56 transitions. [2022-11-18 19:42:43,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-18 19:42:43,129 INFO L428 stractBuchiCegarLoop]: Abstraction has 54 states and 56 transitions. [2022-11-18 19:42:43,130 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 19:42:43,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 56 transitions. [2022-11-18 19:42:43,132 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:43,132 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:43,132 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:43,135 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1] [2022-11-18 19:42:43,136 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:43,136 INFO L748 eck$LassoCheckResult]: Stem: 580#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 581#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 585#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 586#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 587#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 588#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 589#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 631#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 630#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 629#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 628#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 627#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 626#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 625#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 624#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 623#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 622#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 621#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 620#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 619#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 618#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 617#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 616#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 615#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 614#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 613#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 612#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 611#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 610#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 609#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 608#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 607#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 606#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 605#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 604#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 603#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 602#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 601#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 600#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 599#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 598#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 597#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 596#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 595#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 594#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 593#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 592#L20-3 assume !(main_~i~0#1 < 100000); 578#L25-2 [2022-11-18 19:42:43,137 INFO L750 eck$LassoCheckResult]: Loop: 578#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 579#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 578#L25-2 [2022-11-18 19:42:43,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:43,137 INFO L85 PathProgramCache]: Analyzing trace with hash -111832455, now seen corresponding path program 4 times [2022-11-18 19:42:43,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:43,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47856497] [2022-11-18 19:42:43,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:43,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:43,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:43,918 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:43,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:42:43,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47856497] [2022-11-18 19:42:43,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47856497] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:42:43,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [189114688] [2022-11-18 19:42:43,918 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 19:42:43,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:42:43,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:43,926 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:42:43,945 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-18 19:42:44,048 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 19:42:44,049 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:42:44,051 INFO L263 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 19:42:44,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:44,176 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:44,176 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:42:45,132 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:45,132 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [189114688] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:42:45,133 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:42:45,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2022-11-18 19:42:45,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409732976] [2022-11-18 19:42:45,133 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:42:45,137 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:42:45,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:45,138 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 5 times [2022-11-18 19:42:45,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:45,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635367672] [2022-11-18 19:42:45,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:45,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:45,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:45,155 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:45,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:45,160 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:45,210 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:42:45,212 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-18 19:42:45,213 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-11-18 19:42:45,216 INFO L87 Difference]: Start difference. First operand 54 states and 56 transitions. cyclomatic complexity: 5 Second operand has 49 states, 48 states have (on average 2.0) internal successors, (96), 49 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:45,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:42:45,452 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2022-11-18 19:42:45,452 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 102 states and 104 transitions. [2022-11-18 19:42:45,457 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:45,457 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 102 states to 102 states and 104 transitions. [2022-11-18 19:42:45,458 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:45,459 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 19:42:45,459 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 104 transitions. [2022-11-18 19:42:45,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:45,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 102 states and 104 transitions. [2022-11-18 19:42:45,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 104 transitions. [2022-11-18 19:42:45,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2022-11-18 19:42:45,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.0196078431372548) internal successors, (104), 101 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:45,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 104 transitions. [2022-11-18 19:42:45,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 102 states and 104 transitions. [2022-11-18 19:42:45,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-18 19:42:45,471 INFO L428 stractBuchiCegarLoop]: Abstraction has 102 states and 104 transitions. [2022-11-18 19:42:45,472 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-18 19:42:45,472 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 104 transitions. [2022-11-18 19:42:45,473 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:45,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:45,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:45,477 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1] [2022-11-18 19:42:45,479 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:45,479 INFO L748 eck$LassoCheckResult]: Stem: 1067#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 1068#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 1069#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1070#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1071#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1072#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1073#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1163#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1162#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1161#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1160#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1159#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1158#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1157#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1156#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1155#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1154#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1153#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1152#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1151#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1150#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1149#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1148#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1147#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1146#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1145#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1144#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1143#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1142#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1141#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1140#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1139#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1138#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1137#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1136#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1135#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1134#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1133#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1132#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1131#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1130#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1129#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1128#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1127#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1126#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1125#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1124#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1123#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1122#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1121#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1120#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1119#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1118#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1117#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1116#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1115#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1114#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1113#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1112#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1111#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1110#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1109#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1108#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1107#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1106#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1105#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1104#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1103#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1102#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1101#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1100#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1099#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1098#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1097#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1096#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1095#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1094#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1093#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1092#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1091#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1090#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1089#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1088#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1087#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1086#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1085#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1084#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1083#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1082#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1081#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1080#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1079#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1078#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1077#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1076#L20-3 assume !(main_~i~0#1 < 100000); 1062#L25-2 [2022-11-18 19:42:45,480 INFO L750 eck$LassoCheckResult]: Loop: 1062#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 1063#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1062#L25-2 [2022-11-18 19:42:45,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:45,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1497227703, now seen corresponding path program 5 times [2022-11-18 19:42:45,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:45,481 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233288829] [2022-11-18 19:42:45,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:45,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:45,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:42:48,256 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:48,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:42:48,256 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233288829] [2022-11-18 19:42:48,256 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1233288829] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:42:48,256 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2133815626] [2022-11-18 19:42:48,256 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 19:42:48,257 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:42:48,257 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:42:48,260 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:42:48,264 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-18 19:42:51,683 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-11-18 19:42:51,683 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:42:51,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-18 19:42:51,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:42:51,927 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:51,928 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:42:55,301 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:42:55,301 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2133815626] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:42:55,302 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:42:55,302 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 96 [2022-11-18 19:42:55,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140156596] [2022-11-18 19:42:55,302 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:42:55,303 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-18 19:42:55,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:55,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 6 times [2022-11-18 19:42:55,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:55,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983162801] [2022-11-18 19:42:55,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:55,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:55,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:55,309 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:42:55,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:42:55,312 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:42:55,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:42:55,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-18 19:42:55,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-11-18 19:42:55,350 INFO L87 Difference]: Start difference. First operand 102 states and 104 transitions. cyclomatic complexity: 5 Second operand has 97 states, 96 states have (on average 2.0) internal successors, (192), 97 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:55,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:42:55,757 INFO L93 Difference]: Finished difference Result 198 states and 200 transitions. [2022-11-18 19:42:55,757 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 198 states and 200 transitions. [2022-11-18 19:42:55,760 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:55,761 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 198 states to 198 states and 200 transitions. [2022-11-18 19:42:55,761 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2022-11-18 19:42:55,761 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2022-11-18 19:42:55,762 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 200 transitions. [2022-11-18 19:42:55,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:42:55,763 INFO L218 hiAutomatonCegarLoop]: Abstraction has 198 states and 200 transitions. [2022-11-18 19:42:55,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 200 transitions. [2022-11-18 19:42:55,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 198. [2022-11-18 19:42:55,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 198 states, 198 states have (on average 1.0101010101010102) internal successors, (200), 197 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:42:55,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 200 transitions. [2022-11-18 19:42:55,773 INFO L240 hiAutomatonCegarLoop]: Abstraction has 198 states and 200 transitions. [2022-11-18 19:42:55,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-11-18 19:42:55,774 INFO L428 stractBuchiCegarLoop]: Abstraction has 198 states and 200 transitions. [2022-11-18 19:42:55,774 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-18 19:42:55,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 198 states and 200 transitions. [2022-11-18 19:42:55,775 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-18 19:42:55,776 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:42:55,776 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:42:55,781 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1] [2022-11-18 19:42:55,782 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-18 19:42:55,782 INFO L748 eck$LassoCheckResult]: Stem: 2028#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 2029#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 2033#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2034#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2035#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2036#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2037#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2223#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2222#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2221#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2220#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2219#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2218#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2217#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2216#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2215#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2214#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2213#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2212#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2211#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2210#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2209#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2208#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2207#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2206#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2205#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2204#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2203#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2202#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2201#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2200#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2199#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2198#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2197#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2196#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2195#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2194#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2193#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2192#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2191#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2190#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2189#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2188#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2187#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2186#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2185#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2184#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2183#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2182#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2181#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2180#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2179#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2178#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2177#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2176#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2175#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2174#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2173#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2172#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2171#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2170#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2169#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2168#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2167#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2166#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2165#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2164#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2163#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2162#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2161#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2160#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2159#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2158#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2157#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2156#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2155#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2154#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2153#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2152#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2151#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2150#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2149#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2148#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2147#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2146#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2145#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2144#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2143#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2142#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2141#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2140#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2139#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2138#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2137#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2136#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2135#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2134#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2133#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2132#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2131#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2130#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2129#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2128#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2127#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2126#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2125#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2124#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2123#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2122#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2121#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2120#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2119#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2118#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2117#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2116#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2115#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2114#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2113#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2112#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2111#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2110#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2109#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2108#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2107#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2106#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2105#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2104#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2103#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2102#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2101#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2100#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2099#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2098#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2097#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2096#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2095#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2094#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2093#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2092#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2091#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2090#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2089#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2088#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2087#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2086#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2085#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2084#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2083#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2082#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2081#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2080#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2079#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2078#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2077#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2076#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2075#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2074#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2073#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2072#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2071#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2070#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2069#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2068#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2067#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2066#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2065#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2064#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2063#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2062#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2061#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2060#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2059#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2058#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2057#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2056#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2055#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2054#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2053#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2052#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2051#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2050#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2049#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2048#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2047#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2046#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2045#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2044#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2043#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2042#L20-3 assume !!(main_~i~0#1 < 100000);call write~int(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2041#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2040#L20-3 assume !(main_~i~0#1 < 100000); 2026#L25-2 [2022-11-18 19:42:55,782 INFO L750 eck$LassoCheckResult]: Loop: 2026#L25-2 call main_#t~mem3#1 := read~int(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 2027#L25 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2026#L25-2 [2022-11-18 19:42:55,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:42:55,783 INFO L85 PathProgramCache]: Analyzing trace with hash 2115802601, now seen corresponding path program 6 times [2022-11-18 19:42:55,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:42:55,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947245798] [2022-11-18 19:42:55,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:42:55,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:42:55,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:43:04,023 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:43:04,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:43:04,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947245798] [2022-11-18 19:43:04,023 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947245798] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:43:04,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1923333576] [2022-11-18 19:43:04,023 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 19:43:04,024 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:43:04,024 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:43:04,026 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:43:04,032 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_df931a48-f3c4-435e-8792-885a4ced7933/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process