./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 94599b38b669e42115f92cee257d9ed4ed5d4777dca7d2ee690bacb4e0d226f0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 19:53:21,917 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 19:53:21,919 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 19:53:21,952 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 19:53:21,952 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 19:53:21,953 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 19:53:21,955 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 19:53:21,957 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 19:53:21,959 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 19:53:21,960 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 19:53:21,961 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 19:53:21,963 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 19:53:21,963 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 19:53:21,965 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 19:53:21,966 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 19:53:21,967 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 19:53:21,971 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 19:53:21,976 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 19:53:21,978 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 19:53:21,980 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 19:53:21,982 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 19:53:21,986 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 19:53:21,988 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 19:53:21,989 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 19:53:21,993 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 19:53:21,993 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 19:53:21,993 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 19:53:21,994 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 19:53:21,995 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 19:53:21,996 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 19:53:21,996 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 19:53:21,997 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 19:53:21,998 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 19:53:22,004 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 19:53:22,005 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 19:53:22,006 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 19:53:22,007 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 19:53:22,007 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 19:53:22,007 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 19:53:22,009 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 19:53:22,010 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 19:53:22,010 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-18 19:53:22,049 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 19:53:22,050 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 19:53:22,050 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 19:53:22,050 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 19:53:22,051 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 19:53:22,051 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 19:53:22,052 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 19:53:22,052 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-18 19:53:22,052 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-18 19:53:22,052 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-18 19:53:22,052 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-18 19:53:22,053 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-18 19:53:22,053 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-18 19:53:22,053 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 19:53:22,053 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 19:53:22,054 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 19:53:22,054 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 19:53:22,054 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 19:53:22,057 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 19:53:22,058 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-18 19:53:22,058 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-18 19:53:22,058 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-18 19:53:22,058 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 19:53:22,060 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 19:53:22,060 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-18 19:53:22,061 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 19:53:22,061 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-18 19:53:22,061 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 19:53:22,062 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 19:53:22,062 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 19:53:22,062 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 19:53:22,064 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-18 19:53:22,064 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 94599b38b669e42115f92cee257d9ed4ed5d4777dca7d2ee690bacb4e0d226f0 [2022-11-18 19:53:22,341 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 19:53:22,367 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 19:53:22,370 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 19:53:22,371 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 19:53:22,373 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 19:53:22,374 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i [2022-11-18 19:53:22,453 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/data/6abc60a96/9a1421b1f4df44f88425014dde5c986b/FLAG2f855788b [2022-11-18 19:53:23,022 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 19:53:23,023 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i [2022-11-18 19:53:23,048 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/data/6abc60a96/9a1421b1f4df44f88425014dde5c986b/FLAG2f855788b [2022-11-18 19:53:23,271 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/data/6abc60a96/9a1421b1f4df44f88425014dde5c986b [2022-11-18 19:53:23,273 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 19:53:23,275 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 19:53:23,276 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 19:53:23,276 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 19:53:23,282 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 19:53:23,283 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:53:23" (1/1) ... [2022-11-18 19:53:23,285 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d83f937 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:23, skipping insertion in model container [2022-11-18 19:53:23,285 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:53:23" (1/1) ... [2022-11-18 19:53:23,292 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 19:53:23,376 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 19:53:23,910 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i[33021,33034] [2022-11-18 19:53:24,115 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i[49681,49694] [2022-11-18 19:53:24,156 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:53:24,168 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 19:53:24,198 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i[33021,33034] [2022-11-18 19:53:24,272 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test5-3.i[49681,49694] [2022-11-18 19:53:24,290 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:53:24,359 INFO L208 MainTranslator]: Completed translation [2022-11-18 19:53:24,359 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24 WrapperNode [2022-11-18 19:53:24,359 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 19:53:24,362 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 19:53:24,362 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 19:53:24,362 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 19:53:24,370 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,432 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,546 INFO L138 Inliner]: procedures = 177, calls = 487, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 1702 [2022-11-18 19:53:24,548 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 19:53:24,549 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 19:53:24,549 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 19:53:24,550 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 19:53:24,559 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,560 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,571 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,572 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,627 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,668 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,677 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,693 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,708 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 19:53:24,719 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 19:53:24,719 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 19:53:24,720 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 19:53:24,721 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (1/1) ... [2022-11-18 19:53:24,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-18 19:53:24,739 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:24,758 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-18 19:53:24,783 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-18 19:53:24,804 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 19:53:24,804 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 19:53:24,805 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-11-18 19:53:24,805 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-11-18 19:53:24,805 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 19:53:24,805 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 19:53:24,805 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-18 19:53:24,806 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 19:53:24,806 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-11-18 19:53:24,806 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-18 19:53:24,807 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 19:53:24,807 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 19:53:24,807 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 19:53:24,807 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 19:53:25,193 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 19:53:25,195 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 19:53:25,199 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 19:53:27,968 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 19:53:27,976 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 19:53:27,977 INFO L300 CfgBuilder]: Removed 100 assume(true) statements. [2022-11-18 19:53:27,979 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:53:27 BoogieIcfgContainer [2022-11-18 19:53:27,979 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 19:53:27,980 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-18 19:53:27,980 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-18 19:53:27,985 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-18 19:53:27,985 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:53:27,986 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 07:53:23" (1/3) ... [2022-11-18 19:53:27,987 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7f247c70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:53:27, skipping insertion in model container [2022-11-18 19:53:27,987 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:53:27,987 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:53:24" (2/3) ... [2022-11-18 19:53:27,988 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7f247c70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 07:53:27, skipping insertion in model container [2022-11-18 19:53:27,988 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-18 19:53:27,988 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:53:27" (3/3) ... [2022-11-18 19:53:27,989 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test5-3.i [2022-11-18 19:53:28,047 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-18 19:53:28,047 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-18 19:53:28,048 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-18 19:53:28,048 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-18 19:53:28,048 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-18 19:53:28,048 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-18 19:53:28,048 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-18 19:53:28,048 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-18 19:53:28,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 302 states, 294 states have (on average 1.6972789115646258) internal successors, (499), 294 states have internal predecessors, (499), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:28,091 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 288 [2022-11-18 19:53:28,091 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:28,091 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:28,099 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:28,099 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-11-18 19:53:28,099 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-18 19:53:28,100 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 302 states, 294 states have (on average 1.6972789115646258) internal successors, (499), 294 states have internal predecessors, (499), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:28,110 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 288 [2022-11-18 19:53:28,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:28,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:28,129 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:28,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-11-18 19:53:28,138 INFO L748 eck$LassoCheckResult]: Stem: 294#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 214#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem100#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~pre103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~post108#1, main_#t~mem112#1, main_#t~mem110#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem111#1, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~post91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~post124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem131#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~ite134#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem139#1, main_#t~mem138#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem143#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~switch150#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc162#1.base, main_#t~malloc162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~memset~res165#1.base, main_#t~memset~res165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~memset~res178#1.base, main_#t~memset~res178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~post189#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~post195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem200#1, main_#t~mem199#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1, main_#t~short203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem216#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem220#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem231#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~pre234#1, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~post239#1, main_#t~mem243#1, main_#t~mem241#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem242#1, main_#t~mem244#1, main_#t~post245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~ite265#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem270#1, main_#t~mem269#1, main_#t~mem271#1, main_#t~mem272#1, main_#t~mem274#1, main_#t~mem273#1, main_#t~mem275#1, main_#t~mem276#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~switch281#1, main_#t~mem282#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1, main_#t~mem304#1, main_#t~short305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~ret307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem312#1, main_#t~mem313#1, main_#t~ite315#1.base, main_#t~ite315#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~short320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem343#1, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~post347#1, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1, main_#t~post358#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~short361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1.base, main_#t~mem372#1.offset, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1.base, main_#t~mem376#1.offset, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem384#1, main_#t~mem382#1.base, main_#t~mem382#1.offset, main_#t~mem383#1, main_#t~mem385#1.base, main_#t~mem385#1.offset, main_#t~mem386#1.base, main_#t~mem386#1.offset, main_#t~mem387#1, main_#t~post388#1, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1.base, main_#t~mem390#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~post399#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 174#L736-3true [2022-11-18 19:53:28,139 INFO L750 eck$LassoCheckResult]: Loop: 174#L736-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 45#L738true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 289#L738-2true call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 52#L743-121true assume !true; 285#L744-120true assume !true; 229#L736-2true main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 174#L736-3true [2022-11-18 19:53:28,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:28,145 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-11-18 19:53:28,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:28,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403918359] [2022-11-18 19:53:28,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:28,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:28,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:28,269 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:28,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:28,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:28,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:28,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1452926973, now seen corresponding path program 1 times [2022-11-18 19:53:28,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:28,354 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26372208] [2022-11-18 19:53:28,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:28,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:28,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:28,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:28,412 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [26372208] [2022-11-18 19:53:28,412 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-11-18 19:53:28,413 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1133629705] [2022-11-18 19:53:28,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:28,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:53:28,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:28,417 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:53:28,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 19:53:28,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:28,602 INFO L263 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-18 19:53:28,604 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:53:28,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:28,624 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 19:53:28,624 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1133629705] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:28,625 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:28,625 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 19:53:28,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871430867] [2022-11-18 19:53:28,627 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:28,631 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:28,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:28,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-18 19:53:28,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 19:53:28,684 INFO L87 Difference]: Start difference. First operand has 302 states, 294 states have (on average 1.6972789115646258) internal successors, (499), 294 states have internal predecessors, (499), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:28,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:28,723 INFO L93 Difference]: Finished difference Result 302 states and 398 transitions. [2022-11-18 19:53:28,724 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 302 states and 398 transitions. [2022-11-18 19:53:28,729 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 288 [2022-11-18 19:53:28,738 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 302 states to 298 states and 394 transitions. [2022-11-18 19:53:28,740 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 298 [2022-11-18 19:53:28,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 298 [2022-11-18 19:53:28,743 INFO L73 IsDeterministic]: Start isDeterministic. Operand 298 states and 394 transitions. [2022-11-18 19:53:28,746 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:28,746 INFO L218 hiAutomatonCegarLoop]: Abstraction has 298 states and 394 transitions. [2022-11-18 19:53:28,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298 states and 394 transitions. [2022-11-18 19:53:28,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298 to 298. [2022-11-18 19:53:28,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 298 states, 291 states have (on average 1.3127147766323024) internal successors, (382), 290 states have internal predecessors, (382), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:28,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 394 transitions. [2022-11-18 19:53:28,789 INFO L240 hiAutomatonCegarLoop]: Abstraction has 298 states and 394 transitions. [2022-11-18 19:53:28,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-18 19:53:28,796 INFO L428 stractBuchiCegarLoop]: Abstraction has 298 states and 394 transitions. [2022-11-18 19:53:28,800 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-18 19:53:28,800 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 298 states and 394 transitions. [2022-11-18 19:53:28,806 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 288 [2022-11-18 19:53:28,806 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:28,806 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:28,808 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:28,814 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:28,814 INFO L748 eck$LassoCheckResult]: Stem: 924#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 903#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem100#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~pre103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~post108#1, main_#t~mem112#1, main_#t~mem110#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem111#1, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~post91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~post124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem131#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~ite134#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem139#1, main_#t~mem138#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem143#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~switch150#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc162#1.base, main_#t~malloc162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~memset~res165#1.base, main_#t~memset~res165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~memset~res178#1.base, main_#t~memset~res178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~post189#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~post195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem200#1, main_#t~mem199#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1, main_#t~short203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem216#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem220#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem231#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~pre234#1, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~post239#1, main_#t~mem243#1, main_#t~mem241#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem242#1, main_#t~mem244#1, main_#t~post245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~ite265#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem270#1, main_#t~mem269#1, main_#t~mem271#1, main_#t~mem272#1, main_#t~mem274#1, main_#t~mem273#1, main_#t~mem275#1, main_#t~mem276#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~switch281#1, main_#t~mem282#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1, main_#t~mem304#1, main_#t~short305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~ret307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem312#1, main_#t~mem313#1, main_#t~ite315#1.base, main_#t~ite315#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~short320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem343#1, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~post347#1, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1, main_#t~post358#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~short361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1.base, main_#t~mem372#1.offset, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1.base, main_#t~mem376#1.offset, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem384#1, main_#t~mem382#1.base, main_#t~mem382#1.offset, main_#t~mem383#1, main_#t~mem385#1.base, main_#t~mem385#1.offset, main_#t~mem386#1.base, main_#t~mem386#1.offset, main_#t~mem387#1, main_#t~post388#1, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1.base, main_#t~mem390#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~post399#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 876#L736-3 [2022-11-18 19:53:28,817 INFO L750 eck$LassoCheckResult]: Loop: 876#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 717#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 718#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 728#L743-121 havoc main_~_ha_hashv~0#1; 729#L743-49 goto; 730#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 731#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 793#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 767#L743-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 768#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 843#L743-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 746#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 701#L743-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 702#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 817#L743-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 818#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 878#L743-22 assume !main_#t~switch19#1; 693#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 694#L743-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 879#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 865#L743-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 663#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 664#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 689#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 783#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 880#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 914#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 899#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 900#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 748#L743-42 havoc main_#t~switch19#1; 749#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 659#L743-44 goto; 660#L743-46 goto; 633#L743-48 goto; 634#L743-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 764#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 788#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 887#L743-66 goto; 708#L743-117 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 778#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem60#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1)));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 779#L743-70 goto; 916#L743-115 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 857#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 813#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 814#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 873#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 825#L743-114 goto; 805#L743-116 goto; 806#L743-118 goto; 860#L743-120 goto; 861#L744-120 havoc main_~_ha_hashv~1#1; 921#L744-48 goto; 919#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 669#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 670#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch150#1 := 11 == main_~_hj_k~1#1; 898#L744-9 assume main_#t~switch150#1;call main_#t~mem151#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem151#1 % 256);havoc main_#t~mem151#1; 747#L744-11 main_#t~switch150#1 := main_#t~switch150#1 || 10 == main_~_hj_k~1#1; 710#L744-12 assume main_#t~switch150#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 711#L744-14 main_#t~switch150#1 := main_#t~switch150#1 || 9 == main_~_hj_k~1#1; 675#L744-15 assume main_#t~switch150#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 631#L744-17 main_#t~switch150#1 := main_#t~switch150#1 || 8 == main_~_hj_k~1#1; 632#L744-18 assume !main_#t~switch150#1; 786#L744-20 main_#t~switch150#1 := main_#t~switch150#1 || 7 == main_~_hj_k~1#1; 787#L744-21 assume main_#t~switch150#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 807#L744-23 main_#t~switch150#1 := main_#t~switch150#1 || 6 == main_~_hj_k~1#1; 850#L744-24 assume main_#t~switch150#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 875#L744-26 main_#t~switch150#1 := main_#t~switch150#1 || 5 == main_~_hj_k~1#1; 684#L744-27 assume main_#t~switch150#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem157#1 % 256;havoc main_#t~mem157#1; 685#L744-29 main_#t~switch150#1 := main_#t~switch150#1 || 4 == main_~_hj_k~1#1; 739#L744-30 assume main_#t~switch150#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 705#L744-32 main_#t~switch150#1 := main_#t~switch150#1 || 3 == main_~_hj_k~1#1; 706#L744-33 assume main_#t~switch150#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 915#L744-35 main_#t~switch150#1 := main_#t~switch150#1 || 2 == main_~_hj_k~1#1; 886#L744-36 assume main_#t~switch150#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 724#L744-38 main_#t~switch150#1 := main_#t~switch150#1 || 1 == main_~_hj_k~1#1; 725#L744-39 assume !main_#t~switch150#1; 892#L744-41 havoc main_#t~switch150#1; 811#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 812#L744-43 goto; 883#L744-45 goto; 871#L744-47 goto; 872#L744-118 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 686#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem179#1.base, main_#t~mem179#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem179#1.base, main_#t~mem179#1.offset; 687#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_#t~mem180#1.base, 16 + main_#t~mem180#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem183#1 := read~int(main_#t~mem182#1.base, 20 + main_#t~mem182#1.offset, 4);call write~$Pointer$(main_#t~mem181#1.base, main_#t~mem181#1.offset - main_#t~mem183#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset;havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1;call main_#t~mem184#1.base, main_#t~mem184#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_#t~mem184#1.base, 16 + main_#t~mem184#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem185#1.base, 8 + main_#t~mem185#1.offset, 4);havoc main_#t~mem184#1.base, main_#t~mem184#1.offset;havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem186#1.base, 16 + main_#t~mem186#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 752#L744-65 goto; 676#L744-116 havoc main_~_ha_bkt~1#1;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1 := read~int(main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);main_#t~post189#1 := main_#t~mem188#1;call write~int(1 + main_#t~post189#1, main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1;havoc main_#t~post189#1; 677#L744-70 call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem191#1 := read~int(main_#t~mem190#1.base, 4 + main_#t~mem190#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem191#1 - 1 then 0 else (if main_~_ha_hashv~1#1 == main_#t~mem191#1 - 1 then main_~_ha_hashv~1#1 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem191#1 - 1)));havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1; 922#L744-69 goto; 923#L744-114 call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_#t~mem192#1.base, main_#t~mem192#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem193#1.base, main_#t~mem193#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;call main_#t~mem194#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post195#1 := main_#t~mem194#1;call write~int(1 + main_#t~post195#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem194#1;havoc main_#t~post195#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem196#1.base, main_#t~mem196#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 627#L744-72 assume main_#t~mem197#1.base != 0 || main_#t~mem197#1.offset != 0;havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem198#1.base, 12 + main_#t~mem198#1.offset, 4);havoc main_#t~mem198#1.base, main_#t~mem198#1.offset; 628#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem199#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short203#1 := main_#t~mem200#1 % 4294967296 >= 10 * (1 + main_#t~mem199#1) % 4294967296; 712#L744-75 assume main_#t~short203#1;call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem202#1 := read~int(main_#t~mem201#1.base, 36 + main_#t~mem201#1.offset, 4);main_#t~short203#1 := 0 == main_#t~mem202#1 % 4294967296; 894#L744-77 assume !main_#t~short203#1;havoc main_#t~mem200#1;havoc main_#t~mem199#1;havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1;havoc main_#t~short203#1; 889#L744-113 goto; 690#L744-115 goto; 661#L744-117 goto; 662#L744-119 goto; 864#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 876#L736-3 [2022-11-18 19:53:28,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:28,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-11-18 19:53:28,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:28,828 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436761746] [2022-11-18 19:53:28,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:28,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:28,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:28,853 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:28,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:28,885 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:28,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:28,886 INFO L85 PathProgramCache]: Analyzing trace with hash 762713345, now seen corresponding path program 1 times [2022-11-18 19:53:28,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:28,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796113456] [2022-11-18 19:53:28,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:28,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:29,208 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 19:53:29,209 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [605272421] [2022-11-18 19:53:29,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:29,209 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:53:29,210 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:29,213 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:53:29,224 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 19:53:30,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:30,635 INFO L263 TraceCheckSpWp]: Trace formula consists of 3594 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 19:53:30,640 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:53:30,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:30,681 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 19:53:30,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:30,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796113456] [2022-11-18 19:53:30,682 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 19:53:30,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [605272421] [2022-11-18 19:53:30,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [605272421] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:30,683 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:30,683 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:30,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1874091990] [2022-11-18 19:53:30,684 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:30,684 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:30,684 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:30,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:30,685 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:30,686 INFO L87 Difference]: Start difference. First operand 298 states and 394 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:30,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:30,822 INFO L93 Difference]: Finished difference Result 319 states and 415 transitions. [2022-11-18 19:53:30,822 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 319 states and 415 transitions. [2022-11-18 19:53:30,826 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 309 [2022-11-18 19:53:30,829 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 319 states to 319 states and 415 transitions. [2022-11-18 19:53:30,829 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 319 [2022-11-18 19:53:30,830 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 319 [2022-11-18 19:53:30,830 INFO L73 IsDeterministic]: Start isDeterministic. Operand 319 states and 415 transitions. [2022-11-18 19:53:30,832 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:30,832 INFO L218 hiAutomatonCegarLoop]: Abstraction has 319 states and 415 transitions. [2022-11-18 19:53:30,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states and 415 transitions. [2022-11-18 19:53:30,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 318. [2022-11-18 19:53:30,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 318 states, 311 states have (on average 1.292604501607717) internal successors, (402), 310 states have internal predecessors, (402), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:30,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 414 transitions. [2022-11-18 19:53:30,848 INFO L240 hiAutomatonCegarLoop]: Abstraction has 318 states and 414 transitions. [2022-11-18 19:53:30,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:30,849 INFO L428 stractBuchiCegarLoop]: Abstraction has 318 states and 414 transitions. [2022-11-18 19:53:30,850 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-18 19:53:30,850 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 318 states and 414 transitions. [2022-11-18 19:53:30,852 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 308 [2022-11-18 19:53:30,854 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:30,854 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:30,858 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:30,859 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:30,859 INFO L748 eck$LassoCheckResult]: Stem: 1842#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1820#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem100#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~pre103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~post108#1, main_#t~mem112#1, main_#t~mem110#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem111#1, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~post91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~post124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem131#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~ite134#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem139#1, main_#t~mem138#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem143#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~switch150#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc162#1.base, main_#t~malloc162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~memset~res165#1.base, main_#t~memset~res165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~memset~res178#1.base, main_#t~memset~res178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~post189#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~post195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem200#1, main_#t~mem199#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1, main_#t~short203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem216#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem220#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem231#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~pre234#1, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~post239#1, main_#t~mem243#1, main_#t~mem241#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem242#1, main_#t~mem244#1, main_#t~post245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~ite265#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem270#1, main_#t~mem269#1, main_#t~mem271#1, main_#t~mem272#1, main_#t~mem274#1, main_#t~mem273#1, main_#t~mem275#1, main_#t~mem276#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~switch281#1, main_#t~mem282#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1, main_#t~mem304#1, main_#t~short305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~ret307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem312#1, main_#t~mem313#1, main_#t~ite315#1.base, main_#t~ite315#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~short320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem343#1, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~post347#1, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1, main_#t~post358#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~short361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1.base, main_#t~mem372#1.offset, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1.base, main_#t~mem376#1.offset, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem384#1, main_#t~mem382#1.base, main_#t~mem382#1.offset, main_#t~mem383#1, main_#t~mem385#1.base, main_#t~mem385#1.offset, main_#t~mem386#1.base, main_#t~mem386#1.offset, main_#t~mem387#1, main_#t~post388#1, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1.base, main_#t~mem390#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~post399#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 1793#L736-3 [2022-11-18 19:53:30,860 INFO L750 eck$LassoCheckResult]: Loop: 1793#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1629#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1630#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 1640#L743-121 havoc main_~_ha_hashv~0#1; 1641#L743-49 goto; 1644#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1645#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1709#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 1682#L743-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 1683#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 1759#L743-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 1760#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 1615#L743-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 1616#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 1733#L743-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 1734#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 1795#L743-22 assume main_#t~switch19#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 1607#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 1608#L743-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 1796#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 1782#L743-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 1577#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 1578#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 1603#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 1697#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 1797#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 1832#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 1815#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 1816#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 1662#L743-42 havoc main_#t~switch19#1; 1663#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1573#L743-44 goto; 1574#L743-46 goto; 1545#L743-48 goto; 1546#L743-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1677#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 1702#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 1803#L743-66 goto; 1622#L743-117 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 1692#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem60#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1)));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 1693#L743-70 goto; 1833#L743-115 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1774#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1727#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 1728#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 1788#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 1741#L743-114 goto; 1721#L743-116 goto; 1722#L743-118 goto; 1777#L743-120 goto; 1778#L744-120 havoc main_~_ha_hashv~1#1; 1839#L744-48 goto; 1837#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 1583#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 1584#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch150#1 := 11 == main_~_hj_k~1#1; 1817#L744-9 assume main_#t~switch150#1;call main_#t~mem151#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem151#1 % 256);havoc main_#t~mem151#1; 1666#L744-11 main_#t~switch150#1 := main_#t~switch150#1 || 10 == main_~_hj_k~1#1; 1624#L744-12 assume main_#t~switch150#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 1625#L744-14 main_#t~switch150#1 := main_#t~switch150#1 || 9 == main_~_hj_k~1#1; 1589#L744-15 assume main_#t~switch150#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 1549#L744-17 main_#t~switch150#1 := main_#t~switch150#1 || 8 == main_~_hj_k~1#1; 1550#L744-18 assume !main_#t~switch150#1; 1703#L744-20 main_#t~switch150#1 := main_#t~switch150#1 || 7 == main_~_hj_k~1#1; 1704#L744-21 assume main_#t~switch150#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 1723#L744-23 main_#t~switch150#1 := main_#t~switch150#1 || 6 == main_~_hj_k~1#1; 1767#L744-24 assume main_#t~switch150#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 1792#L744-26 main_#t~switch150#1 := main_#t~switch150#1 || 5 == main_~_hj_k~1#1; 1598#L744-27 assume main_#t~switch150#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem157#1 % 256;havoc main_#t~mem157#1; 1599#L744-29 main_#t~switch150#1 := main_#t~switch150#1 || 4 == main_~_hj_k~1#1; 1653#L744-30 assume main_#t~switch150#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 1619#L744-32 main_#t~switch150#1 := main_#t~switch150#1 || 3 == main_~_hj_k~1#1; 1620#L744-33 assume main_#t~switch150#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 1834#L744-35 main_#t~switch150#1 := main_#t~switch150#1 || 2 == main_~_hj_k~1#1; 1804#L744-36 assume main_#t~switch150#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 1638#L744-38 main_#t~switch150#1 := main_#t~switch150#1 || 1 == main_~_hj_k~1#1; 1639#L744-39 assume !main_#t~switch150#1; 1809#L744-41 havoc main_#t~switch150#1; 1731#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 1732#L744-43 goto; 1800#L744-45 goto; 1789#L744-47 goto; 1790#L744-118 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 1600#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem179#1.base, main_#t~mem179#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem179#1.base, main_#t~mem179#1.offset; 1601#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_#t~mem180#1.base, 16 + main_#t~mem180#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem183#1 := read~int(main_#t~mem182#1.base, 20 + main_#t~mem182#1.offset, 4);call write~$Pointer$(main_#t~mem181#1.base, main_#t~mem181#1.offset - main_#t~mem183#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset;havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1;call main_#t~mem184#1.base, main_#t~mem184#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_#t~mem184#1.base, 16 + main_#t~mem184#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem185#1.base, 8 + main_#t~mem185#1.offset, 4);havoc main_#t~mem184#1.base, main_#t~mem184#1.offset;havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem186#1.base, 16 + main_#t~mem186#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 1670#L744-65 goto; 1592#L744-116 havoc main_~_ha_bkt~1#1;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1 := read~int(main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);main_#t~post189#1 := main_#t~mem188#1;call write~int(1 + main_#t~post189#1, main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1;havoc main_#t~post189#1; 1593#L744-70 call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem191#1 := read~int(main_#t~mem190#1.base, 4 + main_#t~mem190#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem191#1 - 1 then 0 else (if main_~_ha_hashv~1#1 == main_#t~mem191#1 - 1 then main_~_ha_hashv~1#1 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem191#1 - 1)));havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1; 1840#L744-69 goto; 1841#L744-114 call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_#t~mem192#1.base, main_#t~mem192#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem193#1.base, main_#t~mem193#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;call main_#t~mem194#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post195#1 := main_#t~mem194#1;call write~int(1 + main_#t~post195#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem194#1;havoc main_#t~post195#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem196#1.base, main_#t~mem196#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 1541#L744-72 assume main_#t~mem197#1.base != 0 || main_#t~mem197#1.offset != 0;havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem198#1.base, 12 + main_#t~mem198#1.offset, 4);havoc main_#t~mem198#1.base, main_#t~mem198#1.offset; 1542#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem199#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short203#1 := main_#t~mem200#1 % 4294967296 >= 10 * (1 + main_#t~mem199#1) % 4294967296; 1626#L744-75 assume main_#t~short203#1;call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem202#1 := read~int(main_#t~mem201#1.base, 36 + main_#t~mem201#1.offset, 4);main_#t~short203#1 := 0 == main_#t~mem202#1 % 4294967296; 1811#L744-77 assume !main_#t~short203#1;havoc main_#t~mem200#1;havoc main_#t~mem199#1;havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1;havoc main_#t~short203#1; 1806#L744-113 goto; 1606#L744-115 goto; 1575#L744-117 goto; 1576#L744-119 goto; 1781#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1793#L736-3 [2022-11-18 19:53:30,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:30,861 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-11-18 19:53:30,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:30,861 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005019496] [2022-11-18 19:53:30,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:30,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:30,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:30,893 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:30,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:30,929 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:30,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:30,932 INFO L85 PathProgramCache]: Analyzing trace with hash -804044605, now seen corresponding path program 1 times [2022-11-18 19:53:30,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:30,932 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831431449] [2022-11-18 19:53:30,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:30,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:31,217 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 19:53:31,218 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [315025078] [2022-11-18 19:53:31,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:31,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:53:31,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:31,249 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:53:31,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 19:53:33,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:33,037 INFO L263 TraceCheckSpWp]: Trace formula consists of 3600 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 19:53:33,042 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:53:33,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:33,060 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 19:53:33,060 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:33,061 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831431449] [2022-11-18 19:53:33,061 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 19:53:33,061 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [315025078] [2022-11-18 19:53:33,061 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [315025078] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:33,061 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:33,062 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:53:33,062 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226267102] [2022-11-18 19:53:33,062 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:33,063 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:33,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:33,063 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:53:33,064 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:53:33,064 INFO L87 Difference]: Start difference. First operand 318 states and 414 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:33,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:33,163 INFO L93 Difference]: Finished difference Result 339 states and 435 transitions. [2022-11-18 19:53:33,163 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 339 states and 435 transitions. [2022-11-18 19:53:33,166 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 329 [2022-11-18 19:53:33,168 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 339 states to 339 states and 435 transitions. [2022-11-18 19:53:33,169 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 339 [2022-11-18 19:53:33,169 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 339 [2022-11-18 19:53:33,170 INFO L73 IsDeterministic]: Start isDeterministic. Operand 339 states and 435 transitions. [2022-11-18 19:53:33,171 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:33,171 INFO L218 hiAutomatonCegarLoop]: Abstraction has 339 states and 435 transitions. [2022-11-18 19:53:33,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states and 435 transitions. [2022-11-18 19:53:33,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 338. [2022-11-18 19:53:33,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 338 states, 331 states have (on average 1.2749244712990937) internal successors, (422), 330 states have internal predecessors, (422), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:33,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 434 transitions. [2022-11-18 19:53:33,195 INFO L240 hiAutomatonCegarLoop]: Abstraction has 338 states and 434 transitions. [2022-11-18 19:53:33,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:53:33,207 INFO L428 stractBuchiCegarLoop]: Abstraction has 338 states and 434 transitions. [2022-11-18 19:53:33,207 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-18 19:53:33,208 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 338 states and 434 transitions. [2022-11-18 19:53:33,220 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 328 [2022-11-18 19:53:33,231 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:33,231 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:33,232 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:33,234 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:33,236 INFO L748 eck$LassoCheckResult]: Stem: 2800#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 2776#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem100#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~pre103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~post108#1, main_#t~mem112#1, main_#t~mem110#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem111#1, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~post91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~post124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem131#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~ite134#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem139#1, main_#t~mem138#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem143#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~switch150#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc162#1.base, main_#t~malloc162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~memset~res165#1.base, main_#t~memset~res165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~memset~res178#1.base, main_#t~memset~res178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~post189#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~post195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem200#1, main_#t~mem199#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1, main_#t~short203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem216#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem220#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem231#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~pre234#1, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~post239#1, main_#t~mem243#1, main_#t~mem241#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem242#1, main_#t~mem244#1, main_#t~post245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~ite265#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem270#1, main_#t~mem269#1, main_#t~mem271#1, main_#t~mem272#1, main_#t~mem274#1, main_#t~mem273#1, main_#t~mem275#1, main_#t~mem276#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~switch281#1, main_#t~mem282#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1, main_#t~mem304#1, main_#t~short305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~ret307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem312#1, main_#t~mem313#1, main_#t~ite315#1.base, main_#t~ite315#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~short320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem343#1, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~post347#1, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1, main_#t~post358#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~short361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1.base, main_#t~mem372#1.offset, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1.base, main_#t~mem376#1.offset, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem384#1, main_#t~mem382#1.base, main_#t~mem382#1.offset, main_#t~mem383#1, main_#t~mem385#1.base, main_#t~mem385#1.offset, main_#t~mem386#1.base, main_#t~mem386#1.offset, main_#t~mem387#1, main_#t~post388#1, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1.base, main_#t~mem390#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~post399#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 2746#L736-3 [2022-11-18 19:53:33,237 INFO L750 eck$LassoCheckResult]: Loop: 2746#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2584#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2585#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 2595#L743-121 havoc main_~_ha_hashv~0#1; 2596#L743-49 goto; 2599#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2600#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2663#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 2636#L743-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 2637#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 2713#L743-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 2615#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 2570#L743-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 2571#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 2687#L743-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 2688#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 2801#L743-22 assume main_#t~switch19#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 2802#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 2750#L743-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 2751#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 2735#L743-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 2531#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 2532#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 2558#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 2651#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 2752#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 2789#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 2771#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 2772#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 2616#L743-42 havoc main_#t~switch19#1; 2617#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 2527#L743-44 goto; 2528#L743-46 goto; 2499#L743-48 goto; 2500#L743-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2631#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 2656#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 2758#L743-66 goto; 2577#L743-117 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 2646#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem60#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1)));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 2647#L743-70 goto; 2790#L743-115 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2727#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2681#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 2682#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 2741#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 2695#L743-114 goto; 2675#L743-116 goto; 2676#L743-118 goto; 2730#L743-120 goto; 2731#L744-120 havoc main_~_ha_hashv~1#1; 2797#L744-48 goto; 2795#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 2537#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 2538#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch150#1 := 11 == main_~_hj_k~1#1; 2773#L744-9 assume !main_#t~switch150#1; 2777#L744-11 main_#t~switch150#1 := main_#t~switch150#1 || 10 == main_~_hj_k~1#1; 2831#L744-12 assume main_#t~switch150#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 2580#L744-14 main_#t~switch150#1 := main_#t~switch150#1 || 9 == main_~_hj_k~1#1; 2543#L744-15 assume main_#t~switch150#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 2544#L744-17 main_#t~switch150#1 := main_#t~switch150#1 || 8 == main_~_hj_k~1#1; 2782#L744-18 assume main_#t~switch150#1;call main_#t~mem154#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem154#1 % 256);havoc main_#t~mem154#1; 2657#L744-20 main_#t~switch150#1 := main_#t~switch150#1 || 7 == main_~_hj_k~1#1; 2658#L744-21 assume main_#t~switch150#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 2677#L744-23 main_#t~switch150#1 := main_#t~switch150#1 || 6 == main_~_hj_k~1#1; 2720#L744-24 assume main_#t~switch150#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 2745#L744-26 main_#t~switch150#1 := main_#t~switch150#1 || 5 == main_~_hj_k~1#1; 2553#L744-27 assume main_#t~switch150#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem157#1 % 256;havoc main_#t~mem157#1; 2554#L744-29 main_#t~switch150#1 := main_#t~switch150#1 || 4 == main_~_hj_k~1#1; 2608#L744-30 assume main_#t~switch150#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 2574#L744-32 main_#t~switch150#1 := main_#t~switch150#1 || 3 == main_~_hj_k~1#1; 2575#L744-33 assume main_#t~switch150#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 2791#L744-35 main_#t~switch150#1 := main_#t~switch150#1 || 2 == main_~_hj_k~1#1; 2759#L744-36 assume main_#t~switch150#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 2760#L744-38 main_#t~switch150#1 := main_#t~switch150#1 || 1 == main_~_hj_k~1#1; 2792#L744-39 assume main_#t~switch150#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem161#1 % 256;havoc main_#t~mem161#1; 2765#L744-41 havoc main_#t~switch150#1; 2685#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 2686#L744-43 goto; 2755#L744-45 goto; 2742#L744-47 goto; 2743#L744-118 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 2555#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem179#1.base, main_#t~mem179#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem179#1.base, main_#t~mem179#1.offset; 2556#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_#t~mem180#1.base, 16 + main_#t~mem180#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem183#1 := read~int(main_#t~mem182#1.base, 20 + main_#t~mem182#1.offset, 4);call write~$Pointer$(main_#t~mem181#1.base, main_#t~mem181#1.offset - main_#t~mem183#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset;havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1;call main_#t~mem184#1.base, main_#t~mem184#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_#t~mem184#1.base, 16 + main_#t~mem184#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem185#1.base, 8 + main_#t~mem185#1.offset, 4);havoc main_#t~mem184#1.base, main_#t~mem184#1.offset;havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem186#1.base, 16 + main_#t~mem186#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 2624#L744-65 goto; 2547#L744-116 havoc main_~_ha_bkt~1#1;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1 := read~int(main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);main_#t~post189#1 := main_#t~mem188#1;call write~int(1 + main_#t~post189#1, main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1;havoc main_#t~post189#1; 2548#L744-70 call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem191#1 := read~int(main_#t~mem190#1.base, 4 + main_#t~mem190#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem191#1 - 1 then 0 else (if main_~_ha_hashv~1#1 == main_#t~mem191#1 - 1 then main_~_ha_hashv~1#1 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem191#1 - 1)));havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1; 2798#L744-69 goto; 2799#L744-114 call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_#t~mem192#1.base, main_#t~mem192#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem193#1.base, main_#t~mem193#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;call main_#t~mem194#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post195#1 := main_#t~mem194#1;call write~int(1 + main_#t~post195#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem194#1;havoc main_#t~post195#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem196#1.base, main_#t~mem196#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 2495#L744-72 assume main_#t~mem197#1.base != 0 || main_#t~mem197#1.offset != 0;havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem198#1.base, 12 + main_#t~mem198#1.offset, 4);havoc main_#t~mem198#1.base, main_#t~mem198#1.offset; 2496#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem199#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short203#1 := main_#t~mem200#1 % 4294967296 >= 10 * (1 + main_#t~mem199#1) % 4294967296; 2581#L744-75 assume main_#t~short203#1;call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem202#1 := read~int(main_#t~mem201#1.base, 36 + main_#t~mem201#1.offset, 4);main_#t~short203#1 := 0 == main_#t~mem202#1 % 4294967296; 2767#L744-77 assume !main_#t~short203#1;havoc main_#t~mem200#1;havoc main_#t~mem199#1;havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1;havoc main_#t~short203#1; 2762#L744-113 goto; 2561#L744-115 goto; 2529#L744-117 goto; 2530#L744-119 goto; 2734#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 2746#L736-3 [2022-11-18 19:53:33,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:33,238 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-11-18 19:53:33,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:33,242 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634365656] [2022-11-18 19:53:33,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:33,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:33,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:33,264 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:33,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:33,285 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:33,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:33,286 INFO L85 PathProgramCache]: Analyzing trace with hash -555531071, now seen corresponding path program 1 times [2022-11-18 19:53:33,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:33,287 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659009796] [2022-11-18 19:53:33,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:33,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:33,530 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 19:53:33,530 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1547070337] [2022-11-18 19:53:33,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:33,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:53:33,531 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:33,534 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:53:33,537 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 19:53:35,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:35,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 3606 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 19:53:35,481 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:53:35,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:35,542 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 19:53:35,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:35,543 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659009796] [2022-11-18 19:53:35,543 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 19:53:35,543 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1547070337] [2022-11-18 19:53:35,544 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1547070337] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:35,544 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:35,544 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 19:53:35,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361540637] [2022-11-18 19:53:35,544 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:35,545 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:35,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:35,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:53:35,546 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:53:35,546 INFO L87 Difference]: Start difference. First operand 338 states and 434 transitions. cyclomatic complexity: 100 Second operand has 4 states, 4 states have (on average 24.5) internal successors, (98), 4 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:35,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:35,660 INFO L93 Difference]: Finished difference Result 456 states and 589 transitions. [2022-11-18 19:53:35,660 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 456 states and 589 transitions. [2022-11-18 19:53:35,665 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 436 [2022-11-18 19:53:35,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 456 states to 456 states and 589 transitions. [2022-11-18 19:53:35,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 456 [2022-11-18 19:53:35,669 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 456 [2022-11-18 19:53:35,669 INFO L73 IsDeterministic]: Start isDeterministic. Operand 456 states and 589 transitions. [2022-11-18 19:53:35,677 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:35,677 INFO L218 hiAutomatonCegarLoop]: Abstraction has 456 states and 589 transitions. [2022-11-18 19:53:35,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states and 589 transitions. [2022-11-18 19:53:35,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 324. [2022-11-18 19:53:35,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 317 states have (on average 1.2649842271293374) internal successors, (401), 316 states have internal predecessors, (401), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:35,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 413 transitions. [2022-11-18 19:53:35,719 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 413 transitions. [2022-11-18 19:53:35,719 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:53:35,720 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 413 transitions. [2022-11-18 19:53:35,720 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-18 19:53:35,720 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 413 transitions. [2022-11-18 19:53:35,722 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 314 [2022-11-18 19:53:35,722 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:35,723 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:35,723 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:35,724 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:35,724 INFO L748 eck$LassoCheckResult]: Stem: 3888#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 3866#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem100#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~pre103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~post108#1, main_#t~mem112#1, main_#t~mem110#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem111#1, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~post91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~post124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem131#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~ite134#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem139#1, main_#t~mem138#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem143#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~switch150#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc162#1.base, main_#t~malloc162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~memset~res165#1.base, main_#t~memset~res165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~memset~res178#1.base, main_#t~memset~res178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~post189#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~post195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem200#1, main_#t~mem199#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1, main_#t~short203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem216#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem220#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem231#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~pre234#1, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~post239#1, main_#t~mem243#1, main_#t~mem241#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem242#1, main_#t~mem244#1, main_#t~post245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~ite265#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem270#1, main_#t~mem269#1, main_#t~mem271#1, main_#t~mem272#1, main_#t~mem274#1, main_#t~mem273#1, main_#t~mem275#1, main_#t~mem276#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~switch281#1, main_#t~mem282#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1, main_#t~mem304#1, main_#t~short305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~ret307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem312#1, main_#t~mem313#1, main_#t~ite315#1.base, main_#t~ite315#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~short320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem343#1, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~post347#1, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1, main_#t~post358#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~short361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1.base, main_#t~mem372#1.offset, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1.base, main_#t~mem376#1.offset, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem384#1, main_#t~mem382#1.base, main_#t~mem382#1.offset, main_#t~mem383#1, main_#t~mem385#1.base, main_#t~mem385#1.offset, main_#t~mem386#1.base, main_#t~mem386#1.offset, main_#t~mem387#1, main_#t~post388#1, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1.base, main_#t~mem390#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~post399#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 3839#L736-3 [2022-11-18 19:53:35,724 INFO L750 eck$LassoCheckResult]: Loop: 3839#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3678#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3679#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 3689#L743-121 havoc main_~_ha_hashv~0#1; 3690#L743-49 goto; 3693#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3694#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3756#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 3730#L743-10 assume !main_#t~switch19#1; 3731#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 3806#L743-13 assume !main_#t~switch19#1; 3709#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 3664#L743-16 assume !main_#t~switch19#1; 3665#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 3780#L743-19 assume !main_#t~switch19#1; 3781#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 3841#L743-22 assume !main_#t~switch19#1; 3656#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 3657#L743-25 assume !main_#t~switch19#1; 3842#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 3828#L743-28 assume !main_#t~switch19#1; 3625#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 3626#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 3651#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 3744#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 3843#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 3878#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 3861#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 3862#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 3710#L743-42 havoc main_#t~switch19#1; 3711#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 3621#L743-44 goto; 3622#L743-46 goto; 3593#L743-48 goto; 3594#L743-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3725#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 3749#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 3849#L743-66 goto; 3671#L743-117 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 3739#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem60#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1)));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 3740#L743-70 goto; 3879#L743-115 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3820#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 3774#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 3775#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 3834#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 3788#L743-114 goto; 3768#L743-116 goto; 3769#L743-118 goto; 3823#L743-120 goto; 3824#L744-120 havoc main_~_ha_hashv~1#1; 3885#L744-48 goto; 3883#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 3631#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 3632#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch150#1 := 11 == main_~_hj_k~1#1; 3863#L744-9 assume main_#t~switch150#1;call main_#t~mem151#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem151#1 % 256);havoc main_#t~mem151#1; 3714#L744-11 main_#t~switch150#1 := main_#t~switch150#1 || 10 == main_~_hj_k~1#1; 3673#L744-12 assume main_#t~switch150#1;call main_#t~mem152#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem152#1 % 256);havoc main_#t~mem152#1; 3674#L744-14 main_#t~switch150#1 := main_#t~switch150#1 || 9 == main_~_hj_k~1#1; 3637#L744-15 assume main_#t~switch150#1;call main_#t~mem153#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem153#1 % 256);havoc main_#t~mem153#1; 3597#L744-17 main_#t~switch150#1 := main_#t~switch150#1 || 8 == main_~_hj_k~1#1; 3598#L744-18 assume main_#t~switch150#1;call main_#t~mem154#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem154#1 % 256);havoc main_#t~mem154#1; 3750#L744-20 main_#t~switch150#1 := main_#t~switch150#1 || 7 == main_~_hj_k~1#1; 3751#L744-21 assume main_#t~switch150#1;call main_#t~mem155#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem155#1 % 256);havoc main_#t~mem155#1; 3770#L744-23 main_#t~switch150#1 := main_#t~switch150#1 || 6 == main_~_hj_k~1#1; 3813#L744-24 assume main_#t~switch150#1;call main_#t~mem156#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem156#1 % 256);havoc main_#t~mem156#1; 3838#L744-26 main_#t~switch150#1 := main_#t~switch150#1 || 5 == main_~_hj_k~1#1; 3646#L744-27 assume main_#t~switch150#1;call main_#t~mem157#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem157#1 % 256;havoc main_#t~mem157#1; 3647#L744-29 main_#t~switch150#1 := main_#t~switch150#1 || 4 == main_~_hj_k~1#1; 3702#L744-30 assume main_#t~switch150#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 3668#L744-32 main_#t~switch150#1 := main_#t~switch150#1 || 3 == main_~_hj_k~1#1; 3669#L744-33 assume main_#t~switch150#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 3880#L744-35 main_#t~switch150#1 := main_#t~switch150#1 || 2 == main_~_hj_k~1#1; 3850#L744-36 assume main_#t~switch150#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 3687#L744-38 main_#t~switch150#1 := main_#t~switch150#1 || 1 == main_~_hj_k~1#1; 3688#L744-39 assume main_#t~switch150#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem161#1 % 256;havoc main_#t~mem161#1; 3855#L744-41 havoc main_#t~switch150#1; 3778#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 3779#L744-43 goto; 3846#L744-45 goto; 3835#L744-47 goto; 3836#L744-118 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 3648#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem179#1.base, main_#t~mem179#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem179#1.base, main_#t~mem179#1.offset; 3649#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_#t~mem180#1.base, 16 + main_#t~mem180#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem183#1 := read~int(main_#t~mem182#1.base, 20 + main_#t~mem182#1.offset, 4);call write~$Pointer$(main_#t~mem181#1.base, main_#t~mem181#1.offset - main_#t~mem183#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset;havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1;call main_#t~mem184#1.base, main_#t~mem184#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_#t~mem184#1.base, 16 + main_#t~mem184#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem185#1.base, 8 + main_#t~mem185#1.offset, 4);havoc main_#t~mem184#1.base, main_#t~mem184#1.offset;havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem186#1.base, 16 + main_#t~mem186#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 3718#L744-65 goto; 3640#L744-116 havoc main_~_ha_bkt~1#1;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1 := read~int(main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);main_#t~post189#1 := main_#t~mem188#1;call write~int(1 + main_#t~post189#1, main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1;havoc main_#t~post189#1; 3641#L744-70 call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem191#1 := read~int(main_#t~mem190#1.base, 4 + main_#t~mem190#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem191#1 - 1 then 0 else (if main_~_ha_hashv~1#1 == main_#t~mem191#1 - 1 then main_~_ha_hashv~1#1 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem191#1 - 1)));havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1; 3886#L744-69 goto; 3887#L744-114 call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_#t~mem192#1.base, main_#t~mem192#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem193#1.base, main_#t~mem193#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;call main_#t~mem194#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post195#1 := main_#t~mem194#1;call write~int(1 + main_#t~post195#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem194#1;havoc main_#t~post195#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem196#1.base, main_#t~mem196#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 3589#L744-72 assume main_#t~mem197#1.base != 0 || main_#t~mem197#1.offset != 0;havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem198#1.base, 12 + main_#t~mem198#1.offset, 4);havoc main_#t~mem198#1.base, main_#t~mem198#1.offset; 3590#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem199#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short203#1 := main_#t~mem200#1 % 4294967296 >= 10 * (1 + main_#t~mem199#1) % 4294967296; 3675#L744-75 assume main_#t~short203#1;call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem202#1 := read~int(main_#t~mem201#1.base, 36 + main_#t~mem201#1.offset, 4);main_#t~short203#1 := 0 == main_#t~mem202#1 % 4294967296; 3857#L744-77 assume !main_#t~short203#1;havoc main_#t~mem200#1;havoc main_#t~mem199#1;havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1;havoc main_#t~short203#1; 3852#L744-113 goto; 3655#L744-115 goto; 3623#L744-117 goto; 3624#L744-119 goto; 3827#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3839#L736-3 [2022-11-18 19:53:35,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:35,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2022-11-18 19:53:35,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:35,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500503039] [2022-11-18 19:53:35,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:35,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:35,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:35,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:35,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:35,796 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:35,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:35,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1350184847, now seen corresponding path program 1 times [2022-11-18 19:53:35,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:35,798 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655373976] [2022-11-18 19:53:35,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:35,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:36,099 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 19:53:36,099 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [36614978] [2022-11-18 19:53:36,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:36,100 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:53:36,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:36,109 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:53:36,134 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 19:53:38,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:53:38,271 INFO L263 TraceCheckSpWp]: Trace formula consists of 3570 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 19:53:38,275 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:53:38,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:53:38,308 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 19:53:38,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:53:38,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655373976] [2022-11-18 19:53:38,308 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 19:53:38,309 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [36614978] [2022-11-18 19:53:38,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [36614978] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:53:38,309 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:53:38,309 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 19:53:38,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737358410] [2022-11-18 19:53:38,310 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:53:38,310 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-18 19:53:38,312 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:53:38,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:53:38,313 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:53:38,313 INFO L87 Difference]: Start difference. First operand 324 states and 413 transitions. cyclomatic complexity: 93 Second operand has 4 states, 4 states have (on average 24.5) internal successors, (98), 4 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:53:38,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:53:38,428 INFO L93 Difference]: Finished difference Result 529 states and 674 transitions. [2022-11-18 19:53:38,428 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 529 states and 674 transitions. [2022-11-18 19:53:38,436 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 438 [2022-11-18 19:53:38,440 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 529 states to 529 states and 674 transitions. [2022-11-18 19:53:38,441 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 529 [2022-11-18 19:53:38,442 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 529 [2022-11-18 19:53:38,444 INFO L73 IsDeterministic]: Start isDeterministic. Operand 529 states and 674 transitions. [2022-11-18 19:53:38,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-18 19:53:38,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 529 states and 674 transitions. [2022-11-18 19:53:38,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states and 674 transitions. [2022-11-18 19:53:38,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 310. [2022-11-18 19:53:38,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 310 states, 303 states have (on average 1.2541254125412542) internal successors, (380), 302 states have internal predecessors, (380), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 19:53:38,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310 states to 310 states and 392 transitions. [2022-11-18 19:53:38,458 INFO L240 hiAutomatonCegarLoop]: Abstraction has 310 states and 392 transitions. [2022-11-18 19:53:38,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:53:38,460 INFO L428 stractBuchiCegarLoop]: Abstraction has 310 states and 392 transitions. [2022-11-18 19:53:38,460 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-18 19:53:38,460 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 310 states and 392 transitions. [2022-11-18 19:53:38,462 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 300 [2022-11-18 19:53:38,462 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-18 19:53:38,462 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-18 19:53:38,463 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-18 19:53:38,463 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:53:38,464 INFO L748 eck$LassoCheckResult]: Stem: 5041#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 5020#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem100#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~pre103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~post108#1, main_#t~mem112#1, main_#t~mem110#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem111#1, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~post91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~post124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem131#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~ite134#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem139#1, main_#t~mem138#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem143#1, main_#t~mem142#1, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~switch150#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc162#1.base, main_#t~malloc162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~memset~res165#1.base, main_#t~memset~res165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~memset~res178#1.base, main_#t~memset~res178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~post189#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~post195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem200#1, main_#t~mem199#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1, main_#t~short203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem216#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem220#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem231#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~pre234#1, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~post239#1, main_#t~mem243#1, main_#t~mem241#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem242#1, main_#t~mem244#1, main_#t~post245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~ite265#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post5#1, main_#t~mem270#1, main_#t~mem269#1, main_#t~mem271#1, main_#t~mem272#1, main_#t~mem274#1, main_#t~mem273#1, main_#t~mem275#1, main_#t~mem276#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~switch281#1, main_#t~mem282#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1, main_#t~mem304#1, main_#t~short305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~ret307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem312#1, main_#t~mem313#1, main_#t~ite315#1.base, main_#t~ite315#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~short320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem343#1, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~post347#1, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1, main_#t~post358#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~short361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1.base, main_#t~mem372#1.offset, main_#t~mem373#1.base, main_#t~mem373#1.offset, main_#t~mem374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~mem376#1.base, main_#t~mem376#1.offset, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_#t~mem381#1.base, main_#t~mem381#1.offset, main_#t~mem384#1, main_#t~mem382#1.base, main_#t~mem382#1.offset, main_#t~mem383#1, main_#t~mem385#1.base, main_#t~mem385#1.offset, main_#t~mem386#1.base, main_#t~mem386#1.offset, main_#t~mem387#1, main_#t~post388#1, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1.base, main_#t~mem390#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~post399#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite317#1.base, main_#t~ite317#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~i~0#1, main_~#j~0#1.base, main_~#j~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;call main_~#j~0#1.base, main_~#j~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;main_~i~0#1 := 0; 4993#L736-3 [2022-11-18 19:53:38,464 INFO L750 eck$LassoCheckResult]: Loop: 4993#L736-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 4831#L738 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4832#L738-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 4842#L743-121 havoc main_~_ha_hashv~0#1; 4843#L743-49 goto; 4846#L743-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4847#L743-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4909#L743-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 4883#L743-10 assume !main_#t~switch19#1; 4884#L743-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 4960#L743-13 assume !main_#t~switch19#1; 4862#L743-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 4817#L743-16 assume !main_#t~switch19#1; 4818#L743-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 4933#L743-19 assume !main_#t~switch19#1; 4934#L743-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 4995#L743-22 assume !main_#t~switch19#1; 4809#L743-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 4810#L743-25 assume !main_#t~switch19#1; 4996#L743-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 4982#L743-28 assume !main_#t~switch19#1; 4778#L743-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 4779#L743-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 4804#L743-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 4897#L743-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 4997#L743-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 5031#L743-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 5015#L743-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 5016#L743-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 4863#L743-42 havoc main_#t~switch19#1; 4864#L743-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 4774#L743-44 goto; 4775#L743-46 goto; 4746#L743-48 goto; 4747#L743-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4878#L743-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 4902#L743-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 5003#L743-66 goto; 4824#L743-117 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 4892#L743-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem60#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1)));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 4893#L743-70 goto; 5032#L743-115 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4974#L743-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 4927#L743-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 4928#L743-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 4988#L743-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 4942#L743-114 goto; 4921#L743-116 goto; 4922#L743-118 goto; 4977#L743-120 goto; 4978#L744-120 havoc main_~_ha_hashv~1#1; 5038#L744-48 goto; 5036#L744-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 4784#L744-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 4785#L744-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch150#1 := 11 == main_~_hj_k~1#1; 5017#L744-9 assume !main_#t~switch150#1; 4867#L744-11 main_#t~switch150#1 := main_#t~switch150#1 || 10 == main_~_hj_k~1#1; 4826#L744-12 assume !main_#t~switch150#1; 4827#L744-14 main_#t~switch150#1 := main_#t~switch150#1 || 9 == main_~_hj_k~1#1; 4790#L744-15 assume !main_#t~switch150#1; 4750#L744-17 main_#t~switch150#1 := main_#t~switch150#1 || 8 == main_~_hj_k~1#1; 4751#L744-18 assume !main_#t~switch150#1; 4903#L744-20 main_#t~switch150#1 := main_#t~switch150#1 || 7 == main_~_hj_k~1#1; 4904#L744-21 assume !main_#t~switch150#1; 4923#L744-23 main_#t~switch150#1 := main_#t~switch150#1 || 6 == main_~_hj_k~1#1; 4967#L744-24 assume !main_#t~switch150#1; 4992#L744-26 main_#t~switch150#1 := main_#t~switch150#1 || 5 == main_~_hj_k~1#1; 4799#L744-27 assume !main_#t~switch150#1; 4800#L744-29 main_#t~switch150#1 := main_#t~switch150#1 || 4 == main_~_hj_k~1#1; 4855#L744-30 assume main_#t~switch150#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 4821#L744-32 main_#t~switch150#1 := main_#t~switch150#1 || 3 == main_~_hj_k~1#1; 4822#L744-33 assume main_#t~switch150#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 5033#L744-35 main_#t~switch150#1 := main_#t~switch150#1 || 2 == main_~_hj_k~1#1; 5004#L744-36 assume main_#t~switch150#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 4840#L744-38 main_#t~switch150#1 := main_#t~switch150#1 || 1 == main_~_hj_k~1#1; 4841#L744-39 assume main_#t~switch150#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem161#1 % 256;havoc main_#t~mem161#1; 5009#L744-41 havoc main_#t~switch150#1; 4931#L744-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 4932#L744-43 goto; 5000#L744-45 goto; 4989#L744-47 goto; 4990#L744-118 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 4801#L744-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem179#1.base, main_#t~mem179#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem179#1.base, main_#t~mem179#1.offset; 4802#L744-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem180#1.base, main_#t~mem180#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem181#1.base, main_#t~mem181#1.offset := read~$Pointer$(main_#t~mem180#1.base, 16 + main_#t~mem180#1.offset, 4);call main_#t~mem182#1.base, main_#t~mem182#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem183#1 := read~int(main_#t~mem182#1.base, 20 + main_#t~mem182#1.offset, 4);call write~$Pointer$(main_#t~mem181#1.base, main_#t~mem181#1.offset - main_#t~mem183#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem180#1.base, main_#t~mem180#1.offset;havoc main_#t~mem181#1.base, main_#t~mem181#1.offset;havoc main_#t~mem182#1.base, main_#t~mem182#1.offset;havoc main_#t~mem183#1;call main_#t~mem184#1.base, main_#t~mem184#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem185#1.base, main_#t~mem185#1.offset := read~$Pointer$(main_#t~mem184#1.base, 16 + main_#t~mem184#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem185#1.base, 8 + main_#t~mem185#1.offset, 4);havoc main_#t~mem184#1.base, main_#t~mem184#1.offset;havoc main_#t~mem185#1.base, main_#t~mem185#1.offset;call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem186#1.base, 16 + main_#t~mem186#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 4871#L744-65 goto; 4793#L744-116 havoc main_~_ha_bkt~1#1;call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1 := read~int(main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);main_#t~post189#1 := main_#t~mem188#1;call write~int(1 + main_#t~post189#1, main_#t~mem187#1.base, 12 + main_#t~mem187#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1;havoc main_#t~post189#1; 4794#L744-70 call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem191#1 := read~int(main_#t~mem190#1.base, 4 + main_#t~mem190#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem191#1 - 1 then 0 else (if main_~_ha_hashv~1#1 == main_#t~mem191#1 - 1 then main_~_ha_hashv~1#1 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem191#1 - 1)));havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1; 5039#L744-69 goto; 5040#L744-114 call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_#t~mem192#1.base, main_#t~mem192#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem193#1.base, main_#t~mem193#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;call main_#t~mem194#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post195#1 := main_#t~mem194#1;call write~int(1 + main_#t~post195#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem194#1;havoc main_#t~post195#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem196#1.base, main_#t~mem196#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 4742#L744-72 assume main_#t~mem197#1.base != 0 || main_#t~mem197#1.offset != 0;havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;call main_#t~mem198#1.base, main_#t~mem198#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem198#1.base, 12 + main_#t~mem198#1.offset, 4);havoc main_#t~mem198#1.base, main_#t~mem198#1.offset; 4743#L744-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem200#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem199#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short203#1 := main_#t~mem200#1 % 4294967296 >= 10 * (1 + main_#t~mem199#1) % 4294967296; 4828#L744-75 assume main_#t~short203#1;call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem202#1 := read~int(main_#t~mem201#1.base, 36 + main_#t~mem201#1.offset, 4);main_#t~short203#1 := 0 == main_#t~mem202#1 % 4294967296; 5011#L744-77 assume !main_#t~short203#1;havoc main_#t~mem200#1;havoc main_#t~mem199#1;havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1;havoc main_#t~short203#1; 5006#L744-113 goto; 4808#L744-115 goto; 4776#L744-117 goto; 4777#L744-119 goto; 4981#L736-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 4993#L736-3 [2022-11-18 19:53:38,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:38,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2022-11-18 19:53:38,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:38,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705648410] [2022-11-18 19:53:38,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:38,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:38,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:38,490 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 19:53:38,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 19:53:38,520 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 19:53:38,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:53:38,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1070408063, now seen corresponding path program 1 times [2022-11-18 19:53:38,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:53:38,521 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541726517] [2022-11-18 19:53:38,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:38,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:53:38,765 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 19:53:38,765 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1206619804] [2022-11-18 19:53:38,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:53:38,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:53:38,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:53:38,769 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:53:38,774 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49220de4-d903-46fa-8afc-b96dc71d4ad9/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process