./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/config/AutomizerReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a367fffaabe322cc88315ee22f1c9c69606de0332ddd62ff36608ec1e5019dc8 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:47:05,829 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:47:05,835 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:47:05,876 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:47:05,882 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:47:05,884 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:47:05,886 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:47:05,891 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:47:05,894 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:47:05,895 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:47:05,897 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:47:05,898 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:47:05,900 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:47:05,903 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:47:05,904 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:47:05,906 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:47:05,908 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:47:05,913 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:47:05,915 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:47:05,916 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:47:05,922 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:47:05,923 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:47:05,924 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:47:05,926 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:47:05,931 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:47:05,936 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:47:05,936 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:47:05,937 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:47:05,939 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:47:05,940 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:47:05,940 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:47:05,941 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:47:05,943 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:47:05,945 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:47:05,946 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:47:05,946 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:47:05,947 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:47:05,947 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:47:05,947 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:47:05,948 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:47:05,949 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:47:05,949 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf [2022-11-18 20:47:05,984 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:47:05,985 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:47:05,985 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:47:05,986 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:47:05,987 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 20:47:05,987 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 20:47:05,988 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:47:05,988 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:47:05,988 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:47:05,988 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:47:05,989 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 20:47:05,989 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:47:05,990 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 20:47:05,990 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:47:05,990 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-18 20:47:05,990 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 20:47:05,991 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-18 20:47:05,991 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 20:47:05,991 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:47:05,991 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:47:05,991 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-18 20:47:05,992 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:47:05,992 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:47:05,992 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 20:47:05,992 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:47:05,992 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:47:05,994 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 20:47:05,994 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-18 20:47:05,994 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:47:05,995 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 20:47:05,995 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-18 20:47:05,995 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-18 20:47:05,995 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-18 20:47:05,995 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a367fffaabe322cc88315ee22f1c9c69606de0332ddd62ff36608ec1e5019dc8 [2022-11-18 20:47:06,330 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:47:06,358 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:47:06,361 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:47:06,362 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:47:06,364 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:47:06,366 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c [2022-11-18 20:47:06,445 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/data/ebdf107ef/489e48788fa547909390cedd1f789ba8/FLAGcdbe86483 [2022-11-18 20:47:06,942 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:47:06,943 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c [2022-11-18 20:47:06,952 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/data/ebdf107ef/489e48788fa547909390cedd1f789ba8/FLAGcdbe86483 [2022-11-18 20:47:07,311 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/data/ebdf107ef/489e48788fa547909390cedd1f789ba8 [2022-11-18 20:47:07,314 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:47:07,317 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:47:07,321 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:47:07,321 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:47:07,325 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:47:07,326 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,327 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ffb445a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07, skipping insertion in model container [2022-11-18 20:47:07,327 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,335 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:47:07,349 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:47:07,598 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c[524,537] [2022-11-18 20:47:07,627 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:47:07,638 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:47:07,658 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c[524,537] [2022-11-18 20:47:07,678 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:47:07,700 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:47:07,701 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07 WrapperNode [2022-11-18 20:47:07,701 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:47:07,702 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:47:07,702 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:47:07,702 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:47:07,710 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,717 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,740 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2022-11-18 20:47:07,740 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:47:07,741 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:47:07,742 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:47:07,742 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:47:07,751 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,751 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,761 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,762 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,767 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,778 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,779 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,782 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,783 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:47:07,790 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:47:07,790 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:47:07,790 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:47:07,792 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (1/1) ... [2022-11-18 20:47:07,799 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:47:07,810 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:07,828 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 20:47:07,854 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 20:47:07,873 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:47:07,874 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-18 20:47:07,874 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-18 20:47:07,874 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 20:47:07,874 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:47:07,875 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:47:07,875 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-18 20:47:07,875 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-18 20:47:07,941 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:47:07,943 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:47:08,143 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:47:08,154 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:47:08,155 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 20:47:08,157 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:47:08 BoogieIcfgContainer [2022-11-18 20:47:08,157 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:47:08,161 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 20:47:08,161 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 20:47:08,167 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 20:47:08,167 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:47:07" (1/3) ... [2022-11-18 20:47:08,168 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bad99e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:47:08, skipping insertion in model container [2022-11-18 20:47:08,168 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:47:07" (2/3) ... [2022-11-18 20:47:08,169 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bad99e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:47:08, skipping insertion in model container [2022-11-18 20:47:08,169 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:47:08" (3/3) ... [2022-11-18 20:47:08,171 INFO L112 eAbstractionObserver]: Analyzing ICFG fermat2-ll_unwindbound50.c [2022-11-18 20:47:08,192 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 20:47:08,192 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-18 20:47:08,265 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 20:47:08,273 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@30038be, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 20:47:08,273 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-18 20:47:08,277 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-18 20:47:08,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-18 20:47:08,286 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:08,287 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:08,288 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:08,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:08,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1086166160, now seen corresponding path program 1 times [2022-11-18 20:47:08,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:08,307 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414434919] [2022-11-18 20:47:08,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:08,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:08,421 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:08,422 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [867233175] [2022-11-18 20:47:08,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:08,423 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:08,423 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:08,429 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:08,457 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 20:47:08,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:47:08,515 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-18 20:47:08,520 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:08,545 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 20:47:08,546 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:47:08,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:08,546 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414434919] [2022-11-18 20:47:08,547 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:08,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [867233175] [2022-11-18 20:47:08,548 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [867233175] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:47:08,548 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:47:08,549 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:47:08,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406563335] [2022-11-18 20:47:08,552 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:47:08,557 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-18 20:47:08,557 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:08,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-18 20:47:08,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 20:47:08,603 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:47:08,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:08,641 INFO L93 Difference]: Finished difference Result 47 states and 64 transitions. [2022-11-18 20:47:08,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-18 20:47:08,645 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 18 [2022-11-18 20:47:08,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:08,652 INFO L225 Difference]: With dead ends: 47 [2022-11-18 20:47:08,652 INFO L226 Difference]: Without dead ends: 21 [2022-11-18 20:47:08,656 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 20:47:08,662 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:08,664 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:47:08,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-11-18 20:47:08,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2022-11-18 20:47:08,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:47:08,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2022-11-18 20:47:08,712 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 18 [2022-11-18 20:47:08,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:08,713 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2022-11-18 20:47:08,714 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:47:08,715 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2022-11-18 20:47:08,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-18 20:47:08,717 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:08,717 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:08,727 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:08,922 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:08,923 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:08,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:08,925 INFO L85 PathProgramCache]: Analyzing trace with hash 1345709874, now seen corresponding path program 1 times [2022-11-18 20:47:08,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:08,927 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156142669] [2022-11-18 20:47:08,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:08,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:08,944 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:08,945 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [438353316] [2022-11-18 20:47:08,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:08,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:08,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:08,947 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:08,965 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 20:47:09,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:47:09,035 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:47:09,037 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:09,115 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:09,115 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:47:09,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:09,116 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156142669] [2022-11-18 20:47:09,116 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:09,117 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [438353316] [2022-11-18 20:47:09,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [438353316] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:47:09,117 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:47:09,117 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:47:09,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1025251920] [2022-11-18 20:47:09,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:47:09,119 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:47:09,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:09,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:47:09,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:47:09,120 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:47:09,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:09,139 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2022-11-18 20:47:09,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:47:09,139 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2022-11-18 20:47:09,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:09,140 INFO L225 Difference]: With dead ends: 30 [2022-11-18 20:47:09,141 INFO L226 Difference]: Without dead ends: 23 [2022-11-18 20:47:09,141 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:47:09,142 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 0 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:09,143 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 57 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:47:09,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-11-18 20:47:09,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-11-18 20:47:09,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 16 states have (on average 1.25) internal successors, (20), 17 states have internal predecessors, (20), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:47:09,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-11-18 20:47:09,150 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 19 [2022-11-18 20:47:09,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:09,151 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-11-18 20:47:09,151 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:47:09,152 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-11-18 20:47:09,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-18 20:47:09,152 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:09,153 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:09,163 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-11-18 20:47:09,358 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:09,359 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:09,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:09,359 INFO L85 PathProgramCache]: Analyzing trace with hash 1347497334, now seen corresponding path program 1 times [2022-11-18 20:47:09,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:09,360 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487725906] [2022-11-18 20:47:09,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:09,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:09,372 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:09,373 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [140187894] [2022-11-18 20:47:09,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:09,373 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:09,373 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:09,374 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:09,402 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 20:47:09,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:47:09,471 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-18 20:47:09,474 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:09,874 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 20:47:09,874 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:47:09,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:09,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487725906] [2022-11-18 20:47:09,875 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:09,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [140187894] [2022-11-18 20:47:09,876 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [140187894] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:47:09,876 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:47:09,876 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-18 20:47:09,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1283307615] [2022-11-18 20:47:09,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:47:09,879 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-18 20:47:09,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:09,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-18 20:47:09,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:47:09,881 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:47:12,924 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.81s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-18 20:47:13,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:13,005 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2022-11-18 20:47:13,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 20:47:13,006 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2022-11-18 20:47:13,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:13,007 INFO L225 Difference]: With dead ends: 35 [2022-11-18 20:47:13,007 INFO L226 Difference]: Without dead ends: 33 [2022-11-18 20:47:13,008 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2022-11-18 20:47:13,010 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 21 mSDsluCounter, 63 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:13,011 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 79 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 90 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2022-11-18 20:47:13,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-11-18 20:47:13,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2022-11-18 20:47:13,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-18 20:47:13,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2022-11-18 20:47:13,022 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 39 transitions. Word has length 19 [2022-11-18 20:47:13,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:13,023 INFO L495 AbstractCegarLoop]: Abstraction has 32 states and 39 transitions. [2022-11-18 20:47:13,023 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:47:13,023 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 39 transitions. [2022-11-18 20:47:13,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-11-18 20:47:13,025 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:13,025 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:13,034 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:13,226 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:13,226 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:13,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:13,227 INFO L85 PathProgramCache]: Analyzing trace with hash 1636478750, now seen corresponding path program 1 times [2022-11-18 20:47:13,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:13,228 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509665732] [2022-11-18 20:47:13,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:13,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:13,246 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:13,248 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [295531122] [2022-11-18 20:47:13,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:13,249 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:13,249 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:13,251 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:13,258 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 20:47:13,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:47:13,315 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-18 20:47:13,323 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:13,470 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:13,470 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:47:13,662 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:13,662 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:13,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509665732] [2022-11-18 20:47:13,663 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:13,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [295531122] [2022-11-18 20:47:13,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [295531122] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:47:13,663 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:47:13,663 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 11 [2022-11-18 20:47:13,664 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712866229] [2022-11-18 20:47:13,664 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:47:13,664 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:47:13,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:13,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:47:13,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:47:13,666 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. Second operand has 11 states, 10 states have (on average 2.0) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (4), 3 states have call predecessors, (4), 1 states have call successors, (4) [2022-11-18 20:47:13,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:13,878 INFO L93 Difference]: Finished difference Result 39 states and 45 transitions. [2022-11-18 20:47:13,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 20:47:13,880 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.0) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (4), 3 states have call predecessors, (4), 1 states have call successors, (4) Word has length 25 [2022-11-18 20:47:13,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:13,883 INFO L225 Difference]: With dead ends: 39 [2022-11-18 20:47:13,885 INFO L226 Difference]: Without dead ends: 34 [2022-11-18 20:47:13,886 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:47:13,889 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 29 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:13,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 85 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 57 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:47:13,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-11-18 20:47:13,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 25. [2022-11-18 20:47:13,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 18 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:47:13,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-11-18 20:47:13,912 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 25 [2022-11-18 20:47:13,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:13,913 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-11-18 20:47:13,913 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.0) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (4), 3 states have call predecessors, (4), 1 states have call successors, (4) [2022-11-18 20:47:13,914 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-11-18 20:47:13,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 20:47:13,915 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:13,915 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:13,926 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-11-18 20:47:14,121 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:14,121 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:14,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:14,122 INFO L85 PathProgramCache]: Analyzing trace with hash -126969667, now seen corresponding path program 1 times [2022-11-18 20:47:14,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:14,122 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24611755] [2022-11-18 20:47:14,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:14,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:14,142 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:14,144 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1706149857] [2022-11-18 20:47:14,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:14,144 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:14,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:14,146 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:14,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 20:47:14,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:47:14,207 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:47:14,209 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:14,264 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:14,264 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:47:14,317 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:14,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:14,318 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24611755] [2022-11-18 20:47:14,318 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:14,318 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1706149857] [2022-11-18 20:47:14,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1706149857] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:47:14,319 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:47:14,319 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 8 [2022-11-18 20:47:14,319 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767971023] [2022-11-18 20:47:14,320 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:47:14,320 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-18 20:47:14,320 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:14,321 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-18 20:47:14,321 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:47:14,322 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:47:14,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:14,416 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2022-11-18 20:47:14,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:47:14,417 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) Word has length 28 [2022-11-18 20:47:14,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:14,418 INFO L225 Difference]: With dead ends: 57 [2022-11-18 20:47:14,418 INFO L226 Difference]: Without dead ends: 52 [2022-11-18 20:47:14,419 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:47:14,419 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 39 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:14,420 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 101 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:47:14,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-11-18 20:47:14,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2022-11-18 20:47:14,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 39 states have internal predecessors, (44), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:47:14,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2022-11-18 20:47:14,444 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 28 [2022-11-18 20:47:14,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:14,445 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2022-11-18 20:47:14,445 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:47:14,445 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2022-11-18 20:47:14,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-11-18 20:47:14,447 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:14,447 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:14,458 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:14,653 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:14,653 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:14,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:14,654 INFO L85 PathProgramCache]: Analyzing trace with hash 972990450, now seen corresponding path program 2 times [2022-11-18 20:47:14,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:14,654 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160723259] [2022-11-18 20:47:14,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:14,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:14,668 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:14,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1101385629] [2022-11-18 20:47:14,668 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:47:14,669 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:14,669 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:14,670 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:14,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-18 20:47:14,751 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:47:14,752 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:47:14,753 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-18 20:47:14,756 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:14,892 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 62 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:14,892 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:47:15,081 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-18 20:47:15,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:15,081 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160723259] [2022-11-18 20:47:15,081 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:15,081 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1101385629] [2022-11-18 20:47:15,082 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1101385629] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:47:15,082 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:47:15,082 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 14 [2022-11-18 20:47:15,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274494580] [2022-11-18 20:47:15,083 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:47:15,086 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-18 20:47:15,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:15,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-18 20:47:15,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=111, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:47:15,087 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-11-18 20:47:15,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:15,377 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-11-18 20:47:15,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 20:47:15,378 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) Word has length 55 [2022-11-18 20:47:15,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:15,385 INFO L225 Difference]: With dead ends: 111 [2022-11-18 20:47:15,385 INFO L226 Difference]: Without dead ends: 106 [2022-11-18 20:47:15,386 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 96 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2022-11-18 20:47:15,387 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 111 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 136 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:15,388 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 136 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:47:15,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-11-18 20:47:15,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2022-11-18 20:47:15,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 81 states have (on average 1.1358024691358024) internal successors, (92), 81 states have internal predecessors, (92), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-18 20:47:15,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 117 transitions. [2022-11-18 20:47:15,445 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 117 transitions. Word has length 55 [2022-11-18 20:47:15,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:15,449 INFO L495 AbstractCegarLoop]: Abstraction has 106 states and 117 transitions. [2022-11-18 20:47:15,449 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-11-18 20:47:15,450 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 117 transitions. [2022-11-18 20:47:15,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2022-11-18 20:47:15,451 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:15,452 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:15,457 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:15,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:15,658 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:15,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:15,658 INFO L85 PathProgramCache]: Analyzing trace with hash -1909967598, now seen corresponding path program 3 times [2022-11-18 20:47:15,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:15,659 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123732468] [2022-11-18 20:47:15,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:15,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:15,674 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:15,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1230729040] [2022-11-18 20:47:15,674 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:47:15,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:15,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:15,676 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:15,698 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-18 20:47:17,690 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-18 20:47:17,690 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:47:17,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 269 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-18 20:47:17,698 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:17,942 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 425 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:17,943 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:47:18,272 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2022-11-18 20:47:18,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:18,272 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123732468] [2022-11-18 20:47:18,273 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:18,273 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1230729040] [2022-11-18 20:47:18,273 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1230729040] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:47:18,273 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:47:18,273 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 26 [2022-11-18 20:47:18,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951609159] [2022-11-18 20:47:18,274 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:47:18,274 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-11-18 20:47:18,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:18,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-11-18 20:47:18,276 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=369, Unknown=0, NotChecked=0, Total=650 [2022-11-18 20:47:18,276 INFO L87 Difference]: Start difference. First operand 106 states and 117 transitions. Second operand has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-11-18 20:47:18,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:18,890 INFO L93 Difference]: Finished difference Result 219 states and 253 transitions. [2022-11-18 20:47:18,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-11-18 20:47:18,891 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) Word has length 109 [2022-11-18 20:47:18,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:18,893 INFO L225 Difference]: With dead ends: 219 [2022-11-18 20:47:18,893 INFO L226 Difference]: Without dead ends: 214 [2022-11-18 20:47:18,895 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 192 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=796, Invalid=1366, Unknown=0, NotChecked=0, Total=2162 [2022-11-18 20:47:18,897 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 252 mSDsluCounter, 235 mSDsCounter, 0 mSdLazyCounter, 129 mSolverCounterSat, 75 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 252 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 204 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 75 IncrementalHoareTripleChecker+Valid, 129 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:18,897 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [252 Valid, 278 Invalid, 204 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [75 Valid, 129 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:47:18,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2022-11-18 20:47:18,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2022-11-18 20:47:18,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 165 states have (on average 1.1393939393939394) internal successors, (188), 165 states have internal predecessors, (188), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2022-11-18 20:47:18,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 237 transitions. [2022-11-18 20:47:18,976 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 237 transitions. Word has length 109 [2022-11-18 20:47:18,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:18,978 INFO L495 AbstractCegarLoop]: Abstraction has 214 states and 237 transitions. [2022-11-18 20:47:18,978 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-11-18 20:47:18,979 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 237 transitions. [2022-11-18 20:47:18,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2022-11-18 20:47:18,994 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:18,994 INFO L195 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:19,007 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-11-18 20:47:19,203 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-11-18 20:47:19,203 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:19,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:19,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1216739502, now seen corresponding path program 4 times [2022-11-18 20:47:19,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:19,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [157998745] [2022-11-18 20:47:19,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:19,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:19,226 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:19,226 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1351760588] [2022-11-18 20:47:19,227 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:47:19,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:19,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:19,228 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:19,246 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-18 20:47:19,429 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:47:19,430 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:47:19,434 INFO L263 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-18 20:47:19,439 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:20,114 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 2123 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:20,114 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:47:21,301 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2022-11-18 20:47:21,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:21,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [157998745] [2022-11-18 20:47:21,301 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:21,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1351760588] [2022-11-18 20:47:21,302 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1351760588] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:47:21,302 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:47:21,302 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 26] total 50 [2022-11-18 20:47:21,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812507120] [2022-11-18 20:47:21,303 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:47:21,304 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-18 20:47:21,304 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:21,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-18 20:47:21,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1133, Invalid=1317, Unknown=0, NotChecked=0, Total=2450 [2022-11-18 20:47:21,307 INFO L87 Difference]: Start difference. First operand 214 states and 237 transitions. Second operand has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-11-18 20:47:23,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:23,183 INFO L93 Difference]: Finished difference Result 435 states and 505 transitions. [2022-11-18 20:47:23,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2022-11-18 20:47:23,183 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) Word has length 217 [2022-11-18 20:47:23,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:23,186 INFO L225 Difference]: With dead ends: 435 [2022-11-18 20:47:23,186 INFO L226 Difference]: Without dead ends: 430 [2022-11-18 20:47:23,190 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 477 GetRequests, 384 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1288 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=3316, Invalid=5614, Unknown=0, NotChecked=0, Total=8930 [2022-11-18 20:47:23,191 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 548 mSDsluCounter, 357 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 141 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 548 SdHoareTripleChecker+Valid, 424 SdHoareTripleChecker+Invalid, 419 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 141 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:23,191 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [548 Valid, 424 Invalid, 419 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [141 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 20:47:23,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2022-11-18 20:47:23,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2022-11-18 20:47:23,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 333 states have (on average 1.1411411411411412) internal successors, (380), 333 states have internal predecessors, (380), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2022-11-18 20:47:23,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 477 transitions. [2022-11-18 20:47:23,293 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 477 transitions. Word has length 217 [2022-11-18 20:47:23,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:23,294 INFO L495 AbstractCegarLoop]: Abstraction has 430 states and 477 transitions. [2022-11-18 20:47:23,294 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-11-18 20:47:23,294 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 477 transitions. [2022-11-18 20:47:23,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 434 [2022-11-18 20:47:23,303 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:23,303 INFO L195 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:23,318 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:23,510 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:23,510 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:23,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:23,510 INFO L85 PathProgramCache]: Analyzing trace with hash -623866926, now seen corresponding path program 5 times [2022-11-18 20:47:23,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:23,511 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615765604] [2022-11-18 20:47:23,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:23,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:23,557 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:23,557 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1740932831] [2022-11-18 20:47:23,558 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 20:47:23,558 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:23,558 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:23,562 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:23,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-18 20:47:24,410 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-11-18 20:47:24,411 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:47:24,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 989 conjuncts, 95 conjunts are in the unsatisfiable core [2022-11-18 20:47:24,429 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:47:26,312 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 9407 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 20:47:26,313 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:47:28,177 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2022-11-18 20:47:28,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:47:28,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615765604] [2022-11-18 20:47:28,178 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:47:28,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1740932831] [2022-11-18 20:47:28,178 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1740932831] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:47:28,178 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:47:28,179 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 50] total 54 [2022-11-18 20:47:28,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630805668] [2022-11-18 20:47:28,179 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:47:28,180 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2022-11-18 20:47:28,180 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:47:28,181 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2022-11-18 20:47:28,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1331, Invalid=1531, Unknown=0, NotChecked=0, Total=2862 [2022-11-18 20:47:28,183 INFO L87 Difference]: Start difference. First operand 430 states and 477 transitions. Second operand has 54 states, 54 states have (on average 6.592592592592593) internal successors, (356), 54 states have internal predecessors, (356), 51 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 50 states have call predecessors, (96), 50 states have call successors, (96) [2022-11-18 20:47:30,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:47:30,186 INFO L93 Difference]: Finished difference Result 471 states and 525 transitions. [2022-11-18 20:47:30,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2022-11-18 20:47:30,187 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 6.592592592592593) internal successors, (356), 54 states have internal predecessors, (356), 51 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 50 states have call predecessors, (96), 50 states have call successors, (96) Word has length 433 [2022-11-18 20:47:30,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:47:30,190 INFO L225 Difference]: With dead ends: 471 [2022-11-18 20:47:30,191 INFO L226 Difference]: Without dead ends: 466 [2022-11-18 20:47:30,195 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 913 GetRequests, 768 SyntacticMatches, 44 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2350 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=3926, Invalid=6580, Unknown=0, NotChecked=0, Total=10506 [2022-11-18 20:47:30,196 INFO L413 NwaCegarLoop]: 71 mSDtfsCounter, 368 mSDsluCounter, 390 mSDsCounter, 0 mSdLazyCounter, 319 mSolverCounterSat, 66 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 461 SdHoareTripleChecker+Invalid, 385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 66 IncrementalHoareTripleChecker+Valid, 319 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:47:30,196 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 461 Invalid, 385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [66 Valid, 319 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 20:47:30,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2022-11-18 20:47:30,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 466. [2022-11-18 20:47:30,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 466 states, 361 states have (on average 1.1412742382271468) internal successors, (412), 361 states have internal predecessors, (412), 53 states have call successors, (53), 52 states have call predecessors, (53), 51 states have return successors, (52), 52 states have call predecessors, (52), 52 states have call successors, (52) [2022-11-18 20:47:30,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 466 states to 466 states and 517 transitions. [2022-11-18 20:47:30,297 INFO L78 Accepts]: Start accepts. Automaton has 466 states and 517 transitions. Word has length 433 [2022-11-18 20:47:30,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:47:30,298 INFO L495 AbstractCegarLoop]: Abstraction has 466 states and 517 transitions. [2022-11-18 20:47:30,298 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 6.592592592592593) internal successors, (356), 54 states have internal predecessors, (356), 51 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 50 states have call predecessors, (96), 50 states have call successors, (96) [2022-11-18 20:47:30,299 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 517 transitions. [2022-11-18 20:47:30,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2022-11-18 20:47:30,309 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:47:30,310 INFO L195 NwaCegarLoop]: trace histogram [51, 51, 50, 50, 50, 50, 50, 50, 50, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:30,326 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:30,518 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:30,518 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:47:30,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:47:30,519 INFO L85 PathProgramCache]: Analyzing trace with hash -872711022, now seen corresponding path program 6 times [2022-11-18 20:47:30,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:47:30,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112685408] [2022-11-18 20:47:30,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:47:30,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:47:30,562 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 20:47:30,562 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1262964657] [2022-11-18 20:47:30,562 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 20:47:30,562 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:47:30,562 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:47:30,563 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:47:30,596 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-18 20:48:08,581 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 51 check-sat command(s) [2022-11-18 20:48:08,581 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-18 20:48:08,581 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:48:08,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:48:09,283 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:48:09,284 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-18 20:48:09,285 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-18 20:48:09,306 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:48:09,506 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:48:09,509 INFO L444 BasicCegarLoop]: Path program histogram: [6, 1, 1, 1, 1] [2022-11-18 20:48:09,514 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-18 20:48:09,704 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 08:48:09 BoogieIcfgContainer [2022-11-18 20:48:09,704 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-18 20:48:09,705 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-18 20:48:09,705 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-18 20:48:09,705 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-18 20:48:09,706 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:47:08" (3/4) ... [2022-11-18 20:48:09,708 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-18 20:48:09,881 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/witness.graphml [2022-11-18 20:48:09,881 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-18 20:48:09,882 INFO L158 Benchmark]: Toolchain (without parser) took 62564.76ms. Allocated memory was 132.1MB in the beginning and 169.9MB in the end (delta: 37.7MB). Free memory was 92.1MB in the beginning and 101.8MB in the end (delta: -9.7MB). Peak memory consumption was 29.0MB. Max. memory is 16.1GB. [2022-11-18 20:48:09,882 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 132.1MB. Free memory is still 108.3MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:48:09,883 INFO L158 Benchmark]: CACSL2BoogieTranslator took 380.55ms. Allocated memory is still 132.1MB. Free memory was 91.9MB in the beginning and 105.6MB in the end (delta: -13.7MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-18 20:48:09,883 INFO L158 Benchmark]: Boogie Procedure Inliner took 38.42ms. Allocated memory is still 132.1MB. Free memory was 105.6MB in the beginning and 104.4MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:48:09,883 INFO L158 Benchmark]: Boogie Preprocessor took 47.62ms. Allocated memory is still 132.1MB. Free memory was 104.4MB in the beginning and 102.9MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:48:09,884 INFO L158 Benchmark]: RCFGBuilder took 367.57ms. Allocated memory is still 132.1MB. Free memory was 102.9MB in the beginning and 92.4MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-18 20:48:09,884 INFO L158 Benchmark]: TraceAbstraction took 61543.65ms. Allocated memory was 132.1MB in the beginning and 169.9MB in the end (delta: 37.7MB). Free memory was 91.8MB in the beginning and 117.7MB in the end (delta: -25.9MB). Peak memory consumption was 88.1MB. Max. memory is 16.1GB. [2022-11-18 20:48:09,885 INFO L158 Benchmark]: Witness Printer took 176.64ms. Allocated memory is still 169.9MB. Free memory was 117.7MB in the beginning and 101.8MB in the end (delta: 15.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2022-11-18 20:48:09,887 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 132.1MB. Free memory is still 108.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 380.55ms. Allocated memory is still 132.1MB. Free memory was 91.9MB in the beginning and 105.6MB in the end (delta: -13.7MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 38.42ms. Allocated memory is still 132.1MB. Free memory was 105.6MB in the beginning and 104.4MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 47.62ms. Allocated memory is still 132.1MB. Free memory was 104.4MB in the beginning and 102.9MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 367.57ms. Allocated memory is still 132.1MB. Free memory was 102.9MB in the beginning and 92.4MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 61543.65ms. Allocated memory was 132.1MB in the beginning and 169.9MB in the end (delta: 37.7MB). Free memory was 91.8MB in the beginning and 117.7MB in the end (delta: -25.9MB). Peak memory consumption was 88.1MB. Max. memory is 16.1GB. * Witness Printer took 176.64ms. Allocated memory is still 169.9MB. Free memory was 117.7MB in the beginning and 101.8MB in the end (delta: 15.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 14]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L19] int counter = 0; VAL [counter=0] [L21] int A, R; [L22] long long u, v, r; [L23] A = __VERIFIER_nondet_int() [L24] R = __VERIFIER_nondet_int() [L26] CALL assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, cond=1, counter=0] [L26] RET assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [A=1565003, counter=0, R=1252] [L28] CALL assume_abort_if_not(A % 2 == 1) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, cond=1, counter=0] [L28] RET assume_abort_if_not(A % 2 == 1) VAL [A=1565003, counter=0, R=1252] [L30] u = ((long long) 2 * R) + 1 [L31] v = 1 [L32] r = ((long long) R * R) - A VAL [A=1565003, counter=0, r=2501, R=1252, u=2505, v=1] [L34] EXPR counter++ VAL [A=1565003, counter=1, counter++=0, R=1252, r=2501, u=2505, v=1] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=1] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=1] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=1, R=1252, r=2501, u=2505, v=1] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=1, r=2501, R=1252, u=2505, v=1] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=1, r=2500, R=1252, u=2505, v=3] [L34] EXPR counter++ VAL [A=1565003, counter=2, counter++=1, R=1252, r=2500, u=2505, v=3] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=2] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=2] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=2, r=2500, R=1252, u=2505, v=3] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=2, R=1252, r=2500, u=2505, v=3] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=2, R=1252, r=2497, u=2505, v=5] [L34] EXPR counter++ VAL [A=1565003, counter=3, counter++=2, R=1252, r=2497, u=2505, v=5] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=3] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=3] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=3, R=1252, r=2497, u=2505, v=5] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=3, R=1252, r=2497, u=2505, v=5] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=3, r=2492, R=1252, u=2505, v=7] [L34] EXPR counter++ VAL [A=1565003, counter=4, counter++=3, r=2492, R=1252, u=2505, v=7] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=4] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=4] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=4, r=2492, R=1252, u=2505, v=7] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=4, R=1252, r=2492, u=2505, v=7] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=4, R=1252, r=2485, u=2505, v=9] [L34] EXPR counter++ VAL [A=1565003, counter=5, counter++=4, R=1252, r=2485, u=2505, v=9] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=5] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=5] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=5, r=2485, R=1252, u=2505, v=9] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=5, r=2485, R=1252, u=2505, v=9] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=5, R=1252, r=2476, u=2505, v=11] [L34] EXPR counter++ VAL [A=1565003, counter=6, counter++=5, R=1252, r=2476, u=2505, v=11] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=6] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=6] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=6, r=2476, R=1252, u=2505, v=11] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=6, r=2476, R=1252, u=2505, v=11] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=6, r=2465, R=1252, u=2505, v=13] [L34] EXPR counter++ VAL [A=1565003, counter=7, counter++=6, R=1252, r=2465, u=2505, v=13] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=7] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=7] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=7, R=1252, r=2465, u=2505, v=13] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=7, r=2465, R=1252, u=2505, v=13] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=7, R=1252, r=2452, u=2505, v=15] [L34] EXPR counter++ VAL [A=1565003, counter=8, counter++=7, R=1252, r=2452, u=2505, v=15] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=8] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=8] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=8, R=1252, r=2452, u=2505, v=15] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=8, r=2452, R=1252, u=2505, v=15] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=8, R=1252, r=2437, u=2505, v=17] [L34] EXPR counter++ VAL [A=1565003, counter=9, counter++=8, r=2437, R=1252, u=2505, v=17] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=9] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=9] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=9, r=2437, R=1252, u=2505, v=17] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=9, R=1252, r=2437, u=2505, v=17] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=9, r=2420, R=1252, u=2505, v=19] [L34] EXPR counter++ VAL [A=1565003, counter=10, counter++=9, r=2420, R=1252, u=2505, v=19] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=10] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=10] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=10, R=1252, r=2420, u=2505, v=19] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=10, r=2420, R=1252, u=2505, v=19] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=10, R=1252, r=2401, u=2505, v=21] [L34] EXPR counter++ VAL [A=1565003, counter=11, counter++=10, R=1252, r=2401, u=2505, v=21] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=11] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=11] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=11, R=1252, r=2401, u=2505, v=21] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=11, R=1252, r=2401, u=2505, v=21] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=11, R=1252, r=2380, u=2505, v=23] [L34] EXPR counter++ VAL [A=1565003, counter=12, counter++=11, r=2380, R=1252, u=2505, v=23] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=12] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=12] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=12, R=1252, r=2380, u=2505, v=23] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=12, r=2380, R=1252, u=2505, v=23] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=12, r=2357, R=1252, u=2505, v=25] [L34] EXPR counter++ VAL [A=1565003, counter=13, counter++=12, R=1252, r=2357, u=2505, v=25] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=13] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=13] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=13, r=2357, R=1252, u=2505, v=25] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=13, r=2357, R=1252, u=2505, v=25] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=13, R=1252, r=2332, u=2505, v=27] [L34] EXPR counter++ VAL [A=1565003, counter=14, counter++=13, R=1252, r=2332, u=2505, v=27] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=14] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=14] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=14, r=2332, R=1252, u=2505, v=27] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=14, R=1252, r=2332, u=2505, v=27] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=14, r=2305, R=1252, u=2505, v=29] [L34] EXPR counter++ VAL [A=1565003, counter=15, counter++=14, R=1252, r=2305, u=2505, v=29] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=15] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=15] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=15, R=1252, r=2305, u=2505, v=29] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=15, r=2305, R=1252, u=2505, v=29] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=15, r=2276, R=1252, u=2505, v=31] [L34] EXPR counter++ VAL [A=1565003, counter=16, counter++=15, R=1252, r=2276, u=2505, v=31] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=16] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=16] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=16, r=2276, R=1252, u=2505, v=31] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=16, R=1252, r=2276, u=2505, v=31] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=16, R=1252, r=2245, u=2505, v=33] [L34] EXPR counter++ VAL [A=1565003, counter=17, counter++=16, r=2245, R=1252, u=2505, v=33] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=17] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=17] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=17, r=2245, R=1252, u=2505, v=33] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=17, R=1252, r=2245, u=2505, v=33] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=17, r=2212, R=1252, u=2505, v=35] [L34] EXPR counter++ VAL [A=1565003, counter=18, counter++=17, r=2212, R=1252, u=2505, v=35] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=18] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=18] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=18, r=2212, R=1252, u=2505, v=35] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=18, R=1252, r=2212, u=2505, v=35] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=18, r=2177, R=1252, u=2505, v=37] [L34] EXPR counter++ VAL [A=1565003, counter=19, counter++=18, r=2177, R=1252, u=2505, v=37] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=19] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=19] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=19, r=2177, R=1252, u=2505, v=37] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=19, r=2177, R=1252, u=2505, v=37] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=19, R=1252, r=2140, u=2505, v=39] [L34] EXPR counter++ VAL [A=1565003, counter=20, counter++=19, r=2140, R=1252, u=2505, v=39] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=20] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=20] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=20, R=1252, r=2140, u=2505, v=39] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=20, R=1252, r=2140, u=2505, v=39] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=20, R=1252, r=2101, u=2505, v=41] [L34] EXPR counter++ VAL [A=1565003, counter=21, counter++=20, R=1252, r=2101, u=2505, v=41] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=21] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=21] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=21, R=1252, r=2101, u=2505, v=41] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=21, r=2101, R=1252, u=2505, v=41] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=21, r=2060, R=1252, u=2505, v=43] [L34] EXPR counter++ VAL [A=1565003, counter=22, counter++=21, R=1252, r=2060, u=2505, v=43] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=22] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=22] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=22, R=1252, r=2060, u=2505, v=43] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=22, R=1252, r=2060, u=2505, v=43] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=22, r=2017, R=1252, u=2505, v=45] [L34] EXPR counter++ VAL [A=1565003, counter=23, counter++=22, r=2017, R=1252, u=2505, v=45] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=23] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=23] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=23, R=1252, r=2017, u=2505, v=45] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=23, R=1252, r=2017, u=2505, v=45] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=23, r=1972, R=1252, u=2505, v=47] [L34] EXPR counter++ VAL [A=1565003, counter=24, counter++=23, R=1252, r=1972, u=2505, v=47] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=24] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=24] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=24, R=1252, r=1972, u=2505, v=47] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=24, R=1252, r=1972, u=2505, v=47] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=24, R=1252, r=1925, u=2505, v=49] [L34] EXPR counter++ VAL [A=1565003, counter=25, counter++=24, R=1252, r=1925, u=2505, v=49] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=25] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=25] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=25, r=1925, R=1252, u=2505, v=49] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=25, r=1925, R=1252, u=2505, v=49] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=25, R=1252, r=1876, u=2505, v=51] [L34] EXPR counter++ VAL [A=1565003, counter=26, counter++=25, r=1876, R=1252, u=2505, v=51] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=26] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=26] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=26, R=1252, r=1876, u=2505, v=51] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=26, r=1876, R=1252, u=2505, v=51] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=26, r=1825, R=1252, u=2505, v=53] [L34] EXPR counter++ VAL [A=1565003, counter=27, counter++=26, R=1252, r=1825, u=2505, v=53] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=27] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=27] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=27, r=1825, R=1252, u=2505, v=53] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=27, R=1252, r=1825, u=2505, v=53] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=27, r=1772, R=1252, u=2505, v=55] [L34] EXPR counter++ VAL [A=1565003, counter=28, counter++=27, R=1252, r=1772, u=2505, v=55] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=28] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=28] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=28, r=1772, R=1252, u=2505, v=55] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=28, R=1252, r=1772, u=2505, v=55] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=28, R=1252, r=1717, u=2505, v=57] [L34] EXPR counter++ VAL [A=1565003, counter=29, counter++=28, r=1717, R=1252, u=2505, v=57] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=29] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=29] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=29, r=1717, R=1252, u=2505, v=57] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=29, r=1717, R=1252, u=2505, v=57] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=29, R=1252, r=1660, u=2505, v=59] [L34] EXPR counter++ VAL [A=1565003, counter=30, counter++=29, R=1252, r=1660, u=2505, v=59] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=30] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=30] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=30, R=1252, r=1660, u=2505, v=59] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=30, r=1660, R=1252, u=2505, v=59] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=30, R=1252, r=1601, u=2505, v=61] [L34] EXPR counter++ VAL [A=1565003, counter=31, counter++=30, R=1252, r=1601, u=2505, v=61] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=31] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=31] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=31, r=1601, R=1252, u=2505, v=61] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=31, r=1601, R=1252, u=2505, v=61] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=31, R=1252, r=1540, u=2505, v=63] [L34] EXPR counter++ VAL [A=1565003, counter=32, counter++=31, r=1540, R=1252, u=2505, v=63] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=32] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=32] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=32, r=1540, R=1252, u=2505, v=63] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=32, R=1252, r=1540, u=2505, v=63] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=32, R=1252, r=1477, u=2505, v=65] [L34] EXPR counter++ VAL [A=1565003, counter=33, counter++=32, R=1252, r=1477, u=2505, v=65] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=33] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=33] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=33, R=1252, r=1477, u=2505, v=65] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=33, r=1477, R=1252, u=2505, v=65] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=33, r=1412, R=1252, u=2505, v=67] [L34] EXPR counter++ VAL [A=1565003, counter=34, counter++=33, r=1412, R=1252, u=2505, v=67] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=34] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=34] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=34, R=1252, r=1412, u=2505, v=67] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=34, R=1252, r=1412, u=2505, v=67] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=34, R=1252, r=1345, u=2505, v=69] [L34] EXPR counter++ VAL [A=1565003, counter=35, counter++=34, r=1345, R=1252, u=2505, v=69] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=35] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=35] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=35, R=1252, r=1345, u=2505, v=69] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=35, r=1345, R=1252, u=2505, v=69] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=35, r=1276, R=1252, u=2505, v=71] [L34] EXPR counter++ VAL [A=1565003, counter=36, counter++=35, R=1252, r=1276, u=2505, v=71] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=36] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=36] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=36, R=1252, r=1276, u=2505, v=71] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=36, R=1252, r=1276, u=2505, v=71] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=36, R=1252, r=1205, u=2505, v=73] [L34] EXPR counter++ VAL [A=1565003, counter=37, counter++=36, R=1252, r=1205, u=2505, v=73] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=37] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=37] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=37, R=1252, r=1205, u=2505, v=73] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=37, r=1205, R=1252, u=2505, v=73] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=37, R=1252, r=1132, u=2505, v=75] [L34] EXPR counter++ VAL [A=1565003, counter=38, counter++=37, R=1252, r=1132, u=2505, v=75] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=38] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=38] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=38, R=1252, r=1132, u=2505, v=75] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=38, r=1132, R=1252, u=2505, v=75] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=38, r=1057, R=1252, u=2505, v=77] [L34] EXPR counter++ VAL [A=1565003, counter=39, counter++=38, R=1252, r=1057, u=2505, v=77] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=39] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=39] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=39, R=1252, r=1057, u=2505, v=77] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=39, r=1057, R=1252, u=2505, v=77] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=39, r=980, R=1252, u=2505, v=79] [L34] EXPR counter++ VAL [A=1565003, counter=40, counter++=39, r=980, R=1252, u=2505, v=79] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=40] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=40] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=40, r=980, R=1252, u=2505, v=79] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=40, r=980, R=1252, u=2505, v=79] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=40, r=901, R=1252, u=2505, v=81] [L34] EXPR counter++ VAL [A=1565003, counter=41, counter++=40, r=901, R=1252, u=2505, v=81] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=41] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=41] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=41, r=901, R=1252, u=2505, v=81] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=41, R=1252, r=901, u=2505, v=81] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=41, r=820, R=1252, u=2505, v=83] [L34] EXPR counter++ VAL [A=1565003, counter=42, counter++=41, r=820, R=1252, u=2505, v=83] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=42] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=42] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=42, r=820, R=1252, u=2505, v=83] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=42, R=1252, r=820, u=2505, v=83] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=42, R=1252, r=737, u=2505, v=85] [L34] EXPR counter++ VAL [A=1565003, counter=43, counter++=42, r=737, R=1252, u=2505, v=85] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=43] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=43] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=43, r=737, R=1252, u=2505, v=85] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=43, r=737, R=1252, u=2505, v=85] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=43, r=652, R=1252, u=2505, v=87] [L34] EXPR counter++ VAL [A=1565003, counter=44, counter++=43, r=652, R=1252, u=2505, v=87] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=44] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=44] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=44, r=652, R=1252, u=2505, v=87] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=44, R=1252, r=652, u=2505, v=87] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=44, r=565, R=1252, u=2505, v=89] [L34] EXPR counter++ VAL [A=1565003, counter=45, counter++=44, R=1252, r=565, u=2505, v=89] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=45] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=45] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=45, R=1252, r=565, u=2505, v=89] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=45, r=565, R=1252, u=2505, v=89] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=45, r=476, R=1252, u=2505, v=91] [L34] EXPR counter++ VAL [A=1565003, counter=46, counter++=45, r=476, R=1252, u=2505, v=91] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=46] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=46] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=46, r=476, R=1252, u=2505, v=91] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=46, R=1252, r=476, u=2505, v=91] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=46, R=1252, r=385, u=2505, v=93] [L34] EXPR counter++ VAL [A=1565003, counter=47, counter++=46, r=385, R=1252, u=2505, v=93] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=47] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=47] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=47, r=385, R=1252, u=2505, v=93] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=47, r=385, R=1252, u=2505, v=93] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=47, r=292, R=1252, u=2505, v=95] [L34] EXPR counter++ VAL [A=1565003, counter=48, counter++=47, r=292, R=1252, u=2505, v=95] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=48] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=48] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=48, R=1252, r=292, u=2505, v=95] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=48, r=292, R=1252, u=2505, v=95] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=48, r=197, R=1252, u=2505, v=97] [L34] EXPR counter++ VAL [A=1565003, counter=49, counter++=48, R=1252, r=197, u=2505, v=97] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=49] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=49] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=49, r=197, R=1252, u=2505, v=97] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=49, r=197, R=1252, u=2505, v=97] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=49, r=100, R=1252, u=2505, v=99] [L34] EXPR counter++ VAL [A=1565003, counter=50, counter++=49, R=1252, r=100, u=2505, v=99] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=50] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=50] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=50, r=100, R=1252, u=2505, v=99] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=50, R=1252, r=100, u=2505, v=99] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=50, r=1, R=1252, u=2505, v=101] [L34] EXPR counter++ VAL [A=1565003, counter=51, counter++=50, r=1, R=1252, u=2505, v=101] [L34] COND FALSE !(counter++<50) [L48] CALL __VERIFIER_assert(((long long) 4*A) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=0, counter=51] [L12] COND TRUE !(cond) VAL [\old(cond)=0, cond=0, counter=51] [L14] reach_error() VAL [\old(cond)=0, cond=0, counter=51] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 25 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 61.3s, OverallIterations: 10, TraceHistogramMax: 51, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.1s, AutomataDifference: 8.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1370 SdHoareTripleChecker+Valid, 4.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1368 mSDsluCounter, 1650 SdHoareTripleChecker+Invalid, 4.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1328 mSDsCounter, 350 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 958 IncrementalHoareTripleChecker+Invalid, 1308 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 350 mSolverCounterUnsat, 322 mSDtfsCounter, 958 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1907 GetRequests, 1572 SyntacticMatches, 44 SemanticMatches, 291 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4003 ImplicationChecksByTransitivity, 6.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=466occurred in iteration=9, InterpolantAutomatonStates: 296, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 9 MinimizatonAttempts, 10 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 41.0s SatisfiabilityAnalysisTime, 7.5s InterpolantComputationTime, 1392 NumberOfCodeBlocks, 1392 NumberOfCodeBlocksAsserted, 118 NumberOfCheckSat, 1775 ConstructedInterpolants, 0 QuantifiedInterpolants, 4553 SizeOfPredicates, 93 NumberOfNonLiveVariables, 2288 ConjunctsInSsa, 215 ConjunctsInUnsatCore, 15 InterpolantComputations, 3 PerfectInterpolantSequences, 5662/24434 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-18 20:48:09,932 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56becaf4-2232-4bc8-8b47-8ca0d77aeb50/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE