./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound50.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/config/AutomizerReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound50.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7aff0c23635f1e1acd85672a1024d6cb6d0af57cad0028c56f5d301198b4eae6 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 18:49:03,971 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 18:49:03,973 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 18:49:03,998 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 18:49:03,998 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 18:49:03,999 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 18:49:04,001 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 18:49:04,002 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 18:49:04,004 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 18:49:04,005 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 18:49:04,006 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 18:49:04,007 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 18:49:04,008 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 18:49:04,009 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 18:49:04,010 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 18:49:04,012 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 18:49:04,012 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 18:49:04,013 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 18:49:04,015 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 18:49:04,017 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 18:49:04,019 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 18:49:04,020 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 18:49:04,021 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 18:49:04,022 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 18:49:04,026 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 18:49:04,026 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 18:49:04,026 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 18:49:04,027 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 18:49:04,028 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 18:49:04,029 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 18:49:04,029 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 18:49:04,030 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 18:49:04,031 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 18:49:04,032 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 18:49:04,033 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 18:49:04,033 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 18:49:04,034 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 18:49:04,034 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 18:49:04,035 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 18:49:04,036 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 18:49:04,036 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 18:49:04,039 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf [2022-11-18 18:49:04,076 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 18:49:04,077 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 18:49:04,077 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 18:49:04,078 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 18:49:04,079 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 18:49:04,079 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 18:49:04,079 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 18:49:04,080 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 18:49:04,080 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 18:49:04,080 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 18:49:04,081 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 18:49:04,081 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 18:49:04,081 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 18:49:04,082 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 18:49:04,082 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-18 18:49:04,082 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 18:49:04,082 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-18 18:49:04,082 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 18:49:04,083 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 18:49:04,083 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 18:49:04,083 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-18 18:49:04,083 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 18:49:04,083 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 18:49:04,083 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 18:49:04,084 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 18:49:04,084 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 18:49:04,084 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 18:49:04,084 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-18 18:49:04,084 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 18:49:04,085 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 18:49:04,086 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-18 18:49:04,086 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-18 18:49:04,087 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-18 18:49:04,087 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7aff0c23635f1e1acd85672a1024d6cb6d0af57cad0028c56f5d301198b4eae6 [2022-11-18 18:49:04,381 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 18:49:04,404 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 18:49:04,408 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 18:49:04,409 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 18:49:04,410 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 18:49:04,412 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound50.c [2022-11-18 18:49:04,484 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/data/b873591a5/4be0e8ecf1124764b91e504f7fc59156/FLAGff0faf208 [2022-11-18 18:49:05,000 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 18:49:05,001 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound50.c [2022-11-18 18:49:05,018 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/data/b873591a5/4be0e8ecf1124764b91e504f7fc59156/FLAGff0faf208 [2022-11-18 18:49:05,367 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/data/b873591a5/4be0e8ecf1124764b91e504f7fc59156 [2022-11-18 18:49:05,372 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 18:49:05,376 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 18:49:05,378 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 18:49:05,378 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 18:49:05,381 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 18:49:05,382 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,385 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c3b34d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05, skipping insertion in model container [2022-11-18 18:49:05,385 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,394 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 18:49:05,410 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 18:49:05,639 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound50.c[573,586] [2022-11-18 18:49:05,653 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 18:49:05,662 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 18:49:05,675 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound50.c[573,586] [2022-11-18 18:49:05,681 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 18:49:05,694 INFO L208 MainTranslator]: Completed translation [2022-11-18 18:49:05,694 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05 WrapperNode [2022-11-18 18:49:05,694 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 18:49:05,695 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 18:49:05,696 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 18:49:05,696 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 18:49:05,704 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,710 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,728 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 47 [2022-11-18 18:49:05,728 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 18:49:05,729 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 18:49:05,729 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 18:49:05,729 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 18:49:05,738 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,739 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,740 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,740 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,743 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,747 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,748 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,749 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,750 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 18:49:05,751 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 18:49:05,751 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 18:49:05,751 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 18:49:05,752 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (1/1) ... [2022-11-18 18:49:05,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 18:49:05,774 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:05,785 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 18:49:05,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 18:49:05,824 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 18:49:05,825 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-18 18:49:05,825 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-18 18:49:05,825 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 18:49:05,825 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 18:49:05,825 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 18:49:05,825 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-18 18:49:05,825 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-18 18:49:05,904 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 18:49:05,907 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 18:49:06,096 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 18:49:06,102 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 18:49:06,102 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 18:49:06,104 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:49:06 BoogieIcfgContainer [2022-11-18 18:49:06,104 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 18:49:06,106 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 18:49:06,107 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 18:49:06,110 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 18:49:06,117 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 06:49:05" (1/3) ... [2022-11-18 18:49:06,118 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@372d24ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 06:49:06, skipping insertion in model container [2022-11-18 18:49:06,118 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:49:05" (2/3) ... [2022-11-18 18:49:06,118 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@372d24ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 06:49:06, skipping insertion in model container [2022-11-18 18:49:06,119 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:49:06" (3/3) ... [2022-11-18 18:49:06,120 INFO L112 eAbstractionObserver]: Analyzing ICFG mannadiv_unwindbound50.c [2022-11-18 18:49:06,139 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 18:49:06,140 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-18 18:49:06,221 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 18:49:06,230 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@14d9023b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 18:49:06,230 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-18 18:49:06,237 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-18 18:49:06,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-18 18:49:06,246 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:06,247 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:06,248 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:06,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:06,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1086166160, now seen corresponding path program 1 times [2022-11-18 18:49:06,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:06,271 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185664468] [2022-11-18 18:49:06,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:06,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:06,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:49:06,458 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:06,459 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185664468] [2022-11-18 18:49:06,459 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-11-18 18:49:06,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1873091233] [2022-11-18 18:49:06,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:06,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:06,461 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:06,465 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:06,499 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 18:49:06,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:49:06,574 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-18 18:49:06,579 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:06,606 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 18:49:06,607 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 18:49:06,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1873091233] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:49:06,608 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:49:06,608 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 18:49:06,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1918018408] [2022-11-18 18:49:06,611 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:49:06,616 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-18 18:49:06,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:06,646 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-18 18:49:06,647 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 18:49:06,650 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 18:49:06,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:06,674 INFO L93 Difference]: Finished difference Result 47 states and 64 transitions. [2022-11-18 18:49:06,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-18 18:49:06,677 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 18 [2022-11-18 18:49:06,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:06,687 INFO L225 Difference]: With dead ends: 47 [2022-11-18 18:49:06,687 INFO L226 Difference]: Without dead ends: 21 [2022-11-18 18:49:06,691 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 18:49:06,696 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:06,697 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 18:49:06,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-11-18 18:49:06,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2022-11-18 18:49:06,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 18:49:06,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2022-11-18 18:49:06,743 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 18 [2022-11-18 18:49:06,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:06,744 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2022-11-18 18:49:06,744 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 18:49:06,745 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2022-11-18 18:49:06,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-18 18:49:06,747 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:06,747 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:06,760 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:06,954 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2022-11-18 18:49:06,954 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:06,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:06,955 INFO L85 PathProgramCache]: Analyzing trace with hash 1345709874, now seen corresponding path program 1 times [2022-11-18 18:49:06,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:06,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8542258] [2022-11-18 18:49:06,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:06,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:07,002 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:07,002 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1215364987] [2022-11-18 18:49:07,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:07,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:07,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:07,004 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:07,010 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 18:49:07,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:49:07,071 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 18:49:07,073 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:07,162 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:07,162 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 18:49:07,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:07,163 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8542258] [2022-11-18 18:49:07,163 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:07,163 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1215364987] [2022-11-18 18:49:07,164 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1215364987] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:49:07,164 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:49:07,164 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 18:49:07,165 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759558442] [2022-11-18 18:49:07,165 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:49:07,166 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 18:49:07,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:07,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 18:49:07,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 18:49:07,174 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 18:49:07,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:07,208 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2022-11-18 18:49:07,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 18:49:07,209 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2022-11-18 18:49:07,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:07,210 INFO L225 Difference]: With dead ends: 30 [2022-11-18 18:49:07,211 INFO L226 Difference]: Without dead ends: 23 [2022-11-18 18:49:07,212 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 18:49:07,214 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 0 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:07,216 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 57 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 18:49:07,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-11-18 18:49:07,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-11-18 18:49:07,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 16 states have (on average 1.25) internal successors, (20), 17 states have internal predecessors, (20), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 18:49:07,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-11-18 18:49:07,230 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 19 [2022-11-18 18:49:07,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:07,231 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-11-18 18:49:07,231 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 18:49:07,231 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-11-18 18:49:07,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-18 18:49:07,232 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:07,232 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:07,241 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-11-18 18:49:07,432 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2022-11-18 18:49:07,433 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:07,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:07,435 INFO L85 PathProgramCache]: Analyzing trace with hash 1347497334, now seen corresponding path program 1 times [2022-11-18 18:49:07,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:07,436 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794066816] [2022-11-18 18:49:07,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:07,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:07,461 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:07,465 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [634407179] [2022-11-18 18:49:07,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:07,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:07,466 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:07,467 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:07,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 18:49:07,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:49:07,524 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-18 18:49:07,550 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:07,738 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 18:49:07,739 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 18:49:07,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:07,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794066816] [2022-11-18 18:49:07,739 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:07,740 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [634407179] [2022-11-18 18:49:07,740 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [634407179] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:49:07,740 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:49:07,740 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-18 18:49:07,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2102177721] [2022-11-18 18:49:07,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:49:07,741 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-18 18:49:07,742 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:07,742 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-18 18:49:07,742 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2022-11-18 18:49:07,743 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 18:49:07,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:07,885 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2022-11-18 18:49:07,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 18:49:07,886 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2022-11-18 18:49:07,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:07,889 INFO L225 Difference]: With dead ends: 33 [2022-11-18 18:49:07,892 INFO L226 Difference]: Without dead ends: 31 [2022-11-18 18:49:07,892 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2022-11-18 18:49:07,895 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 21 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:07,897 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 80 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:49:07,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-11-18 18:49:07,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 28. [2022-11-18 18:49:07,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 19 states have (on average 1.2105263157894737) internal successors, (23), 21 states have internal predecessors, (23), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-18 18:49:07,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-11-18 18:49:07,913 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 32 transitions. Word has length 19 [2022-11-18 18:49:07,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:07,914 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-18 18:49:07,915 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 18:49:07,915 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2022-11-18 18:49:07,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-11-18 18:49:07,916 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:07,917 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:07,922 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:08,122 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:08,122 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:08,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:08,123 INFO L85 PathProgramCache]: Analyzing trace with hash 1636478750, now seen corresponding path program 1 times [2022-11-18 18:49:08,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:08,124 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738924369] [2022-11-18 18:49:08,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:08,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:08,137 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:08,137 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1719756524] [2022-11-18 18:49:08,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:08,138 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:08,138 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:08,139 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:08,167 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 18:49:08,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:49:08,195 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-18 18:49:08,198 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:08,372 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 18:49:08,373 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:49:08,563 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:08,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:08,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738924369] [2022-11-18 18:49:08,564 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:08,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1719756524] [2022-11-18 18:49:08,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1719756524] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:49:08,565 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:49:08,565 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 7] total 16 [2022-11-18 18:49:08,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594336904] [2022-11-18 18:49:08,565 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:49:08,566 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-18 18:49:08,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:08,567 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-18 18:49:08,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-18 18:49:08,568 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. Second operand has 16 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 12 states have internal predecessors, (26), 5 states have call successors, (7), 3 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-18 18:49:08,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:08,754 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2022-11-18 18:49:08,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 18:49:08,755 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 12 states have internal predecessors, (26), 5 states have call successors, (7), 3 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) Word has length 25 [2022-11-18 18:49:08,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:08,757 INFO L225 Difference]: With dead ends: 35 [2022-11-18 18:49:08,758 INFO L226 Difference]: Without dead ends: 30 [2022-11-18 18:49:08,758 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=311, Unknown=0, NotChecked=0, Total=380 [2022-11-18 18:49:08,759 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 28 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:08,760 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 92 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:49:08,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-11-18 18:49:08,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-11-18 18:49:08,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 18 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 18:49:08,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-11-18 18:49:08,768 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 25 [2022-11-18 18:49:08,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:08,769 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-11-18 18:49:08,769 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 12 states have internal predecessors, (26), 5 states have call successors, (7), 3 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-18 18:49:08,769 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-11-18 18:49:08,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 18:49:08,770 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:08,770 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:08,783 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:08,976 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:08,977 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:08,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:08,977 INFO L85 PathProgramCache]: Analyzing trace with hash -126969667, now seen corresponding path program 1 times [2022-11-18 18:49:08,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:08,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876221655] [2022-11-18 18:49:08,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:08,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:08,993 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:08,993 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1469989986] [2022-11-18 18:49:08,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:08,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:08,994 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:08,995 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:09,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 18:49:09,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:49:09,064 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 18:49:09,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:09,136 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:09,136 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:49:09,226 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:09,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:09,227 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876221655] [2022-11-18 18:49:09,227 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:09,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1469989986] [2022-11-18 18:49:09,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1469989986] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:49:09,228 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:49:09,228 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 8 [2022-11-18 18:49:09,229 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344425908] [2022-11-18 18:49:09,229 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:49:09,229 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-18 18:49:09,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:09,230 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-18 18:49:09,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-11-18 18:49:09,231 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 18:49:09,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:09,337 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2022-11-18 18:49:09,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 18:49:09,338 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) Word has length 28 [2022-11-18 18:49:09,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:09,339 INFO L225 Difference]: With dead ends: 57 [2022-11-18 18:49:09,339 INFO L226 Difference]: Without dead ends: 52 [2022-11-18 18:49:09,340 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:49:09,341 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 30 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:09,341 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 106 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:49:09,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-11-18 18:49:09,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2022-11-18 18:49:09,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 39 states have internal predecessors, (44), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 18:49:09,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2022-11-18 18:49:09,356 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 28 [2022-11-18 18:49:09,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:09,356 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2022-11-18 18:49:09,356 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 18:49:09,356 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2022-11-18 18:49:09,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-11-18 18:49:09,358 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:09,358 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:09,369 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:09,564 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:09,564 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:09,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:09,565 INFO L85 PathProgramCache]: Analyzing trace with hash 972990450, now seen corresponding path program 2 times [2022-11-18 18:49:09,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:09,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953294022] [2022-11-18 18:49:09,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:09,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:09,581 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:09,581 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [739730873] [2022-11-18 18:49:09,581 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:49:09,581 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:09,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:09,583 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:09,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-18 18:49:09,697 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:49:09,697 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:49:09,698 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-18 18:49:09,701 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:09,900 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 62 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:09,900 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:49:10,087 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-18 18:49:10,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:10,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953294022] [2022-11-18 18:49:10,088 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:10,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [739730873] [2022-11-18 18:49:10,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [739730873] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:49:10,089 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:49:10,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 14 [2022-11-18 18:49:10,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902293192] [2022-11-18 18:49:10,089 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:49:10,090 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-18 18:49:10,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:10,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-18 18:49:10,094 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=111, Unknown=0, NotChecked=0, Total=182 [2022-11-18 18:49:10,094 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-11-18 18:49:10,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:10,401 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-11-18 18:49:10,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 18:49:10,402 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) Word has length 55 [2022-11-18 18:49:10,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:10,408 INFO L225 Difference]: With dead ends: 111 [2022-11-18 18:49:10,408 INFO L226 Difference]: Without dead ends: 106 [2022-11-18 18:49:10,409 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 96 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2022-11-18 18:49:10,410 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 120 mSDsluCounter, 100 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 120 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:10,410 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [120 Valid, 131 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:49:10,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-11-18 18:49:10,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2022-11-18 18:49:10,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 81 states have (on average 1.1358024691358024) internal successors, (92), 81 states have internal predecessors, (92), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-18 18:49:10,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 117 transitions. [2022-11-18 18:49:10,437 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 117 transitions. Word has length 55 [2022-11-18 18:49:10,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:10,437 INFO L495 AbstractCegarLoop]: Abstraction has 106 states and 117 transitions. [2022-11-18 18:49:10,438 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-11-18 18:49:10,438 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 117 transitions. [2022-11-18 18:49:10,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2022-11-18 18:49:10,441 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:10,441 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:10,458 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:10,648 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-11-18 18:49:10,648 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:10,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:10,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1909967598, now seen corresponding path program 3 times [2022-11-18 18:49:10,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:10,649 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655138098] [2022-11-18 18:49:10,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:10,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:10,674 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:10,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1680972672] [2022-11-18 18:49:10,674 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:49:10,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:10,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:10,676 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:10,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-18 18:49:10,806 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-18 18:49:10,806 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:49:10,808 INFO L263 TraceCheckSpWp]: Trace formula consists of 299 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-18 18:49:10,813 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:11,266 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 425 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:11,266 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:49:11,677 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2022-11-18 18:49:11,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:11,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655138098] [2022-11-18 18:49:11,677 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:11,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1680972672] [2022-11-18 18:49:11,678 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1680972672] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:49:11,678 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:49:11,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 26 [2022-11-18 18:49:11,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952575437] [2022-11-18 18:49:11,678 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:49:11,679 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-11-18 18:49:11,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:11,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-11-18 18:49:11,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=369, Unknown=0, NotChecked=0, Total=650 [2022-11-18 18:49:11,683 INFO L87 Difference]: Start difference. First operand 106 states and 117 transitions. Second operand has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-11-18 18:49:12,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:12,369 INFO L93 Difference]: Finished difference Result 219 states and 253 transitions. [2022-11-18 18:49:12,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-11-18 18:49:12,370 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) Word has length 109 [2022-11-18 18:49:12,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:12,378 INFO L225 Difference]: With dead ends: 219 [2022-11-18 18:49:12,378 INFO L226 Difference]: Without dead ends: 214 [2022-11-18 18:49:12,380 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 192 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=796, Invalid=1366, Unknown=0, NotChecked=0, Total=2162 [2022-11-18 18:49:12,386 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 262 mSDsluCounter, 189 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 76 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 262 SdHoareTripleChecker+Valid, 232 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 76 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:12,386 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [262 Valid, 232 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [76 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:49:12,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2022-11-18 18:49:12,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2022-11-18 18:49:12,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 165 states have (on average 1.1393939393939394) internal successors, (188), 165 states have internal predecessors, (188), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2022-11-18 18:49:12,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 237 transitions. [2022-11-18 18:49:12,437 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 237 transitions. Word has length 109 [2022-11-18 18:49:12,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:12,437 INFO L495 AbstractCegarLoop]: Abstraction has 214 states and 237 transitions. [2022-11-18 18:49:12,438 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-11-18 18:49:12,438 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 237 transitions. [2022-11-18 18:49:12,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2022-11-18 18:49:12,443 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:12,443 INFO L195 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:12,455 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:12,649 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:12,650 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:12,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:12,650 INFO L85 PathProgramCache]: Analyzing trace with hash -1216739502, now seen corresponding path program 4 times [2022-11-18 18:49:12,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:12,651 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938391389] [2022-11-18 18:49:12,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:12,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:12,690 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:12,692 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1472616571] [2022-11-18 18:49:12,693 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:49:12,693 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:12,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:12,694 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:12,717 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-18 18:49:12,872 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:49:12,872 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:49:12,876 INFO L263 TraceCheckSpWp]: Trace formula consists of 575 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-18 18:49:12,900 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:13,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 2123 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:13,656 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:49:14,934 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2022-11-18 18:49:14,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:14,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938391389] [2022-11-18 18:49:14,935 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:14,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1472616571] [2022-11-18 18:49:14,935 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1472616571] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:49:14,935 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:49:14,936 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 26] total 50 [2022-11-18 18:49:14,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287969405] [2022-11-18 18:49:14,936 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:49:14,938 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-18 18:49:14,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:14,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-18 18:49:14,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1133, Invalid=1317, Unknown=0, NotChecked=0, Total=2450 [2022-11-18 18:49:14,942 INFO L87 Difference]: Start difference. First operand 214 states and 237 transitions. Second operand has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-11-18 18:49:16,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:16,887 INFO L93 Difference]: Finished difference Result 435 states and 505 transitions. [2022-11-18 18:49:16,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2022-11-18 18:49:16,888 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) Word has length 217 [2022-11-18 18:49:16,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:16,892 INFO L225 Difference]: With dead ends: 435 [2022-11-18 18:49:16,892 INFO L226 Difference]: Without dead ends: 430 [2022-11-18 18:49:16,895 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 477 GetRequests, 384 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1288 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=3316, Invalid=5614, Unknown=0, NotChecked=0, Total=8930 [2022-11-18 18:49:16,896 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 715 mSDsluCounter, 427 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 197 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 715 SdHoareTripleChecker+Valid, 494 SdHoareTripleChecker+Invalid, 489 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 197 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:16,897 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [715 Valid, 494 Invalid, 489 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [197 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 18:49:16,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2022-11-18 18:49:16,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2022-11-18 18:49:16,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 333 states have (on average 1.1411411411411412) internal successors, (380), 333 states have internal predecessors, (380), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2022-11-18 18:49:16,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 477 transitions. [2022-11-18 18:49:16,953 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 477 transitions. Word has length 217 [2022-11-18 18:49:16,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:16,954 INFO L495 AbstractCegarLoop]: Abstraction has 430 states and 477 transitions. [2022-11-18 18:49:16,955 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-11-18 18:49:16,955 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 477 transitions. [2022-11-18 18:49:16,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 434 [2022-11-18 18:49:16,965 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:16,965 INFO L195 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:16,977 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:17,172 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:17,173 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:17,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:17,173 INFO L85 PathProgramCache]: Analyzing trace with hash -623866926, now seen corresponding path program 5 times [2022-11-18 18:49:17,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:17,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113925291] [2022-11-18 18:49:17,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:17,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:17,208 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:17,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [64905961] [2022-11-18 18:49:17,209 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:49:17,209 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:17,209 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:17,210 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:17,239 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-18 18:49:17,819 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-11-18 18:49:17,820 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:49:17,829 INFO L263 TraceCheckSpWp]: Trace formula consists of 1127 conjuncts, 95 conjunts are in the unsatisfiable core [2022-11-18 18:49:17,844 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:49:19,852 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 9407 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-18 18:49:19,852 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:49:21,728 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2022-11-18 18:49:21,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:49:21,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113925291] [2022-11-18 18:49:21,729 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:49:21,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [64905961] [2022-11-18 18:49:21,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [64905961] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:49:21,729 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:49:21,729 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 50] total 54 [2022-11-18 18:49:21,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487344370] [2022-11-18 18:49:21,732 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:49:21,738 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2022-11-18 18:49:21,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:49:21,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2022-11-18 18:49:21,743 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1331, Invalid=1531, Unknown=0, NotChecked=0, Total=2862 [2022-11-18 18:49:21,744 INFO L87 Difference]: Start difference. First operand 430 states and 477 transitions. Second operand has 54 states, 54 states have (on average 6.592592592592593) internal successors, (356), 54 states have internal predecessors, (356), 51 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 50 states have call predecessors, (96), 50 states have call successors, (96) [2022-11-18 18:49:23,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:49:23,943 INFO L93 Difference]: Finished difference Result 471 states and 525 transitions. [2022-11-18 18:49:23,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2022-11-18 18:49:23,946 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 6.592592592592593) internal successors, (356), 54 states have internal predecessors, (356), 51 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 50 states have call predecessors, (96), 50 states have call successors, (96) Word has length 433 [2022-11-18 18:49:23,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:49:23,950 INFO L225 Difference]: With dead ends: 471 [2022-11-18 18:49:23,950 INFO L226 Difference]: Without dead ends: 466 [2022-11-18 18:49:23,954 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 913 GetRequests, 768 SyntacticMatches, 44 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2350 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=3926, Invalid=6580, Unknown=0, NotChecked=0, Total=10506 [2022-11-18 18:49:23,955 INFO L413 NwaCegarLoop]: 71 mSDtfsCounter, 604 mSDsluCounter, 464 mSDsCounter, 0 mSdLazyCounter, 443 mSolverCounterSat, 151 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 604 SdHoareTripleChecker+Valid, 535 SdHoareTripleChecker+Invalid, 594 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 151 IncrementalHoareTripleChecker+Valid, 443 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-18 18:49:23,955 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [604 Valid, 535 Invalid, 594 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [151 Valid, 443 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-18 18:49:23,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2022-11-18 18:49:23,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 466. [2022-11-18 18:49:23,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 466 states, 361 states have (on average 1.1412742382271468) internal successors, (412), 361 states have internal predecessors, (412), 53 states have call successors, (53), 52 states have call predecessors, (53), 51 states have return successors, (52), 52 states have call predecessors, (52), 52 states have call successors, (52) [2022-11-18 18:49:23,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 466 states to 466 states and 517 transitions. [2022-11-18 18:49:23,999 INFO L78 Accepts]: Start accepts. Automaton has 466 states and 517 transitions. Word has length 433 [2022-11-18 18:49:24,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:49:24,000 INFO L495 AbstractCegarLoop]: Abstraction has 466 states and 517 transitions. [2022-11-18 18:49:24,001 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 6.592592592592593) internal successors, (356), 54 states have internal predecessors, (356), 51 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 50 states have call predecessors, (96), 50 states have call successors, (96) [2022-11-18 18:49:24,001 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 517 transitions. [2022-11-18 18:49:24,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2022-11-18 18:49:24,010 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:49:24,011 INFO L195 NwaCegarLoop]: trace histogram [51, 51, 50, 50, 50, 50, 50, 50, 50, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:49:24,022 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:24,219 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:24,219 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:49:24,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:49:24,219 INFO L85 PathProgramCache]: Analyzing trace with hash -872711022, now seen corresponding path program 6 times [2022-11-18 18:49:24,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:49:24,220 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120023407] [2022-11-18 18:49:24,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:49:24,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:49:24,252 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:49:24,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [842608956] [2022-11-18 18:49:24,253 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:49:24,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:24,253 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:49:24,254 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:49:24,286 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-18 18:49:24,799 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 51 check-sat command(s) [2022-11-18 18:49:24,799 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-18 18:49:24,799 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 18:49:24,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 18:49:25,363 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 18:49:25,366 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-18 18:49:25,367 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-18 18:49:25,391 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-18 18:49:25,591 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:49:25,595 INFO L444 BasicCegarLoop]: Path program histogram: [6, 1, 1, 1, 1] [2022-11-18 18:49:25,602 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-18 18:49:25,784 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 06:49:25 BoogieIcfgContainer [2022-11-18 18:49:25,784 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-18 18:49:25,784 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-18 18:49:25,785 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-18 18:49:25,785 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-18 18:49:25,785 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:49:06" (3/4) ... [2022-11-18 18:49:25,788 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-18 18:49:25,941 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/witness.graphml [2022-11-18 18:49:25,941 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-18 18:49:25,942 INFO L158 Benchmark]: Toolchain (without parser) took 20566.18ms. Allocated memory was 155.2MB in the beginning and 232.8MB in the end (delta: 77.6MB). Free memory was 122.9MB in the beginning and 172.1MB in the end (delta: -49.2MB). Peak memory consumption was 27.4MB. Max. memory is 16.1GB. [2022-11-18 18:49:25,942 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 100.7MB. Free memory was 54.4MB in the beginning and 54.3MB in the end (delta: 84.0kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 18:49:25,942 INFO L158 Benchmark]: CACSL2BoogieTranslator took 317.09ms. Allocated memory is still 155.2MB. Free memory was 122.5MB in the beginning and 130.4MB in the end (delta: -7.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-18 18:49:25,943 INFO L158 Benchmark]: Boogie Procedure Inliner took 33.08ms. Allocated memory is still 155.2MB. Free memory was 130.4MB in the beginning and 128.8MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 18:49:25,943 INFO L158 Benchmark]: Boogie Preprocessor took 21.42ms. Allocated memory is still 155.2MB. Free memory was 128.8MB in the beginning and 127.5MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 18:49:25,943 INFO L158 Benchmark]: RCFGBuilder took 353.41ms. Allocated memory is still 155.2MB. Free memory was 127.5MB in the beginning and 117.1MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-18 18:49:25,944 INFO L158 Benchmark]: TraceAbstraction took 19677.55ms. Allocated memory was 155.2MB in the beginning and 232.8MB in the end (delta: 77.6MB). Free memory was 116.6MB in the beginning and 188.9MB in the end (delta: -72.3MB). Peak memory consumption was 124.1MB. Max. memory is 16.1GB. [2022-11-18 18:49:25,944 INFO L158 Benchmark]: Witness Printer took 156.86ms. Allocated memory is still 232.8MB. Free memory was 188.9MB in the beginning and 172.1MB in the end (delta: 16.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2022-11-18 18:49:25,946 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 100.7MB. Free memory was 54.4MB in the beginning and 54.3MB in the end (delta: 84.0kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 317.09ms. Allocated memory is still 155.2MB. Free memory was 122.5MB in the beginning and 130.4MB in the end (delta: -7.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 33.08ms. Allocated memory is still 155.2MB. Free memory was 130.4MB in the beginning and 128.8MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 21.42ms. Allocated memory is still 155.2MB. Free memory was 128.8MB in the beginning and 127.5MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 353.41ms. Allocated memory is still 155.2MB. Free memory was 127.5MB in the beginning and 117.1MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 19677.55ms. Allocated memory was 155.2MB in the beginning and 232.8MB in the end (delta: 77.6MB). Free memory was 116.6MB in the beginning and 188.9MB in the end (delta: -72.3MB). Peak memory consumption was 124.1MB. Max. memory is 16.1GB. * Witness Printer took 156.86ms. Allocated memory is still 232.8MB. Free memory was 188.9MB in the beginning and 172.1MB in the end (delta: 16.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L22] int counter = 0; VAL [counter=0] [L24] int x1, x2; [L25] int y1, y2, y3; [L26] x1 = __VERIFIER_nondet_int() [L27] x2 = __VERIFIER_nondet_int() [L29] CALL assume_abort_if_not(x1 >= 0) VAL [\old(cond)=1, counter=0] [L13] COND FALSE !(!cond) VAL [\old(cond)=1, cond=1, counter=0] [L29] RET assume_abort_if_not(x1 >= 0) VAL [counter=0, x1=51, x2=1] [L30] CALL assume_abort_if_not(x2 != 0) VAL [\old(cond)=1, counter=0] [L13] COND FALSE !(!cond) VAL [\old(cond)=1, cond=1, counter=0] [L30] RET assume_abort_if_not(x2 != 0) VAL [counter=0, x1=51, x2=1] [L32] y1 = 0 [L33] y2 = 0 [L34] y3 = x1 VAL [counter=0, x1=51, x2=1, y1=0, y2=0, y3=51] [L36] EXPR counter++ VAL [counter=1, counter++=0, x1=51, x2=1, y1=0, y2=0, y3=51] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=1] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=1] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=1, x1=51, x2=1, y1=0, y2=0, y3=51] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=1, x1=51, x2=1, y1=0, y2=0, y3=51] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=1, x1=51, x2=1, y1=1, y2=0, y3=50] [L36] EXPR counter++ VAL [counter=2, counter++=1, x1=51, x2=1, y1=1, y2=0, y3=50] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=2] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=2] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=2, x1=51, x2=1, y1=1, y2=0, y3=50] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=2, x1=51, x2=1, y1=1, y2=0, y3=50] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=2, x1=51, x2=1, y1=2, y2=0, y3=49] [L36] EXPR counter++ VAL [counter=3, counter++=2, x1=51, x2=1, y1=2, y2=0, y3=49] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=3] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=3] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=3, x1=51, x2=1, y1=2, y2=0, y3=49] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=3, x1=51, x2=1, y1=2, y2=0, y3=49] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=3, x1=51, x2=1, y1=3, y2=0, y3=48] [L36] EXPR counter++ VAL [counter=4, counter++=3, x1=51, x2=1, y1=3, y2=0, y3=48] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=4] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=4] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=4, x1=51, x2=1, y1=3, y2=0, y3=48] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=4, x1=51, x2=1, y1=3, y2=0, y3=48] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=4, x1=51, x2=1, y1=4, y2=0, y3=47] [L36] EXPR counter++ VAL [counter=5, counter++=4, x1=51, x2=1, y1=4, y2=0, y3=47] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=5] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=5] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=5, x1=51, x2=1, y1=4, y2=0, y3=47] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=5, x1=51, x2=1, y1=4, y2=0, y3=47] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=5, x1=51, x2=1, y1=5, y2=0, y3=46] [L36] EXPR counter++ VAL [counter=6, counter++=5, x1=51, x2=1, y1=5, y2=0, y3=46] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=6] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=6] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=6, x1=51, x2=1, y1=5, y2=0, y3=46] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=6, x1=51, x2=1, y1=5, y2=0, y3=46] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=6, x1=51, x2=1, y1=6, y2=0, y3=45] [L36] EXPR counter++ VAL [counter=7, counter++=6, x1=51, x2=1, y1=6, y2=0, y3=45] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=7] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=7] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=7, x1=51, x2=1, y1=6, y2=0, y3=45] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=7, x1=51, x2=1, y1=6, y2=0, y3=45] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=7, x1=51, x2=1, y1=7, y2=0, y3=44] [L36] EXPR counter++ VAL [counter=8, counter++=7, x1=51, x2=1, y1=7, y2=0, y3=44] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=8] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=8] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=8, x1=51, x2=1, y1=7, y2=0, y3=44] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=8, x1=51, x2=1, y1=7, y2=0, y3=44] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=8, x1=51, x2=1, y1=8, y2=0, y3=43] [L36] EXPR counter++ VAL [counter=9, counter++=8, x1=51, x2=1, y1=8, y2=0, y3=43] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=9] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=9] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=9, x1=51, x2=1, y1=8, y2=0, y3=43] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=9, x1=51, x2=1, y1=8, y2=0, y3=43] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=9, x1=51, x2=1, y1=9, y2=0, y3=42] [L36] EXPR counter++ VAL [counter=10, counter++=9, x1=51, x2=1, y1=9, y2=0, y3=42] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=10] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=10] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=10, x1=51, x2=1, y1=9, y2=0, y3=42] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=10, x1=51, x2=1, y1=9, y2=0, y3=42] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=10, x1=51, x2=1, y1=10, y2=0, y3=41] [L36] EXPR counter++ VAL [counter=11, counter++=10, x1=51, x2=1, y1=10, y2=0, y3=41] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=11] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=11] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=11, x1=51, x2=1, y1=10, y2=0, y3=41] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=11, x1=51, x2=1, y1=10, y2=0, y3=41] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=11, x1=51, x2=1, y1=11, y2=0, y3=40] [L36] EXPR counter++ VAL [counter=12, counter++=11, x1=51, x2=1, y1=11, y2=0, y3=40] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=12] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=12] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=12, x1=51, x2=1, y1=11, y2=0, y3=40] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=12, x1=51, x2=1, y1=11, y2=0, y3=40] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=12, x1=51, x2=1, y1=12, y2=0, y3=39] [L36] EXPR counter++ VAL [counter=13, counter++=12, x1=51, x2=1, y1=12, y2=0, y3=39] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=13] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=13] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=13, x1=51, x2=1, y1=12, y2=0, y3=39] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=13, x1=51, x2=1, y1=12, y2=0, y3=39] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=13, x1=51, x2=1, y1=13, y2=0, y3=38] [L36] EXPR counter++ VAL [counter=14, counter++=13, x1=51, x2=1, y1=13, y2=0, y3=38] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=14] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=14] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=14, x1=51, x2=1, y1=13, y2=0, y3=38] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=14, x1=51, x2=1, y1=13, y2=0, y3=38] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=14, x1=51, x2=1, y1=14, y2=0, y3=37] [L36] EXPR counter++ VAL [counter=15, counter++=14, x1=51, x2=1, y1=14, y2=0, y3=37] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=15] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=15] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=15, x1=51, x2=1, y1=14, y2=0, y3=37] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=15, x1=51, x2=1, y1=14, y2=0, y3=37] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=15, x1=51, x2=1, y1=15, y2=0, y3=36] [L36] EXPR counter++ VAL [counter=16, counter++=15, x1=51, x2=1, y1=15, y2=0, y3=36] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=16] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=16] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=16, x1=51, x2=1, y1=15, y2=0, y3=36] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=16, x1=51, x2=1, y1=15, y2=0, y3=36] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=16, x1=51, x2=1, y1=16, y2=0, y3=35] [L36] EXPR counter++ VAL [counter=17, counter++=16, x1=51, x2=1, y1=16, y2=0, y3=35] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=17] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=17] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=17, x1=51, x2=1, y1=16, y2=0, y3=35] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=17, x1=51, x2=1, y1=16, y2=0, y3=35] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=17, x1=51, x2=1, y1=17, y2=0, y3=34] [L36] EXPR counter++ VAL [counter=18, counter++=17, x1=51, x2=1, y1=17, y2=0, y3=34] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=18] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=18] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=18, x1=51, x2=1, y1=17, y2=0, y3=34] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=18, x1=51, x2=1, y1=17, y2=0, y3=34] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=18, x1=51, x2=1, y1=18, y2=0, y3=33] [L36] EXPR counter++ VAL [counter=19, counter++=18, x1=51, x2=1, y1=18, y2=0, y3=33] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=19] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=19] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=19, x1=51, x2=1, y1=18, y2=0, y3=33] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=19, x1=51, x2=1, y1=18, y2=0, y3=33] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=19, x1=51, x2=1, y1=19, y2=0, y3=32] [L36] EXPR counter++ VAL [counter=20, counter++=19, x1=51, x2=1, y1=19, y2=0, y3=32] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=20] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=20] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=20, x1=51, x2=1, y1=19, y2=0, y3=32] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=20, x1=51, x2=1, y1=19, y2=0, y3=32] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=20, x1=51, x2=1, y1=20, y2=0, y3=31] [L36] EXPR counter++ VAL [counter=21, counter++=20, x1=51, x2=1, y1=20, y2=0, y3=31] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=21] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=21] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=21, x1=51, x2=1, y1=20, y2=0, y3=31] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=21, x1=51, x2=1, y1=20, y2=0, y3=31] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=21, x1=51, x2=1, y1=21, y2=0, y3=30] [L36] EXPR counter++ VAL [counter=22, counter++=21, x1=51, x2=1, y1=21, y2=0, y3=30] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=22] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=22] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=22, x1=51, x2=1, y1=21, y2=0, y3=30] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=22, x1=51, x2=1, y1=21, y2=0, y3=30] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=22, x1=51, x2=1, y1=22, y2=0, y3=29] [L36] EXPR counter++ VAL [counter=23, counter++=22, x1=51, x2=1, y1=22, y2=0, y3=29] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=23] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=23] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=23, x1=51, x2=1, y1=22, y2=0, y3=29] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=23, x1=51, x2=1, y1=22, y2=0, y3=29] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=23, x1=51, x2=1, y1=23, y2=0, y3=28] [L36] EXPR counter++ VAL [counter=24, counter++=23, x1=51, x2=1, y1=23, y2=0, y3=28] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=24] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=24] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=24, x1=51, x2=1, y1=23, y2=0, y3=28] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=24, x1=51, x2=1, y1=23, y2=0, y3=28] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=24, x1=51, x2=1, y1=24, y2=0, y3=27] [L36] EXPR counter++ VAL [counter=25, counter++=24, x1=51, x2=1, y1=24, y2=0, y3=27] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=25] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=25] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=25, x1=51, x2=1, y1=24, y2=0, y3=27] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=25, x1=51, x2=1, y1=24, y2=0, y3=27] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=25, x1=51, x2=1, y1=25, y2=0, y3=26] [L36] EXPR counter++ VAL [counter=26, counter++=25, x1=51, x2=1, y1=25, y2=0, y3=26] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=26] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=26] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=26, x1=51, x2=1, y1=25, y2=0, y3=26] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=26, x1=51, x2=1, y1=25, y2=0, y3=26] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=26, x1=51, x2=1, y1=26, y2=0, y3=25] [L36] EXPR counter++ VAL [counter=27, counter++=26, x1=51, x2=1, y1=26, y2=0, y3=25] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=27] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=27] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=27, x1=51, x2=1, y1=26, y2=0, y3=25] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=27, x1=51, x2=1, y1=26, y2=0, y3=25] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=27, x1=51, x2=1, y1=27, y2=0, y3=24] [L36] EXPR counter++ VAL [counter=28, counter++=27, x1=51, x2=1, y1=27, y2=0, y3=24] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=28] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=28] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=28, x1=51, x2=1, y1=27, y2=0, y3=24] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=28, x1=51, x2=1, y1=27, y2=0, y3=24] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=28, x1=51, x2=1, y1=28, y2=0, y3=23] [L36] EXPR counter++ VAL [counter=29, counter++=28, x1=51, x2=1, y1=28, y2=0, y3=23] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=29] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=29] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=29, x1=51, x2=1, y1=28, y2=0, y3=23] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=29, x1=51, x2=1, y1=28, y2=0, y3=23] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=29, x1=51, x2=1, y1=29, y2=0, y3=22] [L36] EXPR counter++ VAL [counter=30, counter++=29, x1=51, x2=1, y1=29, y2=0, y3=22] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=30] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=30] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=30, x1=51, x2=1, y1=29, y2=0, y3=22] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=30, x1=51, x2=1, y1=29, y2=0, y3=22] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=30, x1=51, x2=1, y1=30, y2=0, y3=21] [L36] EXPR counter++ VAL [counter=31, counter++=30, x1=51, x2=1, y1=30, y2=0, y3=21] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=31] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=31] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=31, x1=51, x2=1, y1=30, y2=0, y3=21] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=31, x1=51, x2=1, y1=30, y2=0, y3=21] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=31, x1=51, x2=1, y1=31, y2=0, y3=20] [L36] EXPR counter++ VAL [counter=32, counter++=31, x1=51, x2=1, y1=31, y2=0, y3=20] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=32] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=32] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=32, x1=51, x2=1, y1=31, y2=0, y3=20] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=32, x1=51, x2=1, y1=31, y2=0, y3=20] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=32, x1=51, x2=1, y1=32, y2=0, y3=19] [L36] EXPR counter++ VAL [counter=33, counter++=32, x1=51, x2=1, y1=32, y2=0, y3=19] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=33] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=33] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=33, x1=51, x2=1, y1=32, y2=0, y3=19] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=33, x1=51, x2=1, y1=32, y2=0, y3=19] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=33, x1=51, x2=1, y1=33, y2=0, y3=18] [L36] EXPR counter++ VAL [counter=34, counter++=33, x1=51, x2=1, y1=33, y2=0, y3=18] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=34] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=34] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=34, x1=51, x2=1, y1=33, y2=0, y3=18] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=34, x1=51, x2=1, y1=33, y2=0, y3=18] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=34, x1=51, x2=1, y1=34, y2=0, y3=17] [L36] EXPR counter++ VAL [counter=35, counter++=34, x1=51, x2=1, y1=34, y2=0, y3=17] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=35] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=35] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=35, x1=51, x2=1, y1=34, y2=0, y3=17] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=35, x1=51, x2=1, y1=34, y2=0, y3=17] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=35, x1=51, x2=1, y1=35, y2=0, y3=16] [L36] EXPR counter++ VAL [counter=36, counter++=35, x1=51, x2=1, y1=35, y2=0, y3=16] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=36] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=36] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=36, x1=51, x2=1, y1=35, y2=0, y3=16] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=36, x1=51, x2=1, y1=35, y2=0, y3=16] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=36, x1=51, x2=1, y1=36, y2=0, y3=15] [L36] EXPR counter++ VAL [counter=37, counter++=36, x1=51, x2=1, y1=36, y2=0, y3=15] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=37] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=37] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=37, x1=51, x2=1, y1=36, y2=0, y3=15] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=37, x1=51, x2=1, y1=36, y2=0, y3=15] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=37, x1=51, x2=1, y1=37, y2=0, y3=14] [L36] EXPR counter++ VAL [counter=38, counter++=37, x1=51, x2=1, y1=37, y2=0, y3=14] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=38] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=38] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=38, x1=51, x2=1, y1=37, y2=0, y3=14] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=38, x1=51, x2=1, y1=37, y2=0, y3=14] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=38, x1=51, x2=1, y1=38, y2=0, y3=13] [L36] EXPR counter++ VAL [counter=39, counter++=38, x1=51, x2=1, y1=38, y2=0, y3=13] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=39] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=39] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=39, x1=51, x2=1, y1=38, y2=0, y3=13] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=39, x1=51, x2=1, y1=38, y2=0, y3=13] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=39, x1=51, x2=1, y1=39, y2=0, y3=12] [L36] EXPR counter++ VAL [counter=40, counter++=39, x1=51, x2=1, y1=39, y2=0, y3=12] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=40] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=40] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=40, x1=51, x2=1, y1=39, y2=0, y3=12] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=40, x1=51, x2=1, y1=39, y2=0, y3=12] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=40, x1=51, x2=1, y1=40, y2=0, y3=11] [L36] EXPR counter++ VAL [counter=41, counter++=40, x1=51, x2=1, y1=40, y2=0, y3=11] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=41] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=41] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=41, x1=51, x2=1, y1=40, y2=0, y3=11] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=41, x1=51, x2=1, y1=40, y2=0, y3=11] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=41, x1=51, x2=1, y1=41, y2=0, y3=10] [L36] EXPR counter++ VAL [counter=42, counter++=41, x1=51, x2=1, y1=41, y2=0, y3=10] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=42] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=42] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=42, x1=51, x2=1, y1=41, y2=0, y3=10] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=42, x1=51, x2=1, y1=41, y2=0, y3=10] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=42, x1=51, x2=1, y1=42, y2=0, y3=9] [L36] EXPR counter++ VAL [counter=43, counter++=42, x1=51, x2=1, y1=42, y2=0, y3=9] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=43] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=43] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=43, x1=51, x2=1, y1=42, y2=0, y3=9] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=43, x1=51, x2=1, y1=42, y2=0, y3=9] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=43, x1=51, x2=1, y1=43, y2=0, y3=8] [L36] EXPR counter++ VAL [counter=44, counter++=43, x1=51, x2=1, y1=43, y2=0, y3=8] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=44] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=44] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=44, x1=51, x2=1, y1=43, y2=0, y3=8] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=44, x1=51, x2=1, y1=43, y2=0, y3=8] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=44, x1=51, x2=1, y1=44, y2=0, y3=7] [L36] EXPR counter++ VAL [counter=45, counter++=44, x1=51, x2=1, y1=44, y2=0, y3=7] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=45] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=45] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=45, x1=51, x2=1, y1=44, y2=0, y3=7] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=45, x1=51, x2=1, y1=44, y2=0, y3=7] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=45, x1=51, x2=1, y1=45, y2=0, y3=6] [L36] EXPR counter++ VAL [counter=46, counter++=45, x1=51, x2=1, y1=45, y2=0, y3=6] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=46] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=46] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=46, x1=51, x2=1, y1=45, y2=0, y3=6] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=46, x1=51, x2=1, y1=45, y2=0, y3=6] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=46, x1=51, x2=1, y1=46, y2=0, y3=5] [L36] EXPR counter++ VAL [counter=47, counter++=46, x1=51, x2=1, y1=46, y2=0, y3=5] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=47] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=47] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=47, x1=51, x2=1, y1=46, y2=0, y3=5] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=47, x1=51, x2=1, y1=46, y2=0, y3=5] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=47, x1=51, x2=1, y1=47, y2=0, y3=4] [L36] EXPR counter++ VAL [counter=48, counter++=47, x1=51, x2=1, y1=47, y2=0, y3=4] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=48] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=48] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=48, x1=51, x2=1, y1=47, y2=0, y3=4] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=48, x1=51, x2=1, y1=47, y2=0, y3=4] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=48, x1=51, x2=1, y1=48, y2=0, y3=3] [L36] EXPR counter++ VAL [counter=49, counter++=48, x1=51, x2=1, y1=48, y2=0, y3=3] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=49] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=49] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=49, x1=51, x2=1, y1=48, y2=0, y3=3] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=49, x1=51, x2=1, y1=48, y2=0, y3=3] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=49, x1=51, x2=1, y1=49, y2=0, y3=2] [L36] EXPR counter++ VAL [counter=50, counter++=49, x1=51, x2=1, y1=49, y2=0, y3=2] [L36] COND TRUE counter++<50 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=50] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=50] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=50, x1=51, x2=1, y1=49, y2=0, y3=2] [L39] COND FALSE !(!(y3 != 0)) VAL [counter=50, x1=51, x2=1, y1=49, y2=0, y3=2] [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=50, x1=51, x2=1, y1=50, y2=0, y3=1] [L36] EXPR counter++ VAL [counter=51, counter++=50, x1=51, x2=1, y1=50, y2=0, y3=1] [L36] COND FALSE !(counter++<50) [L50] CALL __VERIFIER_assert(y1*x2 + y2 == x1) VAL [\old(cond)=0, counter=51] [L16] COND TRUE !(cond) VAL [\old(cond)=0, cond=0, counter=51] [L18] reach_error() VAL [\old(cond)=0, cond=0, counter=51] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 25 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 19.4s, OverallIterations: 10, TraceHistogramMax: 51, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 5.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1782 SdHoareTripleChecker+Valid, 1.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1780 mSDsluCounter, 1756 SdHoareTripleChecker+Invalid, 1.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1438 mSDsCounter, 486 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1160 IncrementalHoareTripleChecker+Invalid, 1646 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 486 mSolverCounterUnsat, 318 mSDtfsCounter, 1160 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1908 GetRequests, 1567 SyntacticMatches, 44 SemanticMatches, 297 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4040 ImplicationChecksByTransitivity, 7.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=466occurred in iteration=9, InterpolantAutomatonStates: 299, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 9 MinimizatonAttempts, 8 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 1.3s SatisfiabilityAnalysisTime, 8.2s InterpolantComputationTime, 1410 NumberOfCodeBlocks, 1410 NumberOfCodeBlocksAsserted, 119 NumberOfCheckSat, 1775 ConstructedInterpolants, 0 QuantifiedInterpolants, 4483 SizeOfPredicates, 92 NumberOfNonLiveVariables, 2537 ConjunctsInSsa, 221 ConjunctsInUnsatCore, 15 InterpolantComputations, 3 PerfectInterpolantSequences, 5659/24434 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-18 18:49:25,974 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_735dac55-4271-41b4-bb9e-5ece21d537e8/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE