./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:43:34,447 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:43:34,449 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:43:34,471 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:43:34,471 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:43:34,473 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:43:34,474 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:43:34,476 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:43:34,478 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:43:34,479 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:43:34,480 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:43:34,481 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:43:34,482 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:43:34,483 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:43:34,484 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:43:34,485 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:43:34,486 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:43:34,487 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:43:34,489 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:43:34,491 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:43:34,493 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:43:34,497 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:43:34,498 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:43:34,499 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:43:34,503 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:43:34,503 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:43:34,503 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:43:34,510 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:43:34,511 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:43:34,512 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:43:34,512 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:43:34,513 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:43:34,514 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:43:34,515 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:43:34,516 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:43:34,516 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:43:34,517 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:43:34,518 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:43:34,518 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:43:34,519 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:43:34,520 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:43:34,524 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-11-18 20:43:34,569 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:43:34,569 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:43:34,570 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:43:34,570 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:43:34,571 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 20:43:34,571 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 20:43:34,572 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:43:34,572 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:43:34,572 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:43:34,572 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:43:34,573 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:43:34,574 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:43:34,574 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-18 20:43:34,574 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 20:43:34,574 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-18 20:43:34,575 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:43:34,575 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:43:34,575 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-18 20:43:34,575 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:43:34,575 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:43:34,576 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 20:43:34,576 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:43:34,576 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:43:34,576 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 20:43:34,576 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-18 20:43:34,577 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:43:34,579 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 20:43:34,579 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-18 20:43:34,579 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-18 20:43:34,579 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-18 20:43:34,580 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 [2022-11-18 20:43:34,876 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:43:34,900 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:43:34,902 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:43:34,903 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:43:34,906 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:43:34,907 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-18 20:43:34,977 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/7c3854d63/7b999328ac27440c9be49c4d072cdafe/FLAG4ab23daf9 [2022-11-18 20:43:35,812 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:43:35,813 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-18 20:43:35,860 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/7c3854d63/7b999328ac27440c9be49c4d072cdafe/FLAG4ab23daf9 [2022-11-18 20:43:36,335 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/7c3854d63/7b999328ac27440c9be49c4d072cdafe [2022-11-18 20:43:36,337 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:43:36,339 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:43:36,341 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:43:36,341 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:43:36,345 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:43:36,346 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:43:36" (1/1) ... [2022-11-18 20:43:36,347 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@474f1ede and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:36, skipping insertion in model container [2022-11-18 20:43:36,347 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:43:36" (1/1) ... [2022-11-18 20:43:36,354 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:43:36,474 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:43:37,948 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-18 20:43:38,006 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:43:38,041 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:43:38,457 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-18 20:43:38,466 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:43:38,728 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:43:38,729 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38 WrapperNode [2022-11-18 20:43:38,731 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:43:38,732 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:43:38,732 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:43:38,733 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:43:38,740 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:38,825 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:38,993 INFO L138 Inliner]: procedures = 200, calls = 1513, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3366 [2022-11-18 20:43:38,993 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:43:38,994 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:43:38,995 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:43:38,995 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:43:39,004 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,004 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,039 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,041 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,132 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,146 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,158 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,169 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,190 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:43:39,191 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:43:39,191 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:43:39,192 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:43:39,193 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (1/1) ... [2022-11-18 20:43:39,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:43:39,211 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:43:39,225 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 20:43:39,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 20:43:39,269 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-11-18 20:43:39,269 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-11-18 20:43:39,269 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-11-18 20:43:39,269 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-11-18 20:43:39,269 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-11-18 20:43:39,270 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-11-18 20:43:39,270 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2022-11-18 20:43:39,270 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2022-11-18 20:43:39,270 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-11-18 20:43:39,270 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-11-18 20:43:39,270 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2022-11-18 20:43:39,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2022-11-18 20:43:39,271 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-11-18 20:43:39,271 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-11-18 20:43:39,271 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2022-11-18 20:43:39,271 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2022-11-18 20:43:39,271 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2022-11-18 20:43:39,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2022-11-18 20:43:39,272 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2022-11-18 20:43:39,272 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2022-11-18 20:43:39,272 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2022-11-18 20:43:39,272 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2022-11-18 20:43:39,272 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-11-18 20:43:39,273 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-11-18 20:43:39,273 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-11-18 20:43:39,273 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-11-18 20:43:39,273 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-11-18 20:43:39,273 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-11-18 20:43:39,273 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:43:39,273 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-18 20:43:39,274 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-11-18 20:43:39,274 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-11-18 20:43:39,274 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2022-11-18 20:43:39,274 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2022-11-18 20:43:39,274 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-11-18 20:43:39,274 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-11-18 20:43:39,275 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2022-11-18 20:43:39,275 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2022-11-18 20:43:39,275 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:43:39,275 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-11-18 20:43:39,275 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-11-18 20:43:39,275 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-18 20:43:39,276 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2022-11-18 20:43:39,276 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2022-11-18 20:43:39,276 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-11-18 20:43:39,276 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-11-18 20:43:39,276 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2022-11-18 20:43:39,276 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2022-11-18 20:43:39,277 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-11-18 20:43:39,277 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-11-18 20:43:39,277 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2022-11-18 20:43:39,277 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2022-11-18 20:43:39,277 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-11-18 20:43:39,277 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-11-18 20:43:39,278 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-11-18 20:43:39,278 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-11-18 20:43:39,278 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2022-11-18 20:43:39,278 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2022-11-18 20:43:39,278 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-11-18 20:43:39,278 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2022-11-18 20:43:39,279 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2022-11-18 20:43:39,279 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-11-18 20:43:39,279 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-11-18 20:43:39,279 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2022-11-18 20:43:39,279 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2022-11-18 20:43:39,279 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-11-18 20:43:39,280 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 20:43:39,280 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-11-18 20:43:39,280 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-11-18 20:43:39,280 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2022-11-18 20:43:39,280 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2022-11-18 20:43:39,280 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-11-18 20:43:39,281 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-11-18 20:43:39,281 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2022-11-18 20:43:39,281 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2022-11-18 20:43:39,281 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-11-18 20:43:39,281 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-11-18 20:43:39,281 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 20:43:39,282 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-11-18 20:43:39,282 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-11-18 20:43:39,282 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2022-11-18 20:43:39,282 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2022-11-18 20:43:39,282 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2022-11-18 20:43:39,282 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2022-11-18 20:43:39,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 20:43:39,283 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2022-11-18 20:43:39,283 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2022-11-18 20:43:39,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:43:39,283 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2022-11-18 20:43:39,283 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2022-11-18 20:43:39,283 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-18 20:43:39,284 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2022-11-18 20:43:39,284 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2022-11-18 20:43:39,284 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2022-11-18 20:43:39,284 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2022-11-18 20:43:39,284 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2022-11-18 20:43:39,284 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2022-11-18 20:43:39,285 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-11-18 20:43:39,285 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-11-18 20:43:39,285 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-11-18 20:43:39,285 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-11-18 20:43:39,285 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2022-11-18 20:43:39,285 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2022-11-18 20:43:39,286 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2022-11-18 20:43:39,286 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2022-11-18 20:43:39,286 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-11-18 20:43:39,286 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-11-18 20:43:39,286 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-11-18 20:43:39,286 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-11-18 20:43:39,287 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-11-18 20:43:39,287 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-11-18 20:43:39,287 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-11-18 20:43:39,287 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-11-18 20:43:39,287 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2022-11-18 20:43:39,287 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2022-11-18 20:43:39,287 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 20:43:39,288 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2022-11-18 20:43:39,288 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2022-11-18 20:43:39,288 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-11-18 20:43:39,288 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-11-18 20:43:39,288 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2022-11-18 20:43:39,289 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2022-11-18 20:43:39,289 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-11-18 20:43:39,289 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-11-18 20:43:39,289 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:43:39,289 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:43:39,289 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-11-18 20:43:39,290 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-11-18 20:43:39,915 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:43:39,920 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:43:40,616 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:40,622 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:40,629 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:40,630 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:40,632 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:40,633 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:40,673 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:43:43,099 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##415: assume !false; [2022-11-18 20:43:43,099 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##414: assume false; [2022-11-18 20:43:43,100 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##271: assume !false; [2022-11-18 20:43:43,100 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##270: assume false; [2022-11-18 20:43:43,100 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##276: assume false; [2022-11-18 20:43:43,100 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##277: assume !false; [2022-11-18 20:43:43,100 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##225: assume false; [2022-11-18 20:43:43,101 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##226: assume !false; [2022-11-18 20:43:43,101 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##239: assume false; [2022-11-18 20:43:43,101 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##240: assume !false; [2022-11-18 20:43:43,101 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-11-18 20:43:43,101 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-11-18 20:43:43,102 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##104: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2022-11-18 20:43:43,102 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##103: assume false; [2022-11-18 20:43:43,218 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:43:43,240 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:43:43,240 INFO L300 CfgBuilder]: Removed 0 assume(true) statements. [2022-11-18 20:43:43,244 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:43:43 BoogieIcfgContainer [2022-11-18 20:43:43,244 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:43:43,247 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 20:43:43,247 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 20:43:43,251 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 20:43:43,251 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:43:36" (1/3) ... [2022-11-18 20:43:43,252 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10dfe15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:43:43, skipping insertion in model container [2022-11-18 20:43:43,252 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:43:38" (2/3) ... [2022-11-18 20:43:43,252 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10dfe15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:43:43, skipping insertion in model container [2022-11-18 20:43:43,252 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:43:43" (3/3) ... [2022-11-18 20:43:43,254 INFO L112 eAbstractionObserver]: Analyzing ICFG module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-18 20:43:43,272 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 20:43:43,272 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-18 20:43:43,346 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 20:43:43,352 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7b6d700b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 20:43:43,352 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-18 20:43:43,360 INFO L276 IsEmpty]: Start isEmpty. Operand has 1081 states, 763 states have (on average 1.3027522935779816) internal successors, (994), 771 states have internal predecessors, (994), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) [2022-11-18 20:43:43,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-18 20:43:43,367 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:43,368 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:43,368 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:43,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:43,373 INFO L85 PathProgramCache]: Analyzing trace with hash -696793445, now seen corresponding path program 1 times [2022-11-18 20:43:43,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:43,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077692895] [2022-11-18 20:43:43,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:43,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:43,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:43,868 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2022-11-18 20:43:43,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:43,880 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-11-18 20:43:43,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:43,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:43,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:43,891 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077692895] [2022-11-18 20:43:43,892 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077692895] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:43:43,892 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:43:43,892 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:43:43,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744929011] [2022-11-18 20:43:43,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:43:43,899 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:43:43,899 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:43,927 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:43:43,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:43:43,932 INFO L87 Difference]: Start difference. First operand has 1081 states, 763 states have (on average 1.3027522935779816) internal successors, (994), 771 states have internal predecessors, (994), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:43:44,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:44,138 INFO L93 Difference]: Finished difference Result 2157 states and 3035 transitions. [2022-11-18 20:43:44,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:43:44,148 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 21 [2022-11-18 20:43:44,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:44,176 INFO L225 Difference]: With dead ends: 2157 [2022-11-18 20:43:44,179 INFO L226 Difference]: Without dead ends: 1077 [2022-11-18 20:43:44,192 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:43:44,199 INFO L413 NwaCegarLoop]: 1504 mSDtfsCounter, 1 mSDsluCounter, 1502 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 3006 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:44,201 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 3006 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:43:44,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1077 states. [2022-11-18 20:43:44,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1077 to 1076. [2022-11-18 20:43:44,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1076 states, 760 states have (on average 1.2960526315789473) internal successors, (985), 766 states have internal predecessors, (985), 260 states have call successors, (260), 56 states have call predecessors, (260), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2022-11-18 20:43:44,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1076 states to 1076 states and 1503 transitions. [2022-11-18 20:43:44,357 INFO L78 Accepts]: Start accepts. Automaton has 1076 states and 1503 transitions. Word has length 21 [2022-11-18 20:43:44,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:44,358 INFO L495 AbstractCegarLoop]: Abstraction has 1076 states and 1503 transitions. [2022-11-18 20:43:44,358 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:43:44,358 INFO L276 IsEmpty]: Start isEmpty. Operand 1076 states and 1503 transitions. [2022-11-18 20:43:44,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-18 20:43:44,360 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:44,360 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:44,360 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-18 20:43:44,360 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:44,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:44,362 INFO L85 PathProgramCache]: Analyzing trace with hash -1886335721, now seen corresponding path program 1 times [2022-11-18 20:43:44,362 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:44,362 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289602148] [2022-11-18 20:43:44,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:44,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:44,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:44,654 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-11-18 20:43:44,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:44,664 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-11-18 20:43:44,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:44,674 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:44,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:44,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289602148] [2022-11-18 20:43:44,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1289602148] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:43:44,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [868068989] [2022-11-18 20:43:44,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:44,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:44,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:43:44,683 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:43:44,710 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 20:43:45,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:45,281 INFO L263 TraceCheckSpWp]: Trace formula consists of 1005 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:43:45,287 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:43:45,341 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 20:43:45,341 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:43:45,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [868068989] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:43:45,343 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 20:43:45,343 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2022-11-18 20:43:45,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [647103556] [2022-11-18 20:43:45,345 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:43:45,346 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:43:45,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:45,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:43:45,353 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:43:45,353 INFO L87 Difference]: Start difference. First operand 1076 states and 1503 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:43:45,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:45,522 INFO L93 Difference]: Finished difference Result 3200 states and 4475 transitions. [2022-11-18 20:43:45,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:43:45,523 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 23 [2022-11-18 20:43:45,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:45,542 INFO L225 Difference]: With dead ends: 3200 [2022-11-18 20:43:45,542 INFO L226 Difference]: Without dead ends: 2132 [2022-11-18 20:43:45,547 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:43:45,549 INFO L413 NwaCegarLoop]: 2017 mSDtfsCounter, 1477 mSDsluCounter, 1481 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1477 SdHoareTripleChecker+Valid, 3498 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:45,549 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1477 Valid, 3498 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:43:45,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2132 states. [2022-11-18 20:43:45,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2132 to 2129. [2022-11-18 20:43:45,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2129 states, 1502 states have (on average 1.2942743009320905) internal successors, (1944), 1513 states have internal predecessors, (1944), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2022-11-18 20:43:45,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2129 states to 2129 states and 2974 transitions. [2022-11-18 20:43:45,725 INFO L78 Accepts]: Start accepts. Automaton has 2129 states and 2974 transitions. Word has length 23 [2022-11-18 20:43:45,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:45,726 INFO L495 AbstractCegarLoop]: Abstraction has 2129 states and 2974 transitions. [2022-11-18 20:43:45,726 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:43:45,726 INFO L276 IsEmpty]: Start isEmpty. Operand 2129 states and 2974 transitions. [2022-11-18 20:43:45,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-11-18 20:43:45,729 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:45,729 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:45,745 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:43:45,936 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2022-11-18 20:43:45,937 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:45,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:45,937 INFO L85 PathProgramCache]: Analyzing trace with hash -1321204761, now seen corresponding path program 1 times [2022-11-18 20:43:45,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:45,938 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984618955] [2022-11-18 20:43:45,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:45,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:45,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:46,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-11-18 20:43:46,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:46,100 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-11-18 20:43:46,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:46,106 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-11-18 20:43:46,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:46,113 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:46,114 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:46,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984618955] [2022-11-18 20:43:46,114 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984618955] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:43:46,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2083915141] [2022-11-18 20:43:46,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:46,115 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:46,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:43:46,116 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:43:46,124 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 20:43:46,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:46,642 INFO L263 TraceCheckSpWp]: Trace formula consists of 1139 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:43:46,644 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:43:46,680 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:46,680 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:43:46,723 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:46,724 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2083915141] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:43:46,724 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:43:46,724 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-18 20:43:46,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408240656] [2022-11-18 20:43:46,724 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:43:46,725 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:43:46,725 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:46,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:43:46,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:43:46,727 INFO L87 Difference]: Start difference. First operand 2129 states and 2974 transitions. Second operand has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:43:46,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:46,954 INFO L93 Difference]: Finished difference Result 4258 states and 5950 transitions. [2022-11-18 20:43:46,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:43:46,955 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 43 [2022-11-18 20:43:46,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:46,968 INFO L225 Difference]: With dead ends: 4258 [2022-11-18 20:43:46,968 INFO L226 Difference]: Without dead ends: 2135 [2022-11-18 20:43:46,976 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:43:46,977 INFO L413 NwaCegarLoop]: 1499 mSDtfsCounter, 4 mSDsluCounter, 5988 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 7487 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:46,977 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 7487 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:43:46,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2135 states. [2022-11-18 20:43:47,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2135 to 2135. [2022-11-18 20:43:47,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2135 states, 1508 states have (on average 1.293103448275862) internal successors, (1950), 1519 states have internal predecessors, (1950), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2022-11-18 20:43:47,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2135 states to 2135 states and 2980 transitions. [2022-11-18 20:43:47,112 INFO L78 Accepts]: Start accepts. Automaton has 2135 states and 2980 transitions. Word has length 43 [2022-11-18 20:43:47,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:47,112 INFO L495 AbstractCegarLoop]: Abstraction has 2135 states and 2980 transitions. [2022-11-18 20:43:47,113 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:43:47,113 INFO L276 IsEmpty]: Start isEmpty. Operand 2135 states and 2980 transitions. [2022-11-18 20:43:47,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-11-18 20:43:47,125 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:47,125 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:47,133 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:43:47,333 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:47,333 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:47,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:47,334 INFO L85 PathProgramCache]: Analyzing trace with hash -402343077, now seen corresponding path program 2 times [2022-11-18 20:43:47,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:47,337 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73412878] [2022-11-18 20:43:47,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:47,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:47,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:47,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-11-18 20:43:47,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:47,598 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-11-18 20:43:47,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:47,604 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-11-18 20:43:47,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:47,609 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-18 20:43:47,609 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:47,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73412878] [2022-11-18 20:43:47,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [73412878] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:43:47,610 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:43:47,610 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:43:47,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194869936] [2022-11-18 20:43:47,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:43:47,611 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:43:47,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:47,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:43:47,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:43:47,612 INFO L87 Difference]: Start difference. First operand 2135 states and 2980 transitions. Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:43:48,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:48,551 INFO L93 Difference]: Finished difference Result 6154 states and 8879 transitions. [2022-11-18 20:43:48,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:43:48,552 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 49 [2022-11-18 20:43:48,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:48,572 INFO L225 Difference]: With dead ends: 6154 [2022-11-18 20:43:48,572 INFO L226 Difference]: Without dead ends: 4038 [2022-11-18 20:43:48,579 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:43:48,580 INFO L413 NwaCegarLoop]: 2803 mSDtfsCounter, 2237 mSDsluCounter, 6532 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 583 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2430 SdHoareTripleChecker+Valid, 9335 SdHoareTripleChecker+Invalid, 599 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 583 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:48,581 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2430 Valid, 9335 Invalid, 599 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [583 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-18 20:43:48,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4038 states. [2022-11-18 20:43:48,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4038 to 2066. [2022-11-18 20:43:48,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2066 states, 1464 states have (on average 1.2930327868852458) internal successors, (1893), 1474 states have internal predecessors, (1893), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2022-11-18 20:43:48,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2066 states to 2066 states and 2873 transitions. [2022-11-18 20:43:48,730 INFO L78 Accepts]: Start accepts. Automaton has 2066 states and 2873 transitions. Word has length 49 [2022-11-18 20:43:48,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:48,731 INFO L495 AbstractCegarLoop]: Abstraction has 2066 states and 2873 transitions. [2022-11-18 20:43:48,731 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:43:48,731 INFO L276 IsEmpty]: Start isEmpty. Operand 2066 states and 2873 transitions. [2022-11-18 20:43:48,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-18 20:43:48,733 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:48,733 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:48,733 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-18 20:43:48,733 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:48,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:48,734 INFO L85 PathProgramCache]: Analyzing trace with hash 302605909, now seen corresponding path program 1 times [2022-11-18 20:43:48,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:48,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294057288] [2022-11-18 20:43:48,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:48,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:48,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:48,973 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-11-18 20:43:48,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:48,979 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-11-18 20:43:48,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:48,985 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-11-18 20:43:48,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:48,992 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:48,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:48,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294057288] [2022-11-18 20:43:48,992 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1294057288] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:43:48,993 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1611299438] [2022-11-18 20:43:48,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:48,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:48,993 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:43:48,994 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:43:49,026 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 20:43:49,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:49,554 INFO L263 TraceCheckSpWp]: Trace formula consists of 1193 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:43:49,557 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:43:49,601 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:49,604 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:43:49,694 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:49,695 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1611299438] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:43:49,695 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:43:49,695 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-18 20:43:49,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410913871] [2022-11-18 20:43:49,695 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:43:49,696 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-18 20:43:49,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:49,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 20:43:49,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-18 20:43:49,697 INFO L87 Difference]: Start difference. First operand 2066 states and 2873 transitions. Second operand has 13 states, 13 states have (on average 4.846153846153846) internal successors, (63), 13 states have internal predecessors, (63), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:43:49,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:49,872 INFO L93 Difference]: Finished difference Result 4132 states and 5751 transitions. [2022-11-18 20:43:49,872 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:43:49,873 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 4.846153846153846) internal successors, (63), 13 states have internal predecessors, (63), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 51 [2022-11-18 20:43:49,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:49,883 INFO L225 Difference]: With dead ends: 4132 [2022-11-18 20:43:49,883 INFO L226 Difference]: Without dead ends: 2078 [2022-11-18 20:43:49,890 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 102 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-18 20:43:49,891 INFO L413 NwaCegarLoop]: 1499 mSDtfsCounter, 15 mSDsluCounter, 5988 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 7487 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:49,891 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 7487 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:43:49,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2022-11-18 20:43:49,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 2078. [2022-11-18 20:43:49,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2078 states, 1476 states have (on average 1.2906504065040652) internal successors, (1905), 1486 states have internal predecessors, (1905), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2022-11-18 20:43:49,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2078 states to 2078 states and 2885 transitions. [2022-11-18 20:43:49,997 INFO L78 Accepts]: Start accepts. Automaton has 2078 states and 2885 transitions. Word has length 51 [2022-11-18 20:43:49,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:49,998 INFO L495 AbstractCegarLoop]: Abstraction has 2078 states and 2885 transitions. [2022-11-18 20:43:49,998 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 4.846153846153846) internal successors, (63), 13 states have internal predecessors, (63), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:43:49,998 INFO L276 IsEmpty]: Start isEmpty. Operand 2078 states and 2885 transitions. [2022-11-18 20:43:49,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-11-18 20:43:50,000 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:50,000 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:50,008 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:43:50,207 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:50,208 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:50,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:50,208 INFO L85 PathProgramCache]: Analyzing trace with hash -11663811, now seen corresponding path program 2 times [2022-11-18 20:43:50,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:50,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224214228] [2022-11-18 20:43:50,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:50,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:50,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:50,769 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-11-18 20:43:50,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:50,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-11-18 20:43:50,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:50,780 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-11-18 20:43:50,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:50,786 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:50,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:50,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224214228] [2022-11-18 20:43:50,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224214228] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:43:50,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1369652515] [2022-11-18 20:43:50,787 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:43:50,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:50,788 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:43:50,791 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:43:50,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 20:43:51,317 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 20:43:51,317 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:43:51,324 INFO L263 TraceCheckSpWp]: Trace formula consists of 1133 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:43:51,327 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:43:51,462 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 20:43:51,463 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:43:51,463 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1369652515] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:43:51,463 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 20:43:51,463 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [13] total 15 [2022-11-18 20:43:51,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891278269] [2022-11-18 20:43:51,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:43:51,464 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:43:51,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:51,464 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:43:51,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=127, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:43:51,465 INFO L87 Difference]: Start difference. First operand 2078 states and 2885 transitions. Second operand has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:43:52,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:52,586 INFO L93 Difference]: Finished difference Result 3070 states and 4263 transitions. [2022-11-18 20:43:52,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:43:52,587 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 63 [2022-11-18 20:43:52,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:52,608 INFO L225 Difference]: With dead ends: 3070 [2022-11-18 20:43:52,609 INFO L226 Difference]: Without dead ends: 3067 [2022-11-18 20:43:52,610 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=127, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:43:52,612 INFO L413 NwaCegarLoop]: 2640 mSDtfsCounter, 2836 mSDsluCounter, 918 mSDsCounter, 0 mSdLazyCounter, 478 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2836 SdHoareTripleChecker+Valid, 3558 SdHoareTripleChecker+Invalid, 483 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 478 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:52,613 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2836 Valid, 3558 Invalid, 483 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 478 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-18 20:43:52,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3067 states. [2022-11-18 20:43:52,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3067 to 3060. [2022-11-18 20:43:52,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3060 states, 2172 states have (on average 1.2937384898710866) internal successors, (2810), 2185 states have internal predecessors, (2810), 722 states have call successors, (722), 166 states have call predecessors, (722), 165 states have return successors, (722), 721 states have call predecessors, (722), 720 states have call successors, (722) [2022-11-18 20:43:52,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3060 states to 3060 states and 4254 transitions. [2022-11-18 20:43:52,807 INFO L78 Accepts]: Start accepts. Automaton has 3060 states and 4254 transitions. Word has length 63 [2022-11-18 20:43:52,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:52,808 INFO L495 AbstractCegarLoop]: Abstraction has 3060 states and 4254 transitions. [2022-11-18 20:43:52,808 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:43:52,809 INFO L276 IsEmpty]: Start isEmpty. Operand 3060 states and 4254 transitions. [2022-11-18 20:43:52,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-11-18 20:43:52,811 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:52,811 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:52,824 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:43:53,019 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-11-18 20:43:53,019 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:53,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:53,019 INFO L85 PathProgramCache]: Analyzing trace with hash -688713423, now seen corresponding path program 1 times [2022-11-18 20:43:53,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:53,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037978551] [2022-11-18 20:43:53,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:53,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:53,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:53,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-11-18 20:43:53,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:53,230 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-11-18 20:43:53,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:53,235 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-11-18 20:43:53,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:53,240 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2022-11-18 20:43:53,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:53,246 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 20:43:53,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:53,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037978551] [2022-11-18 20:43:53,247 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2037978551] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:43:53,247 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:43:53,247 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:43:53,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201051601] [2022-11-18 20:43:53,247 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:43:53,248 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:43:53,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:53,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:43:53,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:43:53,249 INFO L87 Difference]: Start difference. First operand 3060 states and 4254 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-18 20:43:54,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:54,162 INFO L93 Difference]: Finished difference Result 6424 states and 9149 transitions. [2022-11-18 20:43:54,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:43:54,163 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 67 [2022-11-18 20:43:54,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:54,186 INFO L225 Difference]: With dead ends: 6424 [2022-11-18 20:43:54,186 INFO L226 Difference]: Without dead ends: 4376 [2022-11-18 20:43:54,193 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:43:54,194 INFO L413 NwaCegarLoop]: 2225 mSDtfsCounter, 2075 mSDsluCounter, 4605 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 656 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2075 SdHoareTripleChecker+Valid, 6830 SdHoareTripleChecker+Invalid, 673 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 656 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:54,195 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2075 Valid, 6830 Invalid, 673 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [656 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-18 20:43:54,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4376 states. [2022-11-18 20:43:54,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4376 to 3060. [2022-11-18 20:43:54,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3060 states, 2172 states have (on average 1.2932780847145489) internal successors, (2809), 2185 states have internal predecessors, (2809), 722 states have call successors, (722), 166 states have call predecessors, (722), 165 states have return successors, (722), 721 states have call predecessors, (722), 720 states have call successors, (722) [2022-11-18 20:43:54,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3060 states to 3060 states and 4253 transitions. [2022-11-18 20:43:54,442 INFO L78 Accepts]: Start accepts. Automaton has 3060 states and 4253 transitions. Word has length 67 [2022-11-18 20:43:54,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:54,443 INFO L495 AbstractCegarLoop]: Abstraction has 3060 states and 4253 transitions. [2022-11-18 20:43:54,444 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-18 20:43:54,444 INFO L276 IsEmpty]: Start isEmpty. Operand 3060 states and 4253 transitions. [2022-11-18 20:43:54,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-11-18 20:43:54,447 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:54,447 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:54,447 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-18 20:43:54,447 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:54,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:54,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1060831270, now seen corresponding path program 1 times [2022-11-18 20:43:54,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:54,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33554951] [2022-11-18 20:43:54,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:54,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:54,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:54,898 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-11-18 20:43:54,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:54,903 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-11-18 20:43:54,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:54,908 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-11-18 20:43:54,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:54,922 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2022-11-18 20:43:54,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:54,927 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-11-18 20:43:54,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:54,931 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:54,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:43:54,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33554951] [2022-11-18 20:43:54,932 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [33554951] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:43:54,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [466070670] [2022-11-18 20:43:54,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:54,932 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:54,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:43:54,935 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:43:54,962 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 20:43:55,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:43:55,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 1312 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 20:43:55,498 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:43:55,561 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:55,561 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:43:55,837 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:43:55,837 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [466070670] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:43:55,838 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:43:55,838 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-11-18 20:43:55,838 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154496383] [2022-11-18 20:43:55,838 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:43:55,839 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-11-18 20:43:55,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:43:55,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-11-18 20:43:55,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=348, Unknown=0, NotChecked=0, Total=650 [2022-11-18 20:43:55,840 INFO L87 Difference]: Start difference. First operand 3060 states and 4253 transitions. Second operand has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2022-11-18 20:43:59,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:43:59,243 INFO L93 Difference]: Finished difference Result 6122 states and 8519 transitions. [2022-11-18 20:43:59,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-18 20:43:59,244 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 76 [2022-11-18 20:43:59,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:43:59,260 INFO L225 Difference]: With dead ends: 6122 [2022-11-18 20:43:59,260 INFO L226 Difference]: Without dead ends: 3086 [2022-11-18 20:43:59,270 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=302, Invalid=348, Unknown=0, NotChecked=0, Total=650 [2022-11-18 20:43:59,271 INFO L413 NwaCegarLoop]: 1157 mSDtfsCounter, 330 mSDsluCounter, 5387 mSDsCounter, 0 mSdLazyCounter, 3424 mSolverCounterSat, 237 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 367 SdHoareTripleChecker+Valid, 6544 SdHoareTripleChecker+Invalid, 3661 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 237 IncrementalHoareTripleChecker+Valid, 3424 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:43:59,271 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [367 Valid, 6544 Invalid, 3661 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [237 Valid, 3424 Invalid, 0 Unknown, 0 Unchecked, 3.0s Time] [2022-11-18 20:43:59,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3086 states. [2022-11-18 20:43:59,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3086 to 3086. [2022-11-18 20:43:59,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3086 states, 2197 states have (on average 1.2899408284023668) internal successors, (2834), 2211 states have internal predecessors, (2834), 722 states have call successors, (722), 166 states have call predecessors, (722), 166 states have return successors, (723), 721 states have call predecessors, (723), 720 states have call successors, (723) [2022-11-18 20:43:59,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3086 states to 3086 states and 4279 transitions. [2022-11-18 20:43:59,452 INFO L78 Accepts]: Start accepts. Automaton has 3086 states and 4279 transitions. Word has length 76 [2022-11-18 20:43:59,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:43:59,452 INFO L495 AbstractCegarLoop]: Abstraction has 3086 states and 4279 transitions. [2022-11-18 20:43:59,452 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2022-11-18 20:43:59,452 INFO L276 IsEmpty]: Start isEmpty. Operand 3086 states and 4279 transitions. [2022-11-18 20:43:59,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2022-11-18 20:43:59,455 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:43:59,455 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:43:59,470 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:43:59,664 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:43:59,664 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:43:59,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:43:59,665 INFO L85 PathProgramCache]: Analyzing trace with hash 2130003466, now seen corresponding path program 2 times [2022-11-18 20:43:59,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:43:59,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251582701] [2022-11-18 20:43:59,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:43:59,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:43:59,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:00,790 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-11-18 20:44:00,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:00,795 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-11-18 20:44:00,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:00,802 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-11-18 20:44:00,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:00,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2022-11-18 20:44:00,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:00,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-11-18 20:44:00,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:00,833 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:44:00,833 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:00,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251582701] [2022-11-18 20:44:00,834 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [251582701] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:44:00,834 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1233996021] [2022-11-18 20:44:00,834 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:44:00,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:44:00,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:44:00,835 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:44:00,858 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-18 20:44:01,424 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 20:44:01,424 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:44:01,428 INFO L263 TraceCheckSpWp]: Trace formula consists of 1162 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-18 20:44:01,432 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:44:01,672 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 484 trivial. 0 not checked. [2022-11-18 20:44:01,672 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:44:01,672 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1233996021] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:01,672 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 20:44:01,673 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [26] total 31 [2022-11-18 20:44:01,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575435942] [2022-11-18 20:44:01,673 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:01,673 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:44:01,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:01,674 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:44:01,674 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=618, Unknown=0, NotChecked=0, Total=930 [2022-11-18 20:44:01,675 INFO L87 Difference]: Start difference. First operand 3086 states and 4279 transitions. Second operand has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2022-11-18 20:44:07,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:07,397 INFO L93 Difference]: Finished difference Result 9151 states and 13030 transitions. [2022-11-18 20:44:07,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:44:07,398 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 100 [2022-11-18 20:44:07,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:07,429 INFO L225 Difference]: With dead ends: 9151 [2022-11-18 20:44:07,429 INFO L226 Difference]: Without dead ends: 6120 [2022-11-18 20:44:07,440 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=337, Invalid=923, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 20:44:07,441 INFO L413 NwaCegarLoop]: 3404 mSDtfsCounter, 3226 mSDsluCounter, 12699 mSDsCounter, 0 mSdLazyCounter, 2563 mSolverCounterSat, 915 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3420 SdHoareTripleChecker+Valid, 16103 SdHoareTripleChecker+Invalid, 3478 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 915 IncrementalHoareTripleChecker+Valid, 2563 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:07,441 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3420 Valid, 16103 Invalid, 3478 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [915 Valid, 2563 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-11-18 20:44:07,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6120 states. [2022-11-18 20:44:07,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6120 to 4063. [2022-11-18 20:44:07,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4063 states, 2888 states have (on average 1.2901662049861495) internal successors, (3726), 2907 states have internal predecessors, (3726), 953 states have call successors, (953), 221 states have call predecessors, (953), 221 states have return successors, (953), 951 states have call predecessors, (953), 951 states have call successors, (953) [2022-11-18 20:44:07,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4063 states to 4063 states and 5632 transitions. [2022-11-18 20:44:07,963 INFO L78 Accepts]: Start accepts. Automaton has 4063 states and 5632 transitions. Word has length 100 [2022-11-18 20:44:07,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:07,963 INFO L495 AbstractCegarLoop]: Abstraction has 4063 states and 5632 transitions. [2022-11-18 20:44:07,963 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2022-11-18 20:44:07,964 INFO L276 IsEmpty]: Start isEmpty. Operand 4063 states and 5632 transitions. [2022-11-18 20:44:07,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2022-11-18 20:44:07,966 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:07,966 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:07,979 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:44:08,175 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:44:08,175 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:08,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:08,175 INFO L85 PathProgramCache]: Analyzing trace with hash 185054274, now seen corresponding path program 1 times [2022-11-18 20:44:08,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:08,176 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858625381] [2022-11-18 20:44:08,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:08,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:08,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-11-18 20:44:09,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,308 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-11-18 20:44:09,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-11-18 20:44:09,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,334 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2022-11-18 20:44:09,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2022-11-18 20:44:09,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,346 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:44:09,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:09,347 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [858625381] [2022-11-18 20:44:09,347 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [858625381] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:44:09,347 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1390019999] [2022-11-18 20:44:09,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:09,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:44:09,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:44:09,351 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:44:09,374 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-18 20:44:09,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:09,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 1494 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:44:09,948 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:44:10,056 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:44:10,057 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:44:10,605 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:44:10,605 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1390019999] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:44:10,605 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:44:10,605 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25] total 36 [2022-11-18 20:44:10,606 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1558643073] [2022-11-18 20:44:10,606 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:44:10,606 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-18 20:44:10,607 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:10,607 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-18 20:44:10,608 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=597, Invalid=663, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 20:44:10,608 INFO L87 Difference]: Start difference. First operand 4063 states and 5632 transitions. Second operand has 36 states, 36 states have (on average 3.5833333333333335) internal successors, (129), 35 states have internal predecessors, (129), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2022-11-18 20:44:14,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:14,299 INFO L93 Difference]: Finished difference Result 8098 states and 11245 transitions. [2022-11-18 20:44:14,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-11-18 20:44:14,339 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 3.5833333333333335) internal successors, (129), 35 states have internal predecessors, (129), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 102 [2022-11-18 20:44:14,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:14,361 INFO L225 Difference]: With dead ends: 8098 [2022-11-18 20:44:14,361 INFO L226 Difference]: Without dead ends: 4083 [2022-11-18 20:44:14,371 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 189 SyntacticMatches, 14 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=597, Invalid=663, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 20:44:14,372 INFO L413 NwaCegarLoop]: 1157 mSDtfsCounter, 340 mSDsluCounter, 6324 mSDsCounter, 0 mSdLazyCounter, 4005 mSolverCounterSat, 226 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 377 SdHoareTripleChecker+Valid, 7481 SdHoareTripleChecker+Invalid, 4231 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 226 IncrementalHoareTripleChecker+Valid, 4005 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:14,373 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [377 Valid, 7481 Invalid, 4231 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [226 Valid, 4005 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2022-11-18 20:44:14,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4083 states. [2022-11-18 20:44:14,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4083 to 4083. [2022-11-18 20:44:14,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4083 states, 2908 states have (on average 1.2881705639614855) internal successors, (3746), 2927 states have internal predecessors, (3746), 953 states have call successors, (953), 221 states have call predecessors, (953), 221 states have return successors, (953), 951 states have call predecessors, (953), 951 states have call successors, (953) [2022-11-18 20:44:14,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4083 states to 4083 states and 5652 transitions. [2022-11-18 20:44:14,773 INFO L78 Accepts]: Start accepts. Automaton has 4083 states and 5652 transitions. Word has length 102 [2022-11-18 20:44:14,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:14,774 INFO L495 AbstractCegarLoop]: Abstraction has 4083 states and 5652 transitions. [2022-11-18 20:44:14,774 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 3.5833333333333335) internal successors, (129), 35 states have internal predecessors, (129), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2022-11-18 20:44:14,774 INFO L276 IsEmpty]: Start isEmpty. Operand 4083 states and 5652 transitions. [2022-11-18 20:44:14,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2022-11-18 20:44:14,776 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:14,777 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:14,792 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-18 20:44:14,992 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:44:14,992 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:14,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:14,994 INFO L85 PathProgramCache]: Analyzing trace with hash 709386602, now seen corresponding path program 2 times [2022-11-18 20:44:14,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:14,994 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672999526] [2022-11-18 20:44:14,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:14,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:15,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:15,556 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-11-18 20:44:15,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:15,567 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-11-18 20:44:15,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:15,582 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-11-18 20:44:15,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:15,592 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 101 [2022-11-18 20:44:15,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:15,708 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-11-18 20:44:15,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:15,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:44:15,715 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:15,715 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672999526] [2022-11-18 20:44:15,715 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1672999526] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:15,715 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:44:15,715 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-18 20:44:15,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822908029] [2022-11-18 20:44:15,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:15,716 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:44:15,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:15,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:44:15,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:44:15,717 INFO L87 Difference]: Start difference. First operand 4083 states and 5652 transitions. Second operand has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-18 20:44:21,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:21,952 INFO L93 Difference]: Finished difference Result 8188 states and 11368 transitions. [2022-11-18 20:44:21,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:44:21,952 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) Word has length 122 [2022-11-18 20:44:21,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:21,977 INFO L225 Difference]: With dead ends: 8188 [2022-11-18 20:44:21,978 INFO L226 Difference]: Without dead ends: 6134 [2022-11-18 20:44:21,986 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2022-11-18 20:44:21,987 INFO L413 NwaCegarLoop]: 1255 mSDtfsCounter, 3011 mSDsluCounter, 3671 mSDsCounter, 0 mSdLazyCounter, 5208 mSolverCounterSat, 816 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3456 SdHoareTripleChecker+Valid, 4926 SdHoareTripleChecker+Invalid, 6024 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 816 IncrementalHoareTripleChecker+Valid, 5208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:21,987 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3456 Valid, 4926 Invalid, 6024 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [816 Valid, 5208 Invalid, 0 Unknown, 0 Unchecked, 5.4s Time] [2022-11-18 20:44:21,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6134 states. [2022-11-18 20:44:22,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6134 to 5142. [2022-11-18 20:44:22,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5142 states, 3655 states have (on average 1.2894664842681258) internal successors, (4713), 3680 states have internal predecessors, (4713), 1209 states have call successors, (1209), 276 states have call predecessors, (1209), 277 states have return successors, (1210), 1207 states have call predecessors, (1210), 1207 states have call successors, (1210) [2022-11-18 20:44:22,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5142 states to 5142 states and 7132 transitions. [2022-11-18 20:44:22,619 INFO L78 Accepts]: Start accepts. Automaton has 5142 states and 7132 transitions. Word has length 122 [2022-11-18 20:44:22,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:22,619 INFO L495 AbstractCegarLoop]: Abstraction has 5142 states and 7132 transitions. [2022-11-18 20:44:22,619 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-18 20:44:22,620 INFO L276 IsEmpty]: Start isEmpty. Operand 5142 states and 7132 transitions. [2022-11-18 20:44:22,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2022-11-18 20:44:22,626 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:22,626 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:22,626 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-18 20:44:22,627 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:22,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:22,627 INFO L85 PathProgramCache]: Analyzing trace with hash 234960222, now seen corresponding path program 1 times [2022-11-18 20:44:22,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:22,628 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330355537] [2022-11-18 20:44:22,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:22,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:22,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,007 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-11-18 20:44:23,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,014 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-11-18 20:44:23,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,020 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2022-11-18 20:44:23,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,027 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2022-11-18 20:44:23,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,032 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2022-11-18 20:44:23,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,037 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 103 [2022-11-18 20:44:23,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,046 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-11-18 20:44:23,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,052 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-11-18 20:44:23,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:23,059 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2022-11-18 20:44:23,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:23,059 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330355537] [2022-11-18 20:44:23,059 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1330355537] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:23,059 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:44:23,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:44:23,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1915714764] [2022-11-18 20:44:23,060 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:23,061 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:44:23,061 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:23,062 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:44:23,062 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:44:23,062 INFO L87 Difference]: Start difference. First operand 5142 states and 7132 transitions. Second operand has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-11-18 20:44:25,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:25,450 INFO L93 Difference]: Finished difference Result 16452 states and 23828 transitions. [2022-11-18 20:44:25,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:44:25,451 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 132 [2022-11-18 20:44:25,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:25,498 INFO L225 Difference]: With dead ends: 16452 [2022-11-18 20:44:25,499 INFO L226 Difference]: Without dead ends: 11385 [2022-11-18 20:44:25,516 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:44:25,517 INFO L413 NwaCegarLoop]: 2577 mSDtfsCounter, 1873 mSDsluCounter, 5620 mSDsCounter, 0 mSdLazyCounter, 457 mSolverCounterSat, 372 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2081 SdHoareTripleChecker+Valid, 8197 SdHoareTripleChecker+Invalid, 829 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 372 IncrementalHoareTripleChecker+Valid, 457 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:25,517 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2081 Valid, 8197 Invalid, 829 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [372 Valid, 457 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-11-18 20:44:25,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11385 states. [2022-11-18 20:44:26,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11385 to 11322. [2022-11-18 20:44:26,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11322 states, 8025 states have (on average 1.324485981308411) internal successors, (10629), 8060 states have internal predecessors, (10629), 3019 states have call successors, (3019), 276 states have call predecessors, (3019), 277 states have return successors, (3020), 3017 states have call predecessors, (3020), 3017 states have call successors, (3020) [2022-11-18 20:44:27,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11322 states to 11322 states and 16668 transitions. [2022-11-18 20:44:27,016 INFO L78 Accepts]: Start accepts. Automaton has 11322 states and 16668 transitions. Word has length 132 [2022-11-18 20:44:27,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:27,017 INFO L495 AbstractCegarLoop]: Abstraction has 11322 states and 16668 transitions. [2022-11-18 20:44:27,017 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-11-18 20:44:27,018 INFO L276 IsEmpty]: Start isEmpty. Operand 11322 states and 16668 transitions. [2022-11-18 20:44:27,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2022-11-18 20:44:27,023 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:27,023 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:27,024 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-18 20:44:27,024 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:27,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:27,025 INFO L85 PathProgramCache]: Analyzing trace with hash -220751520, now seen corresponding path program 1 times [2022-11-18 20:44:27,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:27,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468186390] [2022-11-18 20:44:27,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:27,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:27,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,456 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-11-18 20:44:27,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,462 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-11-18 20:44:27,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,467 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-11-18 20:44:27,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,473 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-11-18 20:44:27,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,484 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-11-18 20:44:27,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2022-11-18 20:44:27,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:27,499 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:44:27,500 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:27,500 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468186390] [2022-11-18 20:44:27,500 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1468186390] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:27,500 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:44:27,501 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:44:27,501 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204267548] [2022-11-18 20:44:27,501 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:27,501 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:44:27,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:27,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:44:27,502 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:44:27,503 INFO L87 Difference]: Start difference. First operand 11322 states and 16668 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-11-18 20:44:30,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:30,530 INFO L93 Difference]: Finished difference Result 16548 states and 24712 transitions. [2022-11-18 20:44:30,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:44:30,531 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 130 [2022-11-18 20:44:30,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:30,625 INFO L225 Difference]: With dead ends: 16548 [2022-11-18 20:44:30,625 INFO L226 Difference]: Without dead ends: 16540 [2022-11-18 20:44:30,634 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:44:30,635 INFO L413 NwaCegarLoop]: 2603 mSDtfsCounter, 1326 mSDsluCounter, 3503 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 385 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1352 SdHoareTripleChecker+Valid, 6106 SdHoareTripleChecker+Invalid, 404 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 385 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:30,636 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1352 Valid, 6106 Invalid, 404 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [385 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-18 20:44:30,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16540 states. [2022-11-18 20:44:32,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16540 to 11328. [2022-11-18 20:44:32,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11328 states, 8029 states have (on average 1.3243243243243243) internal successors, (10633), 8064 states have internal predecessors, (10633), 3021 states have call successors, (3021), 276 states have call predecessors, (3021), 277 states have return successors, (3022), 3019 states have call predecessors, (3022), 3019 states have call successors, (3022) [2022-11-18 20:44:32,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11328 states to 11328 states and 16676 transitions. [2022-11-18 20:44:32,192 INFO L78 Accepts]: Start accepts. Automaton has 11328 states and 16676 transitions. Word has length 130 [2022-11-18 20:44:32,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:32,193 INFO L495 AbstractCegarLoop]: Abstraction has 11328 states and 16676 transitions. [2022-11-18 20:44:32,193 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-11-18 20:44:32,193 INFO L276 IsEmpty]: Start isEmpty. Operand 11328 states and 16676 transitions. [2022-11-18 20:44:32,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2022-11-18 20:44:32,200 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:32,200 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:32,201 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-18 20:44:32,201 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:32,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:32,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1306193620, now seen corresponding path program 1 times [2022-11-18 20:44:32,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:32,202 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923437218] [2022-11-18 20:44:32,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:32,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:32,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,544 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-11-18 20:44:32,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,552 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-11-18 20:44:32,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-11-18 20:44:32,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,575 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-11-18 20:44:32,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,591 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-11-18 20:44:32,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,598 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2022-11-18 20:44:32,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:32,605 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:44:32,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:32,605 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923437218] [2022-11-18 20:44:32,606 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923437218] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:44:32,606 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1039983836] [2022-11-18 20:44:32,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:32,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:44:32,607 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:44:32,611 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:44:32,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-18 20:44:33,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:33,540 INFO L263 TraceCheckSpWp]: Trace formula consists of 1709 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:44:33,546 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:44:33,773 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:44:33,773 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:44:33,773 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1039983836] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:33,774 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 20:44:33,774 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2022-11-18 20:44:33,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963754226] [2022-11-18 20:44:33,774 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:33,775 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:44:33,775 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:33,775 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:44:33,776 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:44:33,776 INFO L87 Difference]: Start difference. First operand 11328 states and 16676 transitions. Second operand has 4 states, 4 states have (on average 14.75) internal successors, (59), 4 states have internal predecessors, (59), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-11-18 20:44:36,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:36,241 INFO L93 Difference]: Finished difference Result 22587 states and 33280 transitions. [2022-11-18 20:44:36,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:44:36,242 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 4 states have internal predecessors, (59), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 134 [2022-11-18 20:44:36,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:36,291 INFO L225 Difference]: With dead ends: 22587 [2022-11-18 20:44:36,292 INFO L226 Difference]: Without dead ends: 10098 [2022-11-18 20:44:36,334 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:44:36,335 INFO L413 NwaCegarLoop]: 1868 mSDtfsCounter, 1749 mSDsluCounter, 1293 mSDsCounter, 0 mSdLazyCounter, 223 mSolverCounterSat, 195 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2146 SdHoareTripleChecker+Valid, 3161 SdHoareTripleChecker+Invalid, 418 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 195 IncrementalHoareTripleChecker+Valid, 223 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:36,335 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2146 Valid, 3161 Invalid, 418 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [195 Valid, 223 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-18 20:44:36,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10098 states. [2022-11-18 20:44:38,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10098 to 10092. [2022-11-18 20:44:38,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10092 states, 7155 states have (on average 1.3180992313067785) internal successors, (9431), 7188 states have internal predecessors, (9431), 2659 states have call successors, (2659), 276 states have call predecessors, (2659), 277 states have return successors, (2660), 2657 states have call predecessors, (2660), 2657 states have call successors, (2660) [2022-11-18 20:44:38,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10092 states to 10092 states and 14750 transitions. [2022-11-18 20:44:38,498 INFO L78 Accepts]: Start accepts. Automaton has 10092 states and 14750 transitions. Word has length 134 [2022-11-18 20:44:38,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:38,499 INFO L495 AbstractCegarLoop]: Abstraction has 10092 states and 14750 transitions. [2022-11-18 20:44:38,499 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 4 states have internal predecessors, (59), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-11-18 20:44:38,499 INFO L276 IsEmpty]: Start isEmpty. Operand 10092 states and 14750 transitions. [2022-11-18 20:44:38,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2022-11-18 20:44:38,509 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:38,509 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:38,519 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:44:38,711 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:44:38,711 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:38,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:38,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1701492755, now seen corresponding path program 1 times [2022-11-18 20:44:38,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:38,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872340229] [2022-11-18 20:44:38,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:38,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:38,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,001 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-11-18 20:44:39,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,008 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-11-18 20:44:39,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,015 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-11-18 20:44:39,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,021 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 97 [2022-11-18 20:44:39,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,029 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 108 [2022-11-18 20:44:39,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,035 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2022-11-18 20:44:39,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2022-11-18 20:44:39,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,046 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 124 [2022-11-18 20:44:39,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,058 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-11-18 20:44:39,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,064 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-11-18 20:44:39,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:39,074 INFO L134 CoverageAnalysis]: Checked inductivity of 1043 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 1039 trivial. 0 not checked. [2022-11-18 20:44:39,074 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:39,075 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872340229] [2022-11-18 20:44:39,075 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [872340229] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:39,075 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:44:39,075 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:44:39,075 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133855810] [2022-11-18 20:44:39,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:39,076 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:44:39,076 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:39,077 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:44:39,077 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:44:39,077 INFO L87 Difference]: Start difference. First operand 10092 states and 14750 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 3 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-18 20:44:40,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:40,348 INFO L93 Difference]: Finished difference Result 19451 states and 28415 transitions. [2022-11-18 20:44:40,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:44:40,349 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 3 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 153 [2022-11-18 20:44:40,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:40,385 INFO L225 Difference]: With dead ends: 19451 [2022-11-18 20:44:40,385 INFO L226 Difference]: Without dead ends: 9422 [2022-11-18 20:44:40,412 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:44:40,412 INFO L413 NwaCegarLoop]: 1507 mSDtfsCounter, 13 mSDsluCounter, 2993 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 4500 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:40,413 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 4500 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:44:40,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9422 states. [2022-11-18 20:44:41,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9422 to 9412. [2022-11-18 20:44:41,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9412 states, 6673 states have (on average 1.3161996103701483) internal successors, (8783), 6705 states have internal predecessors, (8783), 2465 states have call successors, (2465), 272 states have call predecessors, (2465), 273 states have return successors, (2466), 2460 states have call predecessors, (2466), 2463 states have call successors, (2466) [2022-11-18 20:44:41,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9412 states to 9412 states and 13714 transitions. [2022-11-18 20:44:41,575 INFO L78 Accepts]: Start accepts. Automaton has 9412 states and 13714 transitions. Word has length 153 [2022-11-18 20:44:41,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:41,576 INFO L495 AbstractCegarLoop]: Abstraction has 9412 states and 13714 transitions. [2022-11-18 20:44:41,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 3 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-18 20:44:41,576 INFO L276 IsEmpty]: Start isEmpty. Operand 9412 states and 13714 transitions. [2022-11-18 20:44:41,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2022-11-18 20:44:41,580 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:41,581 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:41,581 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-11-18 20:44:41,581 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:41,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:41,581 INFO L85 PathProgramCache]: Analyzing trace with hash -1035403369, now seen corresponding path program 1 times [2022-11-18 20:44:41,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:41,582 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601074249] [2022-11-18 20:44:41,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:41,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:41,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,818 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-11-18 20:44:41,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-11-18 20:44:41,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-11-18 20:44:41,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,836 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-11-18 20:44:41,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,853 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-11-18 20:44:41,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,858 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2022-11-18 20:44:41,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,864 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2022-11-18 20:44:41,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:44:41,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2022-11-18 20:44:41,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:44:41,869 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601074249] [2022-11-18 20:44:41,869 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1601074249] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:44:41,870 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:44:41,870 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:44:41,870 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542663763] [2022-11-18 20:44:41,870 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:44:41,871 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:44:41,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:44:41,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:44:41,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:44:41,872 INFO L87 Difference]: Start difference. First operand 9412 states and 13714 transitions. Second operand has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2022-11-18 20:44:43,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:44:43,312 INFO L93 Difference]: Finished difference Result 18713 states and 27290 transitions. [2022-11-18 20:44:43,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:44:43,312 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 150 [2022-11-18 20:44:43,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:44:43,343 INFO L225 Difference]: With dead ends: 18713 [2022-11-18 20:44:43,344 INFO L226 Difference]: Without dead ends: 9376 [2022-11-18 20:44:43,361 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:44:43,362 INFO L413 NwaCegarLoop]: 1493 mSDtfsCounter, 1452 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1452 SdHoareTripleChecker+Valid, 1493 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:44:43,364 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1452 Valid, 1493 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:44:43,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9376 states. [2022-11-18 20:44:44,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9376 to 9376. [2022-11-18 20:44:44,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9376 states, 6637 states have (on average 1.3124905830947717) internal successors, (8711), 6669 states have internal predecessors, (8711), 2465 states have call successors, (2465), 272 states have call predecessors, (2465), 273 states have return successors, (2466), 2460 states have call predecessors, (2466), 2463 states have call successors, (2466) [2022-11-18 20:44:44,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9376 states to 9376 states and 13642 transitions. [2022-11-18 20:44:44,696 INFO L78 Accepts]: Start accepts. Automaton has 9376 states and 13642 transitions. Word has length 150 [2022-11-18 20:44:44,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:44:44,697 INFO L495 AbstractCegarLoop]: Abstraction has 9376 states and 13642 transitions. [2022-11-18 20:44:44,697 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2022-11-18 20:44:44,697 INFO L276 IsEmpty]: Start isEmpty. Operand 9376 states and 13642 transitions. [2022-11-18 20:44:44,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2022-11-18 20:44:44,706 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:44:44,707 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:44,707 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-11-18 20:44:44,707 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:44:44,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:44:44,708 INFO L85 PathProgramCache]: Analyzing trace with hash -200232393, now seen corresponding path program 1 times [2022-11-18 20:44:44,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:44:44,708 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104465971] [2022-11-18 20:44:44,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:44:44,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:44:45,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:44:45,081 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:44:45,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:44:45,566 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:44:45,566 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-18 20:44:45,568 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-18 20:44:45,569 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-11-18 20:44:45,573 INFO L444 BasicCegarLoop]: Path program histogram: [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:44:45,578 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-18 20:44:45,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 08:44:45 BoogieIcfgContainer [2022-11-18 20:44:45,852 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-18 20:44:45,853 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-18 20:44:45,853 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-18 20:44:45,853 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-18 20:44:45,854 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:43:43" (3/4) ... [2022-11-18 20:44:45,856 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-18 20:44:45,857 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-18 20:44:45,857 INFO L158 Benchmark]: Toolchain (without parser) took 69519.07ms. Allocated memory was 100.7MB in the beginning and 3.1GB in the end (delta: 3.0GB). Free memory was 55.9MB in the beginning and 2.7GB in the end (delta: -2.7GB). Peak memory consumption was 368.9MB. Max. memory is 16.1GB. [2022-11-18 20:44:45,858 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 100.7MB. Free memory was 72.4MB in the beginning and 72.4MB in the end (delta: 28.5kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:44:45,858 INFO L158 Benchmark]: CACSL2BoogieTranslator took 2390.42ms. Allocated memory was 100.7MB in the beginning and 182.5MB in the end (delta: 81.8MB). Free memory was 55.9MB in the beginning and 117.2MB in the end (delta: -61.4MB). Peak memory consumption was 63.1MB. Max. memory is 16.1GB. [2022-11-18 20:44:45,858 INFO L158 Benchmark]: Boogie Procedure Inliner took 261.57ms. Allocated memory is still 182.5MB. Free memory was 117.2MB in the beginning and 96.3MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-18 20:44:45,859 INFO L158 Benchmark]: Boogie Preprocessor took 196.18ms. Allocated memory is still 182.5MB. Free memory was 96.3MB in the beginning and 75.3MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-18 20:44:45,859 INFO L158 Benchmark]: RCFGBuilder took 4053.28ms. Allocated memory was 182.5MB in the beginning and 272.6MB in the end (delta: 90.2MB). Free memory was 75.3MB in the beginning and 182.7MB in the end (delta: -107.5MB). Peak memory consumption was 72.3MB. Max. memory is 16.1GB. [2022-11-18 20:44:45,859 INFO L158 Benchmark]: TraceAbstraction took 62605.24ms. Allocated memory was 272.6MB in the beginning and 3.1GB in the end (delta: 2.9GB). Free memory was 181.7MB in the beginning and 2.7GB in the end (delta: -2.5GB). Peak memory consumption was 324.4MB. Max. memory is 16.1GB. [2022-11-18 20:44:45,860 INFO L158 Benchmark]: Witness Printer took 4.08ms. Allocated memory is still 3.1GB. Free memory is still 2.7GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:44:45,861 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 100.7MB. Free memory was 72.4MB in the beginning and 72.4MB in the end (delta: 28.5kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 2390.42ms. Allocated memory was 100.7MB in the beginning and 182.5MB in the end (delta: 81.8MB). Free memory was 55.9MB in the beginning and 117.2MB in the end (delta: -61.4MB). Peak memory consumption was 63.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 261.57ms. Allocated memory is still 182.5MB. Free memory was 117.2MB in the beginning and 96.3MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Preprocessor took 196.18ms. Allocated memory is still 182.5MB. Free memory was 96.3MB in the beginning and 75.3MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * RCFGBuilder took 4053.28ms. Allocated memory was 182.5MB in the beginning and 272.6MB in the end (delta: 90.2MB). Free memory was 75.3MB in the beginning and 182.7MB in the end (delta: -107.5MB). Peak memory consumption was 72.3MB. Max. memory is 16.1GB. * TraceAbstraction took 62605.24ms. Allocated memory was 272.6MB in the beginning and 3.1GB in the end (delta: 2.9GB). Free memory was 181.7MB in the beginning and 2.7GB in the end (delta: -2.5GB). Peak memory consumption was 324.4MB. Max. memory is 16.1GB. * Witness Printer took 4.08ms. Allocated memory is still 3.1GB. Free memory is still 2.7GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 7949]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of large string literal at line 7341, overapproximation of bitwiseOr at line 4779. Possible FailurePath: [L5243-L5251] static struct pci_device_id const fst_pci_dev_id[8U] = { {5657U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 1UL}, {5657U, 1088U, 4294967295U, 4294967295U, 0U, 0U, 2UL}, {5657U, 1552U, 4294967295U, 4294967295U, 0U, 0U, 3UL}, {5657U, 1568U, 4294967295U, 4294967295U, 0U, 0U, 4UL}, {5657U, 1600U, 4294967295U, 4294967295U, 0U, 0U, 5UL}, {5657U, 5648U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {5657U, 5650U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L7341-L7342] static char *type_strings[7U] = { (char *)"no hardware", (char *)"FarSync T2P", (char *)"FarSync T4P", (char *)"FarSync T1U", (char *)"FarSync T2U", (char *)"FarSync T4U", (char *)"FarSync TE1"}; [L5238] static int fst_txq_low = 8; [L5262] static u64 fst_work_intq ; [L5260] static spinlock_t fst_work_q_lock ; [L5259] static struct fst_card_info *fst_card_array[32U] ; [L7800] int LDV_IN_INTERRUPT ; [L5242] static int fst_excluded_list[32U] ; [L5239] static int fst_txq_high = 12; [L5257] static struct tasklet_struct fst_tx_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_tx_work_q, 0UL}; [L5258] static struct tasklet_struct fst_int_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_int_work_q, 0UL}; [L7394-L7427] static struct net_device_ops const fst_ops = {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & fst_open, & fst_close, & hdlc_start_xmit, (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * , int ))0, (void (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , void * ))0, (int (*)(struct net_device * ))0, & fst_ioctl, (int (*)(struct net_device * , struct ifmap * ))0, & hdlc_change_mtu, (int (*)(struct net_device * , struct neigh_parms * ))0, & fst_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0, (struct net_device_stats *(*)(struct net_device * ))0, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , int , u8 * ))0, (int (*)(struct net_device * , int , u16 , u8 ))0, (int (*)(struct net_device * , int , int ))0, (int (*)(struct net_device * , int , struct ifla_vf_info * ))0, (int (*)(struct net_device * , int , struct nlattr ** ))0, (int (*)(struct net_device * , int , struct sk_buff * ))0, (int (*)(struct net_device * , u8 ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u16 ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u64 * , int ))0, (int (*)(struct net_device * , struct sk_buff const * , u16 , u32 ))0, (int (*)(struct net_device * , struct net_device * ))0, (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * , u32 ))0, (int (*)(struct net_device * , u32 ))0}; [L7953] int ldv_module_refcounter = 1; [L7745-L7759] static struct pci_driver fst_driver = {{(struct list_head *)0, (struct list_head *)0}, "fst", (struct pci_device_id const *)(& fst_pci_dev_id), & fst_add_one, & fst_remove_one, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * ))0, (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0, {(char const *)0, (struct bus_type *)0, (struct module *)0, (char const *)0, (_Bool)0, (struct of_device_id const *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0, (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t ))0, (int (*)(struct device * ))0, (struct attribute_group const **)0, (struct dev_pm_ops const *)0, (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0, {(struct lock_class *)0, (struct lock_class *)0}, (char const *)0, 0, 0UL}}}}, {(struct list_head *)0, (struct list_head *)0}}}; [L5241] static int fst_excluded_cards = 0; [L5240] static int fst_max_reads = 7; [L5252] struct pci_device_id const __mod_pci_device_table ; [L5261] static u64 fst_work_txq ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=0, ldv_module_refcounter=1, type_strings={46:0}] [L7802] struct net_device *var_group1 ; [L7803] int res_fst_open_36 ; [L7804] int res_fst_close_37 ; [L7805] struct ifreq *var_group2 ; [L7806] int var_fst_ioctl_33_p2 ; [L7807] struct pci_dev *var_group3 ; [L7808] struct pci_device_id const *var_fst_add_one_42_p1 ; [L7809] int res_fst_add_one_42 ; [L7810] int var_fst_intr_27_p0 ; [L7811] void *var_fst_intr_27_p1 ; [L7812] int ldv_s_fst_ops_net_device_ops ; [L7813] int ldv_s_fst_driver_pci_driver ; [L7814] int tmp ; [L7815] int tmp___0 ; [L7816] int tmp___1 ; [L7819] ldv_s_fst_ops_net_device_ops = 0 [L7820] ldv_s_fst_driver_pci_driver = 0 [L7821] LDV_IN_INTERRUPT = 1 [L7822] FCALL ldv_initialize() [L7823] CALL, EXPR fst_init() [L7761] int i ; [L7762] struct lock_class_key __key ; [L7763] int tmp ; [L7765] i = 0 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND FALSE !(i <= 31) VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7778] CALL spinlock_check(& fst_work_q_lock) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={48:0}, type_strings={46:0}] [L4600] return (& lock->ldv_6060.rlock); VAL [\result={48:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={48:0}, lock={48:0}, type_strings={46:0}] [L7778] RET spinlock_check(& fst_work_q_lock) VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, spinlock_check(& fst_work_q_lock)={48:0}, type_strings={46:0}] [L7779-L7780] FCALL __raw_spin_lock_init(& fst_work_q_lock.ldv_6060.rlock, "&(&fst_work_q_lock)->rlock", & __key) VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7781] CALL, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L8074] return __VERIFIER_nondet_int(); [L7781] RET, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7781] tmp = __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7783] return (tmp); [L7783] return (tmp); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp=0, type_strings={46:0}] [L7823] RET, EXPR fst_init() [L7823] tmp = fst_init() [L7825] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, type_strings={46:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___1=-2, type_strings={46:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND TRUE tmp___0 == 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=0, tmp___1=-2, type_strings={46:0}] [L7855] COND TRUE ldv_s_fst_ops_net_device_ops == 0 [L7857] CALL, EXPR fst_open(var_group1) [L7167] int err ; [L7168] struct fst_port_info *port ; [L7169] struct hdlc_device *tmp ; [L7170] int tmp___0 ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7173] CALL, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L5204] void *tmp ; [L5207] CALL, EXPR netdev_priv((struct net_device const *)dev) [L5064] return ((void *)dev + 2560U); VAL [\result={4294967308:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L5207] RET, EXPR netdev_priv((struct net_device const *)dev) [L5207] tmp = netdev_priv((struct net_device const *)dev) [L5209] return ((struct hdlc_device *)tmp); VAL [\result={4294967308:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp={4294967308:0}, type_strings={46:0}] [L7173] RET, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, dev_to_hdlc(dev)={4294967308:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7173] tmp = dev_to_hdlc(dev) [L7174] EXPR tmp->priv [L7174] port = (struct fst_port_info *)tmp->priv [L7175] CALL, EXPR ldv_try_module_get_1(& __this_module) [L8027] int tmp ; [L8030] CALL, EXPR ldv_try_module_get(module) [L7965] int module_get_succeeded ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, module={-60:61}, module={-60:61}, type_strings={46:0}] [L7967] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) [L7969] CALL, EXPR ldv_undefined_int() [L8154] return __VERIFIER_nondet_int(); [L7969] RET, EXPR ldv_undefined_int() [L7969] module_get_succeeded = ldv_undefined_int() [L7971] COND TRUE module_get_succeeded == 1 [L7972] ldv_module_refcounter = ldv_module_refcounter + 1 [L7973] return (1); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={-60:61}, module={-60:61}, module_get_succeeded=1, type_strings={46:0}] [L8030] RET, EXPR ldv_try_module_get(module) [L8030] tmp = ldv_try_module_get(module) [L8032] return (tmp); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={-60:61}, module={-60:61}, tmp=1, type_strings={46:0}] [L7175] RET, EXPR ldv_try_module_get_1(& __this_module) [L7175] tmp___0 = ldv_try_module_get_1(& __this_module) [L7177] COND FALSE !(tmp___0 == 0) [L7181] EXPR port->mode VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, port->mode=4, tmp={4294967308:0}, tmp___0=1, type_strings={46:0}] [L7181] COND FALSE !(port->mode != 4) [L7195] CALL fst_openport(port) [L7102] int signals ; [L7103] int txq_length ; [L7104] unsigned int tmp ; [L7105] int tmp___0 ; [L7107] EXPR port->card [L7107] EXPR (port->card)->state VAL [(port->card)->state=62, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, port={4294967299:0}, port->card={4294967311:-39}, type_strings={46:0}] [L7107] COND FALSE !((port->card)->state == 4U) [L7195] RET fst_openport(port) [L7196] CALL netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5137] struct netdev_queue *tmp ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5140] CALL, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [\old(index)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5058] EXPR dev->_tx [L5058] return ((struct netdev_queue *)dev->_tx + (unsigned long )index); [L5140] RET, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, netdev_get_tx_queue((struct net_device const *)dev, 0U)={4294967331:0}, type_strings={46:0}] [L5140] tmp = netdev_get_tx_queue((struct net_device const *)dev, 0U) [L5141] CALL netif_tx_wake_queue(tmp) [L5111] int tmp ; [L5112] int tmp___0 ; [L5115] CALL, EXPR netpoll_trap() [L8174] return __VERIFIER_nondet_int(); [L5115] RET, EXPR netpoll_trap() [L5115] tmp = netpoll_trap() [L5117] COND TRUE tmp != 0 [L5119] CALL netif_tx_start_queue(dev_queue) [L5105] FCALL clear_bit(0, (unsigned long volatile *)(& dev_queue->state)) [L5119] RET netif_tx_start_queue(dev_queue) [L5141] RET netif_tx_wake_queue(tmp) [L7196] RET netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, tmp={4294967308:0}, tmp___0=1, type_strings={46:0}] [L7198] return (0); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967308:-2560}, dev={4294967308:-2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, tmp={4294967308:0}, tmp___0=1, type_strings={46:0}] [L7857] RET, EXPR fst_open(var_group1) [L7857] res_fst_open_36 = fst_open(var_group1) [L7858] FCALL ldv_check_return_value(res_fst_open_36) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=-2, type_strings={46:0}, var_group1={4294967308:-2560}] [L7860] COND FALSE !(res_fst_open_36 < 0) [L7864] ldv_s_fst_ops_net_device_ops = ldv_s_fst_ops_net_device_ops + 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=-2, type_strings={46:0}, var_group1={4294967308:-2560}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=-4, type_strings={46:0}, var_group1={4294967308:-2560}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND FALSE !(tmp___0 == 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_group1={4294967308:-2560}] [L7837] COND FALSE !(tmp___0 == 1) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_group1={4294967308:-2560}] [L7840] COND FALSE !(tmp___0 == 2) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_group1={4294967308:-2560}] [L7843] COND FALSE !(tmp___0 == 3) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_group1={4294967308:-2560}] [L7846] COND TRUE tmp___0 == 4 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_group1={4294967308:-2560}] [L7893] COND TRUE ldv_s_fst_driver_pci_driver == 0 [L7895] CALL, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7429] int no_of_cards_added ; [L7430] struct fst_card_info *card ; [L7431] int err ; [L7432] int i ; [L7433] bool __print_once ; [L7434] void *tmp ; [L7435] char *tmp___0 ; [L7436] void *tmp___1 ; [L7437] char *tmp___2 ; [L7438] void *tmp___3 ; [L7439] int tmp___4 ; [L7440] int tmp___5 ; [L7441] struct lock_class_key __key ; [L7442] struct net_device *dev ; [L7443] struct net_device *tmp___6 ; [L7444] hdlc_device *hdlc ; [L7445] int tmp___7 ; [L7446] struct hdlc_device *tmp___8 ; [L7447] int tmp___9 ; [L7449] no_of_cards_added = 0 [L7450] err = 0 VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, ent={4294967303:4294967335}, ent={4294967303:4294967335}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, type_strings={46:0}] [L7451] COND FALSE !(! __print_once) VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, ent={4294967303:4294967335}, ent={4294967303:4294967335}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, type_strings={46:0}] [L7458] COND FALSE !(fst_excluded_cards != 0) VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, ent={4294967303:4294967335}, ent={4294967303:4294967335}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, type_strings={46:0}] [L7480] CALL, EXPR kzalloc(1000UL, 208U) [L4776] void *tmp ; [L4779] CALL, EXPR kmalloc(size, flags | 32768U) [L4766] void *tmp___2 ; [L4769] CALL, EXPR __kmalloc(size, flags) [L8067] CALL, EXPR ldv_malloc(arg0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L8061] COND TRUE __VERIFIER_nondet_bool() [L8061] return 0; VAL [\old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, type_strings={46:0}] [L8067] RET, EXPR ldv_malloc(arg0) VAL [\old(arg0)=1000, \old(arg1)=32768, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, arg0=1000, arg1=32768, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_malloc(arg0)={0:0}, ldv_module_refcounter=2, type_strings={46:0}] [L8067] return ldv_malloc(arg0); [L4769] RET, EXPR __kmalloc(size, flags) [L4769] tmp___2 = __kmalloc(size, flags) [L4771] return (tmp___2); VAL [\old(flags)=32768, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, flags=32768, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp___2={0:0}, type_strings={46:0}] [L4779] RET, EXPR kmalloc(size, flags | 32768U) [L4779] tmp = kmalloc(size, flags | 32768U) [L4781] return (tmp); VAL [\old(flags)=208, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, flags=208, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp={0:0}, type_strings={46:0}] [L7480] RET, EXPR kzalloc(1000UL, 208U) [L7480] tmp = kzalloc(1000UL, 208U) [L7481] card = (struct fst_card_info *)tmp VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, card={0:0}, ent={4294967303:4294967335}, ent={4294967303:4294967335}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, tmp={0:0}, type_strings={46:0}] [L7483] COND TRUE (unsigned long )card == (unsigned long )((struct fst_card_info *)0) [L7487] return (-12); [L7487] return (-12); VAL [\result=-12, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, card={0:0}, ent={4294967303:4294967335}, ent={4294967303:4294967335}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, tmp={0:0}, type_strings={46:0}] [L7895] RET, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7895] res_fst_add_one_42 = fst_add_one(var_group3, var_fst_add_one_42_p1) [L7896] FCALL ldv_check_return_value(res_fst_add_one_42) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=-12, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_fst_add_one_42_p1={4294967303:4294967335}, var_group1={4294967308:-2560}, var_group3={4294967328:4294967320}] [L7898] COND TRUE res_fst_add_one_42 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=-12, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=-4, type_strings={46:0}, var_fst_add_one_42_p1={4294967303:4294967335}, var_group1={4294967308:-2560}, var_group3={4294967328:4294967320}] [L7937] CALL fst_cleanup_module() [L7791] FCALL pci_unregister_driver(& fst_driver) [L7937] RET fst_cleanup_module() [L7941] CALL ldv_check_final_state() [L8017] COND TRUE ldv_module_refcounter != 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L8019] CALL ldv_blast_assert() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L7949] reach_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 57 procedures, 1081 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 62.3s, OverallIterations: 17, TraceHistogramMax: 32, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.1s, AutomataDifference: 34.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 23502 SdHoareTripleChecker+Valid, 20.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 21965 mSDsluCounter, 99712 SdHoareTripleChecker+Invalid, 17.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 68504 mSDsCounter, 4403 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 16475 IncrementalHoareTripleChecker+Invalid, 20878 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 4403 mSolverCounterUnsat, 31208 mSDtfsCounter, 16475 mSolverCounterSat, 0.6s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1160 GetRequests, 987 SyntacticMatches, 15 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=11328occurred in iteration=13, InterpolantAutomatonStates: 141, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 10.6s AutomataMinimizationTime, 16 MinimizatonAttempts, 11639 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 2.5s SatisfiabilityAnalysisTime, 8.3s InterpolantComputationTime, 2166 NumberOfCodeBlocks, 2102 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 2252 ConstructedInterpolants, 0 QuantifiedInterpolants, 4145 SizeOfPredicates, 17 NumberOfNonLiveVariables, 10147 ConjunctsInSsa, 90 ConjunctsInUnsatCore, 28 InterpolantComputations, 12 PerfectInterpolantSequences, 7904/10294 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-18 20:44:45,890 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:44:48,329 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:44:48,332 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:44:48,371 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:44:48,372 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:44:48,376 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:44:48,378 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:44:48,384 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:44:48,387 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:44:48,392 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:44:48,394 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:44:48,397 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:44:48,397 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:44:48,399 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:44:48,401 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:44:48,402 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:44:48,404 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:44:48,406 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:44:48,411 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:44:48,415 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:44:48,419 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:44:48,421 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:44:48,423 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:44:48,424 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:44:48,435 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:44:48,440 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:44:48,440 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:44:48,441 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:44:48,443 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:44:48,444 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:44:48,444 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:44:48,445 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:44:48,447 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:44:48,448 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:44:48,449 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:44:48,449 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:44:48,450 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:44:48,450 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:44:48,451 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:44:48,452 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:44:48,453 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:44:48,458 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2022-11-18 20:44:48,504 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:44:48,504 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:44:48,505 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:44:48,506 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:44:48,507 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 20:44:48,507 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 20:44:48,508 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:44:48,509 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:44:48,509 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:44:48,509 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:44:48,514 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:44:48,515 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-18 20:44:48,515 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 20:44:48,515 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-18 20:44:48,516 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-18 20:44:48,516 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-18 20:44:48,516 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-18 20:44:48,517 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:44:48,517 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:44:48,517 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-18 20:44:48,517 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:44:48,518 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:44:48,518 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 20:44:48,518 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:44:48,519 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:44:48,519 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 20:44:48,519 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-18 20:44:48,520 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-11-18 20:44:48,520 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-18 20:44:48,520 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-18 20:44:48,520 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-18 20:44:48,521 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-18 20:44:48,521 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-18 20:44:48,521 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 [2022-11-18 20:44:48,903 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:44:48,930 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:44:48,934 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:44:48,935 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:44:48,938 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:44:48,939 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-18 20:44:49,007 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/7e455d2ce/7b1bf407c92a4f1c9320c39c6a97b7d4/FLAGcb253f367 [2022-11-18 20:44:49,919 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:44:49,935 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-18 20:44:49,983 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/7e455d2ce/7b1bf407c92a4f1c9320c39c6a97b7d4/FLAGcb253f367 [2022-11-18 20:44:50,021 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/data/7e455d2ce/7b1bf407c92a4f1c9320c39c6a97b7d4 [2022-11-18 20:44:50,023 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:44:50,026 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:44:50,029 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:44:50,030 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:44:50,033 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:44:50,034 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:44:50" (1/1) ... [2022-11-18 20:44:50,035 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3d11b317 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:50, skipping insertion in model container [2022-11-18 20:44:50,036 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:44:50" (1/1) ... [2022-11-18 20:44:50,043 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:44:50,179 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:44:51,900 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-18 20:44:51,936 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:44:51,996 INFO L200 MainTranslator]: Restarting translation with changed settings: SettingsChange [mNewPreferredMemoryModel=HoenickeLindenmann_1ByteResolution] [2022-11-18 20:44:52,043 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:44:52,451 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-18 20:44:52,460 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:44:52,498 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:44:52,927 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-18 20:44:52,953 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:44:53,232 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:44:53,233 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53 WrapperNode [2022-11-18 20:44:53,236 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:44:53,238 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:44:53,238 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:44:53,238 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:44:53,245 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,333 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,480 INFO L138 Inliner]: procedures = 214, calls = 1513, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3260 [2022-11-18 20:44:53,481 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:44:53,482 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:44:53,482 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:44:53,483 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:44:53,492 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,493 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,540 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,546 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,659 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,672 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,703 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,720 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,746 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:44:53,747 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:44:53,747 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:44:53,747 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:44:53,748 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (1/1) ... [2022-11-18 20:44:53,756 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:44:53,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:44:53,779 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 20:44:53,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 20:44:53,830 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2022-11-18 20:44:53,831 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2022-11-18 20:44:53,831 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2022-11-18 20:44:53,831 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-11-18 20:44:53,831 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE2 [2022-11-18 20:44:53,831 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-11-18 20:44:53,831 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-11-18 20:44:53,832 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-11-18 20:44:53,832 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-11-18 20:44:53,832 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-11-18 20:44:53,832 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2022-11-18 20:44:53,832 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2022-11-18 20:44:53,833 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-11-18 20:44:53,833 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-11-18 20:44:53,833 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2022-11-18 20:44:53,833 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2022-11-18 20:44:53,833 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-11-18 20:44:53,834 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-11-18 20:44:53,834 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2022-11-18 20:44:53,834 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2022-11-18 20:44:53,834 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2022-11-18 20:44:53,834 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2022-11-18 20:44:53,834 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2022-11-18 20:44:53,835 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2022-11-18 20:44:53,835 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2022-11-18 20:44:53,835 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2022-11-18 20:44:53,835 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-11-18 20:44:53,835 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-11-18 20:44:53,836 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-11-18 20:44:53,836 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-11-18 20:44:53,836 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-11-18 20:44:53,836 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-11-18 20:44:53,837 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:44:53,837 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-18 20:44:53,837 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-11-18 20:44:53,837 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-11-18 20:44:53,838 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2022-11-18 20:44:53,838 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2022-11-18 20:44:53,838 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-11-18 20:44:53,839 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-11-18 20:44:53,839 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2022-11-18 20:44:53,839 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2022-11-18 20:44:53,839 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE2 [2022-11-18 20:44:53,839 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2022-11-18 20:44:53,840 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2022-11-18 20:44:53,840 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:44:53,840 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2022-11-18 20:44:53,840 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-11-18 20:44:53,841 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-11-18 20:44:53,842 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-18 20:44:53,842 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2022-11-18 20:44:53,843 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2022-11-18 20:44:53,843 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-11-18 20:44:53,844 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2022-11-18 20:44:53,844 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE8 [2022-11-18 20:44:53,844 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-11-18 20:44:53,844 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-11-18 20:44:53,845 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2022-11-18 20:44:53,845 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2022-11-18 20:44:53,846 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-11-18 20:44:53,846 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-11-18 20:44:53,847 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2022-11-18 20:44:53,847 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2022-11-18 20:44:53,847 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-11-18 20:44:53,847 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-11-18 20:44:53,847 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-11-18 20:44:53,848 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-11-18 20:44:53,849 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2022-11-18 20:44:53,849 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2022-11-18 20:44:53,849 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2022-11-18 20:44:53,849 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2022-11-18 20:44:53,849 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-11-18 20:44:53,849 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-11-18 20:44:53,850 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2022-11-18 20:44:53,850 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2022-11-18 20:44:53,850 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-11-18 20:44:53,850 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-11-18 20:44:53,850 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2022-11-18 20:44:53,850 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2022-11-18 20:44:53,851 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-11-18 20:44:53,851 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-11-18 20:44:53,852 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2022-11-18 20:44:53,852 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2022-11-18 20:44:53,852 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-11-18 20:44:53,852 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-11-18 20:44:53,853 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-11-18 20:44:53,853 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-11-18 20:44:53,854 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2022-11-18 20:44:53,854 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2022-11-18 20:44:53,854 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2022-11-18 20:44:53,854 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2022-11-18 20:44:53,855 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2022-11-18 20:44:53,855 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE2 [2022-11-18 20:44:53,856 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE1 [2022-11-18 20:44:53,856 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE8 [2022-11-18 20:44:53,857 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 20:44:53,857 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2022-11-18 20:44:53,857 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2022-11-18 20:44:53,857 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:44:53,857 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2022-11-18 20:44:53,857 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2022-11-18 20:44:53,858 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-18 20:44:53,858 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE8 [2022-11-18 20:44:53,858 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE2 [2022-11-18 20:44:53,859 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2022-11-18 20:44:53,859 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2022-11-18 20:44:53,859 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2022-11-18 20:44:53,859 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2022-11-18 20:44:53,859 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2022-11-18 20:44:53,859 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2022-11-18 20:44:53,860 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2022-11-18 20:44:53,861 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-11-18 20:44:53,864 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-11-18 20:44:53,864 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-11-18 20:44:53,864 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-11-18 20:44:53,865 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2022-11-18 20:44:53,865 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2022-11-18 20:44:53,867 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2022-11-18 20:44:53,868 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2022-11-18 20:44:53,868 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-11-18 20:44:53,868 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-11-18 20:44:53,874 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-11-18 20:44:53,874 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-11-18 20:44:53,874 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-11-18 20:44:53,874 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-11-18 20:44:53,874 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-11-18 20:44:53,875 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-11-18 20:44:53,875 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2022-11-18 20:44:53,875 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2022-11-18 20:44:53,875 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE1 [2022-11-18 20:44:53,875 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2022-11-18 20:44:53,875 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2022-11-18 20:44:53,876 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-11-18 20:44:53,876 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-11-18 20:44:53,876 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2022-11-18 20:44:53,876 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2022-11-18 20:44:53,876 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-11-18 20:44:53,876 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-11-18 20:44:53,877 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:44:53,877 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:44:53,877 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-11-18 20:44:53,877 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-11-18 20:44:54,596 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:44:54,599 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:45:00,373 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:00,379 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:00,389 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:00,390 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:00,392 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:00,393 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:00,403 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-18 20:45:22,911 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##258: assume false; [2022-11-18 20:45:22,913 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##259: assume !false; [2022-11-18 20:45:22,913 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##265: assume !false; [2022-11-18 20:45:22,913 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##264: assume false; [2022-11-18 20:45:22,913 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##214: assume !false; [2022-11-18 20:45:22,913 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##213: assume false; [2022-11-18 20:45:22,913 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##228: assume !false; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##227: assume false; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##92: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##91: assume false; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##391: assume !false; [2022-11-18 20:45:22,914 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##390: assume false; [2022-11-18 20:45:23,008 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:45:23,023 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:45:23,023 INFO L300 CfgBuilder]: Removed 0 assume(true) statements. [2022-11-18 20:45:23,026 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:45:23 BoogieIcfgContainer [2022-11-18 20:45:23,026 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:45:23,029 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 20:45:23,029 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 20:45:23,032 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 20:45:23,033 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:44:50" (1/3) ... [2022-11-18 20:45:23,033 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e378253 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:45:23, skipping insertion in model container [2022-11-18 20:45:23,034 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:44:53" (2/3) ... [2022-11-18 20:45:23,034 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e378253 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:45:23, skipping insertion in model container [2022-11-18 20:45:23,034 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:45:23" (3/3) ... [2022-11-18 20:45:23,035 INFO L112 eAbstractionObserver]: Analyzing ICFG module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-18 20:45:23,053 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 20:45:23,054 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-18 20:45:23,122 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 20:45:23,128 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5b6bd9a8, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 20:45:23,128 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-18 20:45:23,136 INFO L276 IsEmpty]: Start isEmpty. Operand has 1064 states, 746 states have (on average 1.2908847184986596) internal successors, (963), 754 states have internal predecessors, (963), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) [2022-11-18 20:45:23,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-18 20:45:23,144 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:23,144 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:23,145 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:23,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:23,150 INFO L85 PathProgramCache]: Analyzing trace with hash 953068106, now seen corresponding path program 1 times [2022-11-18 20:45:23,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:23,167 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [390093483] [2022-11-18 20:45:23,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:45:23,167 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:23,168 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:23,174 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:23,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-18 20:45:24,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:45:24,135 INFO L263 TraceCheckSpWp]: Trace formula consists of 793 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:45:24,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:24,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:24,205 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:45:24,206 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:24,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [390093483] [2022-11-18 20:45:24,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [390093483] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:45:24,208 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:45:24,208 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:45:24,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094274101] [2022-11-18 20:45:24,210 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:45:24,217 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:45:24,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:24,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:45:24,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:45:24,262 INFO L87 Difference]: Start difference. First operand has 1064 states, 746 states have (on average 1.2908847184986596) internal successors, (963), 754 states have internal predecessors, (963), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:45:24,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:24,556 INFO L93 Difference]: Finished difference Result 2123 states and 2971 transitions. [2022-11-18 20:45:24,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:45:24,559 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 21 [2022-11-18 20:45:24,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:24,576 INFO L225 Difference]: With dead ends: 2123 [2022-11-18 20:45:24,577 INFO L226 Difference]: Without dead ends: 1060 [2022-11-18 20:45:24,587 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:45:24,590 INFO L413 NwaCegarLoop]: 1475 mSDtfsCounter, 1 mSDsluCounter, 1473 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2948 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:24,591 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 2948 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:45:24,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1060 states. [2022-11-18 20:45:24,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1060 to 1059. [2022-11-18 20:45:24,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1059 states, 743 states have (on average 1.2866756393001346) internal successors, (956), 749 states have internal predecessors, (956), 260 states have call successors, (260), 56 states have call predecessors, (260), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2022-11-18 20:45:24,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1474 transitions. [2022-11-18 20:45:24,725 INFO L78 Accepts]: Start accepts. Automaton has 1059 states and 1474 transitions. Word has length 21 [2022-11-18 20:45:24,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:24,726 INFO L495 AbstractCegarLoop]: Abstraction has 1059 states and 1474 transitions. [2022-11-18 20:45:24,727 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:45:24,727 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1474 transitions. [2022-11-18 20:45:24,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-18 20:45:24,729 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:24,729 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:24,761 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:24,943 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:24,943 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:24,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:24,944 INFO L85 PathProgramCache]: Analyzing trace with hash 172351718, now seen corresponding path program 1 times [2022-11-18 20:45:24,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:24,945 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1638626117] [2022-11-18 20:45:24,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:45:24,946 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:24,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:24,947 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:24,953 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-18 20:45:25,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:45:25,873 INFO L263 TraceCheckSpWp]: Trace formula consists of 804 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:45:25,874 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:25,925 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:25,926 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:45:26,019 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:26,019 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:26,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1638626117] [2022-11-18 20:45:26,020 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1638626117] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:45:26,020 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:45:26,020 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2022-11-18 20:45:26,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127184104] [2022-11-18 20:45:26,020 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:45:26,022 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:45:26,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:26,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:45:26,023 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:45:26,023 INFO L87 Difference]: Start difference. First operand 1059 states and 1474 transitions. Second operand has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 6 states have internal predecessors, (26), 1 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-11-18 20:45:26,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:26,258 INFO L93 Difference]: Finished difference Result 2118 states and 2950 transitions. [2022-11-18 20:45:26,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:45:26,259 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 6 states have internal predecessors, (26), 1 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 23 [2022-11-18 20:45:26,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:26,269 INFO L225 Difference]: With dead ends: 2118 [2022-11-18 20:45:26,270 INFO L226 Difference]: Without dead ends: 1065 [2022-11-18 20:45:26,273 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:45:26,279 INFO L413 NwaCegarLoop]: 1471 mSDtfsCounter, 4 mSDsluCounter, 5876 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 7347 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:26,279 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 7347 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:45:26,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1065 states. [2022-11-18 20:45:26,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1065 to 1065. [2022-11-18 20:45:26,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1065 states, 749 states have (on average 1.2843791722296396) internal successors, (962), 755 states have internal predecessors, (962), 260 states have call successors, (260), 56 states have call predecessors, (260), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2022-11-18 20:45:26,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1065 states to 1065 states and 1480 transitions. [2022-11-18 20:45:26,413 INFO L78 Accepts]: Start accepts. Automaton has 1065 states and 1480 transitions. Word has length 23 [2022-11-18 20:45:26,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:26,413 INFO L495 AbstractCegarLoop]: Abstraction has 1065 states and 1480 transitions. [2022-11-18 20:45:26,414 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 6 states have internal predecessors, (26), 1 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-11-18 20:45:26,414 INFO L276 IsEmpty]: Start isEmpty. Operand 1065 states and 1480 transitions. [2022-11-18 20:45:26,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-18 20:45:26,415 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:26,415 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:26,445 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:26,639 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:26,639 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:26,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:26,640 INFO L85 PathProgramCache]: Analyzing trace with hash 55524026, now seen corresponding path program 2 times [2022-11-18 20:45:26,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:26,642 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [994391223] [2022-11-18 20:45:26,642 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:45:26,642 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:26,643 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:26,647 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:26,666 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-18 20:45:27,526 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 20:45:27,527 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:45:27,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 793 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:45:27,563 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:27,765 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-18 20:45:27,765 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:45:27,765 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:27,765 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [994391223] [2022-11-18 20:45:27,766 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [994391223] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:45:27,766 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:45:27,766 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:45:27,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [954168981] [2022-11-18 20:45:27,767 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:45:27,767 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:45:27,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:27,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:45:27,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:45:27,768 INFO L87 Difference]: Start difference. First operand 1065 states and 1480 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:45:27,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:27,936 INFO L93 Difference]: Finished difference Result 3155 states and 4394 transitions. [2022-11-18 20:45:27,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:45:27,936 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 29 [2022-11-18 20:45:27,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:27,949 INFO L225 Difference]: With dead ends: 3155 [2022-11-18 20:45:27,949 INFO L226 Difference]: Without dead ends: 2104 [2022-11-18 20:45:27,953 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:45:27,955 INFO L413 NwaCegarLoop]: 1973 mSDtfsCounter, 1448 mSDsluCounter, 1452 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1448 SdHoareTripleChecker+Valid, 3425 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:27,955 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1448 Valid, 3425 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:45:27,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2104 states. [2022-11-18 20:45:28,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2104 to 2101. [2022-11-18 20:45:28,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2101 states, 1474 states have (on average 1.2835820895522387) internal successors, (1892), 1485 states have internal predecessors, (1892), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2022-11-18 20:45:28,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2101 states to 2101 states and 2922 transitions. [2022-11-18 20:45:28,108 INFO L78 Accepts]: Start accepts. Automaton has 2101 states and 2922 transitions. Word has length 29 [2022-11-18 20:45:28,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:28,109 INFO L495 AbstractCegarLoop]: Abstraction has 2101 states and 2922 transitions. [2022-11-18 20:45:28,109 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:45:28,109 INFO L276 IsEmpty]: Start isEmpty. Operand 2101 states and 2922 transitions. [2022-11-18 20:45:28,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-11-18 20:45:28,111 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:28,112 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:28,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:28,312 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:28,312 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:28,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:28,313 INFO L85 PathProgramCache]: Analyzing trace with hash 2025144539, now seen corresponding path program 1 times [2022-11-18 20:45:28,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:28,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1951600416] [2022-11-18 20:45:28,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:45:28,315 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:28,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:28,321 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:28,368 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-18 20:45:29,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:45:29,326 INFO L263 TraceCheckSpWp]: Trace formula consists of 901 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:45:29,329 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:29,488 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:29,488 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:45:29,765 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:29,765 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:29,765 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1951600416] [2022-11-18 20:45:29,765 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1951600416] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:45:29,766 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:45:29,766 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2022-11-18 20:45:29,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332105747] [2022-11-18 20:45:29,766 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:45:29,767 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-18 20:45:29,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:29,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-18 20:45:29,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2022-11-18 20:45:29,768 INFO L87 Difference]: Start difference. First operand 2101 states and 2922 transitions. Second operand has 12 states, 12 states have (on average 4.833333333333333) internal successors, (58), 12 states have internal predecessors, (58), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:45:30,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:30,571 INFO L93 Difference]: Finished difference Result 4202 states and 5849 transitions. [2022-11-18 20:45:30,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:45:30,572 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 4.833333333333333) internal successors, (58), 12 states have internal predecessors, (58), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-11-18 20:45:30,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:30,582 INFO L225 Difference]: With dead ends: 4202 [2022-11-18 20:45:30,583 INFO L226 Difference]: Without dead ends: 2113 [2022-11-18 20:45:30,589 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2022-11-18 20:45:30,590 INFO L413 NwaCegarLoop]: 1470 mSDtfsCounter, 10 mSDsluCounter, 7340 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 8810 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:30,591 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 8810 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 20:45:30,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2113 states. [2022-11-18 20:45:30,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2113 to 2113. [2022-11-18 20:45:30,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2113 states, 1486 states have (on average 1.2812920592193808) internal successors, (1904), 1497 states have internal predecessors, (1904), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2022-11-18 20:45:30,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2113 states to 2113 states and 2934 transitions. [2022-11-18 20:45:30,724 INFO L78 Accepts]: Start accepts. Automaton has 2113 states and 2934 transitions. Word has length 49 [2022-11-18 20:45:30,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:30,724 INFO L495 AbstractCegarLoop]: Abstraction has 2113 states and 2934 transitions. [2022-11-18 20:45:30,725 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 4.833333333333333) internal successors, (58), 12 states have internal predecessors, (58), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:45:30,725 INFO L276 IsEmpty]: Start isEmpty. Operand 2113 states and 2934 transitions. [2022-11-18 20:45:30,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-18 20:45:30,728 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:30,728 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:30,764 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:30,951 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:30,951 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:30,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:30,952 INFO L85 PathProgramCache]: Analyzing trace with hash 981484419, now seen corresponding path program 2 times [2022-11-18 20:45:30,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:30,954 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1585019184] [2022-11-18 20:45:30,954 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:45:30,954 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:30,954 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:30,955 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:30,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-18 20:45:31,750 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 20:45:31,750 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:45:31,788 INFO L263 TraceCheckSpWp]: Trace formula consists of 857 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:45:31,791 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:31,861 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2022-11-18 20:45:31,862 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:45:31,862 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:31,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1585019184] [2022-11-18 20:45:31,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1585019184] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:45:31,862 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:45:31,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:45:31,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1409612634] [2022-11-18 20:45:31,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:45:31,863 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:45:31,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:31,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:45:31,864 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:45:31,864 INFO L87 Difference]: Start difference. First operand 2113 states and 2934 transitions. Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:45:33,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:33,193 INFO L93 Difference]: Finished difference Result 6077 states and 8738 transitions. [2022-11-18 20:45:33,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:45:33,194 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 61 [2022-11-18 20:45:33,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:33,215 INFO L225 Difference]: With dead ends: 6077 [2022-11-18 20:45:33,215 INFO L226 Difference]: Without dead ends: 3995 [2022-11-18 20:45:33,222 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:45:33,224 INFO L413 NwaCegarLoop]: 2746 mSDtfsCounter, 2190 mSDsluCounter, 6423 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 583 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2383 SdHoareTripleChecker+Valid, 9169 SdHoareTripleChecker+Invalid, 599 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 583 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:33,225 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2383 Valid, 9169 Invalid, 599 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [583 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-18 20:45:33,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3995 states. [2022-11-18 20:45:33,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3995 to 2047. [2022-11-18 20:45:33,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2047 states, 1445 states have (on average 1.2816608996539793) internal successors, (1852), 1455 states have internal predecessors, (1852), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2022-11-18 20:45:33,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2047 states to 2047 states and 2832 transitions. [2022-11-18 20:45:33,391 INFO L78 Accepts]: Start accepts. Automaton has 2047 states and 2832 transitions. Word has length 61 [2022-11-18 20:45:33,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:33,393 INFO L495 AbstractCegarLoop]: Abstraction has 2047 states and 2832 transitions. [2022-11-18 20:45:33,393 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:45:33,393 INFO L276 IsEmpty]: Start isEmpty. Operand 2047 states and 2832 transitions. [2022-11-18 20:45:33,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-11-18 20:45:33,401 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:33,402 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:33,435 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:33,615 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:33,615 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:33,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:33,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1812840541, now seen corresponding path program 1 times [2022-11-18 20:45:33,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:33,617 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1806222641] [2022-11-18 20:45:33,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:45:33,618 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:33,618 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:33,619 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:33,658 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-18 20:45:34,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:45:34,535 INFO L263 TraceCheckSpWp]: Trace formula consists of 970 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 20:45:34,538 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:34,975 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:34,975 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:45:35,944 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:35,944 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:35,944 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1806222641] [2022-11-18 20:45:35,944 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1806222641] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:45:35,945 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:45:35,945 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2022-11-18 20:45:35,945 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660385646] [2022-11-18 20:45:35,945 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:45:35,946 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-18 20:45:35,946 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:35,946 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 20:45:35,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2022-11-18 20:45:35,947 INFO L87 Difference]: Start difference. First operand 2047 states and 2832 transitions. Second operand has 24 states, 24 states have (on average 3.5) internal successors, (84), 24 states have internal predecessors, (84), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:45:38,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:38,699 INFO L93 Difference]: Finished difference Result 4094 states and 5675 transitions. [2022-11-18 20:45:38,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-18 20:45:38,700 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.5) internal successors, (84), 24 states have internal predecessors, (84), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 63 [2022-11-18 20:45:38,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:38,709 INFO L225 Difference]: With dead ends: 4094 [2022-11-18 20:45:38,709 INFO L226 Difference]: Without dead ends: 2071 [2022-11-18 20:45:38,715 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 102 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2022-11-18 20:45:38,717 INFO L413 NwaCegarLoop]: 1470 mSDtfsCounter, 23 mSDsluCounter, 19084 mSDsCounter, 0 mSdLazyCounter, 287 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 20554 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:38,717 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 20554 Invalid, 309 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [22 Valid, 287 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-18 20:45:38,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2071 states. [2022-11-18 20:45:38,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2071 to 2071. [2022-11-18 20:45:38,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2071 states, 1469 states have (on average 1.2770592239618788) internal successors, (1876), 1479 states have internal predecessors, (1876), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2022-11-18 20:45:38,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2071 states to 2071 states and 2856 transitions. [2022-11-18 20:45:38,847 INFO L78 Accepts]: Start accepts. Automaton has 2071 states and 2856 transitions. Word has length 63 [2022-11-18 20:45:38,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:38,847 INFO L495 AbstractCegarLoop]: Abstraction has 2071 states and 2856 transitions. [2022-11-18 20:45:38,847 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.5) internal successors, (84), 24 states have internal predecessors, (84), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-11-18 20:45:38,848 INFO L276 IsEmpty]: Start isEmpty. Operand 2071 states and 2856 transitions. [2022-11-18 20:45:38,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-18 20:45:38,850 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:38,851 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:38,881 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:39,075 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:39,076 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:39,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:39,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1724546477, now seen corresponding path program 2 times [2022-11-18 20:45:39,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:39,077 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [134858001] [2022-11-18 20:45:39,078 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:45:39,078 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:39,078 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:39,079 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:39,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-18 20:45:39,895 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 20:45:39,895 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:45:39,936 INFO L263 TraceCheckSpWp]: Trace formula consists of 860 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:45:39,939 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:40,331 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 484 trivial. 0 not checked. [2022-11-18 20:45:40,331 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:45:40,331 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:40,332 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [134858001] [2022-11-18 20:45:40,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [134858001] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:45:40,332 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:45:40,332 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:45:40,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079588034] [2022-11-18 20:45:40,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:45:40,333 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:45:40,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:40,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:45:40,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:45:40,334 INFO L87 Difference]: Start difference. First operand 2071 states and 2856 transitions. Second operand has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:45:45,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:45,735 INFO L93 Difference]: Finished difference Result 5144 states and 7129 transitions. [2022-11-18 20:45:45,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:45:45,736 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 87 [2022-11-18 20:45:45,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:45,773 INFO L225 Difference]: With dead ends: 5144 [2022-11-18 20:45:45,773 INFO L226 Difference]: Without dead ends: 4090 [2022-11-18 20:45:45,779 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:45:45,780 INFO L413 NwaCegarLoop]: 3073 mSDtfsCounter, 2777 mSDsluCounter, 2633 mSDsCounter, 0 mSdLazyCounter, 1001 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2777 SdHoareTripleChecker+Valid, 5706 SdHoareTripleChecker+Invalid, 1004 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1001 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:45,780 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2777 Valid, 5706 Invalid, 1004 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1001 Invalid, 0 Unknown, 0 Unchecked, 5.1s Time] [2022-11-18 20:45:45,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4090 states. [2022-11-18 20:45:46,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4090 to 4078. [2022-11-18 20:45:46,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4078 states, 2879 states have (on average 1.2820423758249393) internal successors, (3691), 2897 states have internal predecessors, (3691), 978 states have call successors, (978), 221 states have call predecessors, (978), 220 states have return successors, (978), 977 states have call predecessors, (978), 976 states have call successors, (978) [2022-11-18 20:45:46,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4078 states to 4078 states and 5647 transitions. [2022-11-18 20:45:46,079 INFO L78 Accepts]: Start accepts. Automaton has 4078 states and 5647 transitions. Word has length 87 [2022-11-18 20:45:46,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:46,081 INFO L495 AbstractCegarLoop]: Abstraction has 4078 states and 5647 transitions. [2022-11-18 20:45:46,081 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-18 20:45:46,081 INFO L276 IsEmpty]: Start isEmpty. Operand 4078 states and 5647 transitions. [2022-11-18 20:45:46,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-18 20:45:46,084 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:46,084 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:46,113 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:46,306 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:46,306 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:46,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:46,307 INFO L85 PathProgramCache]: Analyzing trace with hash 2143028962, now seen corresponding path program 1 times [2022-11-18 20:45:46,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:46,308 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [11378167] [2022-11-18 20:45:46,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:45:46,308 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:46,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:46,310 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:46,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-18 20:45:47,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:45:47,306 INFO L263 TraceCheckSpWp]: Trace formula consists of 1099 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:45:47,308 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:48,695 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:48,696 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:45:51,771 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:45:51,772 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:51,772 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [11378167] [2022-11-18 20:45:51,772 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [11378167] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:45:51,772 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:45:51,773 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2022-11-18 20:45:51,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [566163879] [2022-11-18 20:45:51,773 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:45:51,774 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2022-11-18 20:45:51,774 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:51,774 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-11-18 20:45:51,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=531, Invalid=1725, Unknown=0, NotChecked=0, Total=2256 [2022-11-18 20:45:51,776 INFO L87 Difference]: Start difference. First operand 4078 states and 5647 transitions. Second operand has 48 states, 48 states have (on average 2.8541666666666665) internal successors, (137), 48 states have internal predecessors, (137), 1 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-11-18 20:45:58,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:45:58,184 INFO L93 Difference]: Finished difference Result 8128 states and 11275 transitions. [2022-11-18 20:45:58,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-18 20:45:58,185 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 48 states have (on average 2.8541666666666665) internal successors, (137), 48 states have internal predecessors, (137), 1 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) Word has length 91 [2022-11-18 20:45:58,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:45:58,214 INFO L225 Difference]: With dead ends: 8128 [2022-11-18 20:45:58,214 INFO L226 Difference]: Without dead ends: 4098 [2022-11-18 20:45:58,229 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 134 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=803, Invalid=2277, Unknown=0, NotChecked=0, Total=3080 [2022-11-18 20:45:58,230 INFO L413 NwaCegarLoop]: 1470 mSDtfsCounter, 33 mSDsluCounter, 35232 mSDsCounter, 0 mSdLazyCounter, 946 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 36702 SdHoareTripleChecker+Invalid, 978 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 946 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.8s IncrementalHoareTripleChecker+Time [2022-11-18 20:45:58,231 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 36702 Invalid, 978 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [32 Valid, 946 Invalid, 0 Unknown, 0 Unchecked, 3.8s Time] [2022-11-18 20:45:58,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4098 states. [2022-11-18 20:45:58,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4098 to 4098. [2022-11-18 20:45:58,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4098 states, 2899 states have (on average 1.2800965850293204) internal successors, (3711), 2917 states have internal predecessors, (3711), 978 states have call successors, (978), 221 states have call predecessors, (978), 220 states have return successors, (978), 977 states have call predecessors, (978), 976 states have call successors, (978) [2022-11-18 20:45:58,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4098 states to 4098 states and 5667 transitions. [2022-11-18 20:45:58,578 INFO L78 Accepts]: Start accepts. Automaton has 4098 states and 5667 transitions. Word has length 91 [2022-11-18 20:45:58,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:45:58,578 INFO L495 AbstractCegarLoop]: Abstraction has 4098 states and 5667 transitions. [2022-11-18 20:45:58,579 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 48 states have (on average 2.8541666666666665) internal successors, (137), 48 states have internal predecessors, (137), 1 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-11-18 20:45:58,579 INFO L276 IsEmpty]: Start isEmpty. Operand 4098 states and 5667 transitions. [2022-11-18 20:45:58,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2022-11-18 20:45:58,581 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:45:58,581 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:45:58,620 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:45:58,807 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:58,807 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:45:58,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:45:58,807 INFO L85 PathProgramCache]: Analyzing trace with hash -457110534, now seen corresponding path program 2 times [2022-11-18 20:45:58,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:45:58,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [893618946] [2022-11-18 20:45:58,809 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:45:58,810 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:45:58,810 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:45:58,812 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:45:58,858 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-18 20:45:59,862 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 20:45:59,862 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:45:59,909 INFO L263 TraceCheckSpWp]: Trace formula consists of 857 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:45:59,912 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:45:59,985 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:45:59,985 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:45:59,985 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:45:59,986 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [893618946] [2022-11-18 20:45:59,986 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [893618946] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:45:59,986 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:45:59,986 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:45:59,987 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994082983] [2022-11-18 20:45:59,987 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:45:59,987 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:45:59,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:45:59,988 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:45:59,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:45:59,989 INFO L87 Difference]: Start difference. First operand 4098 states and 5667 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-18 20:46:01,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:01,755 INFO L93 Difference]: Finished difference Result 9102 states and 12925 transitions. [2022-11-18 20:46:01,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:46:01,757 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 111 [2022-11-18 20:46:01,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:01,796 INFO L225 Difference]: With dead ends: 9102 [2022-11-18 20:46:01,797 INFO L226 Difference]: Without dead ends: 6045 [2022-11-18 20:46:01,808 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:46:01,809 INFO L413 NwaCegarLoop]: 2196 mSDtfsCounter, 2018 mSDsluCounter, 4533 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 656 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2018 SdHoareTripleChecker+Valid, 6729 SdHoareTripleChecker+Invalid, 673 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 656 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:01,809 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2018 Valid, 6729 Invalid, 673 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [656 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-11-18 20:46:01,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6045 states. [2022-11-18 20:46:02,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6045 to 4098. [2022-11-18 20:46:02,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4098 states, 2899 states have (on average 1.2794066919627458) internal successors, (3709), 2917 states have internal predecessors, (3709), 978 states have call successors, (978), 221 states have call predecessors, (978), 220 states have return successors, (978), 977 states have call predecessors, (978), 976 states have call successors, (978) [2022-11-18 20:46:02,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4098 states to 4098 states and 5665 transitions. [2022-11-18 20:46:02,265 INFO L78 Accepts]: Start accepts. Automaton has 4098 states and 5665 transitions. Word has length 111 [2022-11-18 20:46:02,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:02,267 INFO L495 AbstractCegarLoop]: Abstraction has 4098 states and 5665 transitions. [2022-11-18 20:46:02,268 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-18 20:46:02,269 INFO L276 IsEmpty]: Start isEmpty. Operand 4098 states and 5665 transitions. [2022-11-18 20:46:02,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2022-11-18 20:46:02,272 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:02,273 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:02,306 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:02,487 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:02,487 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:02,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:02,487 INFO L85 PathProgramCache]: Analyzing trace with hash -199241997, now seen corresponding path program 1 times [2022-11-18 20:46:02,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:02,489 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1236315435] [2022-11-18 20:46:02,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:02,490 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:02,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:02,492 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:02,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-18 20:46:03,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:46:03,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 1230 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-18 20:46:03,857 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:46:04,250 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:46:04,251 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:46:04,251 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:46:04,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1236315435] [2022-11-18 20:46:04,251 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1236315435] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:46:04,251 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:46:04,252 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-18 20:46:04,252 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054974801] [2022-11-18 20:46:04,252 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:46:04,253 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:46:04,253 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:46:04,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:46:04,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:46:04,254 INFO L87 Difference]: Start difference. First operand 4098 states and 5665 transitions. Second operand has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2022-11-18 20:46:24,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:24,502 INFO L93 Difference]: Finished difference Result 11841 states and 16824 transitions. [2022-11-18 20:46:24,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:46:24,504 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 120 [2022-11-18 20:46:24,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:24,543 INFO L225 Difference]: With dead ends: 11841 [2022-11-18 20:46:24,544 INFO L226 Difference]: Without dead ends: 7818 [2022-11-18 20:46:24,557 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-18 20:46:24,558 INFO L413 NwaCegarLoop]: 3309 mSDtfsCounter, 3164 mSDsluCounter, 12380 mSDsCounter, 0 mSdLazyCounter, 2543 mSolverCounterSat, 925 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 16.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3358 SdHoareTripleChecker+Valid, 15689 SdHoareTripleChecker+Invalid, 3468 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 925 IncrementalHoareTripleChecker+Valid, 2543 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 18.8s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:24,558 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3358 Valid, 15689 Invalid, 3468 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [925 Valid, 2543 Invalid, 0 Unknown, 0 Unchecked, 18.8s Time] [2022-11-18 20:46:24,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7818 states. [2022-11-18 20:46:25,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7818 to 4099. [2022-11-18 20:46:25,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4099 states, 2898 states have (on average 1.2781228433402347) internal successors, (3704), 2919 states have internal predecessors, (3704), 978 states have call successors, (978), 221 states have call predecessors, (978), 222 states have return successors, (978), 976 states have call predecessors, (978), 976 states have call successors, (978) [2022-11-18 20:46:25,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4099 states to 4099 states and 5660 transitions. [2022-11-18 20:46:25,205 INFO L78 Accepts]: Start accepts. Automaton has 4099 states and 5660 transitions. Word has length 120 [2022-11-18 20:46:25,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:25,206 INFO L495 AbstractCegarLoop]: Abstraction has 4099 states and 5660 transitions. [2022-11-18 20:46:25,206 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2022-11-18 20:46:25,206 INFO L276 IsEmpty]: Start isEmpty. Operand 4099 states and 5660 transitions. [2022-11-18 20:46:25,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2022-11-18 20:46:25,213 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:25,213 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:25,244 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:25,431 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:25,431 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:25,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:25,431 INFO L85 PathProgramCache]: Analyzing trace with hash -226816085, now seen corresponding path program 1 times [2022-11-18 20:46:25,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:25,433 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [635415563] [2022-11-18 20:46:25,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:25,433 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:25,433 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:25,434 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:25,435 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-18 20:46:26,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:46:26,601 INFO L263 TraceCheckSpWp]: Trace formula consists of 1274 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:46:26,604 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:46:27,027 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2022-11-18 20:46:27,027 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:46:27,028 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:46:27,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [635415563] [2022-11-18 20:46:27,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [635415563] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:46:27,028 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:46:27,029 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:46:27,029 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1212211388] [2022-11-18 20:46:27,029 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:46:27,030 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:46:27,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:46:27,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:46:27,031 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:46:27,031 INFO L87 Difference]: Start difference. First operand 4099 states and 5660 transitions. Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-11-18 20:46:28,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:28,118 INFO L93 Difference]: Finished difference Result 10581 states and 15034 transitions. [2022-11-18 20:46:28,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:46:28,119 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 132 [2022-11-18 20:46:28,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:28,151 INFO L225 Difference]: With dead ends: 10581 [2022-11-18 20:46:28,151 INFO L226 Difference]: Without dead ends: 6557 [2022-11-18 20:46:28,168 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:46:28,169 INFO L413 NwaCegarLoop]: 2159 mSDtfsCounter, 650 mSDsluCounter, 1461 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 858 SdHoareTripleChecker+Valid, 3620 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:28,170 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [858 Valid, 3620 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:46:28,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6557 states. [2022-11-18 20:46:29,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6557 to 6551. [2022-11-18 20:46:29,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6551 states, 4626 states have (on average 1.3035019455252919) internal successors, (6030), 4651 states have internal predecessors, (6030), 1702 states have call successors, (1702), 221 states have call predecessors, (1702), 222 states have return successors, (1702), 1700 states have call predecessors, (1702), 1700 states have call successors, (1702) [2022-11-18 20:46:29,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6551 states to 6551 states and 9434 transitions. [2022-11-18 20:46:29,100 INFO L78 Accepts]: Start accepts. Automaton has 6551 states and 9434 transitions. Word has length 132 [2022-11-18 20:46:29,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:29,101 INFO L495 AbstractCegarLoop]: Abstraction has 6551 states and 9434 transitions. [2022-11-18 20:46:29,102 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-11-18 20:46:29,102 INFO L276 IsEmpty]: Start isEmpty. Operand 6551 states and 9434 transitions. [2022-11-18 20:46:29,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2022-11-18 20:46:29,107 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:29,107 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:29,145 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:29,323 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:29,323 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:29,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:29,324 INFO L85 PathProgramCache]: Analyzing trace with hash 73355820, now seen corresponding path program 1 times [2022-11-18 20:46:29,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:29,325 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1746451325] [2022-11-18 20:46:29,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:29,325 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:29,325 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:29,326 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:29,328 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-18 20:46:30,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:46:30,753 INFO L263 TraceCheckSpWp]: Trace formula consists of 1262 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:46:30,758 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:46:30,809 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:46:30,810 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:46:30,810 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:46:30,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1746451325] [2022-11-18 20:46:30,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1746451325] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:46:30,811 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:46:30,811 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:46:30,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1878958329] [2022-11-18 20:46:30,812 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:46:30,812 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:46:30,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:46:30,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:46:30,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:46:30,814 INFO L87 Difference]: Start difference. First operand 6551 states and 9434 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-11-18 20:46:33,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:33,296 INFO L93 Difference]: Finished difference Result 9872 states and 14531 transitions. [2022-11-18 20:46:33,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:46:33,297 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 130 [2022-11-18 20:46:33,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:33,334 INFO L225 Difference]: With dead ends: 9872 [2022-11-18 20:46:33,334 INFO L226 Difference]: Without dead ends: 9864 [2022-11-18 20:46:33,338 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:46:33,339 INFO L413 NwaCegarLoop]: 2554 mSDtfsCounter, 1293 mSDsluCounter, 3440 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 385 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1319 SdHoareTripleChecker+Valid, 5994 SdHoareTripleChecker+Invalid, 404 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 385 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:33,340 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1319 Valid, 5994 Invalid, 404 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [385 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-18 20:46:33,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9864 states. [2022-11-18 20:46:34,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9864 to 6557. [2022-11-18 20:46:34,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6557 states, 4630 states have (on average 1.3032397408207343) internal successors, (6034), 4655 states have internal predecessors, (6034), 1704 states have call successors, (1704), 221 states have call predecessors, (1704), 222 states have return successors, (1704), 1702 states have call predecessors, (1704), 1702 states have call successors, (1704) [2022-11-18 20:46:34,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6557 states to 6557 states and 9442 transitions. [2022-11-18 20:46:34,611 INFO L78 Accepts]: Start accepts. Automaton has 6557 states and 9442 transitions. Word has length 130 [2022-11-18 20:46:34,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:34,611 INFO L495 AbstractCegarLoop]: Abstraction has 6557 states and 9442 transitions. [2022-11-18 20:46:34,612 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-11-18 20:46:34,612 INFO L276 IsEmpty]: Start isEmpty. Operand 6557 states and 9442 transitions. [2022-11-18 20:46:34,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2022-11-18 20:46:34,617 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:34,618 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:34,655 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:34,843 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:34,843 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:34,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:34,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1802794400, now seen corresponding path program 1 times [2022-11-18 20:46:34,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:34,845 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1195764137] [2022-11-18 20:46:34,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:34,845 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:34,846 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:34,847 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:34,886 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-18 20:46:36,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:46:36,361 INFO L263 TraceCheckSpWp]: Trace formula consists of 1267 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:46:36,364 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:46:36,869 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:46:36,869 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:46:37,448 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-18 20:46:37,448 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:46:37,448 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1195764137] [2022-11-18 20:46:37,449 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1195764137] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:46:37,449 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:46:37,449 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2022-11-18 20:46:37,449 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721905599] [2022-11-18 20:46:37,450 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:46:37,450 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:46:37,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:46:37,451 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:46:37,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:46:37,451 INFO L87 Difference]: Start difference. First operand 6557 states and 9442 transitions. Second operand has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 4 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-18 20:46:41,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:41,716 INFO L93 Difference]: Finished difference Result 13045 states and 18812 transitions. [2022-11-18 20:46:41,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:46:41,718 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 4 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 134 [2022-11-18 20:46:41,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:41,745 INFO L225 Difference]: With dead ends: 13045 [2022-11-18 20:46:41,745 INFO L226 Difference]: Without dead ends: 6563 [2022-11-18 20:46:41,766 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 262 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:46:41,767 INFO L413 NwaCegarLoop]: 2412 mSDtfsCounter, 2484 mSDsluCounter, 3411 mSDsCounter, 0 mSdLazyCounter, 633 mSolverCounterSat, 402 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2881 SdHoareTripleChecker+Valid, 5823 SdHoareTripleChecker+Invalid, 1035 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 402 IncrementalHoareTripleChecker+Valid, 633 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:41,767 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2881 Valid, 5823 Invalid, 1035 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [402 Valid, 633 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2022-11-18 20:46:41,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6563 states. [2022-11-18 20:46:43,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6563 to 6557. [2022-11-18 20:46:43,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6557 states, 4630 states have (on average 1.3006479481641469) internal successors, (6022), 4655 states have internal predecessors, (6022), 1704 states have call successors, (1704), 221 states have call predecessors, (1704), 222 states have return successors, (1704), 1702 states have call predecessors, (1704), 1702 states have call successors, (1704) [2022-11-18 20:46:43,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6557 states to 6557 states and 9430 transitions. [2022-11-18 20:46:43,148 INFO L78 Accepts]: Start accepts. Automaton has 6557 states and 9430 transitions. Word has length 134 [2022-11-18 20:46:43,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:43,149 INFO L495 AbstractCegarLoop]: Abstraction has 6557 states and 9430 transitions. [2022-11-18 20:46:43,149 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 4 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-18 20:46:43,149 INFO L276 IsEmpty]: Start isEmpty. Operand 6557 states and 9430 transitions. [2022-11-18 20:46:43,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2022-11-18 20:46:43,160 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:43,160 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:43,202 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:43,375 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:43,375 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:43,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:43,376 INFO L85 PathProgramCache]: Analyzing trace with hash -1518481568, now seen corresponding path program 1 times [2022-11-18 20:46:43,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:43,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1716447869] [2022-11-18 20:46:43,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:43,379 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:43,379 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:43,381 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:43,422 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-18 20:46:45,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:46:45,158 INFO L263 TraceCheckSpWp]: Trace formula consists of 1330 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:46:45,162 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:46:45,217 INFO L134 CoverageAnalysis]: Checked inductivity of 1043 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2022-11-18 20:46:45,218 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:46:45,218 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:46:45,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1716447869] [2022-11-18 20:46:45,218 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1716447869] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:46:45,218 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:46:45,218 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:46:45,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552744017] [2022-11-18 20:46:45,219 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:46:45,219 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:46:45,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:46:45,220 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:46:45,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:46:45,220 INFO L87 Difference]: Start difference. First operand 6557 states and 9430 transitions. Second operand has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 3 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-18 20:46:45,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:45,980 INFO L93 Difference]: Finished difference Result 12389 states and 17789 transitions. [2022-11-18 20:46:45,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:46:45,981 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 3 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 153 [2022-11-18 20:46:45,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:46,004 INFO L225 Difference]: With dead ends: 12389 [2022-11-18 20:46:46,005 INFO L226 Difference]: Without dead ends: 5895 [2022-11-18 20:46:46,024 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:46:46,024 INFO L413 NwaCegarLoop]: 1478 mSDtfsCounter, 13 mSDsluCounter, 2935 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 4413 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:46,025 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 4413 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:46:46,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5895 states. [2022-11-18 20:46:46,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5895 to 5886. [2022-11-18 20:46:46,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5886 states, 4157 states have (on average 1.2966081308636035) internal successors, (5390), 4180 states have internal predecessors, (5390), 1510 states have call successors, (1510), 217 states have call predecessors, (1510), 218 states have return successors, (1510), 1506 states have call predecessors, (1510), 1508 states have call successors, (1510) [2022-11-18 20:46:46,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5886 states to 5886 states and 8410 transitions. [2022-11-18 20:46:46,847 INFO L78 Accepts]: Start accepts. Automaton has 5886 states and 8410 transitions. Word has length 153 [2022-11-18 20:46:46,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:46,847 INFO L495 AbstractCegarLoop]: Abstraction has 5886 states and 8410 transitions. [2022-11-18 20:46:46,848 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 3 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-18 20:46:46,848 INFO L276 IsEmpty]: Start isEmpty. Operand 5886 states and 8410 transitions. [2022-11-18 20:46:46,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2022-11-18 20:46:46,854 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:46,854 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:46,894 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:47,080 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:47,081 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:47,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:47,081 INFO L85 PathProgramCache]: Analyzing trace with hash -2121096315, now seen corresponding path program 1 times [2022-11-18 20:46:47,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:47,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1181579119] [2022-11-18 20:46:47,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:47,083 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:47,083 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:47,087 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:47,118 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-18 20:46:48,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:46:48,446 INFO L263 TraceCheckSpWp]: Trace formula consists of 1309 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:46:48,449 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:46:49,071 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1028 trivial. 0 not checked. [2022-11-18 20:46:49,072 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:46:49,072 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:46:49,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1181579119] [2022-11-18 20:46:49,072 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1181579119] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:46:49,073 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:46:49,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:46:49,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272554817] [2022-11-18 20:46:49,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:46:49,074 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:46:49,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:46:49,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:46:49,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:46:49,076 INFO L87 Difference]: Start difference. First operand 5886 states and 8410 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2022-11-18 20:46:49,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:46:49,761 INFO L93 Difference]: Finished difference Result 11676 states and 16707 transitions. [2022-11-18 20:46:49,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:46:49,761 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 150 [2022-11-18 20:46:49,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:46:49,784 INFO L225 Difference]: With dead ends: 11676 [2022-11-18 20:46:49,785 INFO L226 Difference]: Without dead ends: 5865 [2022-11-18 20:46:49,801 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 148 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:46:49,802 INFO L413 NwaCegarLoop]: 1464 mSDtfsCounter, 1397 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1397 SdHoareTripleChecker+Valid, 1464 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:46:49,803 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1397 Valid, 1464 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:46:49,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5865 states. [2022-11-18 20:46:51,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5865 to 5865. [2022-11-18 20:46:51,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5865 states, 4136 states have (on average 1.293036750483559) internal successors, (5348), 4159 states have internal predecessors, (5348), 1510 states have call successors, (1510), 217 states have call predecessors, (1510), 218 states have return successors, (1510), 1506 states have call predecessors, (1510), 1508 states have call successors, (1510) [2022-11-18 20:46:51,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5865 states to 5865 states and 8368 transitions. [2022-11-18 20:46:51,295 INFO L78 Accepts]: Start accepts. Automaton has 5865 states and 8368 transitions. Word has length 150 [2022-11-18 20:46:51,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:46:51,296 INFO L495 AbstractCegarLoop]: Abstraction has 5865 states and 8368 transitions. [2022-11-18 20:46:51,296 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2022-11-18 20:46:51,296 INFO L276 IsEmpty]: Start isEmpty. Operand 5865 states and 8368 transitions. [2022-11-18 20:46:51,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2022-11-18 20:46:51,307 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:46:51,308 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:46:51,347 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-18 20:46:51,535 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:51,535 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:46:51,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:46:51,536 INFO L85 PathProgramCache]: Analyzing trace with hash -1838241346, now seen corresponding path program 1 times [2022-11-18 20:46:51,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:46:51,537 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [984797575] [2022-11-18 20:46:51,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:46:51,538 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:46:51,538 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:46:51,539 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:46:51,541 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-18 20:47:14,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:47:14,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:47:33,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:47:34,971 INFO L130 FreeRefinementEngine]: Strategy WOLF found a feasible trace [2022-11-18 20:47:34,971 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-18 20:47:34,972 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-18 20:47:35,026 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-18 20:47:35,199 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:47:35,203 INFO L444 BasicCegarLoop]: Path program histogram: [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:47:35,210 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-18 20:47:35,549 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 08:47:35 BoogieIcfgContainer [2022-11-18 20:47:35,549 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-18 20:47:35,550 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-18 20:47:35,550 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-18 20:47:35,550 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-18 20:47:35,551 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:45:23" (3/4) ... [2022-11-18 20:47:35,557 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-18 20:47:35,557 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-18 20:47:35,558 INFO L158 Benchmark]: Toolchain (without parser) took 165532.11ms. Allocated memory was 58.7MB in the beginning and 2.1GB in the end (delta: 2.1GB). Free memory was 39.4MB in the beginning and 1.3GB in the end (delta: -1.2GB). Peak memory consumption was 821.3MB. Max. memory is 16.1GB. [2022-11-18 20:47:35,559 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 58.7MB. Free memory was 39.6MB in the beginning and 39.6MB in the end (delta: 50.5kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:47:35,560 INFO L158 Benchmark]: CACSL2BoogieTranslator took 3207.75ms. Allocated memory was 58.7MB in the beginning and 151.0MB in the end (delta: 92.3MB). Free memory was 39.2MB in the beginning and 64.3MB in the end (delta: -25.1MB). Peak memory consumption was 79.9MB. Max. memory is 16.1GB. [2022-11-18 20:47:35,561 INFO L158 Benchmark]: Boogie Procedure Inliner took 243.29ms. Allocated memory is still 151.0MB. Free memory was 64.3MB in the beginning and 45.4MB in the end (delta: 18.9MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2022-11-18 20:47:35,562 INFO L158 Benchmark]: Boogie Preprocessor took 264.10ms. Allocated memory was 151.0MB in the beginning and 247.5MB in the end (delta: 96.5MB). Free memory was 45.4MB in the beginning and 169.8MB in the end (delta: -124.4MB). Peak memory consumption was 8.8MB. Max. memory is 16.1GB. [2022-11-18 20:47:35,563 INFO L158 Benchmark]: RCFGBuilder took 29279.75ms. Allocated memory is still 247.5MB. Free memory was 169.8MB in the beginning and 132.5MB in the end (delta: 37.3MB). Peak memory consumption was 150.5MB. Max. memory is 16.1GB. [2022-11-18 20:47:35,563 INFO L158 Benchmark]: TraceAbstraction took 132520.25ms. Allocated memory was 247.5MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 131.5MB in the beginning and 1.3GB in the end (delta: -1.1GB). Peak memory consumption was 724.2MB. Max. memory is 16.1GB. [2022-11-18 20:47:35,563 INFO L158 Benchmark]: Witness Printer took 7.56ms. Allocated memory is still 2.1GB. Free memory is still 1.3GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:47:35,569 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 58.7MB. Free memory was 39.6MB in the beginning and 39.6MB in the end (delta: 50.5kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 3207.75ms. Allocated memory was 58.7MB in the beginning and 151.0MB in the end (delta: 92.3MB). Free memory was 39.2MB in the beginning and 64.3MB in the end (delta: -25.1MB). Peak memory consumption was 79.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 243.29ms. Allocated memory is still 151.0MB. Free memory was 64.3MB in the beginning and 45.4MB in the end (delta: 18.9MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * Boogie Preprocessor took 264.10ms. Allocated memory was 151.0MB in the beginning and 247.5MB in the end (delta: 96.5MB). Free memory was 45.4MB in the beginning and 169.8MB in the end (delta: -124.4MB). Peak memory consumption was 8.8MB. Max. memory is 16.1GB. * RCFGBuilder took 29279.75ms. Allocated memory is still 247.5MB. Free memory was 169.8MB in the beginning and 132.5MB in the end (delta: 37.3MB). Peak memory consumption was 150.5MB. Max. memory is 16.1GB. * TraceAbstraction took 132520.25ms. Allocated memory was 247.5MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 131.5MB in the beginning and 1.3GB in the end (delta: -1.1GB). Peak memory consumption was 724.2MB. Max. memory is 16.1GB. * Witness Printer took 7.56ms. Allocated memory is still 2.1GB. Free memory is still 1.3GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 7949]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of large string literal at line 7341. Possible FailurePath: [L5243-L5251] static struct pci_device_id const fst_pci_dev_id[8U] = { {5657U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 1UL}, {5657U, 1088U, 4294967295U, 4294967295U, 0U, 0U, 2UL}, {5657U, 1552U, 4294967295U, 4294967295U, 0U, 0U, 3UL}, {5657U, 1568U, 4294967295U, 4294967295U, 0U, 0U, 4UL}, {5657U, 1600U, 4294967295U, 4294967295U, 0U, 0U, 5UL}, {5657U, 5648U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {5657U, 5650U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L7341-L7342] static char *type_strings[7U] = { (char *)"no hardware", (char *)"FarSync T2P", (char *)"FarSync T4P", (char *)"FarSync T1U", (char *)"FarSync T2U", (char *)"FarSync T4U", (char *)"FarSync TE1"}; [L5238] static int fst_txq_low = 8; [L5262] static u64 fst_work_intq ; [L5260] static spinlock_t fst_work_q_lock ; [L5259] static struct fst_card_info *fst_card_array[32U] ; [L7800] int LDV_IN_INTERRUPT ; [L5242] static int fst_excluded_list[32U] ; [L5239] static int fst_txq_high = 12; [L5257] static struct tasklet_struct fst_tx_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_tx_work_q, 0UL}; [L5258] static struct tasklet_struct fst_int_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_int_work_q, 0UL}; [L7394-L7427] static struct net_device_ops const fst_ops = {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & fst_open, & fst_close, & hdlc_start_xmit, (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * , int ))0, (void (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , void * ))0, (int (*)(struct net_device * ))0, & fst_ioctl, (int (*)(struct net_device * , struct ifmap * ))0, & hdlc_change_mtu, (int (*)(struct net_device * , struct neigh_parms * ))0, & fst_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0, (struct net_device_stats *(*)(struct net_device * ))0, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , int , u8 * ))0, (int (*)(struct net_device * , int , u16 , u8 ))0, (int (*)(struct net_device * , int , int ))0, (int (*)(struct net_device * , int , struct ifla_vf_info * ))0, (int (*)(struct net_device * , int , struct nlattr ** ))0, (int (*)(struct net_device * , int , struct sk_buff * ))0, (int (*)(struct net_device * , u8 ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u16 ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u64 * , int ))0, (int (*)(struct net_device * , struct sk_buff const * , u16 , u32 ))0, (int (*)(struct net_device * , struct net_device * ))0, (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * , u32 ))0, (int (*)(struct net_device * , u32 ))0}; [L7953] int ldv_module_refcounter = 1; [L7745-L7759] static struct pci_driver fst_driver = {{(struct list_head *)0, (struct list_head *)0}, "fst", (struct pci_device_id const *)(& fst_pci_dev_id), & fst_add_one, & fst_remove_one, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * ))0, (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0, {(char const *)0, (struct bus_type *)0, (struct module *)0, (char const *)0, (_Bool)0, (struct of_device_id const *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0, (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t ))0, (int (*)(struct device * ))0, (struct attribute_group const **)0, (struct dev_pm_ops const *)0, (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0, {(struct lock_class *)0, (struct lock_class *)0}, (char const *)0, 0, 0UL}}}}, {(struct list_head *)0, (struct list_head *)0}}}; [L5241] static int fst_excluded_cards = 0; [L5240] static int fst_max_reads = 7; [L5252] struct pci_device_id const __mod_pci_device_table ; [L5261] static u64 fst_work_txq ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=0, ldv_module_refcounter=1, type_strings={46:0}] [L7802] struct net_device *var_group1 ; [L7803] int res_fst_open_36 ; [L7804] int res_fst_close_37 ; [L7805] struct ifreq *var_group2 ; [L7806] int var_fst_ioctl_33_p2 ; [L7807] struct pci_dev *var_group3 ; [L7808] struct pci_device_id const *var_fst_add_one_42_p1 ; [L7809] int res_fst_add_one_42 ; [L7810] int var_fst_intr_27_p0 ; [L7811] void *var_fst_intr_27_p1 ; [L7812] int ldv_s_fst_ops_net_device_ops ; [L7813] int ldv_s_fst_driver_pci_driver ; [L7814] int tmp ; [L7815] int tmp___0 ; [L7816] int tmp___1 ; [L7819] ldv_s_fst_ops_net_device_ops = 0 [L7820] ldv_s_fst_driver_pci_driver = 0 [L7821] LDV_IN_INTERRUPT = 1 [L7822] FCALL ldv_initialize() [L7823] CALL, EXPR fst_init() [L7761] int i ; [L7762] struct lock_class_key __key ; [L7763] int tmp ; [L7765] i = 0 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND FALSE !(i <= 31) VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7778] CALL spinlock_check(& fst_work_q_lock) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={48:0}, type_strings={46:0}] [L4600] return (& lock->ldv_6060.rlock); VAL [\result={48:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={48:0}, lock={48:0}, type_strings={46:0}] [L7778] RET spinlock_check(& fst_work_q_lock) VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, spinlock_check(& fst_work_q_lock)={48:0}, type_strings={46:0}] [L7779-L7780] FCALL __raw_spin_lock_init(& fst_work_q_lock.ldv_6060.rlock, "&(&fst_work_q_lock)->rlock", & __key) VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7781] CALL, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L8074] return __VERIFIER_nondet_int(); [L7781] RET, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7781] tmp = __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7783] return (tmp); [L7783] return (tmp); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp=0, type_strings={46:0}] [L7823] RET, EXPR fst_init() [L7823] tmp = fst_init() [L7825] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, type_strings={46:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___1=2147483648, type_strings={46:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND TRUE tmp___0 == 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={46:0}] [L7855] COND TRUE ldv_s_fst_ops_net_device_ops == 0 [L7857] CALL, EXPR fst_open(var_group1) [L7167] int err ; [L7168] struct fst_port_info *port ; [L7169] struct hdlc_device *tmp ; [L7170] int tmp___0 ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7173] CALL, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L5204] void *tmp ; [L5207] CALL, EXPR netdev_priv((struct net_device const *)dev) [L5064] return ((void *)dev + 2560U); VAL [\result={0:2560}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L5207] RET, EXPR netdev_priv((struct net_device const *)dev) [L5207] tmp = netdev_priv((struct net_device const *)dev) [L5209] return ((struct hdlc_device *)tmp); VAL [\result={0:2560}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp={0:2560}, type_strings={46:0}] [L7173] RET, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, dev_to_hdlc(dev)={0:2560}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7173] tmp = dev_to_hdlc(dev) [L7174] EXPR tmp->priv [L7174] port = (struct fst_port_info *)tmp->priv [L7175] CALL, EXPR ldv_try_module_get_1(& __this_module) [L8027] int tmp ; [L8030] CALL, EXPR ldv_try_module_get(module) [L7965] int module_get_succeeded ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, module={0:-9223372036854775808}, module={0:-9223372036854775808}, type_strings={46:0}] [L7967] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) [L7969] CALL, EXPR ldv_undefined_int() [L8154] return __VERIFIER_nondet_int(); [L7969] RET, EXPR ldv_undefined_int() [L7969] module_get_succeeded = ldv_undefined_int() [L7971] COND TRUE module_get_succeeded == 1 [L7972] ldv_module_refcounter = ldv_module_refcounter + 1 [L7973] return (1); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={0:-9223372036854775808}, module={0:-9223372036854775808}, module_get_succeeded=1, type_strings={46:0}] [L8030] RET, EXPR ldv_try_module_get(module) [L8030] tmp = ldv_try_module_get(module) [L8032] return (tmp); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={0:-9223372036854775808}, module={0:-9223372036854775808}, tmp=1, type_strings={46:0}] [L7175] RET, EXPR ldv_try_module_get_1(& __this_module) [L7175] tmp___0 = ldv_try_module_get_1(& __this_module) [L7177] COND FALSE !(tmp___0 == 0) [L7181] EXPR port->mode VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, port->mode=4, tmp={0:2560}, tmp___0=1, type_strings={46:0}] [L7181] COND FALSE !(port->mode != 4) [L7195] CALL fst_openport(port) [L7102] int signals ; [L7103] int txq_length ; [L7104] unsigned int tmp ; [L7105] int tmp___0 ; [L7107] EXPR port->card [L7107] EXPR (port->card)->state VAL [(port->card)->state=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, port={0:0}, port->card={17592186044416:0}, type_strings={46:0}] [L7107] COND FALSE !((port->card)->state == 4U) [L7195] RET fst_openport(port) [L7196] CALL netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5137] struct netdev_queue *tmp ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5140] CALL, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [\old(index)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5058] EXPR dev->_tx [L5058] return ((struct netdev_queue *)dev->_tx + (unsigned long )index); [L5140] RET, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, netdev_get_tx_queue((struct net_device const *)dev, 0U)={0:0}, type_strings={46:0}] [L5140] tmp = netdev_get_tx_queue((struct net_device const *)dev, 0U) [L5141] CALL netif_tx_wake_queue(tmp) [L5111] int tmp ; [L5112] int tmp___0 ; [L5115] CALL, EXPR netpoll_trap() [L8174] return __VERIFIER_nondet_int(); [L5115] RET, EXPR netpoll_trap() [L5115] tmp = netpoll_trap() [L5117] COND TRUE tmp != 0 [L5119] CALL netif_tx_start_queue(dev_queue) [L5105] FCALL clear_bit(0, (unsigned long volatile *)(& dev_queue->state)) [L5119] RET netif_tx_start_queue(dev_queue) [L5141] RET netif_tx_wake_queue(tmp) [L7196] RET netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, tmp={0:2560}, tmp___0=1, type_strings={46:0}] [L7198] return (0); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, tmp={0:2560}, tmp___0=1, type_strings={46:0}] [L7857] RET, EXPR fst_open(var_group1) [L7857] res_fst_open_36 = fst_open(var_group1) [L7858] FCALL ldv_check_return_value(res_fst_open_36) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7860] COND FALSE !(res_fst_open_36 < 0) [L7864] ldv_s_fst_ops_net_device_ops = ldv_s_fst_ops_net_device_ops + 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND FALSE !(tmp___0 == 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7837] COND FALSE !(tmp___0 == 1) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7840] COND FALSE !(tmp___0 == 2) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7843] COND FALSE !(tmp___0 == 3) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7846] COND TRUE tmp___0 == 4 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_group1={0:0}] [L7893] COND TRUE ldv_s_fst_driver_pci_driver == 0 [L7895] CALL, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7429] int no_of_cards_added ; [L7430] struct fst_card_info *card ; [L7431] int err ; [L7432] int i ; [L7433] bool __print_once ; [L7434] void *tmp ; [L7435] char *tmp___0 ; [L7436] void *tmp___1 ; [L7437] char *tmp___2 ; [L7438] void *tmp___3 ; [L7439] int tmp___4 ; [L7440] int tmp___5 ; [L7441] struct lock_class_key __key ; [L7442] struct net_device *dev ; [L7443] struct net_device *tmp___6 ; [L7444] hdlc_device *hdlc ; [L7445] int tmp___7 ; [L7446] struct hdlc_device *tmp___8 ; [L7447] int tmp___9 ; [L7449] no_of_cards_added = 0 [L7450] err = 0 VAL [__key={63:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, type_strings={46:0}] [L7451] COND TRUE ! __print_once [L7453] __print_once = (bool )1 [L7458] COND FALSE !(fst_excluded_cards != 0) VAL [__key={63:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={0:-9223372036854775808}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, type_strings={46:0}] [L7480] CALL, EXPR kzalloc(1000UL, 208U) [L4776] void *tmp ; [L4779] CALL, EXPR kmalloc(size, flags | 32768U) [L4766] void *tmp___2 ; [L4769] CALL, EXPR __kmalloc(size, flags) [L8067] CALL, EXPR ldv_malloc(arg0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L8061] COND TRUE __VERIFIER_nondet_bool() [L8061] return 0; VAL [\old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, type_strings={46:0}] [L8067] RET, EXPR ldv_malloc(arg0) VAL [\old(arg0)=null, \old(arg1)=32976, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, arg0=null, arg1=32976, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_malloc(arg0)={0:0}, ldv_module_refcounter=2, type_strings={46:0}] [L8067] return ldv_malloc(arg0); [L4769] RET, EXPR __kmalloc(size, flags) [L4769] tmp___2 = __kmalloc(size, flags) [L4771] return (tmp___2); VAL [\old(flags)=32976, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, flags=32976, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp___2={0:0}, type_strings={46:0}] [L4779] RET, EXPR kmalloc(size, flags | 32768U) [L4779] tmp = kmalloc(size, flags | 32768U) [L4781] return (tmp); VAL [\old(flags)=208, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, flags=208, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp={0:0}, type_strings={46:0}] [L7480] RET, EXPR kzalloc(1000UL, 208U) [L7480] tmp = kzalloc(1000UL, 208U) [L7481] card = (struct fst_card_info *)tmp VAL [__key={63:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={0:-9223372036854775808}, card={0:0}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, tmp={0:0}, type_strings={46:0}] [L7483] COND TRUE (unsigned long )card == (unsigned long )((struct fst_card_info *)0) [L7487] return (-12); [L7487] return (-12); VAL [\result=-12, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={0:-9223372036854775808}, card={0:0}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, tmp={0:0}, type_strings={46:0}] [L7895] RET, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7895] res_fst_add_one_42 = fst_add_one(var_group3, var_fst_add_one_42_p1) [L7896] FCALL ldv_check_return_value(res_fst_add_one_42) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=4294967284, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_fst_add_one_42_p1={265:266}, var_group1={0:0}, var_group3={267:268}] [L7898] COND TRUE res_fst_add_one_42 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=4294967284, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={46:0}, var_fst_add_one_42_p1={265:266}, var_group1={0:0}, var_group3={267:268}] [L7937] CALL fst_cleanup_module() [L7791] FCALL pci_unregister_driver(& fst_driver) [L7937] RET fst_cleanup_module() [L7941] CALL ldv_check_final_state() [L8017] COND TRUE ldv_module_refcounter != 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L8019] CALL ldv_blast_assert() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L7949] reach_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={0:-9223372036854775808}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 57 procedures, 1064 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 132.1s, OverallIterations: 16, TraceHistogramMax: 32, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.1s, AutomataDifference: 49.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18523 SdHoareTripleChecker+Valid, 35.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 17505 mSDsluCounter, 138393 SdHoareTripleChecker+Invalid, 31.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 107673 mSDsCounter, 3029 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 5582 IncrementalHoareTripleChecker+Invalid, 8611 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 3029 mSolverCounterUnsat, 30720 mSDtfsCounter, 5582 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1735 GetRequests, 1594 SyntacticMatches, 0 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 10.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6557occurred in iteration=12, InterpolantAutomatonStates: 126, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 8.5s AutomataMinimizationTime, 15 MinimizatonAttempts, 10958 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 32.1s SatisfiabilityAnalysisTime, 10.7s InterpolantComputationTime, 1512 NumberOfCodeBlocks, 1376 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 1694 ConstructedInterpolants, 0 QuantifiedInterpolants, 3575 SizeOfPredicates, 31 NumberOfNonLiveVariables, 15606 ConjunctsInSsa, 95 ConjunctsInUnsatCore, 20 InterpolantComputations, 10 PerfectInterpolantSequences, 8825/10031 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-18 20:47:35,653 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6d9901e-cceb-471c-a875-dbaa81cdf84d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample